JP2013211810A - Encoding device and encoding method, and decoding device and decoding method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate recovery from an error during decoding and to obtain an image of higher quality after decoding.SOLUTION: A differential between pixel data inputted from a pixel block including a predetermined number of continuous pixel data items and local decode data from a retarder is quantized. The quantized differential data are inputted to a first input terminal of an output selector. Furthermore, the quantized differential data are inversely quantized, added to the local decode data supplied from the retarder by an adder, and inputted to a local decode data selector. The local decode data selector selects input pixel data at the head of a line and selects output of the adder in other timing. Output of the local decode data selector is stored in the retarder as next local decode data and inputted to a second input terminal of the output selector. The output selector selects the second input terminal in accordance with input of pixel data at the head of the pixel block and selects the first input terminal in accordance with input of other pixel data.

Description

  The present invention relates to an encoding device and an encoding method, and a decoding device and a decoding method suitable for use in compression encoding image data.

  In recent years, with the spread of digital high-definition broadcasts and HD (High Definition) image recording devices, and the higher resolution of digital cameras, the size and resolution of television receivers used at home has increased. It is out. For this reason, as for LSI (Large-Scale Integration) that performs image processing in a television receiver, the demand for LSIs that support HD images (1920 pixels × 1080 lines) is increasing.

  Incidentally, in image processing, enhancer, frame rate conversion processing, and the like require that image data of one frame or more be stored in a memory such as a DRAM (Dynamic Random Access Memory). A memory for storing image data is expensive because high-speed access is required, and a plurality of large-capacity memories are required to store a plurality of HD image data. In some cases, this increases the cost of the product and increases the number of parts.

  Therefore, a technique for compressing and encoding image data and storing it in a memory has been conventionally developed. The MPEG (Moving Pictures Experts Group) method is known as one of the compression coding methods for image data, but the compression coding by the MPEG method has a large area when the circuit is made into LSI because the algorithm is complicated. Therefore, it is not suitable for application to a signal processing LSI specialized in image quality enhancement processing or an inexpensive image processing LSI.

  For example, Patent Literature 1 discloses an encoding method for simply compressing and encoding image data.

  According to the description in Patent Literature 1, the image signal is compressed and encoded by quantizing the difference value between the local decoded signal of the previous input pixel signal in the coding order for each coding block unit. ing. Since a non-quantized pixel, that is, a non-encoded pixel (original pixel) is inserted at the head of the encoded block, the compression-encoded image signal is independent for each encoded block. Decoding processing can be performed. For this reason, for example, even when a read error occurs when a compression-encoded image signal is read from the memory, it can be restored in units of encoded blocks.

JP 2011-124618 A

  In Patent Document 1, an original pixel is inserted at the head of an encoded block. Therefore, a pixel having a quantization error of “0” appears for each head of the encoded block. For this reason, when this image is displayed on the screen, there is a problem that a vertical stripe appears for each coding block due to a pixel having a quantization error of “0”.

  The present invention has been made in view of the above, and an object of the present invention is to make it easy to recover from an error during decoding and to obtain a higher quality image after decoding.

  In order to solve the above-described problems and achieve the object, the first invention includes a storage unit that stores local decoded data, a difference output unit that outputs a difference between input data and local decoded data, and a differential output A compression unit that compresses the difference output by the compression unit, a decompression unit that decompresses the data compressed by the compression unit, and an addition unit that adds the local decoded data to the data decompressed by the decompression unit. A first selection that outputs one of the output of the local decoding unit that stores the output in the storage unit as the next local decoded data in the encoding order in the storage unit, the output of the compression unit, and the output of the addition unit, and outputs the encoded data The first selection unit selects the output of the addition unit for each predetermined number of input data.

  The second invention is a difference output step for outputting a difference between input data and local decoded data stored in the storage unit, a compression step for compressing the difference output by the difference output step, and a compression step. A decompression step for decompressing the generated data, and an addition step for adding the local decoded data to the data decompressed by the decompression step, and a local decoding step for storing the output of the addition step in the storage unit as the next local decoded data; A selection step of selecting one of the output from the compression step and the output from the addition step and outputting the selected data as encoded data. The selection step selects the output from the addition step for each predetermined number of input data. It is characterized by that.

  Further, the third invention expands the output obtained by compressing the difference between the input data and the local decoded data, adds the local decoded data, uses the added output as the next local decoded data, and compresses each input data. When outputting the output as the first encoded data, the added output is selected for each predetermined number of input data and output as the second encoded data, and the first encoded data is the same as the input data. A decoding device that performs a decoding process on a packet that is arranged at the beginning as the data length and sequentially distributes the second encoded data after the first encoded data, and a storage unit that stores the decoded data; An expansion unit that expands the second encoded data; an adder that adds the second encoded data expanded by the expansion unit; and the decoded data stored in the storage unit; the first encoded data; One of the outputs from the adder And characterized by having a selection section to be stored in the selected and the storage unit as a decoded data.

  In addition, the fourth invention expands the output obtained by compressing the difference between the input data and the local decoded data, adds the local decoded data, uses the added output as the next local decoded data, and compresses each input data. When outputting the output as the first encoded data, the added output is selected for each predetermined number of input data and output as the second encoded data, and the first encoded data is the same as the input data. A decoding method for performing decoding processing on a packet that is arranged at the head as a data length and sequentially distributes second encoded data following the first encoded data, and stores the decoded data in a storage unit An expansion step for expanding the second encoded data, an addition step for adding the second encoded data expanded by the expansion step, and the decoded data stored in the storage unit; and a first code Chemical day And either one of the output by the adding step, and having a selection step of storing the selected and the storage unit as a decoded data.

  According to the present invention, it is possible to easily recover from an error at the time of decoding and to obtain a higher quality image after decoding.

FIG. 1 is a block diagram schematically showing an exemplary configuration of an encoding apparatus applicable to each embodiment. FIG. 2 is a block diagram illustrating a configuration of an example of a known encoding unit. FIG. 3 is a schematic diagram illustrating an exemplary configuration of a packet according to a known technique. FIG. 4 is a block diagram illustrating a configuration of an example of an encoding unit according to the first embodiment. FIG. 5 is a schematic diagram illustrating an exemplary configuration of a packet according to the first embodiment. FIG. 6 is a schematic diagram for explaining the relationship between the states of the signal line_first and the signal first_word and the output of the output processing unit. FIG. 7 is a block diagram illustrating a configuration of an example of a decoding device applicable to the first embodiment. FIG. 8 is a block diagram showing an example of the configuration of a decoding device that enables two-phase output according to the second embodiment. FIG. 9 is a schematic diagram illustrating an example of encoded data corresponding to a two-phase output. FIG. 10 is a block diagram illustrating a configuration of an example of an image processing apparatus according to the third embodiment.

  Exemplary embodiments of an encoding device, an encoding method, and a decoding device and a decoding method will be described below in detail with reference to the accompanying drawings. FIG. 1 schematically shows a configuration of an example of an encoding apparatus 1 applicable to each embodiment. The encoding device 1 includes an input processing unit 10, an encoding unit 11, and an output processing unit 12.

  The input processing unit 10 divides input data input in a predetermined data unit into blocks of a predetermined size and outputs them. In other words, the block includes a predetermined number of input data of one unit. As an example, when the input data is pixel data, the block includes a predetermined number of pixel data.

  The block output from the input processing unit 10 is supplied to the encoding unit 11 and is encoded by a predetermined encoding method in units of blocks. The encoded data in which the block is encoded by the encoding unit 11 is supplied to the output processing unit 12. The output processing unit 12 has a memory, packs the supplied encoded data into a packet of a predetermined size using the memory, and outputs the packet as an encoded block.

<Known encoding process>
Here, in order to facilitate understanding, an encoding process that is a premise of the encoding unit 11 according to the present embodiment will be described. FIG. 2 shows a configuration of an example of a known encoding unit 11 ′ that performs the encoding process as a premise. The encoding unit 11 ′ includes a subtracter 100, a quantization unit 101, a quantization table 102, an output selector 103, and a local decoding unit 104. The local decoding unit 104 includes an inverse quantization unit 110, an adder 111, a local decoded data selector 112, and a delay unit 113.

  The operation of the encoding unit 11 'will be described. The input data to be encoded is sequentially input to the encoding unit 11 'in a predetermined data unit, for example, according to a clock. This input data is input to the subtracted input terminal of the subtracter 100, the selection input terminal 103A of the output selector 103, and the selection input terminal 112A of the local decoded data selector 112, respectively. The local decoding data output in units of predetermined data from the local decoding unit 104 is input to the subtraction input terminal of the subtracter 100. The subtracter 100 subtracts the local decoded data from the input data and outputs difference data of the difference between the input data and the local decoded data. The difference data output from the subtracter 100 is supplied to the quantization unit 101.

  The quantization unit 101 quantizes the difference data supplied from the subtraction unit 100 according to quantization information (for example, a quantization step) stored in the quantization table 102, and compresses the data amount. For example, the quantization unit 101 compresses the data amount by reducing the number of bits of the supplied difference data. The quantized difference data is supplied to the inverse quantization unit 110 of the local decoding unit 104 and input to the selection input terminal 103B of the output selector 103.

  Here, for example, when outputting the block input data, the input processing unit 10 in FIG. 1 generates a signal first_word indicating the data timing of the data unit corresponding to the head of the block. The signal first_word is, for example, a signal that is set to a high state (High) at the timing of data in a data unit located at the head of the block and is set to a low state at other timings.

  The output selector 103 selects one of the selection input terminals 103A and 103B according to the value of the signal first_word, and outputs the data input to the selected input terminal from the encoding unit 11 ′ as encoded data. . For example, if the signal first_word is in a high state, the output selector 103 selects the selection input terminal 103A and outputs the input data as it is as encoded data. On the other hand, for example, if the signal first_word is in a low state, the output selector 103 selects the selection input terminal 103B, and the quantized difference data output from the quantization unit 101 is output as encoded data.

  The inverse quantization unit 110 performs inverse quantization on the difference data quantized by the quantization unit 101 in accordance with an inverse quantization table (not shown) corresponding to the quantization table 102, and restores the difference data before quantization. Output difference data. The restored difference data output from the inverse quantization unit 110 is input to one input terminal of the adder 111. The adder 111 adds the restored differential data input to one input terminal and the local decoded data output after being delayed by one data unit from the delay unit 113 described later. The addition output of the adder 111 is input to the selection input terminal 112B of the local decoded data selector 112.

  The local decoded data selector 112 selects one of the selected input terminals 112A and 112B according to the value of the signal first_word, and outputs the data input to the selected input terminal as the next local decoded data. For example, if the signal first_word is in a high state, the local decoded data selector 112 selects the selected input terminal 112A and outputs the input data as the next local decoded data. On the other hand, if the signal first_word is in the low state, the local decoded data selector 112 selects the selection input terminal 112B, and outputs the output of the adder 111 as the next local decoded data.

  The next local decoded data output from the local decoded data selector 112 is supplied to the delay unit 113. The delay unit 113 is a buffer memory, for example, and holds the next local decoded data supplied. The next local decoded data held in the delay unit 113 is delayed by one data unit, output from the delay unit 113, input to the subtraction input terminal of the subtractor 100, and input to the other input terminal of the adder 111. Entered.

  As described above, in the encoding unit 11 ′, the quantization unit 101 quantizes the difference of the input data with respect to the decoded data (local decoded data) based on the input data one data unit before in the encoding order of the input data. Compressed and output as encoded data.

  At this time, the signal first_word is set to the high state at the timing of the data unit positioned at the beginning of the block of the input data, and the signal first_word is set to the low state at other timings. Thus, the input data is used as local decoded data as it is for each head data of the block, and the input data is output as encoded data. Therefore, the encoded data can be decoded on the basis of the input data included as the encoded data for each block.

  The encoded block composed of the encoded data encoded by the encoding unit 11 ′ is packed into a packet according to a predetermined method by the output processing unit 12 and output from the encoding device 1. FIG. 3 shows an exemplary configuration of a packet according to a known technique. The encoded data output from the encoding unit 11 ′ according to the high state of the signal first_word is packed as data D 0 from the beginning of the encoded block. The data D0 is original input data not quantized by the quantization unit 101 and has a data length of N bits. From the data D0 to the most significant bit MSB (Most Significant Bit) side, encoded data C1, C2,..., C (i-2), C (i-1) each having a data length of M bits. Are sequentially packed into the encoded block. An area F having a data length of L bits, which is present in the most significant bit MSB of the encoded block, stores additional information and the like for determining the encoding method as necessary, and the total data amount of the encoded block is T A bit.

  Note that the encoded block encoded by the encoding device 1 can be decoded by a procedure reverse to the encoding. More specifically, the decoding process can be performed using a configuration corresponding to the local decoding unit 104 of the encoding unit 11 ′. That is, first, the leading data D0 of the encoded block is extracted and stored in the delay unit, and is output as decoded data. Next, the encoded data C1 next to the encoded block data D0 is inversely quantized by the inverse quantization unit, and the inversely quantized data and the data D0 output from the delay unit are added to obtain the next delay. Store in the department. The data stored in the delay unit is sequentially output as decoded data. Thereafter, in the encoding block, decoding processing is sequentially performed on the encoded data C2,..., C (i-2), C (i-1) in the same manner.

  In encoding by this known technique, original input data that is not quantized is stored at the head in each encoding block, and each encoded data is sequentially stored following the original input data. At the time of decoding, in each encoding block, the leading original input data is output as decoded data as it is, and the encoded data following the original input data is sequentially decoded on the basis of the original input data.

  Here, consider a case where the data to be encoded is image data and the predetermined data unit is pixel data. In this case, unquantized original pixel data is stored at the head of the encoded block, and this original pixel data is output as it is at the time of decoding. For this reason, a pixel with a quantization error of “0” appears for each head of the encoded block. Therefore, when displayed on the screen, vertical stripes for each encoded block with pixels with this quantization error of “0” appear. It will be.

<First Embodiment>
(Encoding process according to the first embodiment)
Next, the encoding device 1 according to the first embodiment will be described. The encoding device 1 according to the first embodiment schematically has the same configuration as the encoding device 1 shown in FIG. 1, and the encoding unit 11 is different from the known encoding unit 11 ′ described above. It has a configuration.

  In the following, it is assumed that the encoding apparatus 1 uses image data as input data and encodes the image data in units of pixels in the line direction. For example, pixel data based on luminance information and color difference information has a high correlation with adjacent data. Therefore, by performing quantization based on a difference between pixels, it is possible to suppress a coding error at the time of coding.

  One line of pixel data is sequentially input to the encoding device 1. Pixel data is divided for each predetermined number of pixels in the input processing unit 10 to form pixel blocks. The input processing unit 10 outputs a signal line_first indicating the first pixel data of one line. For example, the input processing unit 10 sets the signal line_first to the high state corresponding to the output timing of the first pixel data of one line, and sets the signal line_first to the low state at the output timing of other pixel data of one line. Further, the input processing unit 10 outputs a signal first_word indicating the top pixel data of the pixel block. For example, the input processing unit 10 sets the signal first_word to a high state corresponding to the output timing of the first pixel data of each pixel block, and sets the signal first_word to a low state corresponding to the output timing of the other pixel data of each pixel block. .

  Pixel data included in the pixel block output from the input processing unit 10 is sequentially supplied to the encoding unit 11. Further, the signal line_first and the signal first_word in a state corresponding to the pixel data supplied to the encoding unit 11 are supplied from the input processing unit 10 to the encoding unit 11.

  The encoding unit 11 encodes one line of pixel data in units of pixel blocks. FIG. 4 shows an exemplary configuration of the encoding unit 11 according to the first embodiment. In FIG. 4, the same reference numerals are given to the same parts as those in FIG. 2 described above, and detailed description thereof is omitted. The encoding unit 11 includes a subtracter 100, a quantization unit 101, a quantization table 102, an output selector 120, and a local decoding unit 121. The local decoding unit 121 includes an inverse quantization unit 110, an adder 111, a local decoded data selector 122, and a delay unit 113.

  The operation of the encoding unit 11 will be described. For example, n-th pixel data (referred to as pixel data n) is supplied to the encoding unit 11 according to the clock. Pixel data n is input to a subtracted input terminal of the subtracter 100 and a selection input terminal 122A of the local decoded data selector 122, respectively. The local decoding data (referred to as local decoding data (n−1)) corresponding to the pixel data (n−1) from the local decoding unit 121 is input to the subtraction input terminal of the subtracter 100. The subtracter 100 subtracts the local decoded data (n−1) from the pixel data n, and outputs difference data (referred to as difference data n) based on the difference between the pixel data n and the local decoded data (n−1). . For example, the subtraction unit 100 functions as a difference output unit that outputs a difference between the image data n as input data and the local decoded data (n−1).

  The difference data n output from the subtracter 100 is supplied to the quantization unit 101, quantized according to the quantization information stored in the quantization table 102, and the data amount is compressed. The quantization unit 101 compresses the data amount by compressing the gradation information and reducing the number of bits, for example. For example, the quantization unit 101 functions as a compression unit that compresses the difference output from the difference output unit. The quantized difference data n is supplied to the inverse quantization unit 110 of the local decoding unit 121 and input to the selection input terminal 120B of the output selector 120.

  The output selector 120 further receives the output of the local decoded data selector 122 described later to the selection input terminal 120A. The output selector 120 switches the selection input terminals 120A and 120B according to the state of the signal first_word, and outputs the encoded data from the encoding unit 11.

  More specifically, in the output selector 120, the selection input terminal 120A is selected when the signal first_word is in the high state, and the output of the local decoded data selector 122 is output as encoded data. On the other hand, in the output selector 120, the selection input terminal 120B is selected when the signal first_word is in the low state, and the difference data n quantized by the quantization unit 101 is output from the encoding unit 11 as encoded data.

  The inverse quantization unit 110 dequantizes the difference data n quantized by the quantization unit 101 according to the inverse quantization table (not shown) corresponding to the quantization table 102 to expand the data amount, and the difference before quantization The restored differential data n obtained by restoring the data n is output. For example, the inverse quantization unit 110 functions as an expansion unit that expands the data compressed by the compression unit (quantization unit 101). The restored difference data n is input to one input terminal of the adder 111.

  The adder 111 adds the local decoded data (n−1) output from the delay unit 113 and the restored differential data n, which are input to the other input terminal. The addition output of the adder 111 is decoded data obtained by decoding the data obtained by quantizing the difference of the image data n input to the encoding unit 11 with respect to the local decoded data (n−1). The local decoded data (n -1) is the next local decoded data n. The locally decoded data n is input to the selection input terminal 122B of the locally decoded data selector 122.

  As described above, the pixel data n, which is input data, is input to the selection input terminal 122A of the local decoded data selector 122. Local decoded data selector 122 switches selection input terminals 122A and 122B in accordance with the state of signal line_first.

  More specifically, in the local decoded data selector 122, the selection input terminal 122A is selected when the signal line_first is in the high state, and the pixel data n input as input data is the local decoded data selector 122 as the above-described local decoded data n. Is output from. On the other hand, in the local decoded data selector 122, the selection input terminal 122B is selected when the signal line_first is low, and the next local decoded data n output from the adder 111 is output from the local decoded data selector 122.

  For example, the local decoding selector 122 functions as a second selection unit that selects one of the image data n as input data and the output of the adder 111. For example, the output selector 120 selects one of the output of the adder 111 and the output of the compression unit (quantization unit 101) when the selection input terminal 122B is selected in the local decoded data selector 122. Functions as a first selection unit.

  The next local decoded data n output from the local decoded data selector 122 is supplied to and held in the delay unit 113 and input to the selection input terminal 120A of the output selector 120 as described above. The next local decoded data n held in the delay unit 113 is subtracted by the subtracter 100 in synchronization with the timing at which the next pixel data (n + 1) is input to the subtracted input terminal of the subtracter 100 as input data. And the other input terminal of the adder 111.

  In the encoding unit 11, the encoded data for each pixel data output from the output selector 120 is sequentially supplied to the output processing unit 12. The output processing unit 12 functions as an output unit that packs the supplied encoded data into a packet having a predetermined size and outputs the packet as an encoded block.

  FIG. 5 shows an exemplary configuration of a packet according to the first embodiment. In this example, the packet as a whole has a data length of T bits of a predetermined size, with the right side in the figure being the head and the left side being the rear end. For example, a coding block is held in a storage element such as a flip-flop (Flip Flop) included in the output processing unit 12 to form a packet. At this time, the head and rear end of the encoded block are the least significant bit LSB (Least Significant Bit) and the most significant bit MSB, respectively.

  Data D0 'having a data length of N bits is packed from a predetermined position in the encoded block. In this example, data D0 'is packed from the least significant bit LSB of the encoded block. As the data D0 ', either the first pixel data of the line or the local decoded data corresponding to the first pixel data of the pixel block is used according to the state of the signal line_first and the signal first_word.

  The relationship between the states of the signal line_first and the signal first_word and the output of the output processing unit 12 will be described with reference to FIG. FIG. 6A shows a clock. For example, one pixel data is input to the encoding unit 11 for each clock. FIG. 6B and FIG. 6C show the states of the signal line_first and the signal first_word, respectively. FIG. 6D shows the encoded data output from the output processing unit 12. In this example, it is assumed that one packet (encoded block) is output at time CL.

  When the signal line_first is high and the signal first_word is high, the selection input terminal 122A is selected in the local decoding data selector 122 shown in FIG. 4, and the selection input terminal 120A is selected in the output selector 120. Accordingly, the uncoded original pixel data at the head of the line is output as encoded data from the output selector 120, and this original pixel data is used as the data D0 '. Packet # 1 illustrated in FIG. 6D is a packet in which an encoded block including pixel data at the head of the line is stored in the head data D0 ′.

  When the signal line_first is in the low state and the signal first_word is in the high state, the selection input terminal 122B is selected in the local decoded data selector 122 shown in FIG. 4, and the selection input terminal 120A is selected in the output selector 120. Therefore, local decoded data corresponding to the top pixel data of the pixel block is output from the output selector 120 as encoded data, and this local decoded data is used as data D0 '. Similar to the original pixel data, the local decoded data has a data size of N bits. Packet # 2, packet # 3,... Illustrated in FIG. 6D is a packet in which local decoded data corresponding to the top pixel data of the pixel block is stored in the top data D0 ′.

  When the signal line_first is in the low state and the signal first_word is in the low state, the selection input terminal 122B is selected in the local decoded data selector 122 shown in FIG. 4, and the selection input terminal 120B is selected in the output selector 120. Therefore, difference data quantized by the quantization unit 101 is output from the output selector 120 as encoded data. The encoded data based on the quantized difference data is represented on the MSB side as shown in FIG. 5 as encoded data C1, C2,..., C (i-2), C (i-1) following the data D0 ′. As shown in FIG. The encoded data C1, C2,..., C (i-2), C (i-1) each have a data length of M bits.

  An area F having a data length of L bits, which is present in the most significant bit MSB of the encoded block, stores additional information and the like for determining the encoding method as necessary, and the total data amount of the encoded block is T A bit.

  The T bit of the data length of the encoded block is preferably determined according to the storage unit of the storage element used for the memory in which the encoded block output from the encoding device 1 is stored, for example. For example, since a storage unit such as a DRAM often has a storage unit of 128 bits or 256 bits, for example, T bit = 128 bits is set.

(Decoding process according to the first embodiment)
Next, a decoding apparatus applicable to the first embodiment will be described with reference to FIG. In FIG. 7, the decoding device 2 decodes the image data encoded by the encoding device 1 including the encoding unit 11 described above, and includes an input processing unit 20, a decoding unit 21, and an output processing unit 22. Encoding blocks # 0, # 1, # 2,..., # N−1 having the configuration described with reference to FIG. 5 are sequentially input to the input processing unit 20 in time series. The encoding block # 0 is assumed to be an encoding block including pixel data at the beginning of the line.

  The input processing unit 20 cuts out data D0 ', encoded data C1, C2,..., C (i-2), C (i-1) from the input encoded block and sequentially outputs them. At this time, when each of the encoded blocks # 0, # 1, # 2,..., # N−1 is input, the input processing unit 20 sets the signal first_word to the high state corresponding to each head data D0 ′. To do. The signal first_word is set to the low state when the output of the head data D0 'is completed. The signal first_word is included in, for example, a control signal and supplied to the decoding unit 21.

  The input processing unit 20 can know the encoding block # 0 at the head of the line based on, for example, a control signal (not shown) supplied from the outside. The present invention is not limited to this, and identification information indicating whether or not the coding block is the head of the line can be added to the head of the coding block of FIG. 5 described above. Since the data length of the encoded block is fixed to T bits, by specifying the encoded block # 0 at the head of the line, the encoded blocks # 1, # 2,. The head of 1 can be easily obtained. Furthermore, a strobe signal indicating the head of each coding block may be supplied from the outside.

  Data D0 ', encoded data C1, C2,..., C (i-2), C (i-1) output from the input processing unit 20 are sequentially supplied to the decoding unit 21 according to the clock. In the following, data D0 ', encoded data C1, C2, ..., C (i-2), C (i-1) are collectively referred to as encoded data unless otherwise specified.

  The decoding unit 21 includes an output selector 200, an inverse quantization unit 201, a quantization table 202, an adder 203, and a delay unit 204. The decoding unit 21 performs processing substantially opposite to that of the encoding unit 11 described above, so that encoded data Is decrypted.

  The encoded data input to the decoding unit 21 is input to the selection input terminal 200A of the output selector 200 and also supplied to the inverse quantization unit 201. The inverse quantization unit 201 inversely quantizes the input encoded data based on quantization information such as an inverse quantization step stored in the inverse quantization table 202 and is compressed by the quantization unit 101 during encoding. Decompress data volume. For example, the inverse quantization unit 201 functions as a decompression unit that decompresses the inversely quantized encoded data. The encoded data whose data amount has been expanded is input to one input terminal of the adder 203. The output of the delay unit 204 is input to the other input terminal of the adder 203. The adder 203 adds the dequantized encoded data input to one input terminal and the output of the delay unit 204 input to the other input terminal to obtain decoded data.

  The decoded data output from the adder 203 is input to the selection input terminal 200B of the output selector 200. The output selector 200 selects one of the selection input terminals 200A and 200B according to the state of the signal first_word. The output selector 200 selects the selection input terminal 200B when the signal first_word is in the low state, and outputs the output of the adder 203 as decoded data.

  On the other hand, the output selector 200 selects the selection input terminal 200A when the signal first_word is in the high state, and outputs the input encoded data from the decoding unit 21 as decoded data. In this case, if the input encoded data is data D0 'in the encoded block # 0 at the head of the line, the original pixel data is output as decoded data. If the input encoded data is an encoded block # 1, # 2,..., # N-1 other than the head of the line, local decoded data is output as decoded data.

  The decoded data output from the output selector 200 is supplied to the output processing unit 22 and also to the delay unit 204. The delay unit 204 outputs the supplied data with a delay of, for example, one clock with respect to the input. For example, the delay unit 204 functions as a storage unit that stores decoded data. The output selector 200 selects one of the encoded data input to the decoding unit 21 and the decoded data output from the adder 203 (adder) as decoded data and stores the selected data in the storage unit. Function as. The decoded data output from the delay unit 204 is input to the other input terminal of the adder 203 as described above.

  The output processing unit 22 shapes the decoded data supplied from the output selector 200 into a predetermined format and outputs it from the decoding device 2.

  As described above, the decoding device 2 according to the first embodiment decodes the encoded block in which the original pixel data or the local decoded data is embedded at the head. At that time, the original pixel data and the local decoded data included in the encoded block are output as they are, and the other encoded data is output after being subjected to a decoding process that is inversely quantized and added with the decoded data one clock before. ing.

  At this time, the local decoding data included in the head of the coding block other than the coding block at the head of the line is the same as the decoding processing by the inverse quantization in the decoding unit 21 and the addition to the inverse quantization result of the output of the delay unit 204. The data generated through the above process has a quantization error equivalent to that of the decoded data subjected to the decoding process. Therefore, for example, when screen display based on decoded data is performed, it is possible to suppress the occurrence of vertical stripes in units of pixel blocks due to differences in quantization errors.

  In addition, since each coding block includes data (original pixel data or local decoding data) serving as a decoding reference, it is possible to restore from an error in units of coding blocks.

<Second Embodiment>
Next, a second embodiment will be described. In the first embodiment described above, the decoding device 2 outputs decoded data in one system, that is, in a single phase. On the other hand, in the second embodiment, the decoding device can output decoded data in two systems, that is, in two phases. For example, the encoded block is divided into an odd-numbered encoded block and an even-numbered encoded block, and the decoding processing is performed in parallel with each other, so that the output of the decoded image block is decoded in a single phase. It is possible to execute at twice the speed of the case where

  FIG. 8 shows an exemplary configuration of the decoding device 3 that enables two-phase output. The decoding device 3 decodes the image data encoded by the encoding device 1 having the encoding unit 11 according to the first embodiment described above. As can be seen from FIG. 8, the decoding device 3 is configured using two decoding devices 2 according to the first embodiment described above with reference to FIG. That is, the decoding device 3 includes input processing units 20A and 20B, decoding units 21A and 21B, and an output processing unit 22 '. In FIG. 8, the same reference numerals are given to portions common to FIG. 7, and detailed description is omitted.

  Encoding blocks # 0, # 1, # 2,..., # N−1 having the configuration described with reference to FIG. 5 are input to the decoding device 3 as input data to be decoded. At this time, input data is input at a double speed compared to the case of outputting decoded data in a single phase according to the first embodiment. FIG. 9 shows an example of encoded data corresponding to a two-phase output. FIG. 9A shows a clock. FIG. 9D shows the encoded data input to the decoding device 3.

  As illustrated in FIG. 9D, the encoded data corresponding to the two-phase output includes the encoded blocks # 0, # 1, # 2,. The data is input to the decoding device 3 in half the time (CL / 2) of the encoded data corresponding to the phase output. For example, the encoded data output from the encoding device 1 including the encoding unit 11 according to the first embodiment is written in a memory (not shown). The encoded data is read from the memory at a speed twice as high as the writing speed.

  As shown in FIGS. 9B and 9C, the signal line_first and the signal first_word are the timings of the beginning of each coding block (packets # 1, # 2,...) Input to the decoding device 3, respectively. Produced or supplied according to

  The input processing unit 20A includes even-numbered encoded blocks # 0, # 2,..., Among the encoded blocks # 0, # 1, # 2,. Every other encoding block is selected from the encoding block # 0 including the pixel data at the head of the line. When each selected coding block is input, the signal first_word is set to the high state corresponding to the head data D0 '. The signal first_word is set to the low state when the output of the head data D0 'is completed. The signal first_word is included in, for example, a control signal and supplied to the decoding unit 21A.

  On the other hand, the input processing unit 20B selects odd-numbered encoded blocks # 1, # 3,... Among the encoded blocks # 0, # 1, # 2,. To do. When each selected coding block is input, the signal first_word is set to the high state corresponding to the head data D0 '. The signal first_word is set to the low state when the output of the head data D0 'is completed. The signal first_word is included in, for example, a control signal and supplied to the decoding unit 21B.

  As in the first embodiment, the input processing units 20A and 20B can know the encoding block # 0 at the head of the line, for example, based on a control signal (not shown) supplied from the outside. The present invention is not limited to this, and identification information indicating whether or not the coding block is the head of the line can be added to the head of the coding block of FIG. 5 described above. Since the data length of the encoded block is fixed to T bits, by specifying the encoded block # 0 at the head of the line, the encoded blocks # 1, # 2,. The head of 1 can be easily obtained. Furthermore, a strobe signal indicating the head of each coding block may be supplied from the outside.

  The decoding unit 21A performs a decoding process on the even-numbered encoded blocks # 0, # 2,... Supplied from the input processing unit 20A. At this time, the head data D0 'of each of the encoded blocks # 0, # 2,... Is determined according to the signal first_word supplied from the input processing unit 20A. Similarly, the decoding unit 21B performs decoding processing on the odd-numbered encoded blocks # 1, # 3,... Supplied from the input processing unit 20B using the signal first_word from the input processing unit 20B.

  These decoding processes in the decoding units 21A and 21B can be performed in the same manner as the decoding process in the decoding unit 21 described with reference to FIG. That is, the even-numbered encoded blocks # 0, # 2,... Input to the decoding unit 21A and the odd-numbered encoded blocks # 1, # 3,. The local decoded data (original pixel data itself in the encoding block # 0 at the head of the line) is stored.

  Accordingly, in the decoding device 3 according to the second embodiment, the decoding units 21A and 21B can independently decode each encoded block, and the decoding process by the decoding unit 21A and the decoding process by the decoding unit 21B Can be executed in parallel.

  The decoded data output from the decoding units 21A and 21B are respectively supplied to the output processing unit 22 '. The output processing unit 22 'sorts the supplied decoded data for each pixel, and divides the decoded data into decoded data of even-numbered pixels and odd-numbered pixels on the line. Then, the decoded data of the even-numbered pixels and the decoded data of the odd-numbered pixels are output by different systems, and a two-phase output of image data is obtained.

<Third Embodiment>
Next, a third embodiment will be described. The third embodiment is an example in which the encoding device 1 including the encoding unit 11 and the decoding device 2 according to the first embodiment described above are applied to an image processing device having an image processing unit. FIG. 10 shows an exemplary configuration of an image processing apparatus 300 according to the third embodiment. Here, as an example of the image processing apparatus 300, a digital television receiver that receives a digital television broadcast and displays a high-definition image on a display is applied. In FIG. 10, the same reference numerals are given to the portions common to FIGS. 1, 4, and 7 described above, and detailed description thereof is omitted.

  The image processing apparatus 300 includes a tuner 310, an image processing unit 311, and a display 312. The tuner 310 receives the digital television broadcast, decodes the received signal, and outputs image data and audio data, and accompanying data. In the following, since there is no direct relationship with the gist of the third embodiment, the description regarding the audio data and the accompanying data is omitted.

  The image data output from the tuner 310 is supplied to the image processing unit 311. The image processing unit 311 performs predetermined image processing on the supplied image data using the memory 321. The type of image processing performed by the image processing unit 311 is not particularly limited. Various types of processing such as enhancement processing, frame rate conversion processing, color tone adjustment processing, and resolution conversion processing are conceivable.

  As an example, the image processing unit 311 temporarily stores the image data supplied from the tuner 310 in the memory 321 via the memory interface (I / F) 320. Then, image processing is performed on the image data in units of pixels, for example, while reading the image data from the memory 321 via the memory I / F 320. The image data subjected to the image processing is sequentially written from the image processing unit 311 to the memory 321 via the memory I / F 320.

  The image data processed by the image processing unit 311 is supplied to the display 312. For example, the image processing unit 311 writes the image data for which image processing has been completed to the memory 321 via the memory I / F 320. When the image processing for one frame is completed, the image processing unit 311 reads image data from the memory 321 via the memory I / F 320 and supplies the image data to the display 312. The display 312 displays an image based on the supplied image data.

  In such a configuration of the image processing apparatus 300, the encoding apparatus 1 including the encoding unit 11 and the decoding apparatus 2 according to the first embodiment are applied to the memory I / F 320. More specifically, as illustrated in FIG. 10, the memory I / F 320 includes the input processing unit 10, the encoding unit 11, the output processing unit 12, and the decoding device 2 that configure the encoding device 1. An input processing unit 20, a decoding unit 21, and an output processing unit 22 are included.

  For example, image data output sequentially from the image processing unit 311 in units of lines is supplied to the memory I / F 320 and input to the input processing unit 10. The input processing unit 10 divides input image data for each predetermined number of pixels to form a pixel block. At the same time, the input processing unit 10 outputs the signal line_first and the signal first_word in a high state or a low state, respectively, according to the position of the pixel block and the pixel data in the pixel block. At this time, the input processing unit 10 can acquire information indicating the head of the line from the image processing unit 311, for example.

  The pixel block output from the input processing unit 10 and the signal line_first and signal first_word are input to the encoding unit 11. The encoding unit 11 encodes the pixel data of the pixel block as described with reference to FIG. 4 to generate an encoded block. At this time, based on the signal line_first and the signal first_word, the original pixel data itself is used as the encoded data at the beginning of the encoded block obtained by encoding the pixel block including the pixel data at the beginning of the line. Further, local decoded data is used as encoded data at the head of an encoded block obtained by encoding the other pixel blocks. The encoded data output from the encoding unit 11 is packed into a packet having a predetermined size by the output processing unit 12 and output from the memory I / F 320. The encoded block packet output from the memory I / F 320 is written in the memory 321.

  The image processing unit 311 instructs the memory I / F 320 to read the image data (encoded block) stored in the memory 321. In accordance with this instruction, the memory I / F 320 reads the encoded block from the memory 321 and inputs it to the input processing unit 20. At this time, the input processing unit 20 can acquire information indicating the head of the line or the head of each encoded block from the image processing unit 311, for example.

  The input processing unit 20 extracts encoded data from the input encoded block, sequentially supplies the encoded data to the decoding unit 21, and outputs the signal first_word in a predetermined state. The decoding unit 21 selects the input encoded data according to the state of the signal first_word, outputs the encoded data stored at the head of the encoded block as decoded data, and outputs the other encoded data as it is. After the inverse quantization, decoded data is generated by adding the previous encoded data in the decoding order. The decoded data is shaped into a predetermined format by the output processing unit 22 and supplied from the memory I / F 320 to the image processing unit 311.

  As described above, the encoding unit 11 and the decoding unit 21 according to the first embodiment are used by being incorporated in the memory I / F 320 of the memory 321 accessed by the image processing unit 311, so that the image data stored in the memory 321 can be stored. The size can be compressed. In addition, since encoding is performed on a pixel basis, high-speed processing is possible. Furthermore, since the locally decoded data is stored at the head of the coding block other than the head of the line, the quantization error is “0” at regular intervals even if the screen display is performed with the decoded data obtained by decoding the coding block. The appearance of pixel data is prevented, and a higher quality image can be obtained. Furthermore, since each coding block includes data (original pixel data or local decoding data) serving as a decoding reference, for example, a read error from the memory 321 can be restored in units of coding blocks. .

  In the above description, the decoding device 2 corresponding to the single-phase output is applied to the third embodiment, but this is not limited to this example. That is, it is also possible to apply the decoding device 3 that performs two-phase output according to the second embodiment to the third embodiment. In this case, the decoding device 3 can obtain a two-phase output corresponding to two-phase LVDS (Low voltage differential signaling).

DESCRIPTION OF SYMBOLS 1 Encoding apparatus 2, 3 Decoding apparatus 10, 20, 20A, 20B Input processing part 11, 11 'Encoding part 12, 22, 22' Output processing part 21, 21, A, 21B Decoding part 100 Subtractor 101 Quantization part 103 Output selector 104 Local decoding unit 110, 201 Inverse quantization unit 111, 203 Adder 112, 122 Local decoded data selector 113, 204 Delay unit 200 Output selector

Claims (7)

A storage unit for storing locally decoded data;
A difference output unit for outputting a difference between input data and the locally decoded data;
A compression unit that compresses the difference output by the difference output unit;
A decompression unit for decompressing the data compressed by the compression unit; and an addition unit for adding the local decoded data to the data decompressed by the decompression unit. A local decoding unit to be stored in the storage unit as decoded data;
A first selection unit that selects one of the output of the compression unit and the output of the addition unit and outputs the selected data as encoded data;
The first selection unit includes:
An encoding apparatus, wherein an output of the adder is selected for each predetermined number of input data. The input data and the output of the addition unit are input, and further includes a second selection unit that selects the input data at the head of a plurality of consecutive blocks,
The output of the second selection unit is stored in the storage unit as the next local decoded data, and is supplied to the first selection unit as an output of the addition unit. Encoding device. An output unit for storing the encoded data in a packet and outputting the packet;
The output unit is
The first encoded data output from the adder selected by the first selector is arranged at the head with the same data length as the input data, and the compression selected by the first selector 3. The encoding apparatus according to claim 1, wherein the packet is generated by sequentially arranging the second encoded data output from the output unit following the first encoded data. 4. A difference output step for outputting a difference between the input data and the locally decoded data stored in the storage unit;
A compression step of compressing the difference output by the difference output step;
A decompression step for decompressing the data compressed by the compression step; and an addition step for adding the local decoded data to the data decompressed by the decompression step. The output from the addition step is used as the next local decoded data. A local decoding step to be stored in the storage unit;
A selection step of selecting one of the output from the compression step and the output from the addition step to output as encoded data;
The selection step includes
An encoding method, wherein an output by the adding step is selected for each predetermined number of input data. The output obtained by compressing the difference between the input data and the local decoded data is expanded and the local decoded data is added. The added output is used as the next local decoded data, and the compressed output for each input data is used as the first output. When the output data is output as the encoded data, the added output is selected for each predetermined number of the input data and output as the second encoded data, and the first encoded data is the same as the input data. A decoding device that performs a decoding process on a packet that is arranged at the head as a data length and sequentially distributes the second encoded data following the first encoded data, and stores the decoded data When,
A decompression unit for decompressing the second encoded data;
An adder that adds the second encoded data decompressed by the decompressor and the decoded data stored in the storage;
A decoding apparatus comprising: a selection unit that selects one of the first encoded data and the output of the addition unit as the decoded data and stores the selected data in the storage unit. The output obtained by compressing the difference between the input data and the local decoded data is expanded and the local decoded data is added. The added output is used as the next local decoded data, and the compressed output for each input data is used as the first output. When the output data is output as the encoded data, the added output is selected for each predetermined number of the input data and output as the second encoded data, and the first encoded data is the same as the input data. A decoding method that performs a decoding process on a packet that is arranged at the beginning as a data length and sequentially distributes the second encoded data following the first encoded data;
A storage step of storing the decoded data in the storage unit;
A decompression step of decompressing the second encoded data;
An addition step of adding the second encoded data expanded by the expansion step and the decoded data stored in the storage unit;
A decoding method comprising: a selection step of selecting any one of the first encoded data and the output of the addition step as the decoded data and storing it in the storage unit. An input unit that selects and retrieves even-numbered packets and odd-numbered packets;
The first decoding device according to claim 5, which performs a decoding process on the even-numbered packets;
The second decoding device according to claim 5, which performs a decoding process on the odd-numbered packets;
The first decoding data of the first decoding device and the second decoding data of the second decoding device are rearranged into even-numbered decoding data and odd-numbered decoding data, and the even-numbered decoding data is rearranged. A decoding device comprising: decoded data; and output means for outputting the odd-numbered decoded data in two phases.

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