JP2013201598A - Analog-digital conversion device and analog-digital conversion method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an analog-digital conversion device that sequentially selectively converts analog signals of a plurality of channels to digital signals with higher precision while avoiding prolonging a processing time.SOLUTION: The analog-digital conversion device includes: a multiplexer 11 for receiving analog signals of a plurality of channels CH1-CH7 and sequentially selectively outputting the analog signal of each channel; a sample-and-hold circuit 12 for charging the analog signal output by the multiplexer 11 in a capacitor 22 to hold a voltage of the analog signal; a digital signal conversion section 13 for converting the voltage value of each channel held in the sample-and-hold circuit 12 to a corresponding digital signal; and a correction processing section 14 for correcting the digital signal converted by the digital signal conversion section 13 on the basis of a difference value from the digital signal of the preceding channel.

Description

  The present invention relates to an analog-to-digital conversion apparatus and an analog-to-digital conversion method for sequentially converting analog signals of a plurality of channels into digital signals.

  Conventionally, an analog-to-digital converter that converts an analog signal into a digital signal has been used. In the analog-digital converter, the conversion time is shortened by a sweep mode in which an analog signal is continuously converted into a digital signal at a constant cycle while switching channels. Further, the analog-to-digital converter operates in the sweep mode, and can convert a multi-channel analog signal into a digital signal by a single AD converter.

  For example, Patent Document 1 discloses an AD in which a hold voltage is discharged using a switch that connects a high-potential terminal of a capacitor of a sample hold circuit to GND so that it is not affected by AD conversion processing in the immediately preceding channel. A transducer is described.

JP 2009-188736 A

  The AD converter described in Patent Document 1 requires a time for discharging the hold voltage by once connecting the high-potential side terminal of the capacitor to GND when switching channels. Compared to the case of no connection, 50% of the dead time has occurred.

  In addition, the analog-to-digital converter can reduce the input impedance of the sample-and-hold circuit, so that the capacitor can be charged earlier so that it is not affected by the AD conversion processing in the immediately preceding channel, but the power consumption increases. There's a problem.

  In addition, the analog-digital conversion device can be prevented from being affected by the AD conversion processing in the immediately preceding channel by increasing the sample time, but there is a problem that the conversion time becomes long.

  Furthermore, when the channel is switched, the analog-to-digital converter performs analog-to-digital conversion for several sample times while the channel is fixed, and averages and outputs the digital signal at other sample times excluding the initial sample time By doing so, it is possible to avoid the influence of AD conversion processing in the immediately preceding channel. However, when averaging digital signals of other sample times excluding the initial sample time, the conversion time becomes longer. Further, even if the digital signals of other sample times other than the initial sample time are averaged, an analog signal that fluctuates irregularly greatly cannot be converted into a digital signal with high accuracy.

  The present invention has been proposed in view of such circumstances, and an analog-to-digital conversion capable of sequentially switching analog signals of a plurality of channels and converting them into digital signals with higher accuracy while suppressing an increase in processing time. An object is to provide an apparatus and an analog-digital conversion method.

  An analog-to-digital converter according to the present invention inputs a plurality of channels of analog signals, sequentially switches and outputs the analog signals of each channel, charges the analog signal output by the multiplexer to a capacitor, A sample hold circuit that holds the voltage, a digital signal converter that converts the digital signal indicating the voltage value of each channel held in the sample hold circuit, and the digital signal converted by the digital signal converter And a correction processing unit that performs correction based on a difference value from the digital signal.

  The analog-digital conversion method according to the present invention includes a step of inputting analog signals of a plurality of channels to a multiplexer, sequentially switching and outputting the analog signals of each channel, and sampling the voltage of the analog signal output by the multiplexer. Charging and holding the capacitor of the hold circuit; converting the digital signal indicating the voltage value of each channel held in the sample hold circuit; and converting the converted digital signal to the digital signal of the immediately preceding channel. And correcting based on the difference value.

  The present invention corrects the digital signal indicating the voltage value of each channel held in the sample hold circuit based on the value of the digital signal of the immediately preceding channel, thereby reducing the influence of the conversion processing in the immediately preceding channel. Can be output. In this way, according to the present invention, it is possible to convert analog signals of a plurality of channels sequentially into digital signals with higher accuracy while suppressing an increase in processing time.

It is a figure for demonstrating the structure of the analog-digital converter based on 1st Example to which this invention was applied. It is a figure for demonstrating the acquisition process which acquires correction data. It is a figure for demonstrating the correction process which a correction process part performs. It is a figure for demonstrating the structure of the analog-digital converter which concerns on the 2nd Example to which this invention was applied.

  The present invention relates to an analog / digital conversion apparatus and an analog / digital conversion method for sequentially switching analog signals of a plurality of channels into digital signals. The analog-digital conversion apparatus according to the first embodiment to which the present invention is applied has, for example, a configuration as shown in FIG. That is, as shown in FIG. 1, the analog-digital conversion apparatus 1 includes a multiplexer 11, a sample hold circuit 12, a digital signal conversion unit 13, a correction processing unit 14, and a correction data storage unit 15. In the present embodiment, as a specific example, the analog-digital conversion apparatus 1 converts an input analog signal into a digital signal having a rated output value of “100” to “900” and outputs the digital signal. .

  The multiplexer 11 is composed of an analog switch that selects and outputs one signal from a plurality of input signals. Specifically, the multiplexer 11 includes switches SW0 to SW7 corresponding to a total of eight channels from CH0 to CH7, as shown in FIG. The multiplexer 11 switches a channel for outputting an analog signal by switching each of SW0 to SW7.

  The multiplexer 11 having such a configuration sequentially switches the switch to be turned on among the switches SW0 to SW7 every sample time. In this way, the multiplexer 11 sequentially switches and outputs the analog signals of the channels CH0 to CH7 for each sample time. Note that the number of channels input to the multiplexer is not limited to eight, and may be other than eight channels, such as four channels or sixteen channels.

  The sample hold circuit 12 includes a sampling switch 21 and a capacitor 22. One end of the sampling switch 21 is connected to the output terminal of the multiplexer 11, and the other end is connected to the capacitor 22 and the digital signal converter 13 via the connection point P. The capacitor 22 has one end connected to the multiplexer 11 and the digital signal converter 13 via the connection point P as described above, and the other end connected to the ground GND.

  When an analog signal is input through the analog multiplexer 11, the sample hold circuit 12 having such a configuration turns on the sampling switch 21 to charge the capacitor 22 with the analog signal. Thereafter, while the analog / digital conversion process is performed by the digital signal conversion unit 13, the sample hold circuit 12 turns off the sampling switch 21 and holds the voltage stored in the capacitor 22. When the analog-digital conversion process is completed, the sample hold circuit 12 turns on the sampling switch 21 and charges the capacitor 22 with the analog signal.

  The digital signal converter 13 samples the voltage value held by the capacitor of the sample hold circuit 12 at every sample time. In this way, the digital signal conversion unit 13 converts the digital signal indicating the voltage value of each sample time held in the sample hold circuit 12 and outputs the converted digital signal.

  Here, the digital signal converted by the digital signal conversion unit 13 varies in accordance with the value of the digital signal of the immediately preceding channel converted at the immediately preceding sample time. That is, in the sample hold circuit 12, as described above, the capacitor 22 is charged with the analog signal output by switching the channels from the channel CH0 to the channel CH7 in order. As a result, the voltage value held by the sample and hold circuit 12 changes according to the charge capacity of the capacitor 22 charged with the analog signal of the immediately preceding channel, and a conversion error occurs in the digital signal as described above.

  Since a conversion error occurs in the digital signal output by the digital signal conversion unit 13 in this way, the correction processing unit 14 is converted by the digital signal conversion unit 13 based on the difference value from the digital signal of the immediately preceding channel. Correct the digital signal. Specifically, the analog-digital conversion apparatus 1 according to the first embodiment uses the correction data stored in the correction data storage unit 15 to convert the digital signal converted by the digital signal conversion unit 13 into the channel of the immediately preceding channel. Correct and output based on the difference value with the digital signal.

  Here, the correction data stored in the correction data storage unit 15 prior to specific correction processing will be described. That is, the correction data storage unit 15 stores correction data in which the difference value of the digital signal between channels is associated with the conversion error of the digital signal converted by the digital signal conversion unit 13. In order to acquire such correction data, for example, the following acquisition process is performed in advance.

  That is, the sample hold circuit 12 holds the voltage of the first analog signal corresponding to the first digital signal indicating “100” which is the minimum rated output value via the channel CH0. At the next sample time, the sample hold circuit 12 holds the voltage of the second analog signal corresponding to the second digital signal indicating the maximum rated output value “900” via the channel CH1. Thus, when the sweep mode for switching between the channel CH0 and the channel CH1 is performed for each sample time, the digital signal conversion unit 13 outputs a digital signal having a value as shown in FIG. 2, for example.

  Here, in FIG. 2, the horizontal axis indicates the channels CH0 and CH1 of the analog signal input to the sample hold circuit 12, and the vertical axis indicates the value of the digital signal corresponding to the analog signal input to each channel CH0 and CH1. Show.

As apparent from FIG. 2, even if the analog signal corresponding to the value “100” and the analog signal corresponding to the value “900” are switched and input, the digital signal processing unit 13 has the value “105”. ”And a digital signal whose value is“ 895 ”.
Based on FIG. 2, “790” that is the difference value of the digital signal converted by the digital signal processing unit 13 between the channels and “5” that is the conversion error value by the digital signal processing unit 13 correspond to each other. The attached correction data can be acquired.

  Here, the correction data is acquired in advance using, for example, a prototype sample for prototyping the analog-digital conversion device 1. This is because the characteristics of the acquired correction data differ depending on the input impedance of the circuit connected to the input side of the analog-digital converter 1.

  Next, the operation of the correction processing unit 14 using the correction data acquired as described above will be described with reference to FIG.

  As a specific example, when the value of the digital signal at the sample time t0 is “105” and the value of the digital signal converted by the digital signal processing unit 13 at the next sample time t1 is “895”, the correction is performed as follows. To do. That is, since the difference value is “+790”, the correction processing unit 14 outputs “900” obtained by adding “+5” to the digital signal converted by the digital signal processing unit 13 at the sample time t1 based on the correction data. .

  Subsequently, when the value of the digital signal at the sample time t1 is “900” and the value of the digital signal converted by the digital signal processing unit 13 at the sample time t2 is “110”, the correction is performed as follows. That is, since the difference value is “−790”, the correction processing unit 14 outputs “105” obtained by adding “−5” to “110” based on the correction data.

  Subsequently, when the value of the digital signal at the sample time t2 is “105” and the value of the digital signal converted by the digital signal processing unit 13 at the sample time t3 is “555”, the correction is performed as follows. That is, since the difference value is “+450”, the correction processing unit 14 outputs “558” obtained by adding the correction value “+3” obtained by linearly interpolating the correction data to “555” based on the following equation (1). To do.

5 × 450/790 ≒ 3 (1)
The correction data may be interpolated by non-linear interpolation processing using a curve function or the like considering circuit characteristics without being limited to the linear interpolation of the equation (1). Also, a lookup table in which the difference value of the digital signal between channels and the conversion error when the digital signal is converted is stored in the correction data storage unit 15 as correction data, and such a lookup is performed. You may correct | amend using a table.

  In addition, although the digital signals having two values “100” and “900” are switched, for example, the digital signal having three values “100”, “500”, and “900” is switched to cause fluctuations. Two types of correction data when the variation is large and when the variation is relatively small may be acquired in advance, and correction processing may be performed using the acquired correction data.

  As described above, the analog-digital conversion apparatus 1 according to the first embodiment corrects the digital signal indicating the voltage value of each channel held in the sample hold circuit based on the value of the digital signal of the immediately preceding channel. By doing so, it is possible to output a digital signal that is less affected by the conversion process in the immediately preceding channel. In this way, the analog-to-digital conversion apparatus 1 to which the present invention is applied can convert the analog signals of a plurality of channels sequentially into digital signals with higher accuracy while suppressing an increase in processing time. .

  In particular, even when the analog signal input to the multiplexer 11 fluctuates greatly between channels, the analog-to-digital conversion device 1 is not affected by the analog signal of the immediately preceding channel, and the current conversion target channel is not affected. An analog signal can be converted into a digital signal with high accuracy.

  Next, the configuration of the analog-digital conversion apparatus 2 according to the second embodiment as shown in FIG. 4 will be described. Here, among the configurations of the analog-digital conversion device 2 according to the second embodiment, the same reference numerals are given to the same configurations as those of the analog-digital conversion device 1 according to the first embodiment, and the description thereof is omitted. It shall be.

  That is, the analog-digital conversion device 2 according to the second example includes a reference voltage source 16 and a correction data generation unit 17 in addition to the configuration of the analog-digital conversion device 1 according to the first example.

  The reference voltage source 16 is connected to the channels CH0 and CH1 of the multiplexer 11 in order to generate correction data. The reference voltage source 16 makes its impedance coincide with the impedance of the circuit connected to the channels CH <b> 2 to 7 of the multiplexer 11 that is not connected to the reference voltage source 16.

  The reference voltage source 16 inputs the reference voltage of the first analog signal corresponding to the first digital signal to the channel CH0, and supplies the reference voltage of the second analog signal corresponding to the second digital signal to the channel CH1. To enter.

  Specifically, the reference voltage source 16 inputs the voltage of the first analog signal corresponding to the first digital signal indicating “100”, which is the minimum rated output value, to the channel CH <b> 0 of the multiplexer 11. Further, the reference voltage source 16 inputs the voltage of the second analog signal corresponding to the second digital signal indicating “900” which is the maximum rated output value to the channel CH <b> 1 of the multiplexer 11.

  Since the channel CH0 and the channel CH1 are connected to the reference voltage source 16, the multiplexer 11 inputs an analog signal to be converted into the other channels CH2 to CH7.

  The correction data generation unit 17 inputs the first analog signal and the second analog signal to the multiplexer 11 from the reference voltage source 16, and generates correction data based on the digital signal converted by the digital signal conversion unit 13. To do.

  That is, the correction data generation unit 17 performs digital signal conversion when the multiplexer alternately switches between the first analog signal and the second analog signal input from the reference voltage source 16 and outputs them to the sample hold circuit 12. Correction data in which the conversion error of the digital signal converted by the unit 13 is associated with the difference value between the first digital signal and the second digital signal is generated. Then, the correction data generation unit 17 stores the generated correction data in the correction data storage unit 15.

  As a specific example, as shown in the first embodiment described above, the correction data generation unit 17 generates “790”, which is the difference value of the digital signal converted by the digital signal processing unit 13 between channels, and the digital signal. Correction data in which “5” that is the conversion error value by the processing unit 13 is associated can be acquired.

  The analog-to-digital conversion device 2 according to the second embodiment having such a configuration has the reference voltage source 16 and the correction data when the analog signal to be converted is not input to the multiplexer 11, such as when the device is turned on. Correction data is generated using the generation unit 17. In this way, the analog-to-digital conversion device 2 can periodically update the correction data in accordance with, for example, aging of the elements of the sample and hold circuit 12. Note that the correction data generation unit 17 may perform a process of generating correction data again as abnormal data when the correction data largely changes before and after the update.

  Moreover, it is preferable that the correction data generation part 17 has the temperature sensor 17a which detects the environmental temperature of the said analog digital converter 2. That is, the correction data generation unit 17 generates correction data corresponding to each environmental temperature detected by the temperature sensor 17 a and stores the correction data in the correction data storage unit 15. By doing so, the correction processing unit 14 corrects the digital signal using the correction data corresponding to the environmental temperature detected by the temperature sensor 17a when performing the correction process, and takes the temperature characteristics into consideration. A digital signal converted into accuracy can be output.

DESCRIPTION OF SYMBOLS 1, 2 Analog-digital converter 11 Multiplexer 12 Sample hold circuit 13 Digital signal converter 14 Correction processing part 15 Correction data storage part 16 Reference voltage source 17 Correction data generation part

Claims (6)

Multiplexer analog signals are input, and each channel analog signal is sequentially switched and output,
A sample-and-hold circuit that charges a capacitor with the analog signal output by the multiplexer and holds the voltage of the analog signal;
A digital signal converter that converts the voltage value of each channel held in the sample hold circuit into a digital signal;
An analog-digital conversion apparatus comprising: a correction processing unit that corrects the digital signal converted by the digital signal conversion unit based on a difference value from the digital signal of the immediately preceding channel. A reference for inputting the reference voltage of the first analog signal corresponding to the first digital signal and the reference voltage of the second analog signal corresponding to the second digital signal to the multiplexer as analog signals of different channels. A voltage source;
The digital signal converted by the digital signal conversion unit when the multiplexer alternately switches the first analog signal and the second analog signal input from the reference voltage source and outputs them to the sample hold circuit. A correction data generation unit that generates correction data in which a signal conversion error is associated with a difference value between the first digital signal and the second digital signal;
The analog digital signal according to claim 1, wherein the correction processing unit corrects and outputs the digital signal converted by the digital signal conversion unit based on the correction data generated by the correction data generation unit. Conversion device. A correction data storage unit that stores correction data in which a difference value of a digital signal between channels is associated with a conversion error of a digital signal converted by the digital signal conversion unit;
The correction processing unit uses the correction data stored in the correction data storage unit to correct the digital signal converted by the digital signal conversion unit based on a difference value from the digital signal of the immediately preceding channel. 2. The analog-to-digital converter according to claim 1, wherein the analog-to-digital converter is output.   The correction data storage unit switches between a first analog signal corresponding to the first digital signal and a second analog signal corresponding to the second digital signal, and inputs them to the multiplexer. 4. The analog digital signal according to claim 3, wherein correction data in which a conversion error of the digital signal converted by is associated with a difference value between the first digital signal and the second digital signal is stored. Conversion device. The first digital signal is a minimum rated output value in the analog-digital converter.
5. The analog-to-digital converter according to claim 4, wherein the second digital signal is a maximum rated output value in the analog-to-digital converter. A step of inputting analog signals of a plurality of channels to a multiplexer, and sequentially switching and outputting the analog signals of each channel;
Charging and holding the voltage of the analog signal output by the multiplexer in a capacitor of a sample and hold circuit; and
Converting to a digital signal indicating the voltage value of each channel held in the sample and hold circuit;
And a step of correcting the converted digital signal based on a difference value from the digital signal of the immediately preceding channel.

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