JP2013186264A - Image display device and image display method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce consumption power of a region where change occurs while reducing flicker.SOLUTION: An image display device receives image data including a plurality of frames, analyzes difference between sub-frames being a plurality of portions into which a frame of the image data is divided, generates difference data showing the difference, generates a timing signal being update timing of an image for each sub-frame on the basis of the difference data, generates display data for each sub-frame on the basis of the image data, the difference data, and the timing signal, and updates display of each sub-frame on the basis of the display data and the timing signal of each sub-frame.

Description

  The present invention relates to image display, and more particularly to power consumption in display.

  An image display device that displays an image using a display device such as a liquid crystal display or a plasma display updates the display at a predetermined frequency. This frequency is called a refresh rate or a frame rate.

  For example, in general television broadcasting, 30 frames are displayed per second. Therefore, a television broadcast frame has a 30 Hz refresh rate (frame rate). The unit of the refresh rate may use fps (Frames Per Second) instead of Hz.

  Note that television broadcasting uses a 2: 1 interlace method in which one picture (frame) is completed by two transmissions. Therefore, the refresh rate of the television broadcast field is 60 Hz.

  In recent years, image display devices that display high-definition images, such as high-definition television broadcasting, have been used. An image display device that displays such a high-definition image display uses a high refresh rate in order to reduce flicker (see, for example, Patent Document 1 and Patent Document 2).

  However, a circuit that displays a high-precision image is expensive. Therefore, there is a display device that realizes low cost by dividing the configuration for displaying an image into a central portion and a peripheral portion, the central portion corresponding to a high-speed (high-precision) moving image (see, for example, Patent Document 3). ).

  Further, in the image display device, the refresh operation for updating the image consumes more power than the state in which the image is displayed in a fixed manner.

  Therefore, considering the power consumption, a lower refresh rate is desirable.

  For example, a method of reducing power consumption by reducing the refresh rate of still images is used (see, for example, Patent Document 4, Patent Document 5, and Patent Document 6).

  Also, there is a liquid crystal display control device that detects whether or not an image has been updated and reduces the refresh rate when there is no update (see, for example, Patent Document 7).

  In addition, there is a liquid crystal display device that detects a portion having a change in an image, writes (updates) a region having a change, does not write (updates) a region that does not change, and reduces power consumption (for example, Patent Document 8). See).

JP 04-302289 JP2010-0551112 JP 2001-296841 A JP2009-251607 British Patent Publication 2381931A European Patent Publication 1280129A2 JP2004-151222 JP 2000-284755 A

  An image display device that displays a high-definition image includes many display pixels, and thus consumes more power. For this reason, in high-definition image display devices, reduction of power consumption becomes an important issue.

  The display device described in Patent Document 1 and the moving image display device described in Patent Document 2 have a problem in that power consumption increases because the frame rate is increased.

  The display device described in Patent Document 3 has a problem that only a central portion can display a high-definition moving image.

  The liquid crystal display startup circuit described in Patent Document 4, the display control method described in Patent Document 5, and the display device described in Patent Document 6 have a problem that power consumption in moving images cannot be reduced.

  The liquid crystal display control device described in Patent Document 7 can reduce power consumption in a frame without change, but has a problem that power consumption cannot be reduced in a frame with change.

  The liquid crystal display device described in Patent Document 8 can reduce power consumption in a region where there is no change, but has a problem that power consumption in a region where there is a change, that is, a region where an image is updated cannot be reduced.

  An object of the present invention is to provide an image display apparatus and an image display method that solve the above-described problems and reduce power consumption in a region with a change (an area in which an image is updated) while reducing flicker. is there.

  An image display apparatus according to the present invention analyzes a difference between a data storage unit that receives and stores image data including a plurality of frames, and a subframe obtained by dividing the frame of the image data into a plurality of portions, and indicates the difference Image analysis means for generating difference data, timing generation means for generating a timing signal that is an image update timing for each subframe based on the difference data, the image data, the difference data, and the timing signal Display data synthesizing means for generating display data for each subframe, and display means for updating the display of each subframe based on the display data and the timing signal of each subframe.

  The image display method of the present invention receives image data including a plurality of frames, analyzes a difference between subframes obtained by dividing the frame of the image data into a plurality of parts, and generates difference data indicating the difference, Generate a timing signal that is an image update timing for each subframe based on the difference data, generate display data for each subframe based on the image data, the difference data, and the timing signal, The display of each subframe is updated based on the display data and the timing signal of each subframe.

  The program according to the present invention includes a process of receiving image data including a plurality of frames, and a process of analyzing a difference between subframes obtained by dividing the frame of the image data into a plurality of parts and generating difference data indicating the difference A process for generating a timing signal that is an image update timing for each subframe based on the difference data, and display data for each subframe based on the image data, the difference data, and the timing signal. The computer is caused to execute a process of generating and a process of updating the display of each subframe based on the display data and the timing signal of each subframe.

  According to the present invention, it is possible to reduce power consumption in a region having a change (a region in which an image is updated) while reducing flicker.

FIG. 1 is a block diagram showing an example of the configuration of the image display apparatus according to the first embodiment of the present invention. FIG. 2 is a diagram illustrating an example of subframe division according to the present embodiment. FIG. 3 is a diagram illustrating an example of another division of the subframe according to the present embodiment. FIG. 4 is a block diagram illustrating an example of the configuration of the timing generation unit according to the first embodiment. FIG. 5 is a block diagram illustrating an example of the configuration of the display data synthesis unit according to the first embodiment. FIG. 6 is a diagram for explaining the operation in the display data composition unit according to the first embodiment. FIG. 7 is a block diagram illustrating an example of the configuration of the display unit according to the first embodiment. FIG. 8 is a diagram illustrating an example of driver division according to the first embodiment. FIG. 9 is a diagram for explaining a change in display according to the first embodiment. FIG. 10 is a diagram illustrating an example of a timing signal according to the first embodiment. FIG. 11 is a block diagram illustrating an example of another configuration of the image display apparatus according to the first embodiment. FIG. 12 is a diagram illustrating an example of a display according to the second embodiment. FIG. 13 is a diagram for explaining a change in display according to the second embodiment. FIG. 14 is a diagram illustrating an example of a timing signal according to the second embodiment.

  Next, embodiments of the present invention will be described with reference to the drawings.

  Each drawing explains an embodiment of the present invention. Therefore, the present invention is not limited to the description of each drawing. Moreover, the same number is attached | subjected to the same structure of each drawing, and the repeated description may be abbreviate | omitted.

(First embodiment)
FIG. 1 is a block diagram showing an example of the configuration of an image display apparatus 1 according to the first embodiment of the present invention.

  The image display device 1 includes a data storage unit 10, an image analysis unit 20, a timing generation unit 30, a display data synthesis unit 40, and a display unit 50.

  The data storage unit 10 receives and stores “image data” from an imaging device (not shown).

  Note that there are two types of photographing apparatuses, one that outputs digital image data and the other that outputs analog image data (image signals). When the imaging apparatus outputs digital image data, the data storage unit 10 may receive and store the digital image data. On the other hand, when the photographing apparatus outputs analog image data (image signal), the data storage unit 10 receives the analog image signal and uses an analog / digital conversion unit (A / D conversion unit) (not shown) to perform analog processing. It is only necessary to digitize the signal and store the digitized image data. Note that the A / D converter may be included in an external device (not shown) different from the image display device 1.

  Further, the data storage unit 10 transmits the stored image data to the image analysis unit 20 and the display data synthesis unit 40.

  Note that various data formats are used for image data, particularly moving image data. In the present embodiment, the format of the image data is not limited. Therefore, the data storage unit 10 has no restriction on the format of data to be stored. However, hereinafter, for convenience of description, the data storage unit 10 will be described as storing data in units of one screen (frame) of the display unit 50 described later and outputting image data in units of frames. That is, in the following description, the image data will be described as frame unit data. Therefore, in the present embodiment, the image data can also be referred to as frame data.

  The image analysis unit 20 receives image data from the data storage unit 10 and analyzes it using image data of a plurality of frames, and obtains a difference (difference amount) between frames. The image analysis unit 20 is not particularly limited as a method for generating the difference amount. For example, the image analysis unit 20 may use an inter-frame difference method, a background difference method, or a block matching method.

  However, in the image analysis unit 20 of the present embodiment, the frame is a plurality of regions (hereinafter, this region is referred to as “subframe”. Note that the subframe may be omitted and referred to as “sub”). And the difference for each subframe is calculated.

  Then, the image analysis unit 20 generates data indicating the difference between the subframes (hereinafter referred to as “difference data”), and transmits the data to the timing generation unit 30 and the display data synthesis unit 40.

  Note that the image analysis unit 20 may transmit the difference data at a predetermined timing. However, in the following description, in order to simplify the description, the image analysis unit 20 will be described as transmitting difference data of subframes for each frame. Therefore, the difference data becomes a plurality of data corresponding to the number of subframes for each frame.

  However, the image analysis unit 20 of the present embodiment does not need to transmit difference data of all subframes in each frame. For example, the image analysis unit 20 may not transmit difference data of subframes in which the difference is smaller than a predetermined value. A configuration (for example, the timing generation unit 30) that operates using difference data that will be described later can determine that the difference is smaller than a predetermined threshold based on the fact that no difference data comes. That is, the configuration that operates using the difference data can operate by determining that the difference is small when the difference data does not come. That is, a configuration that operates using difference data can operate in the same manner as when difference data is received, even when no difference is received. Therefore, in the following description, unless otherwise specified, it is assumed that difference data of all subframes of each frame is transmitted, including the case where difference data is not sent.

  In addition, the division of subframes according to the present embodiment may be determined based on a display area that can be independently controlled in the display unit 50.

  FIG. 2 is a diagram illustrating an example of subframe division according to the present embodiment.

  FIG. 2 is an example of a subframe in the case where the display unit 50 can be controlled by dividing it into 6 parts in the vertical direction (divided into 6 lines) and 8 parts in the left and right direction (dividing into 8 columns). In FIG. 2, the subframe is set for each individual area that can be controlled. Therefore, the number of subframes is 6 × 8 = 48.

  However, the subframe according to the present embodiment may be a combined region that can be controlled.

  FIG. 3 is a diagram illustrating an example of subframe division according to the present embodiment.

  FIG. 3A is a diagram illustrating a case where the horizontal regions are combined into one, that is, a case where the control range of the display unit 50 is combined in the row direction (X direction) and subframes are allocated.

  FIG. 3B is a diagram illustrating a case where the vertical regions are combined into one, that is, a case where the control range of the display unit 50 is combined in the column direction (Y direction) and subframes are allocated.

  The image display apparatus 1 of the present embodiment can control power consumption in more detail when the number of subframes is increased. However, when the number of subframes is increased, the image display apparatus 1 requires more processing resources (for example, processing time and control circuit) for control.

  The subframe division in the image display apparatus 1 of the present embodiment is not particularly limited, but may be determined based on the power consumption reduction amount and the resource amount necessary for control.

  Returning to the description using FIG.

  The timing generation unit 30 receives the difference data and determines the timing (subframe refresh timing) for updating the display data of the subframe. Then, the timing generation unit 30 generates or selects a timing signal indicating the timing for updating the subframe based on the determination result, and transmits the timing signal to the display data synthesis unit 40 and the display unit 50. The timing signal is a signal for each subframe. Therefore, the timing generation unit 30 transmits a plurality of timing signals.

  The timing generation unit 30 will be further described with reference to FIG.

  FIG. 4 is a block diagram illustrating an example of the configuration of the timing generation unit 30.

  The timing generation unit 30 includes a timing determination unit 310 and a timing signal generation unit 320.

  The timing determination unit 310 determines the display data update timing (refresh timing) for each subframe based on the difference data received from the image analysis unit 20, and transmits the determination result to the timing signal generation unit 320.

  However, as will be described later, the timing signal generator 320 generates a timing signal having a predetermined frequency. Therefore, the timing determination unit 310 may transmit a determination result having a frequency that can be generated by the timing signal generation unit 320 based on the difference data.

  Note that flicker is felt differently by the user. Therefore, the timing determination unit 310 receives arbitrary setting data indicating the refresh timing desired by the user from an external device (not shown) operated by the user of the image display apparatus 1, and determines the determination result based on the arbitrary setting data. You may transmit to the timing signal generation part 320. FIG.

  Based on the determination result received from the timing determination unit 310, the timing signal generation unit 320 generates a timing signal indicating the refresh timing of each subframe, and transmits the timing signal to the display data synthesis unit 40 and the display unit 50.

  The means for generating the timing signal of the timing signal generator 320 of the present embodiment is not particularly limited.

  For example, the timing signal generation unit 320 may include a synthesizer that includes a voltage controlled oscillator (VCO) and a phase locked loop (PLL). In this case, the timing signal generator 320 generates a timing signal having a frequency indicated by the determination result using a synthesizer.

  Alternatively, the timing signal generator 320 may include a frequency divider and a multiplier as shown in FIG. In this case, the timing signal generator 320 generates signals of a plurality of frequencies using a frequency divider and a multiplier based on the signal (reference signal) generated by the reference transmitter. Then, based on the determination result, the timing signal generation unit 320 uses a selection unit to select a signal having a frequency corresponding to the determination result from a plurality of frequency signals as a timing signal, and transmits the timing signal.

  Note that the number of frequency dividers and multipliers included in the timing signal generator 320 is not limited. The timing signal generator 320 may include one or more frequency dividers. Further, the timing signal generator 320 may include one or a plurality of multipliers. Further, the timing signal generator 320 may not include either a frequency divider or a multiplier.

  Alternatively, the timing signal generator 320 may receive a reference signal from an external device (not shown) instead of the reference transmitter.

  Returning to the description using FIG.

  The display data synthesis unit 40 receives the image data, the difference data, and the timing signal, generates data (display data) to be displayed by the display unit 50, and transmits the data to the display unit 50.

  The display data synthesizing unit 40 may synthesize the display data into frames and then transmit them to the display unit 50 in units of frames. Alternatively, the display data synthesis unit 40 may transmit the display data to the display unit 50 in units of subframes.

  When the display unit 50 stores the display data in a memory (not shown), the display data synthesis unit 40 may transmit the display data to the memory.

  In the following, as an example, the display data combining unit 40 will be described as sending display data after combining with a frame.

  FIG. 5 is a block diagram illustrating an example of the configuration of the display data synthesis unit 40.

  The display data synthesis unit 40 includes a data generation unit 410 and an assembly unit 420.

  The data generation unit 410 generates display data to be displayed on the display unit 50 for each subframe based on the image data, the difference data, and the timing signal.

  Specifically, the data generation unit 410 operates as follows.

  The data generation unit 410 generates interpolation data between subframes based on the difference data of each subframe. For example, the data generation unit 410 compares a predetermined threshold value with the difference data. When the difference data is larger than the threshold value, the data generation unit 410 generates interpolation data and transmits it to the assembly unit 420.

  The threshold value of this embodiment need not be limited to one, and may be two or more. For example, the data generation unit 410 stores two threshold values (hereinafter referred to as threshold values A and B, where A <B), and based on the comparison with the difference data, the following is performed. It may work.

(1) Difference data <threshold A
The data generation unit 410 determines that the difference data is small and does not generate interpolation data. The data generation unit 410 transmits the subframe data to the assembly unit 420. Note that when the difference data is small, the data generation unit 410 may not transmit a part of the subframe data to the assembly unit 420.

(2) threshold A ≦ difference data <threshold B
The data generation unit 410 determines that the difference data is medium, and generates interpolation data (first interpolation data) between subframes. Then, the data generation unit 410 transmits the subframe data and the first interpolation data to the assembly unit 420.

(3) Threshold value B ≦ difference data The data generation unit 410 determines that the difference data is large, and generates interpolation data (second interpolation data) between the first interpolation data and the subframe in addition to the first interpolation data. To do. Then, the data generation unit 410 transmits the subframe data, the first interpolation data, and the second interpolation data to the assembly unit 420.

  Note that the method used by the data generation unit 410 of the present embodiment to generate data is not particularly limited. The data generation unit 410 may use, for example, a frame interpolation method or a frame prediction method.

  The assembling unit 420 assembles the data for each subframe generated by the data generating unit 410 based on the timing signal, generates display data for each frame, and sends the display data to the display unit 50.

  The operation of the display data synthesis unit 40 will be further described with reference to the drawings.

  FIG. 6 is a diagram illustrating an example of the operation of the display data synthesis unit 40 using the interpolation method.

  FIG. 6 shows an example of a frame including three subframes. The three subframes shown in FIG. 6 are subframe 1 (sub1), subframe 2 (sub2), and subframe 3 (sub3). Further, it is assumed that the difference data is determined using two threshold values.

  In the data number of each subframe (sub) in FIG. 6, the next number after the sub is the number of the subframe. For example, sub 2x (x is an arbitrary positive integer) indicates data of subframe 2 (sub 2).

  Each frame in the data generation unit 410 in FIG. 6 represents a data group.

  The first frame is a data group of subframes relating to the first (first) frame. The subframe number is the frame number ("1"), which is the number after the subframe number (second number). For example, sub 11 is data of the first frame of sub frame 1.

  The second frame is a subframe data group related to the next (second) frame. Similar to the first frame, the second number of the subframe is the frame number (“2”). For example, the sub 32 is data of the second frame of the sub frame 3.

  The first interpolation frame is a sub-frame interpolation data group created by interpolating the sub-frame data of the first frame group and the sub-frame data of the second frame group. The data number of the subframe is “time previous data number + next data number”. For example, the sub 2122 is data obtained by complementing the sub 21 that is the data of the first frame of the subframe 2 and the sub 22 that is the data of the second frame of the subframe 2.

  The second interpolation frame is a sub-frame interpolation data group created by interpolating the sub-frame data of the first interpolation frame group and the sub-frame data of the first frame group or the second frame group. The subframe number is the same as that of the first interpolation frame group.

  Also, the difference data of each subframe shown in FIG. 6 and the range of data groups used based on the difference data are as follows.

(1) Subframe 1
In subframe 1, the difference data between the data of the first frame and the data of the second frame is small. Therefore, subframe 1 uses the data of the first frame and does not use the data of the second frame.

(2) Subframe 2
In subframe 2, the difference data between the data of the first frame and the data of the second frame is large. Therefore, the subframe 2 uses the data of the second interpolation frame group in addition to the data of the first frame, the second frame, and the first interpolation frame group.

  The sub 2223 of the first interpolation frame group is interpolation data of the second frame data (sub 22) of the sub frame 2 and the third frame data (sub 23). Further, the sub 222223 is interpolation data between the sub 2223 of the first interpolation data and the data (sub 23) of the third frame. Therefore, in FIG. 6, an arrow from the sub 23 that is the data of the third frame of the subframe 3 is illustrated as an example.

(3) Subframe 3
In the subframe 3, the difference data between the data of the first frame and the data of the second frame is medium. Therefore, the subframe 3 uses the data of the subframe 3 of the first interpolation frame in addition to the data of the subframe 3 of the first frame and the second frame.

  The data generation unit 410 transmits data used in each subframe to the assembly unit 420.

  The assembly unit 420 assembles the data received from the data generation unit 410 to create display data, and sends the display data to the display unit 50.

  For example, the display data synthesizing unit 40 assembles data of frames obtained by synthesizing the following subframe 1 to subframe 3 data in order, and transmits the data as display data to the display unit 50.

(1) Sub 11 + Sub 21 + Sub 31
(2) Sub 11 + Sub 212 122 + Sub 31
(3) Sub 11 + Sub 2122 + Sub 3132
(4) Sub 11 + Sub 212 222 + Sub 3132
(5) Sub 11 + Sub 22 + Sub 32
(6) Sub 11 + Sub 222223 + Sub 32
(7) Sub 11 + Sub 2223 + Sub 32
(8) Sub 11 + Sub 222323 + Sub 32
In addition, although the example which produces interpolation data for every sub-frame was shown in FIG. 6, the data generation part 410 of this embodiment is not restricted to this. The data generation unit 410 may create interpolation data using adjacent subframes.

  Returning to the description using FIG.

  The display unit 50 receives display data and displays it. However, the display unit 50 updates (refreshes) the display of the subframe based on the timing signal.

  The display unit 50 may include a memory (not shown) for storing display data. Alternatively, the display unit 50 may store display data in an external memory (not shown) different from the display unit 50.

  As already described, when the display unit 50 stores the display data in the external memory, the display data synthesis unit 40 may store the display data in the external memory. In this case, the display unit 50 does not have to receive display data from the display data combining unit 40.

  FIG. 7 is a diagram illustrating an example of the configuration of the display unit 50.

  The display unit 50 includes a drive control unit 510, a gate driver 520, a source driver 530, and a display 540.

  The display 540 displays the image data in a visually recognizable state. Specifically, the display 540 is a display cell of one or a plurality of liquid crystals or plasma displays, for example.

  The gate driver 520 and the source driver 530 are biaxial drivers that drive the display 540. Either the gate driver 520 or the source driver 530 may be in the horizontal direction. In FIG. 7, as an example, the gate driver 520 drives in the horizontal direction (row direction or X direction), and the source driver 530 drives in the vertical direction (column direction or Y direction).

  In addition to the gate driver 520 and the source driver 530, various names (for example, a segment driver, a common driver, a scanning driver, and an address driver) are used as names of drivers or signals for driving cells of a display device such as a liquid crystal display. It has been. When these names are used, the gate driver 520 and the source driver 530 described in this embodiment may be appropriately replaced.

  The drive control unit 510 controls the gate driver 520 and the source driver 530 and displays display data on the display 540.

  Furthermore, the drive control unit 510 controls display update (refresh) for each subframe. Therefore, the drive control unit 510 controls the gate driver 520 and the source driver 530 by dividing them into numbers corresponding to subframes. Note that, as shown in FIGS. 3A and 3B, when the subframe is divided in one direction, the drive control unit 510 controls either the gate driver 520 or the source driver 530 for division. To do.

  FIG. 8 is a diagram illustrating an example of division of the gate driver 520 and the source driver 530.

  FIG. 8 is a diagram illustrating a case where the gate driver 520 is divided into seven and the source driver 530 is divided into ten. The number of subframes shown in FIG. 8 is 7 × 10 = 70.

  In FIG. 8, when controlling the subframe in the leftmost column in the uppermost row, the drive control unit 510 controls GD0 of the gate driver 520 and SD0 of the source driver 530. In addition, when controlling the subframe displaying “1” in FIG. 8, the drive control unit 510 controls GD5 of the gate driver 520 and SD1 of the source driver 530.

  The drive control unit 510 can use various control methods for controlling each driver.

  For example, the drive control unit 510 may control the driver corresponding to each subframe based on the change of the timing signal.

  Alternatively, a timing signal may be input to each driver in the display unit 50, and the drive control unit 510 may operate data (image data) displayed in each subframe by each driver.

  Note that the display unit 50 of this embodiment does not include the display 540, and the gate driver 520 and the source driver 530 may drive an external display device (not shown). In this case, the display unit 50 transmits the output of each driver to an external display device.

  The display unit 50 may not include the gate driver 520, the source driver 530, and the display 540, and the drive control unit 510 may control a display device that includes an external driver (not shown). In this case, the display unit 50 transmits a timing signal and a signal for the drive control unit 510 to control each driver to an external display device.

  As already described, the display data sent from the display data synthesizing unit 40 to the display unit 50 may be in units of subframes instead of in units of frames.

  When the display data synthesizing unit 40 transmits in units of subframes, the display data synthesizing unit 40 transmits the following updated display data of subframes to the display unit 50 in the description of FIG. 6, for example.

(1) Sub 11 + Sub 21 + Sub 31
(2) Sub 212122
(3) Sub 2122 + Sub 3132
(4) Sub 212222
(5) Sub 22 + Sub 32
(6) Sub 222223
(7) Sub 2223
(8) Sub 222223
The display unit 50 updates the display using the received display data as update data for each subframe.

  Next, timing signals of the image display device 1 of the present embodiment will be described with reference to the drawings.

  The display used for explanation is the display shown in FIG.

  As already described, the division of the subframe shown in FIG. 8 is 7 divisions in the vertical direction and 10 divisions in the horizontal direction. In the following description, the combination of the division name (GDx) of the gate driver 520 and the division name (SDx) of the source driver 530 shown in FIG. 8 is used as the name of the subframe. For example, the subframe in the upper left corner of the display 540 is referred to as “sub [GD0-SD0]”.

  The display 540 shown in FIG. 8 displays time as an example of display. From the left, the display is “two-digit minute” and “second with two integers and two decimal digits”.

  The time display of the display 540 in FIG. 8 is the sixth row (GD5) from the top (second from the bottom) of the gate driver 520. The time display on the display 540 is the second to ninth columns (SD1-SD8) from the left of the source driver 530.

  The time display shown in FIG. 8 changes with the passage of time.

  FIG. 9 is a diagram illustrating an example of a change in display in FIG.

  In FIG. 9, the display on the left side of the display 540 is changed to the display on the right side as time passes.

  As is clear from the display of FIG. 9, the display of the subframe of the row (GD5) for displaying time is as follows.

  The sub [D5-SD8] that displays 1 / 100th of a second has the highest display change frequency. Therefore, the sub [GD5-SD8] timing signal is the timing signal having the highest frequency (refresh rate).

  The sub [GD5-SD7] that displays 1/10 second is the second most frequently changed display. However, this frequency is 1/10 of the sub [GD5-SD8] that displays 1/100 second. Therefore, the timing signal of the sub [GD5-SD7] is a timing signal having a frequency (refresh rate) lower than that of the sub [GD5-SD8] although it is higher than the other subframes.

  Hereinafter, sub [GD5-SD5] and sub [GD5-SD4] for displaying integer seconds, and sub [GD5-SD2] and sub [GD5-SD1] for displaying minutes are similarly updated sequentially. The frequency decreases.

  In addition, subframes that are not displayed (sub [GD5-SD0], sub [GD5-SD9]) and subframes (sub [GD5-SD3], sub [D5-SD6]) that display a delimiter are displayed. Does not change. Therefore, the timing signals of these subframes are timing signals having the lowest frequency (refresh rate).

  Note that the display of subframes in the range in which time is not displayed (from the first line (GD0) to the fifth line (GD4) and the seventh line (GD6)) is not updated, so the timing signals of these subframes May be the lowest update frequency (refresh rate).

  FIG. 10 is a diagram illustrating an example of a timing signal of a typical subframe.

  The frequency (refresh rate) of the timing signal is preferably determined based on the specifications of the display cell of the display 540, the necessary display change period, and the frequency that the timing signal generator 320 can generate.

  However, one hundredth of a second is 100 Hz. The reference signal for the refresh rate in general display is often 60 Hz.

  Therefore, in FIG. 10, the sub- [GD5-SD8] timing signal displaying 1 / 100th of a second is set to four times (240 Hz) as a general reference signal in order to reduce flicker. Each time the display time (seconds) increases by one digit, the frequency of the sub-frame timing signal is halved. That is, in the timing signal shown in FIG. 10, the refresh rate of the subframe displaying the one's place of the second is set to 60 Hz, which is a general reference signal, and the frequency is halved by one digit and the frequency is decreased by one digit. It is an example of a timing signal in the case of double. The frequency of the subframe in the sixth row (GD5) of the gate driver 520 is arranged as follows.

Sub [GD5-SD0]: lowest frequency Sub [GD5-SD1]: 1/8 frequency (7.5 Hz) of the reference signal
Sub [GD5-SD2]: 1/4 frequency of reference signal (15Hz)
Sub [GD5-SD3]: Minimum frequency Sub [GD5-SD4]: Half the frequency of the reference signal (30 Hz)
Sub [GD5-SD5]: Same frequency as reference signal (60Hz)
Sub [GD5-SD6]: Minimum frequency Sub [GD5-SD7]: Double frequency of reference signal (120 Hz)
Sub [GD5-SD8]: Four times the frequency of the reference signal (240 Hz)
Sub [GD5-SD9]: Minimum frequency The signal in the first row in FIG. 10 indicates a general reference signal (60 Hz).

  The timing signal shown in the second row is a sub [GD5-SD4] timing signal for displaying the tenth of the second. The frequency of the timing signal of the sub [GD5-SD4] is half the frequency (30 Hz) of the reference signal.

  The timing signal shown in the third row is a sub [GD5-SD5] timing signal for displaying the second digit. The frequency of the sub [GD5-SD5] timing signal is the same frequency (60 Hz) as that of the reference signal.

  The timing signal shown in the fourth row is a sub- [GD5-SD6] timing signal for displaying a decimal point. Since the display of the decimal point does not change, the frequency of the timing signal of the sub [GD5-SD6] is the lowest frequency (lowest frequency). In FIG. 10, as an example, the frequency is 1/8 of the reference signal (7.5 Hz).

  The timing signal shown in the fifth row is a sub [GD5-SD7] timing signal indicating 1 / 10th of a second. The frequency of the timing signal of the sub [GD5-SD7] is twice the frequency (120 Hz) of the reference signal.

  The timing signal shown in the sixth row is a sub [GD5-SD8] timing signal indicating 1 / 100th of a second. The frequency of the timing signal of the sub [GD5-SD8] is four times the reference signal (240 Hz) as already described.

  As described above, the image display apparatus 1 according to the present embodiment uses a timing signal having an appropriate refresh rate for each subframe.

  As a result, the image display device 1 of the present embodiment can obtain an effect of reducing power consumption in a region (subframe) in which an image is updated while reducing flicker.

  The reason is as follows.

  The image display apparatus 1 uses a timing signal having a frequency necessary for flicker reduction as a timing signal for updating a subframe (for example, sub [GD5-SD8] in FIG. 8) having a high update frequency. Therefore, the image display device 1 can reduce flicker in subframes (regions) that are frequently updated.

  On the other hand, the image display apparatus 1 has a frequency lower than that of a subframe with a high update frequency as a timing signal for updating a subframe with a low update frequency (for example, sub [GD5-SD1] in FIG. 8). Use timing signals. Therefore, the image display device 1 can reduce the power consumption of subframes (regions) that are less frequently updated. That is, the image display device 1 can reduce the refresh rate of the region (subframe) with a low update frequency and reduce the power consumption even in the region (subframe) in which the display is updated based on the update frequency.

  For example, in the case of the image shown in FIG. 8, the image display apparatus 1 increases the refresh rate frequency of the subframe (sub [GD5-SD8]) that displays 1/100 second to reduce flicker. On the other hand, for example, the image display device 1 sets the refresh rate of subframes (sub [GD5-SD1] and sub [GD5-SD2]) for displaying minutes to a frequency lower than that of the reference signal to reduce power consumption.

  In FIG. 8, the number of subframes in which display updates occur is six out of 70 subframes. Therefore, the image display apparatus 1 sets the refresh rate of 64 subframes (about 91%) out of the 70 subframes to the lowest frequency, and reduces the overall power consumption.

  Note that the configuration of the image display device 1 of the present embodiment is not limited to the above description. The image display device 1 may have a plurality of configurations described as separate configurations so far as one configuration. Alternatively, the image display device 1 may divide one configuration into a plurality of configurations. The image display apparatus 1 includes a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), a NIC (Network Interface Circuit or Network Interface Card), and a GPU (Graphics Processing Unit). It may be realized as a computer including

  FIG. 11 is a block diagram showing an example of the configuration of the image display device 6 which is another configuration of the present embodiment.

  The image display device 6 includes a CPU 610, a ROM 620, a RAM 630, an IO (Input / Output) 640, a NIC 650, and a GPU 660. Further, the image display device 6 includes an internal storage device 710 and an input device 720 connected to the IO 640, and a display device 730 connected to the GPU 660. The image display device 6 includes these components and constitutes a computer.

  The CPU 610 reads a program from the internal storage device 710 via the ROM 620 or the IO 640. Then, the CPU 610 controls the GPU 660 based on the read program, and realizes each function as the image display device 1 of the present embodiment already described. The CPU 610 uses the RAM 630 and the internal storage device 710 as temporary storage when realizing each function. In addition, the CPU 610 receives image data via the NIC 650. Further, the CPU 610 receives input data from the input device 720 via the IO 640.

  Note that the CPU 610 may read a program included in the storage medium 800 that stores the program in a computer-readable manner by using a storage medium reading device (not shown). Alternatively, the CPU 610 may read a program from an external storage device (not shown) via the NIC 650.

  The GPU 660 controls the display device 730 as the display unit 50 or the display 540 based on the image data received by the image display device 6 and realizes the processing of the image data and the display data as the image display device 1 already described. . The GPU 660 may receive a program for realizing the processing from the CPU 610 or read from the ROM 620. In addition, the GPU 660 may use the RAM 630 or the internal storage device 710 as a storage location of each data.

  The ROM 620 stores programs executed by the CPU 610 and fixed data. The ROM 620 may include a program executed by the GPU 660. The ROM 620 is, for example, a P-ROM (Programmable-ROM) or a flash ROM.

  The RAM 630 temporarily stores programs executed by the CPU 610 and data. The RAM 630 may operate as the storage unit 10. The RAM 630 may store display data used by the GPU 660. The RAM 630 is, for example, a D-RAM (Dynamic-RAM).

  The IO 640 is connected to the internal storage device 710 and the input device 720 and the CPU 610 to transmit and receive data. The IO 640 is, for example, an IO interface card.

  The NIC 650 is connected to an imaging device (not shown) that transmits image data, and receives the image data. The NIC 650 is, for example, a LAN (Local Area Network) card.

  The internal storage device 710 stores data and programs stored in the image display device 6 for a long time. Further, the internal storage device 710 may operate as a temporary storage device for the CPU 610. Further, the internal storage device 710 may operate as the data storage unit 10. The internal storage device 710 is, for example, a hard disk device, a magneto-optical disk device, an SSD, or a disk array device.

  The input device 720 receives instruction data from the operator of the image display device 6 and transmits it to the CPU 610. The input device 720 is, for example, a keyboard or a mouse.

  The display device 730 is controlled by the GPU 660 to display an image. The display device 730 corresponds to the display unit 50 or the display unit 50 of the image display device 1. The display device 730 is, for example, a liquid crystal display device or a plasma display device.

  The image display device 6 configured in this way can obtain the same effects as the image display device 1.

  This is because the CPU 610 and the GPU 660 of the image display device 6 can realize the same operation as the image display device 1 based on the program.

(Second Embodiment)
In the description of the image display device 1 according to the first embodiment, the case where the position of the subframe for displaying an image is fixed and the frequency of display update is constant has been described.

  However, the image display device 1 may change the position of the sub-frame displaying the image and the update frequency with time.

  Therefore, as a second embodiment of the present invention, an image display device 1 in which the position of a subframe for displaying an image changes will be described with reference to the drawings.

  Note that the configuration of the image display device 1 of the present embodiment is the same as that of the image display device 1 of the first embodiment, and thus the description of the configuration is omitted.

  The operation of the image display apparatus 1 of the present embodiment is the same as that of the first embodiment except for switching of the timing signal, and therefore the timing signal will be described with reference to the drawings.

  Note that when the subframe shifts from a state in which the image changes to a state in which the image is fixed or not displayed, the image display device 1 of the present embodiment passes the frequency of the timing signal of the subframe through the intermediate frequency. Without switching to the lowest frequency. When the subframe shifts from a fixed image or a state without display to a state in which the image changes, the image display device 1 according to the present embodiment changes the frequency of the timing signal of the subframe from the lowest frequency to an intermediate frequency. You may switch to the required frequency without going through.

  However, noise and flicker are likely to occur when the change in the frequency used in the circuit is large.

  Therefore, the image display device 1 of the present embodiment passes through the intermediate frequency when switching the frequency of the timing signal. The image display device 1 is not limited in the frequency switching configuration. For example, when the difference is detected, the image analysis unit 20 may change the difference data step by step without changing the difference data at a time. Or the timing determination part 310 of the timing generation part 30 may change a determination result in steps.

  In the following description, as an example, it is assumed that the frequency of the timing signal is sequentially changed to double or half.

  FIG. 12 is a diagram illustrating an example of display on the display 540 used for describing the image display apparatus 1 of the present embodiment.

  The display 540 of the image display device 1 shown in FIG. 12 displays an image (showing “airplane” as an example) in a rectangular range whose diagonal is sub [GD2-SD0] -sub [GD3-SD2]. To do.

  FIG. 13 is a diagram illustrating an example of a change in the display in FIG.

  In FIG. 13, the display on the display 540 changes from the left display to the right display in order with time. That is, the image display device 1 moves the airplane image in the right direction.

  FIG. 14 is a diagram illustrating an example of a representative subframe timing signal when the image display apparatus 1 displays the image as illustrated in FIG. 13.

  The signal in the first row in FIG. 14 is a reference signal shown as a reference. The reference signal is, for example, a 60 Hz signal. FIG. 14 shows a signal when the display image moves in one subframe with the passage of 3/2 clocks of the reference signal. Therefore, the number above the signal in the first row indicates a state number corresponding to a change in the display state of the subframe. For example, in the state 1, the display of the airplane displayed in the range of sub [GD2-SD0] -sub [GD3-SD2] moves to the display of the range of sub [GD2-SD1] -sub [GD3-SD3]. State.

The signal in the second row is a sub- [GD1-SD0] timing signal. The sub [GD1-SD0] has no image change. For this reason, the image display device 1 sets the frequency of the timing signal of the sub [GD1-SD0] to the lowest frequency. (In FIG. 14, as an example, the timing signal is shown as one eighth of the frequency of the reference signal.)
The signal in the third row is a sub- [GD2-SD0] timing signal. The sub [GD2-SD0] displays an image in the initial state (state 1). For this reason, the image display device 1 sets the frequency of the sub- [GD2-SD0] timing signal to the maximum frequency (in FIG. 14, a frequency that is four times the reference signal). When the next state (state 2) is entered, the sub [GD2-SD0] does not display an image. Therefore, the image display apparatus 1 changes the frequency of the timing signal of the sub [GD2-SD0] from the maximum frequency to a lower frequency (double frequency in FIG. 14). When the next state (state 3) is entered, the image display device 1 changes the frequency of the timing signal of the sub [GD2-SD0] to a lower frequency (the same frequency as the reference signal in FIG. 14). When the state where the sub [GD2-SD0] does not display an image continues, the image display device 1 appropriately reduces the frequency of the timing signal of the sub [GD2-SD0] to a predetermined minimum frequency.

  The signal in the fourth row is a sub [GD2-SD6] timing signal. The sub [GD2-SD6] starts display in the state (state 4) next to the state 3. Therefore, the image display device 1 increases the frequency of the timing signal of the sub [GD2-SD6] so that the frequency becomes the maximum frequency in the state 4 (in FIG. 14, the frequency is four times the reference frequency).

  The signal in the fifth row is a sub [GD3-SD3] timing signal. The sub [GD3-SD3] does not display an image in the initial state (state 1). However, the sub [GD3-SD3] displays an image in the next state (state 2). Therefore, in the state 1, the image display device 1 sets the frequency of the timing signal of the sub [GD3-SD3] to a frequency close to the maximum frequency (FIG. 14) so that the next state (state 2) can start displaying an image. Then, the frequency is twice the reference frequency). Then, when the image display state (state 2) is entered, the image display device 1 sets the frequency of the sub- [GD3-SD3] timing signal to the highest frequency (four times the reference signal in FIG. 14). .

  The image display device 1 according to the second embodiment that operates in this way has noise and reduction when switching timing signals when changing the position of the display image, in addition to the effects of the image display device 1 according to the first embodiment. The effect which can be obtained can be acquired.

  The reason is that the image display device 1 of the second embodiment includes the same configuration as that of the image display device 1 of the first embodiment. Further, when switching the frequency of the timing signal, the image display device 1 passes through the intermediate stage frequency. This is for switching.

  While the present invention has been described with reference to the embodiments, the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

DESCRIPTION OF SYMBOLS 1 Image display apparatus 6 Image display apparatus 10 Data storage part 20 Image analysis part 30 Timing generation part 40 Display data synthetic | combination part 50 Display part 310 Timing determination part 320 Timing signal generation part 410 Data generation part 420 Assembly part 510 Drive control part 520 Gate Driver 530 Source driver 540 Display 610 CPU
620 ROM
630 RAM
640 IO
650 NIC
660 GPU
710 Storage device 720 Input device 730 Display device 800 Storage medium

Claims (7)

Data storage means for receiving and storing image data including a plurality of frames;
Image analysis means for analyzing a difference between subframes obtained by dividing the frame of the image data into a plurality of parts, and generating difference data indicating the difference;
Timing generating means for generating a timing signal that is an update timing of the image for each subframe based on the difference data;
Display data synthesizing means for generating display data for each subframe based on the image data, the difference data, and the timing signal;
An image display device comprising: display means for updating display of each subframe based on the display data and the timing signal of each subframe. The timing generation means includes
Timing determination means for determining the generated timing signal based on the difference data;
The image display device according to claim 1, further comprising: a timing signal generation unit that generates a timing signal based on the determination of the timing determination unit. The timing signal generating means includes
A frequency dividing means for dividing a predetermined reference signal;
Multiplication means for multiplying the reference signal;
The image display apparatus according to claim 2, further comprising: a selecting unit that selects the timing signal from the signal divided by the dividing unit, the signal multiplied by the multiplying unit, and the reference signal based on the determination. The display data synthesizing means includes
Data generating means for generating interpolated frame data between the sub-frames;
The image display device according to claim 1, further comprising: an assembling unit that assembles the subframe data and the interpolation frame data. Changing the frequency of the timing signal via one or more intermediate stage frequencies;
The image display device according to any one of claims 2 to 4. Receive image data containing multiple frames,
Analyzing a difference between subframes obtained by dividing the frame of the image data into a plurality of parts, and generating difference data indicating the difference;
Generate a timing signal that is the update timing of the image for each subframe based on the difference data,
Generating display data for each subframe based on the image data, the difference data, and the timing signal;
An image display method for updating display of each subframe based on the display data and the timing signal of each subframe. A process of receiving image data including a plurality of frames;
Analyzing a difference between subframes obtained by dividing the frame of the image data into a plurality of portions, and generating difference data indicating the difference;
Processing for generating a timing signal that is an update timing of the image for each subframe based on the difference data;
Processing for generating display data for each subframe based on the image data, the difference data, and the timing signal;
A program for causing a computer to execute a process of updating display of each subframe based on the display data and the timing signal of each subframe.

Images