JP2013172293A - Analog signal generation method, analog signal generation apparatus, and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique for generating a digitally modulated sound signal as an analog signal by pulse width modulation.SOLUTION: An analog signal generation apparatus for reproducing a digital signal into an analog compressional signal includes: an application 201 for reading out a digital signal from a recording medium; means 311 for decoding the digital signal read out into PCM data; a sound signal processor 312 for tuning a PWM fundamental frequency for PWM signal generation to give a low pass filter characteristic for EMI control; and a PWM generator 313 for generating a PWM signal corresponding to the digital signal by using the tuned PWM fundamental frequency. An application level driver constitutes a class D amplifier.

Description

  The present invention relates to a technique for generating a digital sound signal, and more particularly to a technique for generating a digitally modulated sound signal as an analog signal.

  Currently, personal computers (hereinafter referred to as PCs), tablet PCs, mobile phones, iPhone (registered trademark), scales, washing machines, rice cookers, refrigerators, photocopiers, vending machines, kiosk terminals, ticket vending machines , Bank ATMs, car meters, surveillance cameras, entrance / exit control panels, fire alarms, smart phones, various game machines, game machines, healthcare products, home appliances, OA equipment, POS related equipment, banks Related equipment, automobile-related equipment, security field-related equipment, and disaster prevention-related equipment have sound sources such as voice, music, ringing sounds, and various alarm sounds. PCs, mobile phones, smart phones, gaming machines, healthcare products, home appliances, OA equipment, POS related equipment, bank related equipment, automobile related equipment, security related equipment, disaster prevention related equipment, etc. refer. The main function of the information processing apparatus is to perform data processing, content reproduction, network access, and the like by a central processing unit (CPU) executing various applications. The information processing apparatus converts a digital sound signal such as PCM into an analog sound signal for the purpose of assisting various functions, or in recent years for the purpose of decoding and reproducing an audio-visual (AV) signal such as MP3. The driver, amplifier and speaker functions are provided.

  The above-mentioned information processing devices are increasingly required to save power, space and size in recent years, so they are equipped with highly efficient class D amplifiers for analog sound signal playback and convert digital sound signals to analog sound signals. Then playback is done. The class D amplifier is a digital amplifier that uses a switching element such as an FET or a power transistor, and can suppress power consumption and meet a space-saving requirement.

  Information processing apparatuses are required to be further reduced in size and weight with the spread of tablet PCs and smart phones, and the playback function of digital sound sources is also required to be more space-saving and lighter. Furthermore, since the information processing apparatus is also an electrical device, it is necessary to conform to EMI standards for regulating electromagnetic noise.

  FIG. 12 is a schematic block diagram of a conventional analog signal reproduction device 1200. The analog signal reproduction device 1200 includes a CPU 1210 that can be mounted on a PC, a game machine, a portable terminal, or an embedded device. The CPU 1210 provides the functions of the buffer memory 1211, the driver 1212, and the PWM signal generator 1213. The CPU 1210 buffers the sound signal instructed by the application in the buffer memory 1211 and causes the driver 1212 to function, thereby causing the PWM signal generator 1213 and the class D amplifier to function. The sound signal is reproduced from the speaker 1240.

  The analog signal reproduction device 1200 includes a class D amplifier, and the class D amplifier includes a low-pass filter (hereinafter referred to as LPF 1220) 1220, an AMP 1230, and a speaker 1240. The LPF 1220 cuts the harmonic component of the PWM signal to prevent the generation of acoustic noise, and reduces electromagnetic interference caused by the PWM signal, so-called EMI, by the high frequency component cut function. The AMP 1230 is a class D amplifier in the conventional example to be described, and includes an FET, a transistor, a switching element, and the like, and enables high-efficiency current / voltage amplification.

  The analog signal reproducing device 1200 shown in FIG. 12 may have various electromagnetic effects to the outside. Therefore, for example, the EMI standard defined in CISPR22 / EN5022, VCCI, FCC Part 15 and the like must be cleared. Don't be. Further, in recent years, PWM control is used when converting a digital signal into an analog signal. The PWM signal generates a voltage or current signal corresponding to the pulse width by controlling the pulse width of the rectangular wave, and controls an analog device such as a motor or a speaker connected to the outside via an amplifier. The PWM signal modulates the pulse width of the rectangular wave generated at the PWM basic frequency. When the PWM signal is Fourier-analyzed, the frequency spectrum mainly includes the pulse shape, particularly the rise / fall time and the PWM basic frequency. Includes high frequency and harmonic components due to frequency. For this reason, when using PWM, it is necessary to consider EMI of a high frequency component.

  The class D amplifier shown in FIG. 12 performs power amplification on the PWM signal by the AMP 1230 and then filters high frequency components and harmonic components by the LPF 1220 including the resistor R and the capacitance C. Here, although the simplest passive RC first-order low-pass filter circuit is exemplified as the LPF 1220, the present invention is not limited to this. A case where an LPF circuit having many orders, an active LPF circuit, or a combination of various filter circuits for the purpose of sound quality adjustment is assumed. The main purpose of the LPF 1220 is to reduce acoustic noise caused by the PWM signal by passing only the audible component of the acoustic signal. However, as a result of the cut-off function of the LPF 1220, an information processing apparatus equipped with a class D amplifier using the LPF 1220 can suppress the occurrence of EMI due to the PWM signal.

  Various D class amplifier technologies described above have been known so far. For example, in Japanese Patent Laid-Open No. 2009-60466 (Patent Document 1), it is not necessary to provide a speaker relay on the output side, and the generation of shock noise is prevented. It is described that a class D amplifier capable of performing the above is provided. Japanese Patent Laying-Open No. 2009-111893 (Patent Document 2) describes a “class D amplifier” that can sufficiently suppress noise while having a small and inexpensive configuration. Furthermore, in Japanese Patent Application Laid-Open No. 2001-185961 (Patent Document 3), the PCM-PWM method is used, the switching speed can be lowered, and the generation of noise at the time of no signal input can be reduced. An amplifier is listed.

  In Japanese Patent Laid-Open No. 2001-292040 (Patent Document 4), in the class D amplifier using the PCM-PWM method, the switching speed can be lowered and the occurrence of distortion of the drive voltage waveform can be suppressed. Possible digital amplifiers are described. Japanese Patent Laid-Open No. 2006-50430 (Patent Document 5) describes an audio processing apparatus including a class D amplifier and a low-pass filter that use PWM modulation in order to provide a digital amplifier module suitable for incorporation into a composite AV machine. doing. Furthermore, Japanese Patent Application Laid-Open No. 2007-88926 (Patent Document 6) describes a class D amplifier including a switching transistor and a low-pass filter constituting a push-pull type output stage. Japanese Patent Application Laid-Open No. 2007-166190 (Patent Document 7) is simple and can reduce distortion of a specific sampling frequency, a half frequency, and a multiplied frequency to a level where LPF is unnecessary. It describes that a class D amplifier that can be realized with only a small control circuit is provided.

JP 2009-60466 A JP 2009-111893 A JP 2001-185961 A JP 2001-292040 A JP 2006-50430 A JP 2007-88926 A JP 2007-166190 A

  The conventional analog signal reproduction device 1200 can reproduce sound sources such as PCM sound sources, CDs, and DVDs. However, these elements are implemented as LSIs that are independent of each other or integrated with a certain degree of function, and consume an area on the board. There was a limit to the demand for low power consumption. Furthermore, since they are individually mounted as LSIs, there is a problem that cost and design development labor are required, and that it is not possible to flexibly cope with changes in hardware configuration and design changes.

  In addition, D-class amplifiers and various audio processing devices equipped with D-class amplifiers are known, but there is an increasing demand for improved information processing devices and smaller and lighter weight. There was a need to reduce the size and price of class amplifier modules.

  Furthermore, in response to the diversification and high functionality of applications and contents, information processing apparatuses are normally updated with their functions, and the sound reproduction function of information processing apparatuses is also highly functional for applications and contents. It was also required to update efficiently to cope with the trend.

  The present invention has been made in view of the above-described problems of the prior art, and the present invention achieves suppression and control of high-frequency noise caused by a PWM signal by tuning a fundamental frequency for generating the PWM signal. The present inventors have found that it is possible to achieve the present invention.

That is, according to the present invention, there is provided an analog signal generation method for reproducing a digital signal read by an information processing device into an analog signal, the analog signal generation method including:
An application reading the digital signal from a recording medium;
Decoding the read digital signal into PCM data; and
Generating the PWM signal from the decoded PCM data using a PWM fundamental frequency that provides a low pass filter characteristic for controlling EMI;
A method for generating an analog signal can be provided.

  The present invention may include a step of tuning the PWM basic frequency giving the low-pass filter characteristics to a frequency lower than 150 kHz or 30 MHz and higher than the sampling frequency of the PCM data. When the number of effective bits of the PCM data decreases due to the tuning of the PWM basic frequency, the method may include buffering the PCM data and adding or subtracting to generate the PWM signal. In the present invention, the analog signal generation method can generate an analog signal for generating a sparse wave signal having an audible sound frequency.

Also, in the present invention, an analog signal generation device that reproduces a digital signal into an analog signal, the analog signal generation device includes:
Application means for reading the digital signal from a recording medium;
Means for decoding the read digital signal and decoding it into PCM data;
Means for tuning a PWM fundamental frequency for generating a PWM signal to provide a low pass filter characteristic for controlling EMI;
Means for generating a PWM signal corresponding to the digital signal using the tuned PWM fundamental frequency;
An analog signal generator is provided.

  In the present invention, the means for tuning may include a means for setting a PWM basic frequency giving the low-pass filter characteristics to a frequency lower than 150 kHz or 30 MHz and higher than a sampling frequency of the PCM data. When the effective number of bits of the PCM data decreases due to the tuning of the PWM basic frequency, the PCM data may be buffered and added or subtracted to generate the PWM signal.

  Further, according to the present invention, it is possible to provide an analog signal generation device and a program for generating an analog density signal from a digital signal.

The figure which shows the implementation form of the sound signal generation apparatus with which this invention is applied illustratively. The figure which shows the schematic functional block 200 of the sound signal generation apparatus of this embodiment. FIG. 3 is a diagram showing a schematic functional block 300 of a driver of the present embodiment. The figure which shows the higher order functional block of the driver 310 of this embodiment. The schematic diagram of the PWM signal 500 produced | generated by this embodiment. 4 is a flowchart of processing executed by a driver 310 according to the present embodiment. The flowchart of the PWM signal generation process which the driver 310 of this embodiment performs. The figure which shows the frequency characteristic 800 of the PWM signal and the filter characteristic 810 of typical LPF explaining that an LPF function can be provided by the PWM basic frequency modulation of this embodiment. The figure which shows other embodiment of the driver in this embodiment. The flowchart of a process when it is estimated that the bit drop of PCM data will generate | occur | produce in this embodiment. The flowchart of the PWM signal generation process which the driver 310-2 of this embodiment performs. 1 is a schematic block diagram of a conventional analog signal reproduction device 1200. FIG.

  Hereinafter, although this invention is demonstrated with embodiment, this invention is not limited to embodiment mentioned later. Hereinafter, an analog signal generation device to which the present invention is applied will be described as an audio signal generation device that is an embodiment for decoding PCM data as audio data. The present invention can be applied to a device that can reproduce a digital signal as an analog signal, such as a vibration or a vibrator. FIG. 1 exemplarily shows the sound signal generation device of the present embodiment as a tablet PC 100, a smart phone 110, and a game machine (not shown). The tablet PC 100 is connected to the network and has an appropriate format such as WAV, MP3, MPEG2, MPEG4, H.264. AV content in a format such as H.264 can be downloaded. The tablet PC 100 can be connected to an external device such as a flash memory, a CD-ROM, or a DVD drive via an interface such as a USB. The sound signal generation device of the present invention can also be implemented as a so-called embedded device such as a home appliance, OA device, or FA device.

  The smart phone 110 can also download AV content via a wireless network. In addition, since the smart phone has a telephone function as its main function, it is necessary to reproduce an audio signal and has a vibrator function used in a manner mode or the like. In addition, the game machine reproduces various audio / acoustic signals together with moving image images in order to enhance the game feeling along the game context or to enhance the sense of reality. In addition to the stationary game machines, network-type games have recently become widespread, and the smart phone 110 and the tablet PC 100 can also be called game machines in a sense.

  The sound signal generation apparatus shown in FIG. 1 is a digital signal encoded in ADX or ADPCM, which is a high compression digital sound compression format of products of PCM and CRI / Middleware Co., Ltd. PCM data obtained by expanding and decoding the received data is generated as a sound signal. Since the tablet PC 100 and the smart phone 110 are one of the main benefits of portability, they are required to be thin and light and to save power. From this point of view, it is necessary to integrate elements other than the current / voltage amplification elements and speakers essential for reproducing analog sound into a single element. However, since it is necessary to generate an analog sound signal, it can be said that hardware such as a class D amplifier and a speaker cannot be deleted.

  In the present embodiment, based on the above idea, it is possible to consolidate functions that can be replaced by a CPU by a program in place of functions used for PWM control other than class D amplifiers and speakers.

  FIG. 2 shows a schematic functional block 200 of the sound signal generation device of the present embodiment. The sound signal generation device of this embodiment can be implemented as a PC, smart phone, game machine, or other embedded device, and includes a memory such as a CPU, a RAM, and a ROM, a hard disk device, an SSD, a flash memory, and the like. The CPU executes a program by operating hardware resources, thereby realizing functional means for functioning as a sound signal generation device.

  Referring to FIG. 2, the sound signal generation device includes an application 201, an operating system 202 (hereinafter referred to as OS 202), and various drivers 203 to 206 as functional blocks. In the context of this embodiment, the application 201 is a Windows (registered trademark) media player, game software, AV content playback software, and the like, and AV content such as MP3, WAV, MPEG, MPEG2, MPEG4, and H264 is read from the memory. A function of reading and converting a digital sound signal such as a PCM sound source into an analog signal corresponding to an exemplary audible frequency (sound wave) and outputting the analog signal from a speaker is provided.

  The OS 202 is executed by the CPU, manages the execution of the application, controls the various drivers 203 to 206, and outputs the execution result of the application 201 to the various hardware 207 to 210. The OS 202 is not particularly limited. Specifically, for example, Windows (registered trademark) series, LINUX (registered trademark), UNIX (registered trademark), MAC OS (registered trademark), LINX (registered trademark), ANDROID (Registered trademark), FreeBSD, VxWorks, OS-9, QNX, etc., can be implemented as any OS for computers, mobile devices, or embedded systems, or as an embedded device separated from the OS You can also

  The CPU is not limited, but for example, PENTIUM (registered trademark), PENTIUM (registered trademark) DUALCORE, CORE2 DUO (registered trademark), CORE2 QUAD (registered trademark), XEON (registered trademark), ATHRON (Registered trademark), OPETRON (registered trademark), PHENOM (registered trademark), SEMPRON (registered trademark), PORWEPC (registered trademark), Cortex (registered trademark), Super-H (registered trademark), RX (registered trademark), R8C (Registered Trademark), RL78 (Registered Trademark), 78K (Registered Trademark), and the like may be used, and a single core, dual core, or single chip microcomputer may be used.

  When the application 201 requests access to an external device, the OS 202 calls the corresponding drivers 203 to 206 to enable access to the corresponding external device. For example, the driver 203 is a driver at an application level such as USB, and enables access to hardware 207 such as a storage element such as a DRAM or a flash memory. The driver 204 is a SATA driver, for example, and enables access to an external media device such as a hard disk drive, a CD-ROM, or a DVD.

  The driver 205 functions as the class D amplifier driver of this embodiment, sends the PWM signal to the amplifier (AMP), amplifies it, and sends it to the speaker mounted as hardware as an analog sound signal. The speaker reproduces the received sound signal. Note that the sound signal in the present embodiment means a waveform signal that propagates as a sparse / dense wave, and is not limited to a human audible range.

  As will be described in detail later, the driver 205 of the present embodiment configures a driver for a class D amplifier at the application (software) level, decompresses the compressed AV content, and decodes it to PCM data. A function of tuning a PWM fundamental frequency and generating a PWM signal from PCM data using the fundamental frequency is provided. Further, the driver 206 can be, for example, a network adapter, which operates the physical layer for Ethernet and wireless networks, and also enables application (software) level drivers. It is.

  The driver mounting format is not particularly limited, but can be implemented as a so-called dll (dynamic link library) in a Windows (registered trademark) OS. In addition, in an OS such as UNIX (registered trademark) or LINUX (registered trademark), for example, it can be implemented as a shared library file such as “.so”, and any of them can be configured without using hardware other than a memory or a hard disk. .

  When the characteristics of the PCM data included in the digital content can be predicted in advance, the PWM basic frequency tuning applied by the driver 205 of the present embodiment is registered in a lookup table or the like, and an appropriate value is set. The fundamental frequency can be generated using clock generation means or a frequency divider. If the sampling rate of PCM data can be variably set, the sampling rate and the PWM basic frequency are compared, and the oscillation frequency division control is adjusted dynamically based on the sampling theorem, You can also tune it.

  FIG. 3 shows a schematic functional block 300 of the driver of this embodiment. A functional element surrounded by a rectangular frame in FIG. 3 provides the driver 310 of the present embodiment, and corresponds to the driver 205 in FIG. When the application 201 starts reproducing the sound signal, the application 201 reads the compressed data from the memory and buffers it. The buffered compressed data is sent to the driver 310. The driver 310 includes a PCM decoder 311, a sound signal processor 312, and a PWM signal generator 313. The PCM decoder 311 has a data expansion function, reads AV content that is compressed data from a buffer, applies expansion processing, and decodes PCM data. In the embodiment to be described, since the frequency of the analog signal to be reproduced is an audible range, it is described as the sound signal processor 312, but the digital signal that executes processing for processing the digital signal to generate the PWM signal from the digital signal Functions as a processor.

  In this embodiment, the application 201 can read a digital sound signal from a recording device provided in the apparatus, for example, a CD-ROM, a DVD, a USB, or a flash memory, or when the application enables streaming reproduction. The buffer can be implemented as a ring ring buffer for streaming provided by the application 201.

  The sound signal processor 312 applies the following processing to PCM data in order to eliminate the use of LPF. First, the sound signal processor 312 determines a target PWM fundamental frequency. The determination of the PWM fundamental frequency takes into consideration that the EMI is improved by the high-frequency component cut characteristic of the LPF, and the intensity of the high-frequency component when the PWM signal is Fourier expanded is approximately the same as the cut-off frequency characteristic of the LPF. Consider taking a behavior of −20 dB / dec. In addition, the PWM basic frequency is determined in consideration of the characteristics of PCM data to be processed. From the above viewpoint, the value of the PWM basic frequency is determined as the maximum frequency that is less than the frequency less than the EMI regulation value and minimizes the occurrence of data bit dropping of PCM data during PWM conversion. In an embedded device, if the CPU capability is not sufficient, a configuration in which frequency candidate values are set in advance in a lookup table and tuned can be employed. In the present embodiment, the PWM basic frequency tuning method can be used by any setting method known so far.

  Then, the sound signal processor 312 sends the determined PWM basic frequency and PCM data to the PWM signal generator 313. In this embodiment, the PWM signal generator 313 is not implemented as an independent semiconductor module or semiconductor block, but as software means provided by the CPU executing a program. The PWM signal generator 313 receives the PWM basic frequency pulse generated by the sound signal processor 312, compares the count of the PCM data and the setting of the PWM signal to be generated, and modulates the pulse width of the PWM basic frequency pulse. As a result, a PWM signal is generated. The generated PWM signal is output from the driver 310 without passing through the LPF, and then output to the AMP 320. After being subjected to current / voltage amplification, the analog signal is output from the speaker 330 without passing through the LPF. .

  In this embodiment, since the sound signal processor 312 tunes the PWM fundamental frequency so as not to cause an EMI problem, it is possible to eliminate the need to arrange an LPF on the output side of the driver 310, and to achieve weight reduction and space saving. . Further, since the PCM decoder 311, the sound signal processor 312, and the PWM signal generator 313 can be mounted in a single LSI called a CPU by a program operation without weight or occupied space, further space saving and weight reduction can be achieved. It is also possible. In the future, it is also possible to mount a logic synthesizable CPU, the PCM decoder 311, the sound signal processor 312, and the PWM signal generator 313 in a field programmable LSI represented by a single FPGA.

  Furthermore, since the driver of the present embodiment can be implemented as a device driver that is called in response to a request from the application 201, it is possible to eliminate hardware dependency and provide a more flexible and versatile sound signal processor. it can.

  FIG. 4 shows a higher-order functional block of the driver 310 of this embodiment. The driver 310 includes a PCM decoder 401 and a sound processor 402. The PCM decoder 401 reads the compressed data 400 from the buffer memory, and decodes the PCM data by applying a decompression process. The decoded PCM data is sent to the sound processor 402, where the PCM data is analyzed, and the PWM basic frequency is set to a frequency value less than the frequency of the EMI regulation so as to minimize the data bit drop of the PCM data. To do.

  More specifically, according to the Nyquist sampling (sampling) theorem, the PWM fundamental frequency only needs to exceed the frequency component included in the audio signal, so the sampling rate of the PCM data is less than the frequency of the EMI regulations. For example, the PWM fundamental frequency can be lowered to a range of approximately 20 Hz to 20 KHz.

  If the PCM data is data with high predictability to some extent, such as game software, synthesized sound of a smart phone, or alarm signal, it can be determined by appropriately selecting from the optimum PWM basic frequency setting value. .

  The sound processor 402 controls (counts) the clock so as to generate the determined PWM fundamental frequency, and generates the PWM fundamental frequency. More specifically, the driver 310 includes an interval counter 403, a register 1, a register 2, a PWM control counter 406, and a compare match register 407. The interval counter 403 counts the clock to determine the PCM data output interval, and controls the PCM data reading as the PWM signal generation proceeds.

  The register 1 registers a setting value that defines the pulse width of the PWM signal to be generated, and the register 2 registers a setting value that defines an interval for outputting PCM data.

  The PWM control counter 406 counts the bit value of the PCM data sent from the sound processor and sends the count value to the comparator 408. Further, the count value set in the compare match register 407 is input to the comparator 408, and the PWM generator 409 is compared with the count value of the PWM control counter 406 and using the control signal from the PWM control counter 406. 5 is generated with an appropriate pulse width.

FIG. 5 is a schematic diagram of a PWM signal 500 generated in the present embodiment. Since the PWM signal 500 itself generates an analog sound signal, it is not different from the signal generated in the prior art. However, in the present embodiment, the process of the sound processor 402 sets the PWM basic frequency f _PWM to the maximum frequency value that minimizes the bit drop of the PCM data at a frequency less than the EMI regulation value.

  It is also possible to adopt a configuration in which a frequency setting value is selected from a lookup table and set according to the performance of the CPU or the like. The generated PWM fundamental frequency automatically clears the EMI regulations and minimizes bit dropping of PCM data if the attenuation behavior of the high frequency component of the PWM signal is taken into account. Noise can also be minimized. In this embodiment, the sampling is controlled by adapting the PCM data to the PWM basic frequency of the target. In the embodiment to be described, for the PWM basic frequency, for example, a setting value less than 150 kHz can be selected from the target frequency registered in an appropriate register.

  That is, in the present embodiment, the generated PWM signal can be generated as a frequency of less than 150 kHz related to the power cable in the VCCI standard or the FCC standard, for example, and therefore, the −20 dB / dec behavior of the high frequency component of the PWM signal Can be taken into account, the regulation values for the horizontal polarization and the vertical polarization can be cleared, and the LPF element can be appropriately deleted.

  FIG. 6 shows a flowchart of processing executed by the driver 310 of this embodiment. The process in FIG. 6 starts from step S600, and interrupt conditions and the like are set in step S601. In step S602, the interval counter and the PWM control counter are activated, and in step S603, the compressed data is read into the buffer.

  In step S604, it is determined whether or not all data has been decoded. If all data has not been decoded (no), in step S605, one frame of compressed data is decompressed and decoded into PCM data. Buffer to buffer memory.

  In step S606, the sampling frequency and the set value of the duty ratio of the PWM signal are written in the buffer, and the process returns to step S604. If the decoding of all the data is not completed in step S604, the processes of steps S605 and S606 are repeated. If the decoding of all the data is completed in step S604, a reproduction end command is received in step S607 (yes). ) Wait for processing (no).

  FIG. 7 shows a flowchart of a PWM pulse generation process executed by the driver 310 of this embodiment executed in parallel with the process of FIG. 6 in this embodiment. The process of FIG. 7 is a process of creating a PWM pulse at a time interval corresponding to the sampling frequency set by the interval counter, and the count value of the interval counter is used as an interrupt signal.

  The processing in FIG. 7 starts from step S700. In step S701, sampling control is performed so that the PCM data conforms to the target PWM fundamental frequency. In step S702, one data is read from the buffer to generate a PWM pulse. In step S703, the interrupt process is terminated, and a subsequent interrupt is waited for. By using the processes of FIGS. 6 and 7, the driver of this embodiment can generate PWM pulses from PCM continuously and without causing EMI problems.

  FIG. 8 shows a frequency characteristic 800 of a PWM signal and a typical first-order LPF filter characteristic 810 for explaining that the LPF function can be provided by the PWM basic frequency modulation of the present embodiment. The frequency characteristic 800 in FIG. 8 is a diagram in which a sequence of the rectangular wave or trapezoidal wave is Fourier transformed in the frequency domain, and the intensity of each frequency component is plotted on the vertical axis and the frequency (logarithmic scale) is plotted on the horizontal axis. The filter characteristic 810 is a graph showing a typical LPF cutoff characteristic with the vertical axis representing gain and the horizontal axis representing frequency.

As shown in FIG. 8, the PWM signal is generated as a sequence of rectangular waves having different pulse widths, the rising time of a rectangular wave (trapezoidal wave) having a rising period and a falling period is _tr , and the pulse period is T Then, the attenuation frequency of −20 dB / dec caused by the PWM basic frequency is given by the following equation (1).

On the other hand, the high frequency component of the PWM signal, so from the rising and falling characteristics of the rectangular pulse, when the rise time / fall time of the rectangular wave was t _r, generally up to a frequency indicated by the following formula (2) LPF the attenuation characteristics when exceeding the cut-off frequency _{f c} of the filter characteristics -20 dB / dec continue to decay in accordance with, exceeds the frequency of the following formula (2), rapidly its generally according -40 dB / dec Decreases strength.

  In the present embodiment, the frequency characteristics of the PWM signal shown in FIG. 8 are used, and a high frequency component caused by the PWM signal is cut without using an LPF. That is, by setting the PWM basic frequency to at least less than the EMI regulation value, it is possible to cope with the EMI problem caused by the PWM control without using the LPF.

  FIG. 9 shows another embodiment of the driver in this embodiment. The main configuration of the driver 310-2 is the same as that described with reference to FIG. On the other hand, the embodiment shown in FIG. 9 is an embodiment in which a data bit drop is predicted to occur in sampling of PCM data by lowering the PWM basic frequency. The sound processor 902 controls the PWM fundamental frequency, compares the set frequency with the sampling period of the PCM data, and determines that the sampling rate is not sufficient, buffers the PCM data in advance, During the PWM generation process of PCM data, a bit that has been dropped by passing it to an adder 910 or a subtracter (not shown) is corrected to generate a PWM signal.

  In addition to the embodiment shown in FIG. 9, correction of data bits that have lost bits increases the module configuration, but a plurality of PWM control counters are provided, and at the time of D / A conversion after the PWM generator 909, Correction corresponding to the number of missing bits can also be performed. Regarding correction processing in the case where data bit loss or a decrease in the number of data bits occurs, the data bit drop correction processing is appropriately reflected on the driver 310-2 at the application level according to a specific implementation. Can do.

  FIG. 10 shows a flowchart of processing when occurrence of a bit drop in PCM data is predicted in the present embodiment. Since the processing in FIG. 10 is the same as the processing in FIG. 6 except for the processing in steps S1006 and S1008, the processing in steps S1006 and S1008 will be described in detail below.

  In step S1006, the PWM basic frequency and the sampling rate are compared to determine the occurrence of a bit drop related to PCM data. If no bit drop occurs (no), the processes in steps S1004 to S1007 are repeatedly executed. On the other hand, if it is determined in step S1006 that there is a possibility of bit loss (yes), the buffered bit value is preliminarily buffered in step S1008 at an appropriate timing of the count process of the PWM control counter. Are added (or subtracted), the process is passed to step S1007, and the subsequent PWM signal generation process is executed. It should be noted that the processing in step S1006 and step S1008 is preliminarily predicted using the target PWM fundamental frequency and the sampling rate of PCM data to be reproduced at the time of buffering in relation to the CPU capability and the like, and speculatively processes the data. It can also be set as such processing.

  FIG. 11 shows a flowchart of processing for generating PWM pulses in parallel processing executed by the driver 310-2 of this embodiment. The processing in FIG. 11 starts from step S1100. In step S1101, sampling control is performed so that the PCM data matches the target PWM fundamental frequency. In step S1102, one data is read from the buffer to generate a PWM pulse. Execute the process. At this time, the PWM data used when generating the PWM pulse is supplied with data to which data corresponding to the bit drop is added.

  In step S1103, the interrupt process is terminated, and an interrupt generated thereafter is waited for. By using the processing of FIG. 10 and FIG. 11, the driver of this embodiment can generate PWM pulses from PCM continuously and without causing EMI problems. It is possible to avoid the occurrence of quantization noise due to the loss of PCM data bits, which may occur due to the decrease in.

  As described above, the present invention has been described based on the embodiment. However, the drivers 310 and 310-2 of the present embodiment are drivers at the application level described in high-level languages such as C language, C # language, and C ++ language. Implemented. For this reason, according to the present invention, it is possible to eliminate the dependency on the hardware configuration, and reduce labor such as correcting a hardware driver each time the hardware configuration is changed. For example, dll (dynamic link library) or By configuring as a “.so” file, it is possible to provide functions such as reconstructing a class D amplifier by downloading via a network, and to provide a more versatile sound signal generation device. To do.

  Furthermore, in the present invention, since the class D amplifier driver can be mounted at the application level, it is not necessary to arrange the hardware for the driver on the board, and further, the D is downloaded by downloading corresponding to the hardware function change This makes it possible to flexibly reproduce sound that can change the characteristics of the class amplifier.

  The above functions of the present embodiment can be realized by a device executable program described in an object-oriented programming language such as assembler, C language, C ++, Java (registered trademark), Java (registered trademark), etc. It can be stored and distributed in a device-readable recording medium such as a hard disk device, CD-ROM, MO, flexible disk, EEPROM, EPROM, flash memory, etc., and transmitted over a network in a format that other devices can use. Can do.

  Although the present embodiment has been described so far, the present invention is not limited to the above-described embodiment, and other embodiments, additions, changes, deletions, and the like can be conceived by those skilled in the art. It can be changed, and any aspect is within the scope of the present invention as long as the effects and effects of the present invention are exhibited.

100 Tablet PC
DESCRIPTION OF SYMBOLS 110 Smart phone 200 Functional block 201 Application 202 Operating system 203-206 Driver 207-210 Hardware 300 Functional block 310 Driver 311 PCM decoder 312 Sound signal processor 313 PWM signal generator 320 AMP
330 Speaker 400 Compressed Data 401 PCM Decoder 402 Sound Processor 403 Interval Counter 406 PWM Control Counter 407 Compare Match Register 408 Comparator 409 PWM Generator 500 PWM Signal 800 Frequency Characteristic 810 Filter Characteristic

Claims (9)

An analog signal generation method for reproducing a digital signal read by an information processing device into an analog signal, wherein the information processing device includes:
An application reading the digital signal from a recording medium;
Decoding the read digital signal into PCM data; and
Generating the PWM signal from the decoded PCM data using a PWM fundamental frequency that provides a low pass filter characteristic for controlling EMI;
A method for generating an analog signal.   The method according to claim 1, further comprising the step of tuning the PWM fundamental frequency that provides the low-pass filter characteristics to a frequency that is less than 150 kHz or 30 MHz and is equal to or higher than a sampling frequency of the PCM data.   The method according to claim 1, further comprising: buffering the PCM data and adding or subtracting to generate the PWM signal when the effective number of bits of the PCM data decreases due to tuning of the PWM fundamental frequency. the method of.   The method according to claim 1, wherein the analog signal generation method generates an analog signal for generating a sparse wave signal having an audible sound frequency. An analog signal generator for reproducing a digital signal into an analog signal, the analog signal generator is
Application means for reading the digital signal from a recording medium;
Means for decoding the read digital signal to decode PCM data;
Means for tuning a PWM fundamental frequency for generating a PWM signal to provide a low pass filter characteristic for controlling EMI;
Means for generating a PWM signal corresponding to the digital signal using the tuned PWM fundamental frequency;
An analog signal generation device.   7. The apparatus according to claim 6, wherein the means for tuning includes means for setting a PWM basic frequency giving the low-pass filter characteristic to a frequency lower than 150 kHz or 30 MHz and higher than a sampling frequency of the PCM data. .   7. The method according to claim 5, further comprising means for buffering the PCM data and adding or subtracting to generate the PWM signal when the number of effective bits of the PCM data decreases due to tuning of the PWM fundamental frequency. Equipment.   The said analog signal generation apparatus is an apparatus of any one of Claims 5-7 which produces | generates the density wave signal of an audible sound frequency range.   A device-executable program for causing an information processing device to function as the analog signal generation device according to any one of claims 5 to 8.