JP2013162213A - Communication device, communication system, and communication method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restore transmission and reception of a message between slave units as quickly as possible.SOLUTION: A radio device 2 transmits and receives messages establishing a CPRI link 200 between the radio device 2 and a radio controller 1 by use of a clock generated by the radio controller 1, and also transmits and receives messages establishing a CPRI link 300 between the radio device 2 and a radio device 3 by use of either the clock or an internally generated clock. An interface unit 24 manages the current state of the CPRI link 300 and outputs a doorbell packet indicating the current state of the CPRI link 300. A processor 23 starts transmitting and receiving messages to/from the radio device 3 via the CPRI link 300 only if a state in which transmission and reception of messages are possible continues a prescribed time at the CPRI link 300.

Description

  The present invention relates to a communication device, a communication system, and a communication method.

  Recently, CPRI (Common Public Radio Public Radio Interface) has been adopted as an open interface inside a radio base station. CPRI is a standard protocol interface between a radio equipment (Radio Equipment Control) and a radio equipment (Radio Equipment Control). This standard protocol interface ensures interoperability between devices provided by different vendors.

  If a multi-hop configuration using CPRI is adopted, for example, a base station equipped with a radio control apparatus is arranged in a place where installation is relatively easy, and only a radio apparatus is arranged in a place where installation of the base station is difficult It can be configured as follows.

  Consider a case in which a wireless controller (referred to as a parent device) is connected to a wireless device (referred to as a slave device A), and chain connection is performed to connect the slave device A to a wireless device (slave device B). In this case, communication (transmission / reception of an L3 message) between the parent device and the child device A is performed using a clock generated by the parent device. In addition, communication between the slave unit A and the slave unit B is normally performed using a clock generated by the slave unit A. When the slave unit A does not generate a clock, communication between the slave unit A and the slave unit B is performed using the clock of the master unit.

  When communication between the slave unit A and the slave unit B is performed by the clock of the master unit, if the master unit is reset, the slave unit A cannot extract the clock from the master unit. Until the PLL (Phase-Locked Loop) lock is completed, transmission / reception of the L3 message between the slave unit A and the slave unit B becomes unstable. As a result, the response from the slave unit B to the slave unit A becomes invalid, and the slave unit A sets the transmission / reception of the L3 message to the forced stop state. In order to recover the system from this forced stop state, it is necessary to reset the handset A.

  Therefore, a communication method or the like is disclosed in which the state between the slave unit A and the slave unit B is not intentionally raised above E for a certain period of time so that transmission / reception of the L3 message from the slave unit A is not forcedly stopped. (For example, refer to Patent Document 1).

JP2011-11835A

  In the communication method described in Patent Document 1, the state between the slave unit A and the slave unit B is intentionally higher than E until the clock of the slave unit A is normally generated. It is necessary to embed a mechanism for avoiding the above problem in the logic of an FPGA (Field-Programmable Gate Array) that manages the state of the child device A. Therefore, when this method is adopted, the hardware logic configuration may be complicated. Complicated logic configuration is a cause of design errors and defects.

  The present invention has been made in view of the above circumstances, and can more easily and quickly restore the transmission and reception of messages between slave units without unnecessarily complicating the logic configuration of the hardware circuit. An object is to provide a communication device, a communication system, and a communication method.

In order to achieve the above object, a communication apparatus according to the first aspect of the present invention provides:
The first clock generated by the host device establishes the first communication link with the host device to send and receive messages, and the first clock or the second clock generated internally In any of the above, a communication device that establishes a second communication link with a lower-level device and transmits / receives a message,
A state management unit that manages a current state of the second communication link and outputs a signal indicating the current state of the second communication link;
In the second communication link managed by the state management unit, a message with the lower-level device via the second communication link only when a state in which a message can be transmitted and received continues for a predetermined time. A processor that starts transmitting and receiving
Is provided.

A communication system according to a second aspect of the present invention is:
A communication device of the present invention as a first wireless device;
A wireless control device that establishes a first communication link with the communication device and transmits / receives a message with a first clock generated by the device itself with the communication device;
A second communication link is established between the communication device and the communication device by using the first clock or the second clock generated by the communication device to send and receive messages. A wireless device;
Is provided.

The communication method according to the third aspect of the present invention is:
The first clock generated by the host device establishes the first communication link with the host device to send and receive messages, and the first clock or the second clock generated internally In any of the above, a communication method using a communication device that establishes a second communication link with a lower-level device and transmits / receives a message,
In the wireless device, a state management step of managing a current state of the second communication link and outputting a signal indicating the current state of the second communication link;
In the wireless device, the lower device via the second communication link only when a state in which a message can be transmitted and received continues for a predetermined time in the second communication link managed in the state management step. A transmission / reception process for starting transmission / reception of messages to / from,
including.

  According to the present invention, transmission / reception of messages between slave units can be quickly recovered more easily without unnecessarily complicating the logic configuration of the hardware circuit.

It is a block diagram which shows the schematic structure of the base station apparatus as a communication system which concerns on embodiment of this invention. FIG. 2 is a block diagram illustrating a schematic configuration of the wireless control device in FIG. 1. FIG. 2 is a block diagram illustrating a schematic configuration of the wireless device in FIG. 1. FIG. 4A is a diagram illustrating communication between devices when a wireless device outputs a clock signal. FIG. 4B is a diagram illustrating communication between devices when the wireless device does not output a clock signal. It is a figure for demonstrating the operation | movement after reset is input into the radio | wireless control apparatus. It is a figure for demonstrating the operation | movement from which an L3 message becomes illegal. It is a figure for demonstrating restart of transmission / reception of an L3 message. It is a flowchart of a process of a processor.

  Embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows a schematic configuration of a base station apparatus 100 as a communication system. As shown in FIG. 1, a base station apparatus 100 performs radio communication with a mobile station apparatus 4 within a communication range, and performs call processing and mobile stations between the mobile station apparatus 4 and other mobile station apparatuses. Data communication is performed between the apparatus 4 and the computer server.

  The base station device 100 includes a radio control device 1, a radio device 2, and a radio device 3. Each of these devices has a CPRI standard communication function. CPRI is used as communication means between the wireless control device 1 and the wireless device 2 and between the wireless device 2 and the wireless device 3.

  The wireless device 2 is connected to the wireless control device 1 (host device) by an optical fiber 202. Through the communication using the optical fiber 202, the CPRI link 200 is constructed as an interface of the CPRI standard between the wireless control device 1 and the wireless device 2, that is, a communication link. The CPRI link 200 is terminated by the radio control apparatus 1. The CPRI link 200 corresponds to the first communication link. The CPRI link 200 includes a downlink for transmitting data from the radio control apparatus 1 to the radio apparatus 2 and an uplink for transmitting data from the radio apparatus 2 to the radio control apparatus 1.

  The wireless device 2 is connected to the wireless device 3 (lower device) by an optical fiber 302. By communication using the optical fiber 302, a CPRI link 300 is constructed as a communication link of the CPRI standard between the wireless device 2 and the wireless device 3. The CPRI link 300 is terminated by the wireless device 2. The CPRI link 300 corresponds to the second communication link. The CPRI link 300 includes a downlink that transmits data from the wireless device 2 to the wireless device 3 and an uplink that transmits data from the wireless device 3 to the wireless device 2.

  Specifically, the data transmitted / received via the CPRI link 200 and the CPRI link 300 are the Control & Management plane data for control of the wireless device 2 and the wireless device 3 and the User transmitted / received between the mobile station device 4. Plain data (hereinafter, these are simply referred to as “messages”).

  In the CPRI link 200, the radio control device 1 is a master for the radio device 2. On the other hand, the wireless device 2 is a slave to the wireless control device 1. The wireless control device 1 transmits a message to the wireless device 2 via the CPRI link 200 (downlink). The wireless device 2 that has received this message transmits a response message to the wireless control device 1 via the CPRI link 200 (uplink).

  In the CPRI link 300, the wireless device 2 is a master for the wireless device 3. On the other hand, the wireless device 3 is a slave to the wireless device 2. The wireless device 2 transmits a message to the wireless device 3 via the CPRI link 300 (downlink). The wireless device 3 that has received the message transmits a response message to the wireless device 2 via the CPRI link 300 (uplink).

  These messages are called L3 messages.

  The wireless control device 1 controls the wireless device 2 by transmitting an L3 message to the wireless device 2. In addition, the wireless control device 1 controls the wireless device 3 by transmitting an L3 message to the wireless device 3 via the wireless device 2.

  The CPRI link 200 will be described in further detail. The CPRI link 200 includes a physical layer that is a first layer and a data link layer that is a second layer. In the CPRI link 200, communication functions are sequentially established by executing predetermined processing in each of a plurality of states. The state of the CPRI link 200 includes state A, state B, state C, state D, state E, and state F.

  The state A is a standby state waiting for setting for establishing the CPRI link 200. State B is a state in which the line bit rate of the communication interface is determined, and the master side and the slave side have tuned the physical layer. State C is a state in which a common protocol for the master side and the slave side is determined. State D is a state in which the bit rate of the message is determined and the data link layer is established. State E is a state in which the master side and slave side applications are adjusted.

  The state F is a state in which the CPRI link 200 is established and L3 messages can be transmitted and received. In the CPRI link 200, for example, after the state transitions from state A → state B → state C → state D → state E → state F, the L3 message is actually transmitted and received.

  The specification of the CPRI link 300 is the same as that of the CPRI link 200. The states of the CPRI link 200 and the CPRI link 300 are managed independently.

  Next, the configuration of the wireless control device 1 will be described. FIG. 2 shows a schematic configuration of the wireless control device 1. As illustrated in FIG. 2, the wireless control device 1 includes a signal processing unit 11, a clock signal output unit 12, a storage unit 13, a processor 14, and an interface unit 15.

  The signal processing unit 11 demodulates, deframes, decodes, and the like on the radio signal received via the radio device 2 and the radio device 3. In addition, the signal processing unit 11 performs modulation, framing, encoding, and the like on the baseband signal in order to generate a wireless signal transmitted via the wireless device 2 and the wireless device 3.

  The clock signal output unit 12 outputs a clock signal used for communication with the wireless device 2 via the CPRI link 200. The clock signal output unit 12 outputs the output clock signal to the interface unit 15.

  The storage unit 13 includes, for example, a readable / writable nonvolatile semiconductor memory such as a flash memory. The storage unit 13 stores various programs and data necessary for the operation of the wireless control device 1.

  The processor 14 executes various programs stored in the storage unit 13 so as to comprehensively control each unit of the wireless control device 1 and execute the following processes.

  Further, the processor 14 generates an L3 message. The processor 14 outputs the generated L3 message to the interface unit 15.

  The interface unit 15 is an FPGA (Field Programmable Gate Array). The interface unit 15 receives the L3 message output from the signal processing unit 11 and the processor 14 and the clock signal output from the clock signal output unit 12 via the CPRI link 200 established with the wireless device 2. Send to. The interface unit 15 outputs the L3 message transmitted from the wireless device 2 to the processor 14 and the signal processing unit 11.

  The interface unit 15 manages the state of the CPRI. If the CPRI state transitions, the interface unit 15 outputs a Dorbell packet of sRIO (serial Rapid I / O), which is an interrupt signal indicating the state transition, to the processor 14. The processor 14 can detect that the current state of the CPRI is any one of the states A to F based on the contents of the Doorbell packet. That is, an sRIO interface is provided between the interface unit 15 and the processor 14.

  Next, the configuration of the wireless device 2 will be described. FIG. 3 shows a schematic configuration of the wireless device 2. As illustrated in FIG. 3, the wireless device 2 includes a communication unit 20, a storage unit 21, a clock signal output unit 22, a processor 23, and an interface unit 24.

  The communication unit 20 is connected to the antenna 201. The communication unit 20 converts the baseband signal output from the interface unit 24 into a radio signal, and transmits the radio signal to the mobile station device 4 via the antenna 201. Further, the communication unit 20 converts the radio signal transmitted by the mobile station device 4 via the antenna 201 into a baseband signal and outputs the baseband signal to the interface unit 24.

  The storage unit 21 includes a readable / writable nonvolatile semiconductor memory such as a flash memory. The storage unit 21 stores various programs and data necessary for the operation of the wireless device 2.

  The clock signal output unit 22 generates a clock signal used for communication with the wireless device 3 via the CPRI link 300. The clock signal output unit 22 outputs the generated clock signal to the processor 23 and the interface unit 24.

  The processor 23 executes various programs stored in the storage unit 21, thereby realizing the functions of the abnormality detection unit 25, the extraction unit 26, the communication control unit 27, and the like. As a result, the processor 23 comprehensively controls each unit of the wireless device 2 and executes the following processes.

  Further, the processor 23 generates an L3 message. The processor 23 outputs the generated L3 message to the interface unit 24.

  The abnormality detection unit 25 detects an output abnormality of the clock signal by the clock signal output unit 22.

  The extraction unit 26 controls the interface unit 24 to extract a clock signal transmitted from the radio network controller 1 via the CPRI link 200 when an output abnormality is detected by the abnormality detection unit 25.

  When the abnormality detection unit 25 detects an output abnormality, the communication control unit 27 transmits / receives an L3 message to / from the wireless apparatus 3 through the CPRI link 300 using the clock signal extracted by the extraction unit 26.

  The interface unit 24 includes a slave interface unit 24a and a master interface unit 24b. The slave interface unit 24a receives a clock signal, a message, and the like transmitted from the radio network controller 1. The slave interface unit 24 a transmits a response message to the message transmitted from the radio network controller 1 to the radio network controller 1.

  The wireless device 2 further includes a PLL (Phase Locked Loop) circuit. The wireless device 2 communicates via the CPRI link 200 by synchronizing the phase of the clock signal transmitted from the wireless control device 1 and the phase of the operation clock signal output from the PLL circuit (that is, performing PLL lock). Establish. As a result, transmission / reception of messages between the wireless control device 1 and the wireless device 2 becomes possible.

  The master interface unit 24 b transmits the clock signal and message transmitted from the wireless control device 1, the clock signal output from the clock signal output unit 22, and the message output from the processor 23 to the wireless device 3. The master interface unit 24 b receives a response message transmitted to the wireless device 3.

  The interface unit 24 manages the state of the CPRI. If the CPRI state transitions, the interface unit 24 outputs an sRIO Doorbell packet, which is an interrupt signal indicating the state transition, to the processor 23. Based on the contents of the Doorbell packet, the processor 23 can detect that the current CPRI state is any one of states A to F. That is, an sRIO interface is provided between the interface unit 24 and the processor 23.

  The master interface unit 24 b manages the current state of the CPRI link 300. The master interface unit 24 b outputs a signal indicating the current state of the CPRI link 300 to the processor 23. The slave interface unit 24 a manages the current state of the CPRI link 200. The slave interface unit 24 a outputs a signal indicating the current state of the CPRI link 200 to the processor 23.

  The processor 23 transmits the L3 message to and from the wireless device 3 via the CPRI link 300 only when the state in which the transmission and reception of the L3 message is continued for a predetermined time in the CPRI link 300 managed by the interface unit 24. Start transmission / reception.

  In the wireless device 3, the clock signal transmitted from the wireless device 2 is PLL-locked to establish communication via the CPRI link 300. Thereby, transmission / reception of the L3 message between the wireless device 2 and the wireless device 3 becomes possible.

  The configuration of the wireless device 3 is the same as that of the wireless device 2. However, in the present embodiment, since the wireless device 3 does not operate as a master, the interface unit 24 may not include the master interface unit 24b.

  Here, multi-hop communication in the wireless control device 1, the wireless device 2, and the wireless device 3 will be described.

  As illustrated in FIG. 4A, the wireless device 2 transmits and receives an L3 message to and from the wireless control device 1 using the clock signal transmitted from the wireless control device 1. Further, the wireless device 2 transmits and receives L3 messages to and from the wireless device 3 using the clock signal output from the clock signal output unit 22.

  However, for example, when the clock signal output unit 22 cannot output a clock signal due to an abnormality such as a failure, or when the clock signal output unit 22 of the wireless device 2 is warming up, as shown in FIG. In addition, the wireless device 2 transmits and receives the L3 message to and from the wireless device 3 using the clock signal extracted by the extraction unit 26.

  The internal operation of the wireless device 2 will be described in further detail.

  As shown in FIG. 5, when an abnormality occurs such as the clock of the clock signal output unit 22 of the wireless device 2 is stopped, or when the clock signal output unit 22 of the wireless device 2 is warming up, that is, the clock signal of the wireless device 2 In the case of the time until the clock is stabilized after the output unit 22 is activated, the wireless device 2 and the wireless device 3 operate with the clock of the wireless control device 1. At this time, if the CPRI state is state F, the interface unit 24 of the wireless device 2 outputs a Doorbell packet indicating the state F to the processor 23. The processor 23 confirms that the state indicated by the Doorbell packet is the state F, and transmits / receives an L3 message to / from the wireless device 3 via the interface unit 24.

  Here, as shown in FIG. 6, when the wireless control device 1 is reset while the clock signal output unit 22 of the wireless device 2 is abnormal, the reset of the wireless control device 1 is canceled and clock transmission starts. Until then, the state of the CPRI between the wireless device 2 and the wireless device 3 flickers as B → C → D → E → F → B. Therefore, even if the L3 message A is transmitted / received to / from the wireless device 3 in the state F, the wireless control device 1 is being reset (until the CPRI between the wireless control device 1 and the wireless device 2 is synchronized). ), Since the CPRI state fluctuates, the response message to the request message is interrupted, retransmission is repeated, and the response is not received even if it is retransmitted.

  In this case, even if the clock between the wireless control device 1 and the wireless device 2 is recovered and the CPRI state between the wireless device 2 and the wireless device 3 becomes the state F, the L3 that has once stopped The message cannot be recovered without resetting the wireless device 2.

  Therefore, in the present embodiment, the processor 23 of the wireless device 2 stops transmission / reception of the L3 message with the wireless device 3 when the Doorbell packet transmitted from the interface unit 24 indicates a state other than the state F. Let

  Further, as shown in FIG. 7, it is assumed that the reset of the wireless control device 1 is released, the clock is recovered, and the clock starts to be transmitted. Thereafter, when the PLL is locked with the wireless device 3 to be in a stable state and the CPRI link 300 is established, the interface unit 24 outputs the state F to the processor 23 as the CPRI state.

  FIG. 8 shows the processing of the processor 23. As shown in FIG. 8, first, the processor 23 waits until the state of the CPRI indicated by the Doorbell pocket indicating the state F is switched from the other state to the state F (step S1; No).

  When the state of the CPRI indicated by the Doorbell packet is switched from a state other than the state F to the state F (step S1; Yes), the processor 23 starts measurement by a timer (step S2). Here, the processor 23 does not immediately start transmission / reception of the L3 message with the wireless device 3 but puts it on hold.

The Doorbell packet is output from the interface unit 24 to the processor 23 every time the CPRI state changes. The processor 23 determines whether or not the Doorbell packet indicating a state other than the state F has been input and switched to a state other than the state F (step S3). When the state is switched to other than the state F (step S3; Yes), the processor 23 resets the timer, stops (step S4), and returns to step S1.

  When the state is not switched to other than the state F (step S3; No), the processor 23 determines whether or not a predetermined time has elapsed (step S5). If the predetermined time has not elapsed, the process returns to step S3. Thereafter, steps S3 to S5 are repeated until switching to a state other than the state F (step S3; Yes) or until a predetermined time elapses (step S5; Yes).

  When the predetermined time has elapsed (step S5; Yes), the processor 23 starts transmission / reception of the L3 message (step S6). After that, the processor 23 returns to step S1.

  As is clear from the description of the processing so far, the processor 23 receives a Doorbell packet indicating that the state of the CPRI link 300 is a state other than the state F before a predetermined time has elapsed since the timer measurement was started. When input from the interface unit 24, the timer is reset.

  The processor 23 does not receive a Doorbell packet indicating that the state of the CPRI link 300 is other than the state F from the interface unit 24, and when a predetermined time has elapsed after starting the timer measurement, the processor 23 communicates with the wireless device 3. The transmission / reception of the L3 message is started.

  This stabilization time can be arbitrarily set.

  The processor 23 does not receive a Doorbell packet indicating that the state of the CPRI link 300 is other than the state F, and after a predetermined time has elapsed from the start of timer measurement, When the clock signal output unit 22 cannot generate the clock when starting transmission / reception of the L3 message, the CPRI link 300 is established by the clock from the radio control apparatus 1 to transmit / receive the message. Thereby, transmission / reception of the L3 message with the wireless device 3 can be performed without waiting for the recovery of the clock signal output unit 22.

  As described above in detail, according to this embodiment, the clock of the radio network controller 1 is used for the CPRI link 300, and is output from the interface unit 24 when the radio network controller 1 is reset. The processor 23 transmits / receives an L3 message to / from the wireless device 3 only when the state indicated by the Doorbell packet maintains the state F for the stabilization time. That is, in this embodiment, the interface unit 24 does not construct a mechanism that does not forcibly shift to the state F for a predetermined period, that is, without unnecessarily complicating the logic configuration of the hardware circuit. The message transmission / reception between the slave units can be quickly recovered more easily.

  In the above embodiment, the case where the clock of the radio network controller 1 is used for the CPRI link 300 and the present invention is applied when the radio network controller 1 is reset has been described. However, the present invention can also be applied when the wireless control device 1, the wireless device 2, and the wireless device 3 are activated in a state where the clock signal output unit 22 of the wireless device 2 is abnormal. In this way, L3 messages can be transmitted and received without depending on the state of the clock signal output unit 22 of the wireless device 2.

  In the above embodiment, the sRIO doorbell packet is used for communication between the interface unit 24 and the processor 23. However, UART communication is used according to the reaction speed of the system, or the DC line notification from the interface unit 24 to the processor 23 is used. Other methods such as polling monitoring by the processor 23 may be used.

  The present invention can also be applied to the case where the wireless control device 1 or the wireless device 3 is activated while the clock signal output unit 22 of the wireless device 2 is warming up.

  In the above embodiment, the program to be executed is a computer-readable recording medium such as a flexible disk, a CD-ROM (Compact Disc Read-Only Memory), a DVD (Digital Versatile Disc), and an MO (Magneto-Optical Disc). A system that executes the above-described thread may be configured by storing and distributing the program in a medium and installing the program.

  Further, the program may be stored in a disk device or the like of a predetermined server device on a communication network such as the Internet, and may be downloaded, for example, superimposed on a carrier wave.

  In addition, when the above functions are realized by sharing an OS (Operating System), or when the functions are realized by cooperation between the OS and an application, only the part other than the OS may be stored in a medium and distributed. You may also download it.

  Various embodiments and modifications can be made to the present invention without departing from the broad spirit and scope of the present invention. The above-described embodiments are for explaining the present invention and do not limit the scope of the present invention. In other words, the scope of the present invention is shown not by the embodiments but by the claims. Various modifications within the scope of the claims and within the scope of the equivalent invention are considered to be within the scope of the present invention.

  A part or all of the above-described embodiment can be described as in the following supplementary notes, but is not limited thereto.

(Appendix 1)
The first clock generated by the host device establishes the first communication link with the host device to send and receive messages, and the first clock or the second clock generated internally In any of the above, a communication device that establishes a second communication link with a lower-level device and transmits / receives a message,
A state management unit that manages a current state of the second communication link and outputs a signal indicating the current state of the second communication link;
In the second communication link managed by the state management unit, a message with the lower-level device via the second communication link only when a state in which a message can be transmitted and received continues for a predetermined time. A processor that starts transmitting and receiving
A communication device comprising:

(Appendix 2)
The processor is
When the second communication link is established and the message is transmitted and received with the first clock, the signal output from the state management unit can be transmitted and received with the second communication link. When switching to the one indicating the first state, the time measurement by the timer is started and the transmission / reception of the message with the lower-level device is suspended,
A signal indicating that the state of the second communication link is a second state other than the first state is input from the state management unit before a predetermined time has elapsed since the start of time measurement. Then, reset the timer,
When a signal indicating that the state of the second communication link is the second state is not input from the state management unit and a predetermined time has elapsed since the start of time measurement, the lower-level device Start sending and receiving messages to and from
The communication apparatus according to supplementary note 1, wherein:

(Appendix 3)
The processor is
A signal indicating that the state of the second communication link is the second state is not input, and a predetermined time has elapsed since the start of time measurement, If the second clock cannot be generated when starting transmission / reception of a message, the second communication link is established with the first clock to transmit / receive the message,
The communication apparatus according to appendix 1 or 2, characterized in that.

(Appendix 4)
The signal is either a sRIO Doorbell packet, a UART communication signal, or a DC line notification.
The communication apparatus according to any one of appendices 1 to 3, wherein

(Appendix 5)
The communication device according to any one of supplementary notes 1 to 3 as a first wireless device;
A wireless control device that establishes a first communication link with the communication device and transmits / receives a message with a first clock generated by the device itself with the communication device;
A second communication link is established between the communication device and the communication device by using the first clock or the second clock generated by the communication device to send and receive messages. A wireless device;
A communication system comprising:

(Appendix 6)
The first clock generated by the host device establishes the first communication link with the host device to send and receive messages, and the first clock or the second clock generated internally In any of the above, a communication method using a wireless device that establishes a second communication link with a lower-level device and transmits and receives messages,
In the wireless device, a state management step of managing a current state of the second communication link and outputting a signal indicating the current state of the second communication link;
In the wireless device, the lower device via the second communication link only when a state in which a message can be transmitted and received continues for a predetermined time in the second communication link managed in the state management step. A transmission / reception process for starting transmission / reception of messages to / from,
Including a communication method.

  The present invention is suitable for use in, for example, a base station apparatus of a mobile communication network.

1 Radio control device (master unit)
2, 3 Wireless device (slave unit)
4 mobile station apparatus 11 signal processing unit 12 clock signal output unit 13 storage unit 14 processor 15 interface unit 20 communication unit 21 storage unit 22 clock signal output unit 23 processor 24 interface unit 24a slave interface unit 24b master interface unit 25 abnormality detection Unit 26 extraction unit 27 communication control unit 100 base station apparatus (communication system)
200 CPRI Link 201 Antenna 202 Optical Fiber 300 CPRI Link 301 Antenna 302 Optical Fiber

Claims (6)

The first clock generated by the host device establishes the first communication link with the host device to send and receive messages, and the first clock or the second clock generated internally In any of the above, a communication device that establishes a second communication link with a lower-level device and transmits / receives a message,
A state management unit that manages a current state of the second communication link and outputs a signal indicating the current state of the second communication link;
In the second communication link managed by the state management unit, a message with the lower-level device via the second communication link only when a state in which a message can be transmitted and received continues for a predetermined time. A processor that starts transmitting and receiving
A communication device comprising: The processor is
When the second communication link is established and the message is transmitted and received with the first clock, the signal output from the state management unit can be transmitted and received with the second communication link. When switching to the one indicating the first state, the time measurement by the timer is started and the transmission / reception of the message with the lower-level device is suspended,
A signal indicating that the state of the second communication link is a second state other than the first state is input from the state management unit before a predetermined time has elapsed since the start of time measurement. Then, reset the timer,
When a signal indicating that the state of the second communication link is the second state is not input from the state management unit and a predetermined time has elapsed since the start of time measurement, the lower-level device Start sending and receiving messages to and from
The communication apparatus according to claim 1. The processor is
A signal indicating that the state of the second communication link is the second state is not input, and a predetermined time has elapsed since the start of time measurement, If the second clock cannot be generated when starting transmission / reception of a message, the second communication link is established with the first clock to transmit / receive the message,
The communication apparatus according to claim 1 or 2, wherein The signal is either a sRIO Doorbell packet, a UART communication signal, or a DC line notification.
The communication device according to claim 1, wherein the communication device is a device. The communication device according to any one of claims 1 to 3 as a first wireless device;
A wireless control device that establishes a first communication link with the communication device and transmits / receives a message with a first clock generated by the device itself with the communication device;
A second communication link is established between the communication device and the communication device by using the first clock or the second clock generated by the communication device to send and receive messages. A wireless device;
A communication system comprising: The first clock generated by the host device establishes the first communication link with the host device to send and receive messages, and the first clock or the second clock generated internally In any of the above, a communication method using a wireless device that establishes a second communication link with a lower-level device and transmits and receives messages,
In the wireless device, a state management step of managing a current state of the second communication link and outputting a signal indicating the current state of the second communication link;
In the wireless device, the lower device via the second communication link only when a state in which a message can be transmitted and received continues for a predetermined time in the second communication link managed in the state management step. A transmission / reception process for starting transmission / reception of messages to / from,
Including a communication method.

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