JP2013143017A - Reference voltage generator circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reference voltage source which can be realized in a general CMS process that do not allow inclusion of depletion MOS having appropriate properties, can operate on low voltage and generate low reference voltage, and can save power consumption and circuit space.SOLUTION: Current flow per unit area at the junction of a first diode D1 gets smaller than current flow per unit area at the junction of a second diode D2. Reference voltage is generated by a differential amplifier 3 in accordance with voltage corresponding to electrical charge accumulated in a first capacitor C1, connected to anodes of the first and second diodes D1, D2, by the voltage difference therebetween. There is no need to do such things as obtaining forward voltage levels of the two diodes D1, D2 in terms of current and adding the two diodes (adder circuit) and then converting the result to voltage (current/voltage converter circuit), which reduces current consumption and the number of elements.

Description

  The present invention relates to a reference voltage generation circuit, and more particularly to an improvement of a reference voltage generation circuit configured to obtain a reference voltage source according to a difference between forward voltages of two diodes.

  In an analog circuit with a built-in semiconductor, a reference voltage that is hardly affected by temperature and power supply fluctuation is often required for detection of a reference voltage of an AD converter or a DA converter, or a battery voltage drop. In order to output such a reference voltage from the reference voltage generation circuit, a voltage source used in the reference voltage generation circuit is used as a reference voltage source.

  In general, in an analog circuit that operates with a low voltage power source of one button battery (1.5V) or one solar battery cell, the difference voltage between the threshold voltage of the enhancement MOS (Metal Oxide Semiconductor) and the depletion MOS is used as a reference voltage. Used as However, there are few integrated circuit (IC) processes that can form a depletion MOS having appropriate characteristics that can be used as a reference voltage source.

  On the other hand, when a 3V power source such as a lithium battery is used, a band gap reference obtained by adding a diode forward voltage and a voltage that compensates for its temperature characteristics, which can be realized by a general CMOS (Complementary Metal Oxide Semiconductor) process. Circuits are often used.

  Generally, the reference voltage of the output voltage of the band gap reference circuit is about 1.2V, and an analog circuit for using this voltage requires a power supply voltage exceeding 1.4V, which is about 0.2V higher than that. However, in the case of a low voltage power source of one button battery or one solar cell, the detection of a decrease in battery voltage or the detection of power-on for system reset is required to operate up to a power supply voltage lower than 1.4V.

  Here, in order to obtain a lower reference voltage source, a reference voltage source is obtained according to a difference in forward voltage between two diodes. By obtaining the difference in the forward voltage, a reference voltage lower than the forward voltage itself can be obtained. The forward voltage of the diode depends on the current density of the PN junction. Therefore, the forward voltage of the diode can be varied by varying the current density of the PN junction.

  In Patent Document 1, the difference in the forward voltage of the PN junction is obtained by adding the amount of current, and converted to a voltage that becomes a reference voltage, so that the reference voltage with less temperature dependency and power supply voltage dependency is 1.25 V or less. Trying to get. The sum and difference of voltages are usually obtained as the sum and difference of corresponding currents. For this reason, in this patent document 1, etc., an addition circuit by current and a current / voltage conversion circuit are required, and these circuits require considerable power consumption and circuit space.

  Further, in Patent Document 2, a magnification for optimizing the temperature characteristic of the reference voltage Vref by offsetting the negative temperature characteristic of the forward voltage Vbe2 by the positive temperature characteristic of the forward voltage difference ΔVbe. Trimming means capable of fine adjustment of the first resistor R1 and the second resistor R2 for correcting Ka is provided.

  Further, in Patent Document 3, a voltage obtained by converting a forward voltage difference between a pair of junction elements with different current densities as a current difference proportional to these and subtracting the voltage from the forward voltage of the junction element is subtracted. By obtaining the reference voltage, a reference voltage lower than the band gap voltage and having band gap temperature characteristics is generated.

  In Patent Document 4, the difference between the forward voltage Vbe0 having a negative primary temperature coefficient and the forward voltage of a pn junction diode having a positive primary temperature coefficient and different current densities (Vptat = Vben−Vbe0). In addition, a reference voltage having a positive secondary temperature coefficient is generated by a current generator including a resistor R10 and bipolar transistors Q10 to Q13.

Japanese Patent Laid-Open No. 11-45125 JP 2002-91589 A JP 2011-123605 A JP 2011-165103 A

  However, the reference voltage generation circuit is required to save power in addition to the requirement for low voltage operation. In particular, when incorporated in a portable device, the power source is a button battery or the like, and there is a strong demand for reducing power consumption. There is also a demand for reducing circuit space in terms of portability.

  The present invention has been made in order to solve the above-mentioned conventional problems, and can be realized even in a general CMOS process, in which a depletion MOS having appropriate characteristics that can be used as a reference voltage source cannot be produced. Another object of the present invention is to provide a reference voltage source that can output a low-voltage reference voltage and can save power and reduce circuit space.

  In the present invention, the first diode is supplied with a current from a first current source, and the second diode is supplied with a current from a second current source, and the first diode and the second diode, The cathode or anode is connected to each other to be at the same potential point, and the current per unit area of the first diode junction is smaller than the current per unit area of the second diode junction, The first capacitor and the second diode are connected across the anode or cathode on the opposite side of the same potential point, and are charged according to the voltage difference between the connection points. The above-mentioned problem is solved by outputting the reference voltage based on the corresponding voltage.

  Here, the first capacitor further includes a second capacitor which is connected and charged across one of the connection points of the first diode and the second diode and the same potential point, and the first capacitor A reference voltage can be output based on a voltage corresponding to the sum of the charge of the capacitor and the charge of the second capacitor.

  Further, a voltage corresponding to the electric charge is input, and a negative feedback amplifier circuit in which a third capacitor is inserted in series in the negative feedback path is further provided, and a reference voltage is output from the output of the negative feedback amplifier circuit. be able to.

  Furthermore, a plurality of analogs are formed which, when turned on, form a circuit for flowing current from the first current source to the first diode and flowing current from the second current source to the second diode. A first switch group including a switch and a second switch group including a plurality of analog switches forming a circuit that amplifies and outputs a reference voltage from the negative feedback amplifier circuit when the switch is turned on can be provided. These first switch group and second switch group are exclusively turned on and off.

  According to the present invention, the difference between the forward voltages of the two diodes is obtained based on the charge accumulated in the capacitor across the diodes, and the reference voltage is generated based on the charge. For this reason, it is not necessary to add the currents corresponding to the forward voltages (summing circuit) and then perform voltage conversion (current / voltage conversion circuit) afterwards, and therefore, with less current consumption and fewer elements. A reference voltage source can be provided, and the reference voltage can be reduced, the reference voltage source can be operated at a low voltage, the power consumption can be reduced, and the circuit can be downsized.

1 is a circuit diagram of a reference voltage generation circuit according to a first embodiment of the present invention. Circuit diagram showing reference voltage source / charging operation step in the reference voltage generating circuit Circuit diagram showing reference voltage / amplified output operation step in the reference voltage generating circuit The circuit diagram of the reference voltage generation circuit of 2nd Embodiment of this invention Circuit diagram showing reference voltage source / charging operation step in the reference voltage generating circuit Circuit diagram showing reference voltage / amplified output operation step in the reference voltage generating circuit A circuit diagram of a reference voltage generation circuit according to a third embodiment of the present invention, which is a modification of the first embodiment, in which a current source is provided on the cathode side of the diode. A circuit diagram of a reference voltage generation circuit according to a fourth embodiment of the present invention, which is a modification of the second embodiment, in which a current source is provided on the cathode side of the diode.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  Conventionally, a bandgap reference circuit obtains a forward voltage of a diode and compensates for its temperature characteristics, and a reference voltage of about 1.2V, which is usually obtained by amplifying a difference voltage between two diodes and adding them. Generate voltage. However, it is desirable to obtain a lower reference voltage in order to operate the IC with a low power supply voltage.

  Therefore, in any of the embodiments of the present invention described below, a reference voltage lower than 1.2 V is obtained by amplifying and adding the forward voltage of the two diodes to less than 1 times by the differential amplifier 3 and the switched capacitor circuit. Creating voltage.

  FIG. 1 is a circuit diagram of a reference voltage generating circuit according to the first embodiment of the present invention. First, the circuit configuration of this embodiment will be described.

  Current source I1 is connected to the anode of diode D1. Current source I2 is connected to the anode of diode D2. The current source I1 and the current source I2 supply currents of predetermined constant current values I1 and I2 from the high potential power supply VDD, respectively. The cathodes of the diode D1 and the diode D2 are connected to a low potential power supply (ground) GND, and these cathodes have the same potential.

  The current that flows per unit area of the junction of the diode D1 is smaller than the current that flows per unit area of the junction of the diode D2. Therefore, the forward voltage of the diode D1 is smaller than the forward voltage of the diode D2.

  The anode of the diode D1 is connected to the capacitor C1 via the analog switch S1, and the other end of the capacitor C1 is connected to the anode of the diode D2. Thus, the capacitor C1 is connected across the anode of the diode D1 and the anode of the diode D2 when the analog switch S1 is turned on.

  The anode of the diode D2 is connected to the non-inverting input of the differential amplifier 3, and is connected to the capacitor C2 via the analog switch S2. The other end of the capacitor C2 is connected to the low potential power source (via the analog switch S3). Ground) Connected to GND. In this way, the capacitor C2 is connected across the anode of the diode D2 and the low potential power supply GND when the analog switches S2 and S3 are turned on. In this low potential power supply GND, in addition to one end of the capacitor C2, a diode D1 and a cathode of the diode D2 are connected, and the cathode and one end of the capacitor C2 are at the same potential.

  Here, the differential amplifier 3 amplifies and outputs a differential voltage between a non-inverting input (+ input in the figure) and an inverting input (-input in the figure). The output is also referred to as amplifier output below. In the present embodiment, the amplification factor of the differential amplifier 3 in the reference voltage generation circuit is determined depending on (C1 + C2), the capacitance ratio of C3, and the like.

  The connection point between the capacitor C1 and the diode D1 is connected to the inverting input of the differential amplifier 3 via the analog switch S4. The connection point between the capacitor C2 and the analog switch S2 is connected to the inverting input of the differential amplifier 3 via the analog switch S5. The connection point between the capacitor C2 and the analog switch S3 is connected to the anode of the diode D2 via the analog switch S6.

  A capacitor C3 and an analog switch S7 are connected in parallel between the inverting input and output of the differential amplifier 3, that is, in the feedback path of the negative feedback of the differential amplifier 3.

  Here, the analog switches S1 to S3 and S7 are a first switch group, and the analog switches S4 to S6 are a second switch group. These first switch group and second switch group are exclusively turned on and off. In the following, for the sake of convenience, the timing at which the first switch group is turned on is referred to as a reference voltage source / charging operation step, and the timing at which the second switch group is turned on is referred to as a reference voltage / amplification output operation step.

  Next, the circuit operation of this embodiment will be described.

  FIG. 2 is a circuit diagram showing a reference voltage source / charging operation step in which the first switch group is turned on in the reference voltage generation circuit of the present embodiment. FIG. 3 is a circuit diagram showing a reference voltage / amplified output operation step in the reference voltage generating circuit in which the second switch group is turned on. 2 and 3 are illustrated based on FIG. 1 so as to omit the analog switches S1 to S7 that are turned off in each operation state and the circuit thereof so that the operation states can be easily understood. Is.

  The analog switches S1 to S3, S7 (reference voltage source / charging operation step in FIG. 2) and the analog switches S4 to S6 (reference voltage / amplification output operation step in FIG. 3) are exclusively turned on and off, and the analog switch S4, The output voltage of the differential amplifier 3 when S5 and S6 are turned on becomes a stable reference voltage.

  First, in FIG. 2, the capacitor C1 is connected across the anode of the diode D1 and the anode of the diode D2, and the capacitor C1 has a charge according to the difference between the forward voltage of the diode D1 and the forward voltage of the diode D2. Charged. The capacitor C2 is connected across the anode and cathode of the diode D2, and the capacitor C2 is charged with electric charge according to the forward voltage of the diode D2. In the differential amplifier 3, the analog switch S7 is turned on, the amplifier output is connected to the inverting input, the amplification factor is 1, and a voltage equal to the forward voltage of the diode D2 is output.

  Next, in FIG. 3, the capacitor C <b> 1 and the capacitor C <b> 2 are connected in parallel to the inverting input and the non-inverting input of the differential amplifier 3. This non-inverting input is connected to a low potential power supply (ground) GND by a diode D2, and becomes a potential higher than the low potential power supply GND by a forward voltage of the diode D2. Therefore, the differential amplifier 3 responds to the charges stored in the capacitors C1 and C2 charged by the circuit operation shown in FIG. 2, the capacitance ratio of (C1 + C2) and C3, and the potential of the non-inverting input by the diode D2. Output voltage.

  In such a reference voltage / amplified output operation step, a DC voltage is obtained by sampling the reference voltage in a steady state or a substantially steady state by the sample hold circuit 1. The sample and hold circuit 1 includes an analog switch S8 and a capacitor C4, and a reference voltage is sampled when the analog switch S8 is turned on. Further, the power consumption can be reduced by intermittently operating the current source I1, the current source I2, the analog switches S1 to S7 and the differential amplifier 3 only during sampling.

  Next, a method for designing the capacitances of the capacitors C1 to C3 will be described.

  When the forward voltage of the diode D1 is VD1, the forward voltage of the diode D2 is VD2, and the difference (VD2−VD1) is ΔVD, the reference voltage Vref is expressed by equation (1).

        Vref = C1 / C3 × ΔVD + (1−C2 / C3) × VD2 (1)

  Here, since ΔVD has a positive temperature dependency dΔVD / dT and VD2 has a negative temperature dependency dVD2 / dT, the condition of the capacitor C2 is determined such that the temperature dependency dVref / dT of Vref is zero. And (2) are obtained.

        C2 = C1 × (dΔVD / dT) / (dVD2 / dT) + C3 (2)

  By designing the capacitances of the capacitors C1 to C3 so as to satisfy the expression (2), an arbitrary Vref independent of the temperature including 1.2 V or less can be obtained.

  Next, FIG. 4 is a circuit diagram of a reference voltage generating circuit according to the second embodiment of the present invention.

  In the second embodiment, a reference voltage lower than 1.2 V can be created as in the first embodiment.

  First, the circuit configuration of the second embodiment will be described.

  Current source I1 is connected to the anode of diode D1. Current source I2 is connected to the anode of diode D2. The cathodes of these diodes D1 and D2 are connected to a low potential power supply (ground) GND, and these cathodes are at the same potential.

  The current that flows per unit area of the junction of the diode D1 is smaller than the current that flows per unit area of the junction of the diode D2. Therefore, the forward voltage of the diode D1 is smaller than the forward voltage of the diode D2.

  The anode of the diode D1 is connected to the capacitor C1 via the analog switch S1, and the other end of the capacitor C1 is connected to the analog switches S9 and S10. The capacitor C1 is connected to the anode of the diode D2 through the analog switch S9. The capacitor C1 is connected to the anode of the diode D1 via the analog switch S10. Thus, the capacitor C1 is connected across the anode of the diode D1 and the anode of the diode D2 when the analog switches S1 and S9 are turned on.

  The anode of the diode D1 is connected to the non-inverting input of the differential amplifier 3, and is connected to the capacitor C2 via the analog switch S2. The other end of the capacitor C2 is connected to the low potential power source (via the analog switch S3). Ground) Connected to GND. In this way, the capacitor C2 is connected across the anode of the diode D2 and the low potential power supply GND when the analog switches S2 and S3 are turned on. In this low potential power supply GND, in addition to one end of the capacitor C2, the cathodes of the diode D1 and the diode D2 are connected together, and the cathode and one end of the capacitor C2 are at the same potential.

  The connection point between the capacitor C1 and the diode D1 is connected to the inverting input of the differential amplifier 3 via the analog switch S4. The connection point between the capacitor C2 and the analog switch S2 is connected to the inverting input of the differential amplifier 3 via the analog switch S5. The connection point between the capacitor C2 and the analog switch S3 is connected to the anode of the diode D1 via the analog switch S6.

  A capacitor C3 and an analog switch S7 are connected in parallel between the inverting input and the amplifier output of the differential amplifier 3, that is, in the feedback path of the negative feedback of the differential amplifier 3.

  Here, the analog switches S1 to S3, S7, and S9 are a first switch group, and the analog switches S4 to S6 and S10 are a second switch group. These first switch group and second switch group are exclusively turned on and off.

  Next, the circuit operation of this embodiment will be described.

  FIG. 5 is a circuit diagram illustrating a reference voltage source / charging operation step in which the first switch group is turned on in the reference voltage generation circuit of the present embodiment. FIG. 6 is a circuit diagram showing a reference voltage / amplified output operation step in the reference voltage generating circuit in which the second switch group is turned on. 5 and FIG. 6 are illustrated so as to omit the analog switches S1 to S7 that are turned off in each operation state and the circuit thereof based on FIG. 4 so that the operation states can be easily grasped. Is.

  The analog switches S1 to S3, S7, S9 (reference voltage source / charging operation step in FIG. 5) and the analog switches S4 to S6, S10 (reference voltage / amplification output operation step in FIG. 6) are exclusively turned on and off, The output voltage of the differential amplifier 3 when the analog switches S4 to S6 and S10 are turned on becomes a stable reference voltage.

  First, in FIG. 5, the capacitor C1 is connected across the anode of the diode D1 and the anode of the diode D2, and the capacitor C1 has a charge according to the difference between the forward voltage of the diode D1 and the forward voltage of the diode D2. Charged. The capacitor C2 is connected across the anode and cathode of the diode D2, and the capacitor C2 is charged with electric charge according to the forward voltage of the diode D2. In the differential amplifier 3, the analog switch S7 is turned on, the amplifier output is connected to the inverting input, the amplification factor is 1, and a voltage equal to the forward voltage of the diode D2 is output.

  Next, in FIG. 6, the capacitor C <b> 1 and the capacitor C <b> 2 are connected in parallel to the inverting input and the non-inverting input of the differential amplifier 3. The non-inverting input is connected to a low potential power supply (ground) GND by a diode D1, and becomes a potential higher than the low potential power supply GND by a forward voltage of the diode D1. Therefore, the differential amplifier 3 responds to the charges stored in the capacitors C1 and C2 charged by the circuit operation shown in FIG. 5, the capacitance ratio of (C1 + C2) and C3, and the potential of the non-inverting input by the diode D1. Output voltage.

  In such a reference voltage / amplified output operation step, a DC voltage is obtained by sampling the reference voltage in a steady state or a substantially steady state by the sample hold circuit 1. The sample and hold circuit 1 includes an analog switch S8 and a capacitor C4, and a reference voltage is sampled when the analog switch S8 is turned on. Further, the power consumption can be reduced by intermittently operating the current source I1, the current source I2, the analog switches S1 to S7, S9, and S10 and the differential amplifier 3 only at the time of sampling.

  Next, a method for designing the capacitances of the capacitors C1 to C3 will be described.

  When the forward voltage of the diode D1 is VD1, the forward voltage of the diode D2 is VD2, and the difference (VD2−VD1) is ΔVD, the reference voltage Vref is expressed by equation (3).

        Vref = C1 / C3 × ΔVD + (1−C2 / C3) × VD1 (3)

  Here, since ΔVD has a positive temperature dependency dΔVD / dT and VD2 has a negative temperature dependency dVD2 / dT, the condition of the capacitor C2 is determined such that the temperature dependency dVref / dT of Vref is zero. And (4) are obtained.

        C2 = C1 × (dΔVD / dT) / (dVD1 / dT) + C3 (4)

  By designing the capacitances of the capacitors C1 to C3 so as to satisfy the expression (4), an arbitrary Vref that does not depend on the temperature including 1.2 V or less can be obtained.

  Here, FIG. 7 is a circuit diagram of a reference voltage generating circuit according to the third embodiment of the present invention, which is a modification of the first embodiment, and FIG. 8 is a modification of the second embodiment. It is a circuit diagram of the reference voltage generation circuit of 4 embodiment. Each of the third embodiment and the fourth embodiment is a modification in which the current source provided on the anode side of the diode in the first embodiment and the second embodiment is provided on the cathode side. Accordingly, one end of the analog switch S3 and one end of the capacitor C4 are connected to the high potential power supply VDD.

  In the first and second embodiments described above, the current source I1 is connected to the anode of the diode D1, and the current source I2 is connected to the anode of the diode D2, as shown in FIGS. On the other hand, in the third and fourth embodiments, as shown in FIGS. 7 and 8, respectively, the current source I1 is connected to the cathode of the diode D1, and the current source I2 is connected to the cathode of the diode D2. The same operation can be performed. Further, since the reference voltage Vref ′ output in the third and fourth embodiments is a reference voltage for the high potential power supply VDD, the reference voltage Vref output in the first and second embodiments is the same as the reference voltage Vref output in the first and second embodiments. Has the following relationship.

       Vref ′ = VDD−Vref (5)

  As described above, in all of the embodiments of the present invention, since the reference voltage source is obtained from the difference between the forward voltages of the two diodes, it can be set lower than the output voltage of the bandgap reference circuit. it can. When obtaining the forward voltage difference, the temperature compensation can be performed by applying the negative temperature dependence of the forward voltage itself to the positive temperature dependence of the forward voltage difference.

  Further, a current adding circuit requiring a large number of circuit elements and a current / voltage conversion circuit as in Patent Document 1 are not particularly required, and this forward voltage difference can be obtained by a circuit operation centered on the capacitor C1. At the same time, the negative temperature dependence of the forward voltage VD2 of the diode D2 for temperature compensation can be caused by a circuit operation centered on the capacitor C2. Therefore, it is very advantageous in terms of power saving and space saving.

  Further, since the amplification factor of the amplifier circuit is set by the switched capacitor circuit, power saving can be achieved also in this aspect.

  Furthermore, one of the diodes used for obtaining the forward voltage difference voltage and the diode used for obtaining the negative temperature dependence of the temperature compensation are shared. Therefore, the temperature environment is uniform, the temperature compensation characteristics are easily matched, and the effective temperature compensation of the reference voltage becomes possible.

DESCRIPTION OF SYMBOLS 1 ... Sample hold circuit 3 ... Differential amplifier C1-C4 ... Capacitor D1, D2 ... Diode S1-S10 ... Analog switch

Claims (4)

A current flows from the first current source to the first diode, and a current flows from the second current source to the second diode. The cathode or anode of the first diode and the second diode is connected to the first diode. Connected to each other and set to the same potential point,
A current per unit area of the junction of the first diode is smaller than a current per unit area of the junction of the second diode;
The first capacitor and the second diode are connected across the anode or cathode on the opposite side of the same potential point, and are charged according to the voltage difference between the connection points. A reference voltage generating circuit, characterized in that a reference voltage is output based on a corresponding voltage. A second capacitor that is connected and charged across one of the connection points of the first diode and the second diode and the same potential point;
2. The reference voltage generation circuit according to claim 1, wherein a reference voltage is output based on a voltage corresponding to a sum of charges of the first capacitor and charges of the second capacitor. A voltage corresponding to the electric charge is input, and further includes a negative feedback amplifier circuit in which a third capacitor is inserted in series in the negative feedback path,
3. The reference voltage generation circuit according to claim 1, wherein a reference voltage is output from an output of the negative feedback amplifier circuit. When turned on, a current flows from the first current source to the first diode, and a circuit for flowing current from the second current source to the second diode is formed by a plurality of analog switches. 1 switch group,
A second switch group including a plurality of analog switches forming a circuit that amplifies and outputs a reference voltage from the negative feedback amplifier circuit when turned on, and
4. The reference voltage generation circuit according to claim 3, wherein the first switch group and the second switch group are exclusively turned on and off.

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