JP2013135384A - Pixel drive device and pixel drive method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a pixel drive device and a pixel drive method, suppressing a dark current generated in a photoelectron retention unit.SOLUTION: There is provided a pixel drive device for driving a unit pixel having a photoelectric conversion element that generates photoelectrons according to the quantity of incident light during a light receiving period. The unit pixel includes a plurality of photoelectron distribution units for distributing the photoelectrons generated by the photoelectric conversion element. Each photoelectron distribution unit includes a first transfer unit for transferring a photoelectron converted by the photoelectric conversion element, and a photoelectron retention unit for tentatively retaining the photoelectron transferred from the first transfer unit. When the photoelectron is transferred to the photoelectron retention unit, a gate drive signal voltage having a first voltage value higher than a reference voltage value is applied to the gate of the photoelectron retention unit to which the photoelectron is transferred. Also, when the photoelectron is retained in the photoelectron retention unit without transfer of the photoelectron to the photoelectron retention unit, a gate drive signal voltage having a second voltage value lower than the first voltage value and higher than the reference value is applied to the gate of the photoelectron retention unit.

Description

  The present invention relates to a pixel driving apparatus and a pixel driving method for driving a unit pixel having a photoelectric conversion element and a photoelectron holding unit that holds photoelectrons converted by the photoelectric conversion element, and a dark current generated in the photoelectron holding unit The present invention relates to a pixel driving apparatus and a pixel driving method for suppressing the above-described problem.

  Among image sensors such as a CMOS image sensor and a CCD, there is an image sensor having a structure in which charges are held in a potential well formed on a substrate surface by applying an appropriate voltage to the gate of a MOS capacitor. In a state where this electric charge is held, it is a transient state (non-thermal equilibrium state) until a thermal equilibrium state is reached in a long time. Therefore, it cannot be held for a long time. In addition to photoelectric conversion by light, there is an electron-hole pair generated by thermal excitation, which is called dark current. If left for a long time, dark current will reach a thermal equilibrium state.

  The image sensor outputs a charge signal in a short time such as 1/60 seconds for the purpose of imaging rather than holding information, so that the charge can be held. However, the dark current is one of the noises of the image sensor, and in order to reduce the noise, it is necessary to devise a method for reading out the electric charge obtained by the photoelectric conversion in the shortest possible time.

  In the rolling shutter system in which exposure is performed at different timings for each row and read out immediately (within several tens of μs) at the end of exposure, the influence of dark current at least from the end of exposure to the time of reading can be reduced. However, since the exposure timing is different for each row, it cannot be used when simultaneity is a problem.

  Therefore, if the batch exposure (global shutter) method is adopted, simultaneity can be maintained. However, in the batch exposure (global shutter) method, since it is necessary to read out all pixels after exposure, the time for holding charges is longer than that in the rolling shutter method. Therefore, a structure for holding the signal charge for a certain period is required before reading out the signal charge. The following Patent Document 1 describes a technique that employs collective exposure, and has a structure for holding charges, and in order to reduce kTC noise, a photoelectron holding unit is provided separately from the floating diffusion layer in the pixel. It is described that it is provided.

JP 2009-268083 A

  In the technique described in Patent Document 1, the charge holding unit holds photoelectrons, but when the charge holding unit holds charge for a long time, a dark current is generated in the charge holding unit.

  Therefore, the present invention has been made in view of the above-described conventional problems, and an object thereof is to provide a pixel driving apparatus and a pixel driving method that suppress dark current generated in a charge (photoelectron) holding unit.

  The present invention is a pixel driving apparatus for driving a unit pixel having a photoelectric conversion element that generates photoelectrons corresponding to the amount of light incident during a light receiving period, and the unit pixel distributes photoelectrons generated by the photoelectric conversion element. A plurality of photoelectron distribution units, wherein the photoelectron distribution unit temporarily holds a first transfer unit for transferring photoelectrons converted by the photoelectric conversion element and a photoelectron transferred from the first transfer unit; A plurality of the light receiving periods, and a gate drive signal voltage is applied to the first transfer section and the gate of the photoelectron holding section of the plurality of photoelectron distributing sections, and In addition, the photoelectrons generated by the photoelectric conversion element are distributed and transferred to the respective photoelectron holding units, whereby the photoelectrons generated in a plurality of times of the light receiving period are added and held in each of the photoelectron holding units. When transferring photoelectrons to the photoelectron holding unit, a gate drive signal voltage having a first voltage value higher than a reference voltage value is applied to the gate of the photoelectron holding unit to which photoelectrons are transferred, and photoelectrons are transferred to the photoelectron holding unit. When the photoelectron holding unit holds the photoelectrons without transferring to the gate, a gate drive signal voltage having a second voltage value lower than the first voltage value and higher than the reference voltage value is applied to the gate of the photoelectron holding unit. It is characterized by doing.

  Each time the photoelectron generated by the photoelectric conversion element is distributed to each photoelectron holding unit and transferred for each light receiving period, the second of the gate drive signal voltage applied to the photoelectron holding unit to which photoelectrons are transferred. Increase the voltage value.

  The unit pixel includes a photoelectron discharge unit that discharges photoelectrons generated by the photoelectric conversion element, and the photoelectron distribution unit transfers a photoelectron held by the photoelectron hold unit, and the second transfer. A floating diffusion layer for reading out a voltage signal corresponding to the photoelectrons transferred by the unit, and a reset transistor for resetting the potential of the floating diffusion layer to a reference potential is connected to the floating diffusion layer. By applying a gate drive signal voltage to the gate of the photoelectron discharge unit, photoelectrons generated by the photoelectric conversion element in a period other than the light receiving period are discharged, and the second transfer unit is held by the photoelectron holding unit. Before transferring the photoelectrons being transferred to the floating diffusion layer, a reset signal is applied to the gate of the resetting transistor to reset the potential of the floating diffusion layer to a reference potential.

  The photoelectric conversion element is formed with a photogate structure, and the first transfer unit, the photoelectron holding unit, and the second transfer unit are formed with a MOS diode structure.

  A pixel driving method for driving a unit pixel having a photoelectric conversion element that generates photoelectrons according to the amount of light incident during a light receiving period, wherein the unit pixel distributes a plurality of photoelectron oscillations that distribute the photoelectrons generated by the photoelectric conversion element. The photoelectron distribution unit includes a first transfer unit for transferring the photoelectrons converted by the photoelectric conversion element, and a photoelectron holding unit for temporarily holding the photoelectrons transferred from the first transfer unit. And a plurality of the light receiving periods, and a gate drive signal voltage is applied to the gates of the first transfer unit and the photoelectron holding unit of the plurality of photoelectron distributing units, and the photoelectric operation is performed for each light receiving period. By distributing and transferring the photoelectrons generated by the conversion element to each of the photoelectron holding units, each photoelectron holding unit adds and holds the photoelectrons generated in a plurality of times of the light receiving period. When transferring to the photoelectron holding unit, a gate drive signal voltage having a first voltage value higher than a reference voltage value is applied to the gate of the photoelectron holding unit to which photoelectrons are transferred, and photoelectrons are transferred to the photoelectron holding unit. In the case where the photoelectron holding unit is held without the photoelectron holding unit, a gate drive signal voltage having a second voltage value lower than the first voltage value and higher than the reference voltage value is applied to the gate of the photoelectron holding unit. Features.

  According to the present invention, when photoelectrons are transferred to the photoelectron holding unit, the potential formed under the gate of the photoelectron holding unit can be increased, so that the electric field between the photoelectric conversion element and the photoelectron holding unit can be increased. The photoelectrons generated by the photoelectric conversion elements can be transferred to the photoelectron holding unit at high speed. In addition, when the photoelectron holding unit holds the photoelectron without being transferred to the photoelectron holding unit, the width of the depletion layer formed under the gate of the photoelectron holding unit is reduced, so that generation of electrons in the depletion layer, Intrusion into the depletion layer due to diffusion of electrons generated in the substrate other than the depletion layer can be reduced, and generation of dark current can be suppressed.

It is a figure which shows schematic structure of the ranging system which has a solid-state imaging device concerning embodiment. It is a figure which shows the structure of the solid-state imaging device of FIG. It is a partial top view which shows a part of unit pixel which comprises the solid-state imaging device shown in FIG. FIG. 4 is a cross-sectional configuration view taken along line IV-IV in FIG. 3. It is explanatory drawing of the method of calculating | requiring the distance to a ranging object by TOF method. It is a time chart which shows the light reception period of a unit pixel. It is a figure which shows an example of the timing chart of the various various gate drive signal voltages supplied to a photoelectric conversion element, a photoelectron distribution part, and a photoelectron discharge part at the time of transfer of a photoelectron. 8A is a potential diagram at timings a and g in FIG. 7, FIG. 8B is a potential diagram at timings b and h in FIG. 7, FIG. 8C is a potential diagram at timing c in FIG. 7, and FIG. FIG. 8E is a potential diagram at timing d in FIG. 7, FIG. 8E is a potential diagram at timing e in FIG. 7, and FIG. 8F is a potential diagram at timing f in FIG. The irradiation timing of the irradiation light irradiated by the irradiation device in one cycle of FIG. 6 and the photoelectric conversion element of the unit pixel, the third transfer gate, and the first transfer gate of each photoelectron distribution unit in one cycle of FIG. It is a time chart which shows an example with the timing of the gate drive signal voltage performed. It is a figure which shows an example of the circuit structure of a unit pixel. It is a figure which shows an example of the timing chart of the gate drive signal voltage applied to a holding gate in order to suppress generation | occurrence | production of dark current. FIG. 12A shows an example of a potential diagram of a photoelectron holding unit to which photoelectrons generated in a light receiving period that is a part of the light receiving transfer period are transferred, and FIG. 12B shows a potential diagram of the photoelectron holding unit in a period other than the light receiving transfer period. An example is shown.

  A pixel driving method according to the present invention and a pixel driving device that realizes the pixel driving method will be described in detail below with reference to the accompanying drawings by showing preferred embodiments.

  FIG. 1 is a diagram illustrating a schematic configuration of a distance measuring system 10 according to the embodiment. As shown in FIG. 1, the distance measuring system 10 includes an irradiation device 12, an imaging unit 14, a calculation unit 16, a control unit 18, and a power source 20.

  The power source 20 supplies a predetermined power source voltage to each part of the distance measuring system 10, and in FIG. 1, for the sake of simplicity, the display of the power source line from the power source 20 to each device is omitted.

  The irradiation device 12 irradiates the distance measurement target W with the pulsed light Lp, and the irradiation device 12 includes a light emitting unit (light source) 24 that outputs the pulsed light Lp under the control of the control unit 18. The light emitting unit 24 includes a capacitor and a light emitting element, and emits light when the charge held by the capacitor is supplied to the light emitting diode.

  The light emitting unit 24 emits infrared light. For example, infrared light having a wavelength of 870 nanometers (nm) can be irradiated with an output of 100 watts (W). The light emitting unit 24 can output the pulsed light Lp with an output time (pulse width) of 100 nanoseconds (ns).

  Note that the light emitting unit 24 may have a plurality of light emitting points in a linear array shape, or may have a plurality of light emitting points arranged in a matrix. Other light emitting elements such as a laser diode and a light emitting diode (LED) may be used as the light emitting element.

  In the distance measuring system 10, the pulsed light Lp emitted from the irradiation device 12 is reflected by the distance measuring object W and enters the imaging unit 14. For convenience of explanation, the pulsed light Lp from the irradiation device 12 to the distance measuring object W is referred to as irradiation light Le, and the pulsed light Lp from the distance measuring object W to the imaging unit 14 is referred to as reflected light Lr.

  The imaging unit 14 includes a lens 26 and a solid-state imaging device 28. The reflected light Lr and the ambient light Ls that have passed through the lens 26 are collected on the solid-state imaging device 28 and received by the solid-state imaging device 28. The solid-state imaging device 28 has sensitivity to the pulsed light Lp and the environmental light Ls irradiated by the irradiation device 12, and receives light by a global shutter method. The computing unit 16 calculates the distance Z to the distance measuring object W based on the information on the number of photoelectrons Q taken by the solid-state imaging device 28 during the light receiving period P. The control unit 18 controls the irradiation device 12, the solid-state imaging device 28, and the calculation unit 16. Note that the control unit 18 and the calculation unit 16 may be provided in the imaging unit 14 or may be provided in the solid-state imaging device 28.

  FIG. 2 is a diagram illustrating a configuration of the solid-state imaging device 28. The solid-state imaging device 28 includes a pixel array 32 in which unit pixels 30 are arranged in a matrix, a pixel driving circuit (pixel driving device) 34, an output buffer 36, and an A / D converter 38.

  The power supply 20 applies a positive power supply voltage Vdd to the pixel array 32 and a reset voltage Vref. The pixel drive circuit 34 includes a gate drive circuit 42, a vertical selection circuit 44, a sample hold circuit 46, and a horizontal selection circuit 48. The gate drive circuit 42 outputs various gate drive signals to thereby form the pixel array 32. Generation (accumulation), retention, transfer, discharge, etc. of the photoelectrons of each unit pixel 30 are performed. The vertical selection circuit 44 includes a multiplexer (not shown), and selectively applies a voltage signal (photoelectronic information) corresponding to the number of photoelectrons Q held by the unit pixel 30 to the row to which the unit pixel 30 to be read belongs. QV is output. The horizontal selection circuit 48 includes another multiplexer (not shown), and selects a column to which the unit pixel 30 to be read belongs. The read pixel signal is once held in the sample hold circuit 46 and then output through the A / D converter 38. Then, the data is output to the arithmetic unit 16 via the output buffer 36 and the A / D converter 38. The gate drive circuit 42, the vertical selection circuit 44, the sample hold circuit 46, the A / D converter 38, and the like are driven according to the control of the control unit 18.

  FIG. 3 is a partial plan view showing a part of the unit pixel 30 constituting the solid-state imaging device 28 shown in FIG. 4 is a cross-sectional configuration view taken along the line IV-IV in FIG. 3. The configuration of the photoelectron sorting units 106b, 106c, and 106d is the same as that of the photoelectron sorting unit 106a, and the configuration of the photoelectron discharge unit 108b is the same as the configuration of the photoelectron discharge unit 108a. , 106c, 106d and the photoelectron discharge unit 108b are omitted in the cross-sectional configuration diagram.

  The unit pixel 30 includes a photoelectric conversion element 104 formed on a p-type (first conductivity type) semiconductor substrate 102 and four photoelectron sorting units 106a, 106b, 106c, 106d (collectively, the photoelectron sorting unit 106). And two photoelectron discharge units 108a and 108b (hereinafter, collectively referred to as the photoelectron discharge unit 108). The photoelectric conversion element 104 has a photogate structure having an electrode (hereinafter referred to as a photogate) 110 formed on a p-type (first conductivity type) semiconductor substrate 102 via an insulator (not shown). (See FIG. 4). The photoelectric conversion element 104 detects light and generates photoelectrons (negative charges) (converts the detected light into photoelectrons). A gate drive signal voltage Sa for driving the photoelectric conversion element 104 is applied from the gate drive circuit 42 to the photogate 110.

  Each photoelectron distribution unit 106 includes a first transfer unit 112, a photoelectron holding unit 114, a second transfer unit 116, and a floating diffusion layer 118. The first transfer unit 112 distributes the photoelectrons generated by the photoelectric conversion element 104 and transfers them to the photoelectron holding unit 114, and is formed on the p-type semiconductor substrate 102 via an insulator (not shown). It has a MOS diode structure having an electrode (hereinafter referred to as a first transfer gate) 120 (see FIG. 4). A gate drive signal voltage Sb that drives the first transfer unit 112 from the gate drive circuit 42 is input to the first transfer gate 120.

  The photoelectron holding unit 114 is arranged to sandwich the first transfer unit 112 with respect to the photoelectric conversion element 104 and temporarily holds the photoelectrons generated by the photoelectric conversion element 104 and is insulated on the p-type semiconductor substrate 102. It has a MOS diode structure having an electrode (hereinafter referred to as a holding gate) 122 formed through a body (not shown) (see FIG. 4). A gate drive signal voltage Sc that drives the photoelectron holding unit 114 from the gate drive circuit 42 is input to the holding gate 122.

  The second transfer unit 116 is arranged with respect to the first transfer unit 112 with the photoelectron holding unit 114 interposed therebetween, and transfers the photoelectrons accumulated in the photoelectron holding unit 114, and is insulated on the p-type semiconductor substrate 102. It has a MOS diode structure having an electrode (hereinafter referred to as a second transfer gate) 124 formed through a body (not shown) (see FIG. 4). A gate drive signal voltage Sd that drives the second transfer unit 116 from the gate drive circuit 42 is applied to the second transfer gate 124.

  The floating diffusion layer (FD; floating diffusion) 118 is disposed with the second transfer unit 116 interposed between the photoelectron holding unit 114 and temporarily converts the photoelectrons transferred from the photoelectron holding unit 114 into a voltage. An n-type (second conductivity type) impurity is formed on the p-type semiconductor substrate 102.

  As shown in FIG. 3, the four photoelectron sorting units 106 are provided two by two symmetrically in the horizontal direction (left-right direction) with the photoelectric conversion element 104 interposed therebetween.

  As shown in FIG. 4, a reset transistor (reset unit) 126 that resets the potential of the floating diffusion layer 118 to a reference potential is connected to the floating diffusion layer 118. The source of the reset transistor 126 is connected to the floating diffusion layer 118, the reset voltage Vref from the power supply 20 is applied to the drain, and the gate (reset gate) 127 of the reset transistor 126 is reset from the gate drive circuit 42. A signal R is supplied. When the high reset signal R is supplied to the reset gate 127, the reset transistor 126 is turned on, the photoelectrons present in the floating diffusion layer 118 are discharged, and the potential of the floating diffusion layer 118 is reset to the reference potential.

  The floating diffusion layer 118 is connected to a signal reading transistor 130 for reading a voltage signal QV corresponding to the number of photoelectrons Q held in the floating diffusion layer 118. A selection transistor 134 for selecting whether to output the voltage signal QV read by the signal reading transistor 130 to the signal reading line 132 is connected to the signal reading transistor 130. A power supply voltage Vdd from the power supply 20 is applied to the drain of the signal readout transistor 130, the gate (signal readout gate) 131 of the signal readout transistor 130 is connected to the floating diffusion layer 118, and the source is a selection transistor. 134 connected to the drain. When a high selection signal Ss is supplied from the vertical selection circuit 44 to the gate (selection gate) 135 of the selection transistor 134, the selection transistor 134 is turned on, corresponding to the number of photoelectrons Q held in the floating diffusion layer 118. The voltage signal QV to be read is read from the signal read line 132. A signal readout line 132 is connected to the source of the selection transistor 134.

  The photoelectron discharge unit 108 includes a third transfer unit 140 and a diffusion layer 142. The third transfer unit 140 is for transferring the photoelectrons generated by the photoelectric conversion element 104 to the diffusion layer 142, and is an electrode (first electrode) formed on the p-type semiconductor substrate 102 via an insulator (not shown). (3 transfer gates) 144 has a MOS diode structure (see FIG. 4).

  The diffusion layer 142 is disposed on the opposite side of the photoelectric conversion element 104 with the third transfer unit 140 interposed therebetween, and the power supply voltage Vdd from the power supply 20 is applied to the diffusion layer 142. When the gate drive signal voltage Se is input from the gate drive circuit 42 to the third transfer gate 144, the photoelectrons generated by the photoelectric conversion element 104 are discharged from the diffusion layer 142 via the third transfer unit 140. As shown in FIG. 3, the two photoelectron discharge units 108 are provided one by one symmetrically in the vertical direction (up and down direction) with the photoelectric conversion element 104 interposed therebetween.

Next, an example of a method for obtaining the distance Z to the distance measuring object W by the TOF (Time of Flight) method will be described with reference to FIG. The unit pixel 30 generates and accumulates photoelectrons corresponding to light incident on the unit pixel 30 during the light receiving period P. The light receiving period P includes a first light receiving period P1, a second light receiving period P2, a third light receiving period P3, and a fourth light receiving period P4. In the third light receiving period P3 and the fourth light receiving period P4, photoelectrons corresponding to only the ambient light Ls are accumulated for a certain period (T _sense ) in a state where the irradiation device 12 does not irradiate the distance measurement target W with the irradiation light Le. It is a period to do. In the first light receiving period P1, the unit pixel 30 always receives the reflected light Lr of the irradiated light Le emitted by the irradiation device 12, and thus the photoelectrons corresponding to the reflected light Lr and the ambient light Ls are received for the predetermined time (T _sense ) This is a period for accumulative accumulation. The second light receiving period P2 includes a period for accumulating and accumulating photoelectrons corresponding to the ambient light Ls and the reflected light Lr, and a period for accumulating and accumulating photoelectrons corresponding to only the ambient light Ls.

The photoelectric conversion element 104 of each unit pixel 30 generates photoelectrons according to light incident during the light receiving period P, and the plurality of photoelectron holding units 114 included in each unit pixel 30 captures the photoelectrons generated during the light receiving period P. Hold on. The photoelectron number Q generated by the photoelectric conversion element 104 in the third light receiving period P3 is Q _cb, and the photoelectron number Q generated by the photoelectric conversion element 104 in the fourth light receiving period P4 is Q _ca. Further, the number of photoelectrons Q photoelectric conversion element 104 is generated in the first light receiving period P1 and Q _b, the number of photoelectrons Q photoelectric conversion element 104 is generated in the second light receiving period P2 and Q _a. In FIG. 5, I _laser indicates the intensity of the reflected light Lr of the irradiated light, and I _back indicates the intensity of the ambient light Ls.

Therefore, the relational expressions Q _a −Q _ca ∝I _laser × T _delay , Q _b −Q _cb ∝I _laser × T _sense are established. T _delay is the time until the irradiated light is reflected back to the distance measurement target W and returned.

From the above formula,
T _delay = T _sense × (Q _a -Q _ca ) / (Q _b -Q _cb ) (1)
The distance Z to the distance measurement target W can be derived from
Z = c × T _delay / 2 = c × T _sense × (Q _a -Q _ca ) / 2 (Q _b -Q _cb ) (2)
It can obtain | require by the relational expression. In addition, c shows the speed of light.

  There are various TOF methods for obtaining the distance Z to the distance measurement object W, and the distance Z to the distance measurement object W may be obtained by a method other than the method described above.

  FIG. 6 is a time chart showing the light receiving period P of the unit pixel 30. The controller 18 outputs a light emission signal to the irradiation device 12 so that the irradiation device 12 emits the irradiation light Le at a predetermined cycle during the exposure period of one frame, and the irradiation device 12 emits the transmitted light emission. Irradiation light Le is emitted in a predetermined cycle according to the signal. The unit pixel 30 receives light in a light receiving period P (first light receiving period P1 to fourth light receiving period P4) determined in advance according to the irradiation timing of each irradiation light Le under the control of the control unit 18.

  Four light-receiving periods P (first light-receiving period P1 to fourth light-receiving period P4) are determined according to the irradiation timing of one irradiation light Le. This is defined as one cycle, and this is performed during an exposure period of one frame. The cycle is repeated a predetermined number of times (for example, 1000 times). The photoelectrons generated in the first light receiving period P1 are accumulated in the photoelectron holding unit 114 of the photoelectron distributing unit 106a, and the photoelectrons generated in the second light receiving period P2 are accumulated in the photoelectron holding unit 114 of the photoelectron distributing unit 106b. The photoelectrons generated in the third light receiving period P3 are accumulated in the photoelectron holding unit 114 of the photoelectron distributing unit 106c, and the photoelectrons generated in the fourth light receiving period P4 are accumulated in the photoelectron holding unit 114 of the photoelectron distributing unit 106d. .

  Since the photoelectrons generated in each light receiving period P (first light receiving period P1 to fourth light receiving period P4) for each cycle are distributed to each photoelectron distributing unit 106, the photoelectron holding unit 114 of each photoelectron distributing unit 106 is used. Means that the photoelectrons generated in the light receiving period P of each cycle are added and held. That is, the photoelectron holding unit 114 of the photoelectron sorting unit 106a adds and holds the photoelectrons generated in the first light receiving period P1 of each cycle, and the photoelectron holding unit 114 of the photoelectron sorting unit 106b holds the second in each cycle. The photoelectrons generated in the light receiving period P2 are added and held. Further, the photoelectron holding unit 114 of the photoelectron sorting unit 106c adds and holds the photoelectrons generated in the third light receiving period P3 of each cycle, and the photoelectron holding unit 114 of the photoelectron sorting unit 106d holds the fourth electron in each cycle. The photoelectrons generated in the light receiving period P4 are added and held.

When the exposure period of one frame ends and the reading period starts, a voltage signal QV corresponding to the number of photoelectrons Q held by the photoelectron holding section 114 of each photoelectron sorting section 106 is read. Here, the number of photoelectrons Q photoelectrons holding portion 114 of the photoelectron distributor 106a after the exposure period end of one frame is holding a Q _B, photoelectron photoelectron hold unit 114 of the photoelectron distributor 106b holds the number Q and Q _a, the number of photoelectrons Q photoelectrons holding portion 114 of the photoelectron distributor 106c holds the Q _CB, the number of photoelectrons Q photoelectrons holding portion 114 of the photoelectron distributor 106d holds Q _CA.

  FIG. 7 is a diagram illustrating an example of a timing chart of basic various gate drive signal voltages supplied to the photoelectric conversion element 104, the photoelectron sorting unit 106a, and the photoelectron discharge unit 108a during photoelectron transfer. 8A to 8F are potential diagrams of the photoelectric conversion element 104, the photoelectron sorting unit 106a, and the photoelectron discharging unit 108a at the timings a to h shown in the timing chart of FIG.

  8A is a potential diagram at timings a and g, FIG. 8B is a potential diagram at timings b and h, FIG. 8C is a potential diagram at timing c, FIG. 8D is a potential diagram at timing d, and FIG. Is a potential diagram at timing e, and FIG. 8F is a potential diagram at timing f. Hereinafter, the low gate drive signal voltage is a gate drive signal voltage having a reference voltage value (for example, a ground voltage value, that is, zero), and the high gate drive signal voltage is a voltage value higher than the reference voltage value. This is the gate drive oscillation voltage.

  At the timing a before the first first light receiving period P1 during which the photoelectrons generated by the photoelectric conversion element 104 enter the exposure period of one frame and accumulate and accumulate, the high gate drive signal voltage Sa is applied to the photogate 110 to discharge the photoelectrons. A high gate drive signal voltage Se is applied to the third transfer gate 144 of the unit 108a, a low gate drive signal voltage Sb is applied to the first transfer gate 120 of the photoelectron distributing unit 106a, and a holding gate 122 of the photoelectron distributing unit 106a is high. The high gate drive signal voltage Sd is applied to the second transfer gate 124 of the photoelectron distribution unit 106a. Accordingly, at timing a, as shown in FIG. 8A, the third transfer unit 140 transfers the photoelectrons generated by the photoelectric conversion element 104 to the diffusion layer 142, so that the photoelectrons of the photoelectric conversion element 104 are discharged from the diffusion layer 142. Therefore, no photoelectrons are accumulated in the photoelectric conversion element 104. At timing a, as shown in FIG. 8A, the second transfer unit 116 transfers the photoelectrons present in the photoelectron holding unit 114 to the floating diffusion layer 118, and therefore applies a high reset signal R to the reset gate 127. As a result, the photoelectrons present in the photoelectron holding unit 114 and the floating diffusion layer 118 can be discharged through the reset transistor 126.

  Thereafter, at timing b, since the gate drive signal voltage Sc applied to the holding gate 122 becomes low, all the photoelectrons present in the photoelectron holding unit 114 are transferred to the floating diffusion layer 118 as shown in FIG. 8B. Also at this time, all the photoelectrons remaining in the photoelectron holding unit 114 and the floating diffusion layer 118 can be discharged by applying a high reset signal R to the reset gate 127. At timing b, the high gate drive signal voltages Sa and Se are continuously applied to the photogate 110 and the third transfer gate 144, so that the photoelectrons generated by the photoelectric conversion element 104 are transmitted from the diffusion layer 142. Continue to be discharged.

  At timing c immediately before the first light receiving period P1 after all the photoelectrons remaining in the photoelectron holding unit 114 and the floating diffusion layer 118 are discharged, the gate drive signal voltage Sc applied to the holding gate 122 becomes high, and the second The gate drive signal voltage Sd applied to the transfer gate 124 becomes low. Further, at the timing c immediately before the first light receiving period P1, the gate drive signal voltage Sa applied to the photogate 110 becomes low, so that all remaining in the photoelectric conversion element 104 as shown in FIG. 8C. Photoelectrons are discharged from the diffusion layer 142.

  Thereafter, at timing d within the first light receiving period P1, the gate drive signal voltage Se applied to the third transfer gate 144 becomes low, and the gate drive signal voltage Sb applied to the first transfer gate 120 becomes high. Thereby, at the timing d, as shown in FIG. 8D, the first transfer unit 112 transfers the photoelectrons generated by the photoelectric conversion element 104 to the photoelectron holding unit 114. Therefore, in the first light receiving period P1, the photoelectron holding unit 114 can accumulate and hold the photoelectrons generated by the photoelectric conversion element 104. Even at the timing d, since the high gate drive signal voltage Sc continues to be applied to the holding gate 122, the potential of the photoelectron holding unit 114 is kept low.

  At timing e within the remaining photoelectron transfer period of the first light receiving period P1, the gate drive signal voltage Sa applied to the photogate 110 becomes low. Thereby, at the timing e, as shown in FIG. 8E, all the photoelectrons remaining in the photoelectric conversion element 104 can be transferred to the photoelectron holding unit 114.

  At the timing f after the end of the first light receiving period P1 (particularly after the end of the remaining photoelectron transfer period), the gate drive signal voltage Sa applied to the photogate 110 is high, and the gate drive signal voltage applied to the third transfer gate 144. Se becomes high, and the gate drive signal voltage Sb applied to the first transfer gate 120 becomes low. Accordingly, at timing f, as shown in FIG. 8F, the high gate drive signal voltages Sa and Se are applied to the photogate 110 and the third transfer gate 144, so that the photoelectrons generated by the photoelectric conversion element 104 are , And is discharged from the diffusion layer 142. In addition, since the high gate drive signal voltage Sc is continuously applied to the holding gate 122 even at the timing f, the photoelectron holding unit 114 causes the photoelectrons generated by the photoelectric conversion element 104 during the first light receiving period P1. Holding.

  In the exposure period of one frame, as described above, there are a plurality of first light receiving periods P1 for generating photoelectrons transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106a, which are shown in FIGS. 8C to 8E. As shown, the operation is repeated multiple times. Therefore, the photoelectron holding unit 114 of the photoelectron sorting unit 106a adds and holds the photoelectrons generated by the photoelectric conversion element 104 in the plurality of first light receiving periods P1. The same applies to the photoelectron sorting units 106b, 106c, and 106d. The photoelectron sorting units 106b, 106c, and 106d are divided into a plurality of second light receiving periods P2, third light receiving periods P3, and fourth light receiving periods P4. The generated photoelectrons are added and held.

  Thereafter, at the timing g of the read period, the high gate drive signal voltage Sa is applied to the photogate 110, the high gate drive signal voltage Se is applied to the third transfer gate 144, and the low gate drive signal voltage Sb is applied to the first transfer gate 120. However, the high gate drive signal voltage Sc is applied to the holding gate 122 and the high gate drive signal voltage Sd is applied to the second transfer gate 124. Thereby, at timing g, as shown in FIG. 8A, the second transfer unit 116 can transfer the photoelectrons present in the photoelectron holding unit 114 to the floating diffusion layer 118. At this time, since the low reset signal R is applied to the reset gate 127, the transferred photoelectrons are present in the floating diffusion layer 118 without being discharged.

  Thereafter, at timing h, since the gate drive signal voltage Sc applied to the holding gate 122 becomes low, all the photoelectrons present in the photoelectron holding unit 114 are transferred to the floating diffusion layer 118 as shown in FIG. 8B. Also at this time, since the low reset signal R is applied to the reset gate 127, the transferred photoelectrons are present in the floating diffusion layer 118 without being discharged. Note that at timing g and timing h, photoelectrons generated by the photoelectric conversion element 104 are discharged from the diffusion layer 142.

  After all the photoelectrons held by the photoelectron holding unit 114 are transferred to the floating diffusion layer 118, when a high selection signal Ss is applied to the selection gate 135 of the selection transistor 134, the photoelectrons present in the floating diffusion layer 118 are present. A voltage signal QVa corresponding to the number Qa is read from the signal read line 132.

  The photoelectron transfer method of the photoelectron sorting units 106b, 106c, 106d is the same as that of the photoelectron sorting unit 106a, and the photoelectron discharge method of the photoelectron discharge unit 108b is the same as that of the photoelectron discharge unit 108a. Is omitted.

  9 shows the irradiation timing of the irradiation light Le irradiated by the irradiation device 12 in one cycle of FIG. 6, and the photoelectric conversion element 104, the third transfer gate 144, and the photoelectron distribution of the unit pixel 30 in one cycle of FIG. 6 is a time chart illustrating an example of timings of gate drive signal voltages supplied to first transfer gates 120 of units 106a, 106b, 106c, and 106d.

  The unit pixel 30 accumulates and accumulates photoelectrons corresponding to the reflected light Lr incident on the photoelectric conversion element 104 in the first light receiving period P1 to the fourth light receiving period P4, and other than the first light receiving period P1 to the fourth light receiving period P4. Photoelectrons generated by the photoelectric conversion element 104 in a period are discharged (discarded).

  Specifically, before the third light receiving period P3, a high gate drive signal voltage Sa is supplied to the photogate 110 of the photoelectric conversion element 104, and a high gate drive signal is supplied to the third transfer gate 144 of the third transfer unit 140. A voltage Se is supplied. Thereby, photoelectrons generated by the photoelectric conversion element 104 are discharged from the diffusion layer 142. Then, the gate drive signal voltage Sa supplied to the photogate 110 becomes low immediately before the third light receiving period P3, and all the photoelectrons remaining in the photoelectric conversion element 104 are discharged from the diffusion layer 142.

  At this time, the gate drive signal voltage Sb (hereinafter referred to as Sb1) supplied to the first transfer gate 120 of the first transfer unit 112 of the photoelectron distribution unit 106a and the first transfer unit 112 of the photoelectron distribution unit 106b. The gate drive signal voltage Sb (hereinafter referred to as Sb2) supplied to the first transfer gate 120, and the gate drive signal voltage Sb (hereinafter referred to as Sb2) supplied to the first transfer gate 120 of the first transfer unit 112 of the photoelectron distribution unit 106c. , Sb3), the gate drive signal voltage Sb (hereinafter referred to as Sb4) supplied to the first transfer gate 120 of the first transfer unit 112 of the photoelectron distribution unit 106d is in a low state.

  When the third light receiving period P3 comes, the gate drive signal voltage Se supplied to the third transfer gate 144 becomes low and the gate drive signal voltage supplied to the first transfer gate 120 of the photoelectron sorting unit 106c. Sb3 goes high. As a result, the photoelectrons generated by the photoelectric conversion element 104 in the third light receiving period P3 are accumulated and accumulated in the photoelectron holding unit 114 of the photoelectron sorting unit 106c. In the remaining photoelectron transfer period of the third light receiving period P3, the gate drive signal voltage Sa supplied to the photogate 110 becomes low. Thus, all the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106c. Needless to say, the potential of the holding gate 122 of the photoelectron distributing unit 106c is kept low so as to hold the transferred photoelectrons.

  When the fourth light receiving period P4 arrives, the gate drive signal voltage Sa supplied to the photogate 110 is high, the gate drive signal voltage Sb3 supplied to the first transfer gate 120 of the photoelectron distribution unit 106c is low, and the photoelectron distribution. The gate drive signal voltage Sb4 supplied to the first transfer gate 120 of the unit 106d becomes high. Thus, the photoelectrons generated by the photoelectric conversion element 104 in the fourth light receiving period P4 are accumulated and accumulated in the photoelectron holding unit 114 of the photoelectron sorting unit 106d. In the remaining photoelectron transfer period of the fourth light receiving period P4, the gate drive signal voltage Sa supplied to the photogate 110 becomes low. Thus, all the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106d. Needless to say, the potential of the photoelectron holding unit 114 of the photoelectron distributing unit 106d is kept low so as to hold the transferred photoelectrons.

  When the fourth light receiving period P4 ends, the gate drive signal voltage Sa supplied to the photogate 110 is high, the gate drive signal voltage Se supplied to the third transfer gate 144 is high, and the first transfer of the photoelectron distributor 106d. The gate drive signal voltage Sb4 supplied to the gate 120 becomes low. Thereby, photoelectrons generated by the photoelectric conversion element 104 are discharged from the diffusion layer 142. Then, the gate drive signal voltage Sa supplied to the photogate 110 immediately before the first light receiving period P1 becomes low, and all the photoelectrons remaining in the photoelectric conversion element 104 are discharged from the diffusion layer 142.

  When the first light receiving period P1 arrives, the gate drive signal voltage Se supplied to the third transfer gate 144 becomes low, and the gate drive signal voltage Sb1 supplied to the first transfer gate 120 of the photoelectron distribution unit 106a becomes Become high. Thereby, the photoelectrons generated by the photoelectric conversion element 104 in the first light receiving period P1 are accumulated and accumulated in the photoelectron holding unit 114 of the photoelectron sorting unit 106a. In the remaining photoelectron transfer period of the first light receiving period P1, the gate drive signal voltage Sb1 supplied to the photogate 110 becomes low. Thereby, all the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106a. Needless to say, the potential of the photoelectron holding unit 114 of the photoelectron distributing unit 106a is kept low so that the transferred photoelectrons can be held.

  When the second light receiving period P2 arrives, the gate drive signal voltage Sa supplied to the photogate 110 is high, the gate drive signal voltage Sb1 supplied to the first transfer gate 120 of the photoelectron sorting unit 106a is low, and the photoelectron sorting. The gate drive signal voltage Sb2 supplied to the first transfer gate 120 of the unit 106b becomes high. Thus, the photoelectrons generated by the photoelectric conversion element 104 in the second light receiving period P2 are accumulated and accumulated in the photoelectron holding unit 114 of the photoelectron sorting unit 106d. When the remaining photoelectron transfer period of the second light receiving period P2 is entered, the gate drive signal voltage Sa supplied to the photogate 110 becomes low. Thereby, all the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106b. Needless to say, the potential of the photoelectron holding unit 114 of the photoelectron distribution unit 106b is kept low so that the transferred photoelectrons can be held.

  When the second light receiving period P2 ends, the gate drive signal voltage Sa supplied to the photogate 110 is high, the gate drive signal voltage Se supplied to the third transfer gate 144 is high, and the first transfer of the photoelectron distributor 106b. The gate drive signal voltage Sb2 supplied to the gate 120 becomes low. Thereby, photoelectrons generated by the photoelectric conversion element 104 are discharged from the diffusion layer 142.

  FIG. 10 is a diagram illustrating an example of a circuit configuration of the unit pixel 30. The photoelectrons generated by the photoelectric conversion element 104 are transferred to the floating diffusion layer 118 of the photoelectron distribution units 106a, 106b, 106c, and 106d through the transfer paths 146a, 146b, 146c, and 146d. The transfer paths 146a, 146b, 146c, and 146d are configured by the first transfer unit 112, the photoelectron holding unit 114, and the second transfer unit 116 of the photoelectron sorting units 106a, 106b, 106c, and 106d illustrated in FIG. The source of one reset transistor 126 and one signal readout gate 131 are connected to the floating diffusion layer 118 of the photoelectron distributors 106a, 106b, 106c, 106d. In FIG. 10, the photoelectron discharge unit 108 is not shown.

  Before the photoelectrons held by the respective photoelectron holding units 114 of the photoelectron distributing units 106a, 106b, 106c, and 106d are transferred to the respective floating diffusion layers 118, the reset transistor 126 is turned on to turn on each floating diffusion layer 118. Is reset to the reference potential, and the voltage signal (hereinafter, black level) of each floating diffusion layer 118 at that time is read out. Thereafter, the photoelectrons held by the photoelectron holding units 114 of the photoelectron sorting units 106 a, 106 b, 106 c, and 106 d are sequentially transferred to the floating diffusion layer 118. The number of photoelectrons Q transferred to each floating diffusion layer 118 and present in each floating diffusion layer 118 is sequentially converted into a voltage signal (signal level) QV by the signal reading transistor 130, and the signal reading line is passed through the selection transistor 134. 132.

Specifically, by turning on the reset transistor 126, the potential of each floating diffusion layer 118 is reset, and the black level is read out. Thereafter, the photoelectrons held by the photoelectron holding unit 114 of the photoelectron sorting unit 106 a are transferred to the floating diffusion layer 118, and the signal level QV _B corresponding to the number of photoelectrons Q _B existing in the floating diffusion layer 118 is changed to the signal readout line 132. Read from. The calculating unit 16 removes the reset noise by subtracting the black level from the signal level QV _B corresponding to the number of photoelectrons Q _B held by the photoelectron holding unit 114 of the photoelectron sorting unit 106a. The signal reset noise is removed level QV _B is referred to as a voltage signal QV' _B.

Next, by turning on the reset transistor 126, the potential of each floating diffusion layer 118 is reset, and the black level is read out. Thereafter, the photoelectrons held by the photoelectron holding unit 114 of the photoelectron distribution unit 106 b are transferred to the floating diffusion layer 118, and the signal level QV _A corresponding to the number of photoelectrons Q _A existing in the floating diffusion layer 118 is changed to the signal readout line 132. Read from. Calculating unit 16 subtracts the black level from the signal level QV _A corresponding to photoelectrons number Q _A photoelectron hold unit 114 of the photoelectron distributor 106b is held, for removing reset noise. The signal level QV _A of the reset noise is removed is referred to as a voltage signal QV' _A.

Then, by turning on the reset transistor 126, the potential of each floating diffusion layer 118 is reset, and the black level is read out. Thereafter, the photoelectrons held by the photoelectron holding unit 114 of the photoelectron distribution unit 106 c are transferred to the floating diffusion layer 118, and the signal level QV _CB corresponding to the number of photoelectrons Q _CB existing in the floating diffusion layer 118 is changed to the signal readout line 132. Read from. The calculation unit 16 removes the reset noise by subtracting the black level from the signal level QV _CB corresponding to the number of photoelectrons Q _CB held by the photoelectron holding unit 114 of the photoelectron sorting unit 106c. The signal level _{QV CB} that the reset noise is removed is referred to as a voltage signal _{QV' CB.}

Finally, by turning on the reset transistor 126, the potential of each floating diffusion layer 118 is reset, and the black level is read out. Thereafter, the photoelectrons held by the photoelectron holding unit 114 of the photoelectron sorting unit 106d are transferred to the floating diffusion layer 118, and the signal level QV _CA corresponding to the number of photoelectrons Q _CA existing in the floating diffusion layer 118 is changed to the signal readout line 132. Read from. The calculating unit 16 removes the reset noise by subtracting the black level from the signal level QV _CA corresponding to the number of photoelectrons Q _CA held by the photoelectron holding unit 114 of the photoelectron sorting unit 106d. The signal level _{QV CA} that the reset noise is removed is referred to as a voltage signal _{QV' CA.}

The arithmetic unit 16 uses the voltage signals _{QV' B, QV' A, QV' CB} , the _{QV' CA,} calculates the distance Z to the ranging object W. The distance Z to the object to be measured W is determined based on the number of photoelectrons Q _b , Q _a , Q _cb , and Q _ca in the relational expression (2) described above using the voltage signals QV ′ _B , QV ′ _A , QV ′ _CB , and QV ′, respectively. It can be obtained by replacing with _CA.

  Here, as shown in FIGS. 7 and 8, since the photoelectron holding unit 114 must hold the photoelectrons generated in the light receiving period P until the signal level QV corresponding to the number of photoelectrons Q is read, the signal level QV The high gate drive signal voltage Sc continues to be supplied to the photoelectron holding unit 114 until. However, when the high gate drive signal voltage Sc is applied to the holding gate 122, the width of the depletion layer formed under the holding gate 122 increases. Generation of electrons in the depletion layer and penetration into the depletion layer due to diffusion of electrons generated in the substrate other than the depletion layer cause dark current, so if the depletion layer width is large, dark current is likely to occur. .

  Hereinafter, a driving method of the photoelectron holding unit 114 for suppressing generation of dark current will be described. FIG. 11 is a diagram illustrating an example of a timing chart of the gate drive signal voltage Sc applied to the holding gate 122 of the photoelectron holding unit 114 of the photoelectron distributing units 106a, 106b, 106c, and 106d in order to suppress the generation of dark current. It is.

  As shown in FIG. 11, during the third light receiving period P3 (when the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106c), the holding gate of the photoelectron sorting unit 106c. When the gate drive signal voltage Sc3 applied to 122 is set to high (first voltage value) and it is outside the third light receiving period P3 (when the photoelectron distribution unit 106c is simply holding photoelectrons without being transferred) ), The gate drive signal voltage Sc3 applied to the holding gate 122 of the photoelectron distributing unit 106c is set to an intermediate value (second voltage value). The second voltage value is a voltage value that is larger than the low voltage value (reference voltage value) and lower than the first voltage value.

  During the fourth light receiving period P4 (when the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106d), a gate drive signal applied to the holding gate 122 of the photoelectron sorting unit 106d When the voltage Sc4 is set to high (first voltage value) and it is outside the fourth light receiving period P4 (when the photoelectrons are not transferred and the photoelectron distributor 106d is simply holding the photoelectrons), the photoelectron distributor 106d The gate drive signal voltage Sc4 applied to the holding gate 122 is set to an intermediate value (second voltage value).

  During the first light receiving period P1 (when the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106a), a gate drive signal applied to the holding gate 122 of the photoelectron sorting unit 106a When the voltage Sc1 is set high (first voltage value) and it is outside the first light receiving period P1 (when the photoelectrons are not transferred and the photoelectron distributor 106a is simply holding the photoelectrons), the photoelectron distributor 106a The gate drive signal voltage Sc1 applied to the holding gate 122 is set to an intermediate value (second voltage value).

  During the second light receiving period P2 (when the photoelectrons generated by the photoelectric conversion element 104 are transferred to the photoelectron holding unit 114 of the photoelectron sorting unit 106b), a gate drive signal applied to the holding gate 122 of the photoelectron sorting unit 106b When the voltage Sc2 is set high (first voltage value) and it is outside the second light receiving period P2 (when the photoelectron sorting unit 106b is simply holding the photoelectron without being transferred), the photoelectron sorting unit 106b The gate drive signal voltage Sc2 applied to the holding gate 122 is set to an intermediate value (second voltage value).

  12A shows an example of a potential diagram of the photoelectron holding unit 114 in the light receiving period P (specifically, a period other than the remaining photoelectron transfer period in the first light receiving period P1), and FIG. 12B shows a period other than the light receiving period P. 2 shows an example of a potential diagram of the photoelectron holding unit 114 in FIG.

  As shown in FIGS. 12A and 12B, during the light receiving period P, the depth of the potential well formed under the holding gate 122 of the photoelectron holding part 114 becomes deep, and the photoelectron holding part 114 in a period other than the light receiving period P. The width of the depletion layer formed under the holding gate 122 is reduced. As described above, in the light receiving period P, the depth of the potential well formed under the holding gate 122 of the photoelectron holding unit 114 becomes deep, so that the electric field between the photoelectric conversion element and the photoelectron holding unit can be increased. In addition to being able to transfer photoelectrons from the photoelectric conversion element 104 to the photoelectron holding unit 114 at high speed, the width of the depletion layer formed under the holding gate 122 of the photoelectron holding unit 114 is small during periods other than the light receiving period P. Therefore, the generation of dark current can be suppressed.

  The second voltage value may be a voltage value that prevents the photoelectrons held by the photoelectron holding unit 114 from overflowing. In addition, since the photoelectrons generated in the light receiving period P of each cycle are transferred to the photoelectron holding unit 114 of each photoelectron distribution unit 106, the photoelectrons held by the photoelectron holding unit 114 each time this one cycle is repeated. The number will increase. Therefore, the second voltage value may be initially reduced, and the second voltage value may be gradually increased as the number of repetitions of one cycle increases. Thereby, expansion of the saturation charge amount and generation of dark current can be suppressed.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

DESCRIPTION OF SYMBOLS 10 ... Ranging system 12 ... Irradiation device 14 ... Imaging part 16 ... Calculation part 18 ... Control part 20 ... Power supply 28 ... Solid-state imaging device 30 ... Unit pixel 32 ... Pixel array 34 ... Pixel drive circuit 42 ... Gate drive circuit 102 ... p Type semiconductor substrate 104 ... photoelectric conversion element
106, 106 a, 106 b, 106 c, 106 d... Photoelectron distribution unit 108, 108 a, 108 b... Photoelectron discharge unit 110... Photogate 112 ... 1st transfer unit 114. ... first transfer gate 122 ... hold gate 124 ... second transfer gate 126 ... reset transistor 127 ... reset gate 130 ... signal read transistor 131 ... signal read gate 132 ... signal read line 134 ... select transistor 135 ... select Gate 140 ... Third transfer unit 142 ... Diffusion layer 144 ... Third transfer gates 146a, 146b, 146c, 146d ... Transfer path

Claims (5)

A pixel driving device that drives a unit pixel having a photoelectric conversion element that generates photoelectrons according to the amount of light incident during a light receiving period,
The unit pixel includes a plurality of photoelectron distributing units that distribute photoelectrons generated by the photoelectric conversion element,
The photoelectron distribution unit includes a first transfer unit for transferring photoelectrons converted by the photoelectric conversion element, and a photoelectron holding unit for temporarily holding photoelectrons transferred from the first transfer unit,
There are a plurality of light receiving periods, and a gate drive signal voltage is applied to the gates of the first transfer unit and the photoelectron holding unit of the plurality of photoelectron distributing units, and the photoelectric conversion element is generated for each light receiving period. By distributing and transferring the photoelectrons to each of the photoelectron holding units, the photoelectrons generated in the plurality of light receiving periods are added and held in each of the photoelectron holding units, and the photoelectrons are transferred to the photoelectron holding unit. In this case, a gate drive signal voltage having a first voltage value higher than a reference voltage value is applied to the gate of the photoelectron holding unit to which photoelectrons are transferred, and the photoelectrons are not transferred to the photoelectron holding unit. When holding photoelectrons, a gate drive signal voltage having a second voltage value lower than the first voltage value and higher than the reference voltage value is applied to the gate of the photoelectron holding unit. Drive device. The pixel driving apparatus according to claim 1,
Each time the photoelectron generated by the photoelectric conversion element is distributed to each photoelectron holding unit and transferred for each light receiving period, the second of the gate drive signal voltage applied to the photoelectron holding unit to which photoelectrons are transferred. A pixel driving device characterized by increasing a voltage value. The pixel driving device according to claim 1, wherein:
The unit pixel includes a photoelectron discharge unit that discharges photoelectrons generated by the photoelectric conversion element,
The photoelectron distribution unit includes a second transfer unit that transfers photoelectrons held by the photoelectron holding unit, and a floating diffusion layer for reading a voltage signal corresponding to the photoelectrons transferred by the second transfer unit. ,
A reset transistor for resetting the potential of the floating diffusion layer to a reference potential is connected to the floating diffusion layer,
By applying a gate drive signal voltage to the gate of the photoelectron discharge unit, the photoelectrons generated by the photoelectric conversion element in a period other than the light receiving period are discharged,
Before the second transfer unit transfers the photoelectrons held in the photoelectron holding unit to the floating diffusion layer, a reset signal is applied to the gate of the reset transistor so that the potential of the floating diffusion layer becomes the reference potential. A pixel driver characterized by resetting. The pixel driving device according to claim 3,
The photoelectric conversion element is formed by a photogate structure,
The pixel transfer device, wherein the first transfer unit, the photoelectron holding unit, and the second transfer unit are formed with a MOS diode structure. A pixel driving method for driving a unit pixel having a photoelectric conversion element that generates photoelectrons according to the amount of light incident during a light receiving period,
The unit pixel includes a plurality of photoelectron distributing units that distribute photoelectrons generated by the photoelectric conversion element,
The photoelectron distribution unit includes a first transfer unit for transferring photoelectrons converted by the photoelectric conversion element, and a photoelectron holding unit for temporarily holding photoelectrons transferred from the first transfer unit,
There are a plurality of light receiving periods, and a gate drive signal voltage is applied to the gates of the first transfer unit and the photoelectron holding unit of the plurality of photoelectron distributing units, and the photoelectric conversion element is generated for each light receiving period. By distributing and transferring the photoelectrons to each of the photoelectron holding units, the photoelectrons generated in the plurality of light receiving periods are added and held in each of the photoelectron holding units, and the photoelectrons are transferred to the photoelectron holding unit. In this case, a gate drive signal voltage having a first voltage value higher than a reference voltage value is applied to the gate of the photoelectron holding unit to which photoelectrons are transferred, and the photoelectrons are not transferred to the photoelectron holding unit. When holding photoelectrons, a gate drive signal voltage having a second voltage value lower than the first voltage value and higher than the reference voltage value is applied to the gate of the photoelectron holding unit. Driving method.

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