JP2013115594A - Power amplifier and amplification control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power amplifier in which back-off is minimized and a C/N is improved, and a signal peak level adjusting method thereof.SOLUTION: CCDF of input/output of a CFR section 1, output of a DPD section 2 and loop-back signal of a signal outputted to an antenna is measured by CCDF monitoring sections 11, 13, 22, 24, respectively, and a peak setting section 14 and a peak adjusting section 12 are controlled in such a manner that PAPR of the CCDF measured by the CCDF monitoring section 24 is prevented from becoming narrower than that of the CCDF monitoring section 13.

Description

  Embodiments described herein relate generally to a power amplifier and an amplification control method for a radio transmission station such as mobile communication.

  In recent years, OFDM modulation systems adopted in mobile broadband systems such as LTE and mobile communication typified by WiMAX have a strong resistance to interference, and thus greatly contribute to improving the capacity of receiving terminals. On the other hand, the increase in the peak signal level (PAPR: Peak to Average Power Ratio) relative to the average signal level due to the combination of a plurality of subcarriers requires a high linearity in the power amplifier of the base station transmitter. Power consumption is increased.

  In the non-linear region at the time of high output of the power amplifier, the signal level is lowered or clipped, and the linearity is lowered. For this reason, a function (CFR: Crest Factor Reduction) that suppresses the peak signal level input to the power amplifier in advance is installed and combined with DPD (Digital Pre-distortion) processing to compensate for power amplifier distortion. A technique for improving efficiency and ensuring linearity has been born (for example, Patent Document 1).

  In DPD processing, in order to estimate the non-linear characteristic generated in the power amplifier and output the inverse characteristic thereof, it is common to correct and input a digital signal having a higher peak than the input signal.

  For this reason, the peak level output from the DPD processing circuit becomes higher as the nonlinear characteristic of the power amplifier becomes stronger, so the back-off amount is set so as not to exceed the maximum value at which the output signal is not saturated (hereinafter referred to as 0 dBFS). .

  This back-off amount is determined including the linearity and gain fluctuations of the PAPR and power amplifier, and the design margin taking into account variations during mass production and environmental fluctuation factors, and is often an excess margin with respect to 0 dBFS. It was.

  When the margin is increased, the digital circuit section consumes a bit number corresponding to the signal dynamic range corresponding to the margin at a low signal level. As a result, the C / N deteriorates, and a barometer for measuring the quality of the base station transmitter. There is a problem of deteriorating certain EVM (Error Vector Magnitude) characteristics.

JP 2010-166454 A

  The conventional power amplifier has a problem that the effective bit number of digital processing is consumed from the margin caused by providing a back-off for the peak output and the C / N deteriorates.

  The problem to be solved by the present invention is to provide a power amplifier with good C / N that minimizes back-off and its signal peak level adjusting method.

  In order to achieve the above object, the power amplifier according to the present embodiment includes CFR means for limiting the peak level of the input signal of the high-speed digital modulation signal and DPD means for applying DPD to the level-limited signal. A power amplifier for amplifying power of the input signal, wherein control information for limiting a peak value is input, and the peak level of the high-speed digital modulation signal is limited and output in accordance therewith, and output from the CFR means The DPD means for inputting the compensation information for applying the DPD to the input signal and outputting it, or applying the compensation information for adjusting the DPD to be applied, and further outputting the DPD, and the signal subjected to the DPD Is input, and the final stage amplifier that amplifies and outputs the input signal, the input of the CFR means, the output, the output of the DPD means, The CCDF monitor means for outputting the result of measuring each CCDF of the output of the final stage amplification unit as data plotted using PAPR as a parameter, and the plotted data are input, and the input plot data is input to the final data. Output at least one of control information for limiting the peak cut level cut by the CFR means and compensation information for adjusting the DPD applied by the DPD means, compared with the plot data of the output of the stage amplification unit And a control means for controlling the level of the signal input to the final stage amplifying unit.

  The power amplifier amplification control method according to the present invention includes a CFR means to which a high-speed digital modulation signal is input, a CCDF monitor means, a DPD means for applying DPD to a signal output from the CFR means, and a final stage amplification section. And a control means, wherein the CFR means controls the high-speed digital modulation signal according to control information for limiting a peak value input from the control means. The DPD means to which the signal output from the CFR means is input is output by applying DPD to the input signal, or input from the control means and the In accordance with compensation information for adjusting the DPD to be applied, the DPD is further output after being output, and the final stage amplification unit to which the signal subjected to the DPD is input is The input signal is amplified and output, and the CCDF monitoring means measures the CCDF of the input and output of the CFR means, the output of the DPD means, and the output of the final stage amplifying unit. Each of which is output as data plotted with PAPR as a parameter, and the control means to which each of the plotted data is input compares each of the input plot data with the plot data of the output of the final stage amplification unit, A signal input to the final stage amplification unit by outputting at least one of control information for limiting the peak cut level cut by the CFR means and compensation information for adjusting the DPD by the DPD means. It is characterized by controlling the level.

The functional block diagram explaining operation | movement of the power amplifier concerning this embodiment. The conceptual diagram which shows the relationship between the margin of an output signal, and the number of digital bits. The CCDF measurement example of the power amplifier concerning this embodiment. The flowchart explaining the processing procedure of the peak level adjustment of the power amplifier concerning this embodiment. The figure explaining the relationship between CCDF and the maximum output of the power amplifier of this embodiment. The figure explaining the operation level setting conditions of the power amplifier of this embodiment. The figure explaining the change of CCDF. The figure which shows the input-output characteristic at the time of the gain change of the last stage amplifier of this embodiment. The figure which shows the relationship of the gain fluctuation | variation of the last stage amplifier of this embodiment, and CCDF. The figure which shows the input-output characteristic at the time of the gain shift of the final stage amplification part of this embodiment. The figure which shows the correction | amendment at the time of the gain fall shift of the final stage amplifier of this embodiment. The figure which shows the example of a response | compatibility in the case of observing and correcting CCDF of a present Example.

  A power amplifier according to an embodiment will be described below with reference to the drawings.

FIG. 1 is a functional block diagram for explaining the operation of the power amplifier according to the present embodiment.
In FIG. 1, the power amplifier PA receives a high-speed digital modulation signal and adjusts the peak level to a predetermined value (hereinafter referred to as peak processing). The signals subjected to peak processing by the CFR unit 1 and the CFR unit 1 DPD unit 2 that performs input and DPD processing, D / A (digital / analog conversion unit) 3 that converts a DPD-processed digital signal into an analog signal in the IF band, and converts the IF band signal into an RF signal of a transmission radio wave Mixer 4, final stage amplifier 5, antenna 6, coupler 61 that extracts a part of the RF signal as a loopback signal, mixer 41 that converts the loopback signal into an IF band signal, and A / D conversion of the IF band signal And an A / D (analog / digital converter) 31.

  The CFR unit 1 includes a CCDF monitor unit 11 that monitors a CCDF (Complementary Cumulative Distribution Function) of a high-speed digital modulation signal such as an input OFDM modulation signal, a peak setting unit 14 that generates peak setting information from a loopback signal, A peak adjustment unit 12 that adjusts the peak value of the digital modulation signal to a predetermined level in accordance with the peak setting information that is input therefrom, and a CCDF monitor unit 13 that monitors the CCDF of the peak-adjusted signal.

  The DPD unit 2 includes a DPD correction unit 21 that performs DPD on the digital modulation signal output from the CFR unit 1 according to a predetermined procedure, a CCDF monitor unit 22 that monitors the CCDF of the signal subjected to DPD, and an IF band A CCDF monitor unit 24 that monitors the CCDF of the loopback signal, and a DPD signal estimation unit 23 that estimates a required DPD amount from the loopback signal and outputs data for performing the estimated DPD correction to the DPD correction unit 21. I have.

  The CFR unit 1 and the DPD unit 2 are configured by one or a plurality of FPGAs (Field Programmable Gate Arrays) or digital processing circuits such as LSIs. Further, there is a CPU (control processing unit) 7 that supervises and controls each component that performs these functions and operations.

  First, the basic operation of the power amplifier PA of this embodiment will be described. Initially, a digital modulation signal not subjected to peak processing is input from the CFR unit 1 to the DPD correction unit 21. The DPD estimation unit 23 refers to an internal LUT (Look Up Table) (not shown) with respect to this input signal, performs the necessary DPD distortion correction, and takes in the loopback signal from the final stage amplification unit 5. Implement DPD with additional compensation to minimize input / output differences.

  The loopback signal is input to the CCDF monitor 24 and the peak setting unit 14. When a loopback signal having a level higher than a preset level is input, the peak setting unit 14 performs peak cutting by CFR processing so that the level is suppressed and the output of the final stage amplification unit 5 is not saturated. The peak setting unit 14 monitors the loopback signal and outputs a signal for limiting the level of the input signal to the peak adjustment unit 12 when the output of the final stage amplification unit 5 is likely to be saturated. As a result, since the output margin can be minimized, all the bits in the digital processing can be used without waste, so that digital signal processing can be performed to a low level to improve C / N.

FIG. 2 is a conceptual diagram showing the relationship between the margin of the output signal and the number of bits processed in digital signal processing.
In the power amplifier, when the back-off is taken in order to prevent output saturation, m bits are consumed with respect to the maximum amplitude as a margin as shown in FIG. As a result, the effective bit number is only 16-m bits when, for example, 16-bit processing is performed. In terms of the signal waveform, as shown in FIG. 2 (b1), equivalently, the noise level at a signal level lower by m bits is the same, and C / N is deteriorated.

  Therefore, if the peak level, that is, the maximum amplitude is limited using the CFR as in this embodiment, and the limited maximum amplitude value is matched with the MSB (Most Significant Bit) of the digital processing, the digital processing is performed. Since the 16-bit full scale can be used for the number of bits, the noise level is lowered to a low signal level LSB (Least Significant Bit). In other words, the use of CFR not only suppresses peak saturation, but also enables processing up to a low signal level, so that C / N can be improved (see FIG. 2 (a2) and FIG. 2 (b2)).

Next, the operation for monitoring the CCDF to further improve the C / N will be described.
FIG. 3 is a diagram for explaining the relationship between CCDF and PAPR in a CCDF measurement example of the power amplifier in this embodiment, and FIG. 4 is a flowchart for explaining a processing procedure for performing CCDF measurement and adjusting a peak level.
Hereinafter, the procedure for controlling the CFR will be described with reference to FIGS.
In general, the CCDF characteristic is often drawn as a distribution of the peak signal level with respect to the average signal power. The power amplifier PA shown in FIG. 1 has a CCDF monitor unit that outputs the input and output of the peak adjustment unit 12, the output of the DPD correction unit 21, and the loopback signal from the final stage amplification unit 5 digitally converted by the A / D 31. 11, 13, 22, and 24 (step s1).

  The CCDF (power complementary cumulative distribution function) curve measured by each CCDF monitor is a measurement curve for high-level power statistics of a digital modulation signal. The measurement curve is defined as the time when the waveform is above a predetermined power level, and the ratio of the time when the signal is above the predetermined level is defined as the probability of the specific power level. In the signal processing for statistically measuring the CCDF power, the input signal within the channel bandwidth is sampled by digital signal processing using an FPGA or the like, the arithmetic processing is performed, and the CCDF measurement data is plotted as curve data as shown in FIG. The data plot result is transmitted from each CCDF monitor to the CPU 7 via a data bus (not shown). The CPU 7 controls operations performed by the peak setting unit 14 and the DPD estimation unit 23 in FIG.

  In FIG. 3, the measurement at the CCDF monitor 11 at the input portion of the CFR is as shown by a curve ci, and at the CCDF monitor 13 at the output portion of the CFR is a curve co. The curve co falls inside (left) from the curve ci by the peak cut by the CFR process. The CPU 7 stores both the curves as reference data in the internal memory (step s2).

  After the DPD correction by the CCDF monitors 22 and 24 and the CCDF of the digital modulation signal as the transmission radio wave are measured in the same manner, the CPU 7 shows the measurement result of the output part of the DPD2 and the loopback signal as the curve ci, the curve Compare with the data of co (step s3).

  If, for example, the measurement curve of the loopback signal is not further inside than the curve co as in the curve CX in FIG. 3B compared with the curve co (No in step s4) (here, CCDF This is a situation where appropriate CFR and DPD are applied and an appropriate digital processing unit output is obtained.

  Note that an ideal state is obtained when the curve CX is between the curve ci and the curve co. For example, the measurement curve in the CCDF monitor unit 22 may approach the curve ci by the DPD process with respect to the influence or saturation of the peak clipped in the CFR unit 1.

  If the measurement curve of the CCDF monitor unit 24 is inside the curve co as shown by the curve CZ in FIG. 3C (Yes in step s4), the CPU 7 has a high output level of the digital signal processing unit and a peak is present. The CPU 7, that is, the peak setting unit 14 determines that there is a possibility that the set maximum value 0 dBFS may be exceeded, and sets the peak limit level to the peak adjustment unit 12 in order to keep the input level to the D / A 3 low. A signal for instructing CFR to be reduced (step s5) is output. In addition, the DPD estimation unit 23 instructs the DPD correction unit 21 to reduce the correction gain amount or to reduce the average output level such as changing the reference output level of the modulation signal.

  In addition, when the measurement curve in the CCDF monitor unit 24 is outside (right) from the curve ci (step s4 is No. Step s6 is Yes), that is, when the PAPR increases, the CPU 7 corrects it. The average output level is raised (step s7). As a cause, there is a possibility that a margin is generated, the gain of the final stage amplifier 5 is changed, DPD is excessively performed, or a combination thereof. The CFR peak cut level is adjusted or the DPD is corrected so that the measurement curve of the CCDF monitor unit 24 is located inside the curve ci.

  Hereinafter, the corresponding method will be described.

  FIG. 5 is a diagram for explaining the relationship between the CCDF of the power amplifier PA and the maximum output, and FIG. 6 is a diagram for explaining the operating level setting conditions of the power amplifier PA.

  In FIG. 6, it is assumed that the margin for the maximum output from the power amplifier PA is 1 dB. Here, when the point at which the output level of the final stage amplifier 5 decreases by 1 dB is P1 dB and P1 dB = 10 dB, if the input signal to the power amplifier PA is PAPR ≦ 11 dB, the output does not exceed P1 dB.

  Therefore, in FIG. 5, the output signal indicated by the curve CCDF may be controlled within the range of PAPR ≦ 11 dB. It can be seen that the CCDF monitor curve Cq at this time has a peak point on the left side of P1 dB (dotted line). Since PAPR ≦ 11 dB in the D / A3 output at this time, the maximum C / N in D / A3 can be obtained by setting the average level of the signal at the point of 11 dB backoff from 0 dBFS shown in FIG. it can.

  In FIG. 6, the curve of the uncorrected characteristic c2 that descends to the right is the input / output characteristic of the final amplifier 5 itself. Further, the curve of the DAC output c1 is an input / output characteristic curve subjected to DPD for correcting the above-described downward slope. By this correction, the input / output remains linear until the MSB, that is, 0 dBFS, and has a margin of 1 dB.

FIG. 7 is a diagram for explaining changes in the CCDF.
When the CCDF monitor curve is on the right side of P1 dB due to the following reasons as indicated by the dotted line in FIG. 7, it is considered that the signal is deteriorated. By setting the peak of CFR using the following control function, it is possible to optimize the DAC output level and realize an optimum C / N.

  Case 1. The PAPR of the input signal (input monitor signal ci) is larger than the assumed value.

  When the PAPR of the input signal is larger than the assumed value, the peak adjusting unit 12 of the CFR unit 1 has a characteristic that the cut threshold is gentle, so that the output signal (output monitor signal co) of the CFR unit 1 does not completely cut the peak. May increase the PAPR.

  The reason is that the signal characteristics input from the mobile communication base station are considered to increase in randomness and approach the Gaussian characteristics as the number of connected terminals increases, but in rare cases, a signal with a certain correlation is born and the peak increases. It is thought that there may be cases. In this case, the peak level of the signal exceeding the assumed cut level exceeds the original P1 dB.

  The CPU 7 constantly monitors the average and peak of the input signals, that is, the signal ci of the CCDF monitor 11, the signal co of the CCDF monitor unit 13, and the CCDF monitor signal cq of the CCDF monitor unit 24. The CPU 7 monitors whether the curve of the CCDF monitor signal cq is inside the signal ci and does not exceed PA1 dB.

  Although the value of PAPR does not change greatly in normal operation, the CPU 7 continuously monitors the state of the signal ci of the CCDF monitor 11 and compares it with the PAPR of the signal ci assumed in advance. For example, if the average is checked at intervals of about 1 minute and continues to become larger than the standard value, control is performed to lower the peak cut level. That is, when the estimated value is exceeded, the peak setting unit 14 controls the peak adjusting unit 12 to lower the peak cut level so that the peak value of the input signal to the D / A 3 is adjusted so as not to exceed the P1 dB equivalent value. I can do it.

  In addition, the CPU 7 may check the PAPR in the CCDF monitor unit 13 and similarly reduce the peak cut level when the PAPR does not decrease and there is no compression effect of the expected value as compared with ci. Further, if the PAPR of the signal ci or the PAPR in the CCDF monitor unit 13 becomes the intended one, the CPU 7 performs processing for returning the level lower than the default peak cut level to the original default peak cut level. Do.

  Case 2. When the gain of the final stage amplifier 5 (power amplifier PA) changes.

FIG. 8 is a diagram showing input / output characteristics when the gain of the final stage amplifying unit 5 is changed, and FIG. 9 is a diagram showing a relationship between gain fluctuation and CCDF.
In FIG. 8, when the gain of the final stage amplifying unit 5 is decreased, it is indicated by the gain decrease Gd of the input / output curve. When the output saturation level does not change, the input / output characteristics have a gentle slope when the gain decreases. As in FIG. 9, the shift is to the right. On the other hand, when the gain is increased, the slope becomes steep and shifts to the left.

  Here, a method of applying the second compensation type DPD for monitoring the CCDF and compensating for the gain change will be described. When the CCDF of the input signal and output signal of the final stage amplifying unit 5 are monitored, when the gain is lowered as shown in FIG. 9, the CCDF monitor curve in the CCDF monitor unit 24 is the CCDF curve in the CDF monitor unit 22 or in advance. The curve shifts to the right as shown by the curve of the gain reduction Gd rather than the curve of the reference gain Ga assumed as the standard state. The CPU 7 detects that the gain of the final stage amplifying unit 5 is reduced by comparing both the CCDF curves. (Needless to say, the opposite is true when gain increases.

  As shown in FIG. 8A, when the gain is lowered, the input / output curve of the final stage amplifying unit 5 has a gentle slope, and the saturation point moves to the right (when the input is larger). In other words, P1 dB is also shifted to the right. When the CPU 7 determines that the gain of the CCDF monitor curve being monitored is decreasing, the CPU 7 corrects the table of the DPD estimation unit 23 by increasing the gain as indicated by the dotted line of the gain decrease correction gradient Gdc. .

  However, if the inclination correction is simply performed so as to be symmetric with respect to the standard input / output characteristics, a digital signal corresponding to 0 dBFS is input to D / A 3 with a lower level input than in the standard state. Since the original high-level input signal does not increase even before the final stage amplifier 5 is saturated, the dynamic range of the power amplifier as a whole is lowered.

  As a countermeasure, DPD correction, such as a gain reduction correction gradient Gdc1 represented by a dotted line in FIG. 8B, is performed until a digital signal corresponding to 0 dBFS is obtained up to an input signal level corresponding to PA1 dB of the reference gain (standard state). DPD correction is performed with the inclination suppressed and the correction amount suppressed so as not to be input to D / A3.

  As another correction method, as shown by a one-dot broken line in the gain reduction correction gradient Gdc2 in FIG. 8B, the inclination is corrected to be small at a low input level, and the gain reduction correction gradient Gdc is equal to or higher than a certain level. Correction is performed by tilting, and the correction characteristic is further shifted to the right (or lower), and DPD correction is performed so that the input level at which the output becomes 0 dBFS is the same as the reference gain (bias is added).

  That is, the CPU 7 extracts the difference between the CCDF monitor unit 22 and the CCDF monitor unit 24, reads correction data (table) corresponding to the difference from the DPD estimation unit 23, and outputs it to the DPD correction unit 21 to further output the DPD. To compensate. As a result, the average output level rises, and the curve (peak level) corresponding to the CCDF monitor cq in FIG. 5 comes inside the dotted line of P1 dB.

  As a result, it is possible to maintain an appropriate backoff between the output maximum value MSB corresponding to the input level and the saturation maximum output, and it is possible to maintain a predetermined C / N.

  As a result, the CCDF characteristics are monitored and the input / output characteristics are shifted to the left so that the peak bell falls within P1 dB.

The gain up and down is purely expressed by this change in slope, but in reality, the slope changes at low signal level input as described later, and near the saturation point where the output is large from the middle level, rather than the change in slope. There are cases where the input / output characteristics shift in parallel. It is effective not only to perform gain correction by this DPD but also to supplementarily perform peak cut so that the peak bell falls within P1 dB.

Case 3. When P1 dB of the final stage amplifier 5 changes. (When the saturation start point changes.)
FIG. 10 is a diagram illustrating input / output characteristics when the gain of the final-stage amplifier according to the present embodiment is shifted downward, and FIG. 11 is a diagram for explaining the correction.
In this case, as shown in FIG. 10, the CCDF monitor curve may shift to the right beyond the P1 dB line in the same way as when the gain decreases due to temperature or other fluctuations in the linearity of the final amplifier 5 (gain). When increasing, shift opposite to the above.)

  The gain changes due to fluctuations in the operating bias at low signal levels, and becomes a reference gain at medium and higher levels, but the output saturation level is the same at high level inputs, but the saturation start point (P1 dB) fluctuates left and right in the same way when the gain changes. To do.

  Similar to the curve of the variation characteristic cd of the CCDF characteristic in FIG. 7, the input / output characteristic before DPD compensation is shifted to the right side of the original characteristic as indicated by the variation characteristic Xd in FIG. Since this state is similar to the case where the gain is apparently lowered, it is conceivable that the CPU first applies gain correction by DPD.

  When the DPD unit 2 performs compensation type DPD such as monitoring the output level of the final stage amplification unit 5 (not shown) as in the case 2, the output level is lower than the input level, so that the apparent gain is obtained. Since the same correction is performed as when the value decreases, excessive processing is performed.

  In FIG. 11A, when the input / output characteristic shifts to the right as in the curve of the fluctuation characteristic Xd, when the gain correction is simply performed by the DPD unit 2, the compensation input / output characteristic indicated by the shift correction curve Xd is obtained. . As a result, the signal input to D / A 3 is input as a level larger than the original level.

That is, even if the digital modulation signal input to the power amplifier PA is the same input, the D / A 3 has a large amplification factor and reaches 0 dBFS earlier, so that the output is also clipped earlier.

  In order to prevent this, in this correction method, the signal input level to the final stage amplifier 5 is suppressed by lowering the peak cut level in order to weaken or cancel the compensation of the previous DPD.

  In this case, the CPU 7 monitors the output, that is, the CCDF monitor signal of the signal fed back from the CCDF monitor unit 24, and inputs the information to the CFR control unit 1 so that the PAPR of the CCDF monitor unit 24 does not exceed the assumed value. Like that. That is, the peak cut level is lowered by controlling the peak setting unit 14 and the peak adjustment unit 12.

  As a countermeasure against this shift, a standard curve may be determined in advance for the CCDF curve of the CCDF monitor unit 13, and the CPU 7 may adjust the CFR (peak cut level) so as to approach the standard curve. Furthermore, a standard curve may be determined in advance for the CCDF curve of the CCDF monitor unit 22, and the CPU 7 may approach the standard curve. Combining these processes enables more accurate peak cut processing and DPD compensation.

  As a result, it is possible to prevent the DPD unit 2 from performing excessive correction and clipping the output signal of the D / A3, and it is possible to secure an optimum C / N at the D / A3 output.

  In addition, the adjustment of the DPD of the case 2 is supplementarily performed because the input level of 0 dBFS can be prevented from being lowered if the compensation amount of the DPD is suppressed as shown in FIG. You may do it. Further, in both cases 2 and 3, this is a method for dealing with gain fluctuations such as the inclination of the final stage amplifier 5 or the shift.

  Further, when performing DPD compensation in case 2 where the gain is reduced, if the CCDF curve of the output of the final stage amplifier 5 further spreads outward, control is performed to give priority to the peak level cut in case 3 instead of giving priority to DPD compensation. A method such as that performed by the CPU 7 may be combined.

  Whether the CCDF correction method is DPD or peak cut is determined by the characteristics of the final stage amplifier, and therefore, the magnitude and pattern of the change in each CCDF monitor are stored in advance in, for example, the DPD estimation unit as a reference. Further, by setting a correction method corresponding to the pattern in advance by a program executed by the CPU 7, more ideal compensation is possible.

  Further, in the case where the gain in FIGS. 8A and 11B increases, the detailed description is omitted because it is only necessary to consider the reverse operation of the above description, but DPD compensation is 0 dBFS. Therefore, the dynamic range of the digital processing part can be secured stably. Whether to prioritize peak cut or DPD compensation in response to gain amplification, it is preferable to set a correction method in advance by a program executed by the CPU 7 corresponding to the pattern as in the case of gain reduction.

FIG. 12 is a diagram showing an example of correspondence when observing and correcting the CCDF of the present embodiment.
The CPU 7 observes each CCDF monitor value described above, and compares and collates in advance with the CCDF pattern corresponding to each case, and selects and determines which countermeasure is taken.

  According to the power amplifier of at least one embodiment described above, the CCDF monitoring means is provided in the path from the input to the output of the amplifier circuit, and the difference between the CCDF at each point and the expected backoff value is compared. By having the peak value control means for eliminating the above, it becomes possible to improve the C / N of the signal output from the power amplifier.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the equivalents thereof.

DESCRIPTION OF SYMBOLS 1 CFR part 11, 13, 22, 24 CCDF monitor part 12 Peak adjustment part 14 Peak setting part 2 DPD part 21 DPD correction part 23 DPD estimation part 25 ACLR monitor part 3 D / A (digital / analog conversion part)
31 A / D (analog / digital converter)
4, 41 Mixer 5 Final amplifier 6 Antenna 61 Coupler 7 CPU

Claims (4)

In a power amplifier that includes CFR means for limiting and outputting a peak level of an input signal of a high-speed digital modulation signal, and DPD means for performing DPD on the level-limited signal, and amplifies the input signal.
CFR means for inputting control information for limiting the peak value, and limiting and outputting the peak level of the high-speed digital modulation signal according to the control information;
DPD means for inputting a signal output from the CFR means and applying the DPD to the input signal for output, or inputting compensation information for adjusting the applied DPD and further applying the DPD for output;
A final stage amplification unit that receives the signal subjected to the DPD, amplifies the power of the input signal, and outputs the amplified signal;
CCDF monitoring means for outputting the results obtained by measuring each CCDF of the input and output of the CFR means, the output of the DPD means, and the output of the final stage amplification section as data plotted using PAPR as a parameter,
The plotted data is input, and the input plot data is compared with the plot data of the output of the final stage amplifying unit. The control information for limiting the peak cut level cut by the CFR means and the DPD means A power amplifier comprising: control means for controlling the level of a signal input to the final stage amplification unit by outputting at least one of compensation information for adjusting DPD to be applied. The control means includes
If the plot data at the output of the final stage amplifying unit is compared with the plot data at the output of the DPD means, and if it is outside the latter, control information that lowers the peak level so that it does not go outside 2. The power amplifier according to claim 1, wherein either one of compensation information for adjusting the applied DPD so as to increase a gain is output. CFR means to which a high-speed digital modulation signal is input, CCDF monitor means, DPD means for applying DPD to the signal output from the CFR means, a final stage amplification section, and control means, and the high-speed digital modulation signal In the amplification control method of the power amplifier that amplifies the power of
The CFR means includes
According to the control information that limits the peak value input from the control means, the peak level of the high-speed digital modulation signal is limited and output,
The DPD means to which the signal output from the CFR means is input is:
Apply the DPD to the input signal and output it, or further apply the DPD according to the compensation information input from the control means and adjust the applied DPD,
The final stage amplification unit to which the signal subjected to the DPD is input, amplifies the input signal and outputs the amplified signal,
The CCDF monitor means includes
The result of measuring each CCDF of the input and output of the CFR means, the output of the DPD means, and the output of the final stage amplifier is output as data plotted with PAPR as a parameter,
The control means for inputting the plotted data is
Each of the input plot data is compared with plot data of the output of the final stage amplification unit, and control information for limiting the peak cut level cut by the CFR means and compensation information for adjusting the DPD by the DPD means. A method for controlling amplification of a power amplifier, wherein the level of a signal input to the final stage amplification unit is controlled by outputting at least one of them. The control means includes
If the plot data at the output of the final stage amplifying unit is compared with the plot data at the output of the DPD means, and if it is outside the latter, control information that lowers the peak level so that it does not go outside 4. The method of controlling amplification of a power amplifier according to claim 3, wherein either compensation information for adjusting the DPD so as to increase the gain is output.

Images