JP2013093081A - Method for designing circuit board, method for manufacturing circuit board, circuit board, substrate for suspension, suspension, suspension with element, and hard disk drive - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for designing a circuit board capable of reducing warpage of a circuit board having a stacked structure in which two conductor layers are stacked through an insulating layer.SOLUTION: The method for designing the circuit board having a metal supporting substrate 1, a first insulating layer 2 formed on the metal supporting substrate, a first conductor layer 3 formed on the first insulating layer, a second insulating layer 4 formed on the first conductor layer, a second conductor layer 5 formed on the second insulating layer and a third insulating layer 6 formed on the second conductor layer includes a condition determining step of determining that the thicknesses and the coefficients of linear thermal expansion of the first insulating layer, the second insulating layer and the third insulating layer satisfy a specific relational expression with respect to the coefficient of linear thermal expansion of the metal supporting substrate.

Description

  The present invention relates to a circuit board design method capable of reducing a warp in a circuit board having a laminated structure in which two conductor layers are laminated via an insulating layer.

  For example, a suspension board on which elements such as a magnetic head slider are mounted is known as a circuit board used in an HDD (Hard Disk Drive). As an example of the suspension substrate, as shown in FIG. 8, a metal supporting substrate 101, an insulating layer (base insulating layer) 102 formed on the metal supporting substrate 101, and a conductor layer (on the insulating layer 102) A wiring layer (103) and an insulating layer (cover layer) 104 formed on the conductor layer 103 are known.

On the other hand, such a circuit board has a problem that warpage occurs due to a difference between the linear thermal expansion coefficient of the metal supporting board and the linear thermal expansion coefficient of the insulating layer. With respect to this problem, Patent Document 1 discloses that the warpage is reduced by using an insulating layer resin equivalent to the linear thermal expansion coefficient of the metal support substrate.
Thus, in the field of circuit boards so far, a method for reducing warpage has been used by setting the linear thermal expansion coefficient of the insulating layer to the same value as the thermal expansion coefficient of the metal supporting board.

However, as another example of a suspension substrate, in the case of a laminate structure in which two conductor layers are laminated via an insulating layer (hereinafter sometimes simply referred to as a stacked structure), the conventional method warps. There was a problem that it could not be resolved.
Specifically, as shown in FIG. 9, a metal supporting substrate 101, an insulating layer (base insulating layer) 102 formed on the metal supporting substrate 101, and a conductor layer (wiring layer) formed on the insulating layer 102 ) 103a, an insulating layer (intermediate insulating layer) 105 formed on the conductor layer 103a, a conductor layer (wiring layer) 103b formed on the insulating layer 105, and an insulating layer (on the conductor layer 103b) (For example, Patent Documents 2 and 3), the warp is eliminated even when the linear thermal expansion coefficient of each insulating layer is the same as the linear thermal expansion coefficient of the metal support substrate. There was a problem that could not be done.

JP 2006-248142 A Japanese Patent Laid-Open No. 9-22570 Japanese Patent Laid-Open No. 10-3632

  The main object of the present invention is to provide a circuit board design method capable of reducing a warp in a circuit board having a laminated structure in which two conductor layers are laminated via an insulating layer.

As a result of repeated research to solve the above problems, the present inventors have used a conventional method for reducing warpage in a circuit board, that is, when the linear thermal expansion coefficient of each insulating layer is brought close to a metal support board. In addition, it has been found that there is a new problem that the circuit board tends to warp to the metal support substrate side.
And, as used in a general design method, the linear thermal expansion coefficient of each insulating layer is not set to the same value as the linear thermal expansion coefficient of the metal support substrate, but at least one of the insulating layers. By making the thermal expansion coefficient larger than that of the metal support substrate, and making the sum of the products of the thickness of each insulating layer and the difference from the linear thermal expansion coefficient of the metal support substrate within a predetermined range greater than 0, The inventors have found that a circuit board having a stacked structure as described above can be reduced in warpage, and has completed the present invention.

  That is, the present invention provides a metal supporting board, a first insulating layer formed on the metal supporting board, a first conductor layer formed on the first insulating layer, and formed on the first conductor layer. A circuit board design method comprising: a second insulating layer formed; a second conductor layer formed on the second insulating layer; and a third insulating layer formed on the second conductor layer, The thickness and the linear thermal expansion coefficient of the first insulating layer, the second insulating layer, and the third insulating layer with respect to the linear thermal expansion coefficient of the metal support substrate are such that X represented by the following formula (A) is 24 to 64. There is provided a circuit board design method characterized by including a condition determining step for determining to be within the range.

  t1 * (CTE1-CTEbase) + t2 * (CTE2-CTEbase) + t3 * (CTE3-CTEbase) = X (A)

(T1, t2 and t3 in the formula (A) represent thicknesses (μm) of the first insulating layer, the second insulating layer and the third insulating layer, respectively. CTE1, CTE2 and CTE3 are the first insulating layer, respectively. The linear thermal expansion coefficient (ppm / ° C.) of the second insulating layer and the third insulating layer is shown, and CTEbase shows the linear thermal expansion coefficient (ppm / ° C.) of the metal support substrate.

  According to the present invention, the warpage is determined by determining the thickness and the linear thermal expansion coefficient of each insulating layer so that X represented by the above formula (A) falls within the range of 24 to 64 (μm · ppm / ° C.). It is possible to stably design a circuit board having a stacked structure with a small amount.

  The present invention is a metal supporting board, a first insulating layer formed on the metal supporting board, a first conductor layer formed on the first insulating layer, and formed on the first conductor layer. A method for manufacturing a circuit board, comprising: a second insulating layer; a second conductor layer formed on the second insulating layer; and a third insulating layer formed on the second conductor layer, Provided is a circuit board manufacturing method comprising a design step of designing a circuit board by using the circuit board design method.

  According to the present invention, a circuit board having a stacked structure with less warpage can be stably obtained because the design process using the circuit board design method is provided.

  The present invention is a metal supporting board, a first insulating layer formed on the metal supporting board, a first conductor layer formed on the first insulating layer, and formed on the first conductor layer. A circuit board having a second insulating layer, a second conductor layer formed on the second insulating layer, and a third insulating layer formed on the second conductor layer, the following formula (A) The circuit board is characterized in that X shown by the above satisfies the range of 24 to 64.

  t1 * (CTE1-CTEbase) + t2 * (CTE2-CTEbase) + t3 * (CTE3-CTEbase) = X (A)

(T1, t2 and t3 in the formula (A) represent thicknesses (μm) of the first insulating layer, the second insulating layer and the third insulating layer, respectively. CTE1, CTE2 and CTE3 are the first insulating layer, respectively. The linear thermal expansion coefficient (ppm / ° C.) of the second insulating layer and the third insulating layer is shown, and CTEbase shows the linear thermal expansion coefficient (ppm / ° C.) of the metal support substrate.

  According to the present invention, when the thickness and the linear thermal expansion coefficient of each of the insulating layers satisfy the above formula (A), the warp can be reduced.

  The present invention provides a suspension board, which is the circuit board described above.

  According to the present invention, by using the circuit board described above, it is possible to provide a suspension board with less warpage.

  The present invention provides a suspension including the above-described suspension substrate.

  According to the present invention, by using the suspension substrate described above, a suspension with a small warpage can be obtained.

  The present invention provides a suspension with an element comprising the above-described suspension and an element mounted on an element mounting region of the suspension.

  According to the present invention, by using the suspension substrate described above, a suspension with an element with small warpage can be obtained.

  The present invention provides a hard disk drive including the above-described suspension with an element.

  According to the present invention, a hard disk drive with higher functionality can be obtained by using the above-described suspension with an element.

  In the present invention, there is an effect that it is possible to provide a circuit board design method capable of reducing a warp in a circuit board having a laminated structure in which two conductor layers are laminated via an insulating layer.

It is a schematic plan view which shows an example of the circuit board in this invention. It is AA sectional drawing of FIG. It is a schematic sectional drawing which shows an example of the manufacturing method of the circuit board of this invention. It is a schematic plan view which shows an example of the suspension of this invention. It is a schematic plan view which shows an example of the suspension with an element of this invention. It is a schematic plan view which shows an example of the hard disk drive of this invention. It is a schematic sectional drawing which shows the dimension of the circuit board obtained in the Example. It is a schematic sectional drawing which shows an example of the conventional circuit board (suspension board | substrate). It is a schematic sectional drawing which shows the other example of the conventional circuit board (suspension board | substrate).

  The circuit board design method, circuit board manufacturing method, circuit board, suspension board, suspension, suspension with element, and hard disk drive of the present invention will be described in detail below.

A. Circuit Board Design Method First, a circuit board design method of the present invention will be described.
The circuit board design method of the present invention includes a metal supporting board, a first insulating layer formed on the metal supporting board, a first conductor layer formed on the first insulating layer, and the first conductor. A circuit board design method comprising: a second insulating layer formed on a layer; a second conductor layer formed on the second insulating layer; and a third insulating layer formed on the second conductor layer The thickness and the linear thermal expansion coefficient of the first insulating layer, the second insulating layer, and the third insulating layer with respect to the linear thermal expansion coefficient of the metal support substrate are represented by the following formula (A). Is characterized in that it has a condition determining step for determining so as to be within a range of 24 to 64.

  t1 * (CTE1-CTEbase) + t2 * (CTE2-CTEbase) + t3 * (CTE3-CTEbase) = X (A)

(T1, t2 and t3 in the formula (A) represent thicknesses (μm) of the first insulating layer, the second insulating layer and the third insulating layer, respectively. CTE1, CTE2 and CTE3 are the first insulating layer, respectively. The linear thermal expansion coefficient (ppm / ° C.) of the second insulating layer and the third insulating layer is shown, and CTEbase shows the linear thermal expansion coefficient (ppm / ° C.) of the metal support substrate.

  A circuit board designed according to the present invention will be described with reference to the drawings. FIG. 1 is a schematic plan view showing an example of a circuit board of the present invention. More specifically, it is a schematic plan view showing an example of a suspension substrate. A circuit board 20 shown in FIG. 1 is formed on the head part side, and an element mounting area 11 for mounting elements, an external circuit board connection area 12 formed on the tail part side for connection to an external circuit board, It has a wiring layer 13 that electrically connects between the element mounting region 11 and the external circuit board connection region 12. In FIG. 1, the description of the third insulating layer (cover layer) is omitted for ease of explanation.

  FIG. 2 is a cross-sectional view taken along the line AA in FIG. The circuit board in FIG. 2 includes a metal supporting board 1, a first insulating layer 2 formed on the metal supporting board 1, a first conductor layer 3 formed on the first insulating layer 2, and a first conductor layer. A second insulating layer 4 formed to cover 3, a second conductor layer 5 formed on the second insulating layer 4, and a third insulating layer 6 formed to cover the second conductor layer 5, Have Further, in this example, the linear thermal expansion coefficient of the first insulating layer 2 is larger than the linear thermal expansion coefficient of the metal supporting board 1, and the thickness of each insulating layer and the linear thermal expansion coefficient of each insulating layer and the metal supporting board are The sum of the product with the difference is in the range of 24-64.

According to the present invention, the condition determining step includes an insulating layer having a linear thermal expansion coefficient larger than the linear thermal expansion coefficient of the metal supporting board, and the thickness of each insulating layer and the linear heat of the metal supporting board. By setting the sum of the products of the difference from the expansion coefficient within a predetermined range larger than 0, the stacked circuit board can be less warped toward the metal support board.
Further, by designing so that X represented by the above formula (A) falls within the range of 24 to 64, the amount of warpage per 38 mm of the circuit board should be extremely small, such as ± 2 mm or less. Can do.
For this reason, by having the said condition determination process, the circuit board of a stacked structure with few curvature can be designed stably.

  The reason why the product of the thickness of the insulating layer and the difference between the linear thermal expansion coefficients of the insulating layer and the metal support substrate as shown in the above formula (A) is correlated with the amount of warpage is not clear, but the linear thermal expansion Even if the coefficients are the same and the contraction force per unit cross section is the same, it is presumed that the thicker the thickness, the greater the contraction force of the entire cross section. For this reason, it is possible to estimate the amount of warpage of the entire circuit by setting X represented by the above formula (A) within a predetermined range with respect to the metal support substrate that plays a role of supporting the entire circuit board. It is considered to be.

The circuit board design method of the present invention includes at least the condition determining step.
Hereinafter, each process included in the circuit board design method of the present invention will be described.

1. Condition determining step In the condition determining step in the present invention, the thickness and the linear thermal expansion coefficient of the first insulating layer, the second insulating layer, and the third insulating layer are expressed by the above formula with respect to the linear thermal expansion coefficient of the metal support substrate. This is a step of determining X shown in (A) to be within a range of 24 to 64.

  The linear thermal expansion coefficient in this step refers to the rate of change in the length of the material with respect to the change in temperature. Furthermore, the “material length” refers to the length of the material when the material reaches each temperature, and the “rate of change of the material length” refers to the length when the temperature of each material changes. This is a value obtained by dividing the change in length (the difference between the length of the material after the change and the length of the material before the change) by the total length of the material at the reference temperature. In general, the reference temperature is 23 ° C.

As a method for measuring the linear thermal expansion coefficient of the insulating layer in this step, first, a support substrate is prepared, a measurement insulating layer is prepared on the support substrate, and then the measurement insulating layer is peeled off or the support is supported. There is a method in which, after an insulating layer for measurement is formed on a substrate, the support substrate is removed by etching to obtain the insulating layer for measurement. Next, the obtained insulating layer for measurement is cut into a width of 5 mm and a length of 20 mm to obtain an evaluation sample. The linear thermal expansion coefficient is measured by a thermomechanical analyzer (for example, Thermo Plus TMA8310 (manufactured by Rigaku Corporation)). The measurement conditions are 10 ° C./min for the temperature rising rate, 1 g / 25,000 μm ² for the tensile weight so that the weight per cross-sectional area of the evaluation sample is the same, and the average linear thermal expansion within the range of 100 ° C. to 200 ° C. The coefficient is the linear thermal expansion coefficient (CTE).

The thickness of each insulating layer in this step refers to the thickness based on the coating amount of each insulating layer.
Here, the thickness based on the coating amount refers to a coating that forms an insulating layer having a predetermined thickness when an insulating layer forming coating solution is applied to a flat surface without unevenness and an insulating layer is formed. It shows what was formed using the quantity of coating liquid for insulating layer formation.
More specifically, the second insulating layer having a coating amount standard thickness of 5 μm is a second insulating layer having a thickness of 5 μm when coated on a flat first insulating layer on which the first conductor layer is not formed. The second insulating layer is formed by using an insulating layer forming coating liquid having a coating amount that can be used as an insulating layer. In addition, when forming using the coating liquid in this way, the thickness of the second insulating layer immediately above the first conductor layer is usually because the coating liquid flows down from a high place to a low place due to the influence of gravity. It becomes smaller than the thickness based on the coating amount.
Moreover, when using the method of laminating | stacking a dry film-like insulating layer as a formation method of an insulating layer, the thickness of the dry film insulating layer before lamination | stacking is said.
In this step, the reason why the thickness of each insulating layer is used as the coating amount standard is that the thickness of the actually coated insulating layer affects the amount of substrate warpage. For example, even if the thickness of the second insulating layer immediately above the first conductor layer becomes thin due to the influence of gravity, the thickness of the second insulating layer in the portion where there is no first conductor layer becomes thick due to the coating solution that has flowed down. And since a 2nd insulating layer is formed in the range wider than a 1st conductor layer, it becomes the range including both. That is, if the thickness of the second insulating layer in the range where the second insulating layer is formed is averaged, it becomes close to the thickness based on the coating amount.

  The range of X in this step is not particularly limited as long as it is within the range of 24 to 64, but it is particularly preferably within the range of 34 to 54, particularly around 44. This is because, when X is within such a range, the amount of warpage per 38 mm of the circuit board can be made extremely small.

The determination method in this step is not particularly limited as long as X is within a predetermined range. Usually, a method is used in which the thickness and the linear thermal expansion coefficient of each insulating layer are substituted into the above formula (A), and the value of each thickness and the like is adjusted so that the obtained X value falls within a predetermined range. It is done.
Further, the thickness and the linear thermal expansion coefficient of each insulating layer may be determined using the above formula (A), but after determining the thickness of each insulating layer in advance, the respective linear thermal expansion coefficients are determined. Method of determining, method of determining each thickness after determining the linear thermal expansion coefficient of each insulating layer in advance, thickness of any insulating layer and the thickness of the remaining insulating layer after determining the linear thermal expansion coefficient in advance Further, the linear thermal expansion coefficient may be determined.

2. Circuit Board Design Method The circuit board design method of the present invention includes at least the above-described condition determination step, but may include other steps as necessary.
As such other steps, after the determination step, a selection step of selecting a material capable of forming an insulating layer having a coefficient of linear thermal expansion obtained by the determination step, or after the selection step, the selected material is formed. An evaluation process for evaluating whether the insulating layer can satisfy other parameters, a member selection process for selecting a member other than the insulating layer constituting the circuit board such as a metal supporting board and a conductor layer, etc. .

The selecting step in the present invention is a step of selecting an insulating layer forming material capable of forming an insulating layer having a linear thermal expansion coefficient obtained by the determining step after the determining step.
The method for selecting such an insulating layer forming material is not particularly limited as long as it can select a material that can achieve a desired linear thermal expansion coefficient when used as a circuit board. A method of selecting a material having a known coefficient may be used, or a method of mixing a plurality of materials or changing and adjusting a monomer component constituting the insulating layer forming material may be used.
In addition, as the insulating layer forming material selected in this step, specifically, the materials described in the section “3. Circuit board” described later can be used.

The evaluation step in the present invention is a step of evaluating whether the insulating layer formed of the selected material can satisfy other parameters after the selection step.
Here, the parameter to be evaluated is not particularly limited as long as a circuit board having a desired performance can be obtained, and is selected according to the type of the circuit board. Specific examples include insulation, linear humidity expansion coefficient, heat resistance, process passability during circuit board formation, and the like.

The member selection step in the present invention is a step of selecting a member other than the insulating layer that constitutes the circuit board such as a metal support board or a conductor layer. Among such member selection steps, the selection of the metal support substrate is usually performed before the condition determination step. The conductor layer may be selected before or after the condition determining step.
In addition, about each member selected by this process, the thing as described in the term of "3. Circuit board" mentioned later can be used.

3. Circuit board A circuit board designed according to the present invention includes a metal support board, a first insulating layer formed on the metal support board, a first conductor layer formed on the first insulating layer, and the first board. A second insulating layer formed on one conductor layer; a second conductor layer formed on the second insulating layer; and a third insulating layer formed on the second conductor layer. . Further, X represented by the above formula (A) satisfies the range of 24 to 64.
Hereinafter, each configuration of such a circuit board will be described in detail.

(1) Insulating layer The insulating layer (first insulating layer, second insulating layer, and third insulating layer) in the present invention has its thickness and linear thermal expansion coefficient determined so that X is within a predetermined range. Is.
Here, the first insulating layer is formed on the metal support substrate, the second insulating layer is formed on the first conductor layer, and the third insulating layer is the second conductor layer. It is formed on the top.

The linear thermal expansion coefficient of the insulating layer in the present invention is not particularly limited as long as X represented by the above formula (A) can be within a predetermined range. It is appropriately set according to the expansion coefficient.
In the present invention, the linear thermal expansion coefficient of each insulating layer is preferably within the range of 4.3 ppm / ° C. to 30.3 ppm / ° C., and in particular, the range of 9.3 ppm / ° C. to 25.3 ppm / ° C. It is preferable that it is in the range of 12.3 ppm / ° C. to 22.3 ppm / ° C. It is because it is easy to satisfy said X because the linear thermal expansion coefficient of an insulating layer is in the above-mentioned range.

  The linear humidity expansion coefficient of the insulating layer in the present invention is not particularly limited as long as it can make the circuit board less warped, but is preferably small. This is because warpage due to humidity change can be reduced. In the present invention, for example, it is preferably 20 ppm /% RH or less, and more preferably 12 ppm /% RH or less.

Here, it describes below about the measuring method of a linear-humidity expansion coefficient.
First, the temperature is fixed at 25 ° C., and the humidity is changed to 15% RH, 20% RH, and 50% RH. Thereafter, the elongation per 1% humidity is calculated from the elongation amounts of the humidity 20% RH and 50% RH, and is defined as the linear humidity expansion coefficient (CHE). The calculation formula is as follows.
Linear humidity expansion coefficient = Elongation per 1% humidity / Initial length × 10 ⁶ [ppm /% Rh]
= Elongation amount of humidity 20% RH to 50% RH / 30 / initial length × 10 ⁶ [ppm /% Rh]
1) Sample form Sample size Width 5mm x Length 15mm (Grip + 5mm)
Thickness about 7-8μm Initial state Fully dried state 2) Measurement conditions Equipment RIGAKU S-TMA (TMA with humidity generator)
Weight 5g
Temperature 25 ° C
3) Measuring method Hold for 0.5 h or longer after the sample environment is stable at a humidity of 15% RH and the sample length remains constant and does not change. Next, after the sample environment stabilizes at a humidity of 20% RH and the sample length remains constant and does not change, hold for 0.5 h or longer (measure the sample length)
3. Subsequently, the environment of the sample is stabilized at a humidity of 50% RH, the sample length remains constant and no longer changes, and is held for 0.5 h or longer (sample length is measured)
4). 4. Calculate the difference between the value at 20% humidity and 50% humidity, and give 1/30 to obtain the amount of elongation per 1% humidity. Divide the amount of elongation per 1% humidity by the initial length (15 mm) to obtain the rate of change

The volume resistivity of the insulating layer in the present invention is not particularly limited as long as it can prevent a short circuit between the metal support substrate and the conductor layer and between the conductor layers. Specifically, the volume resistivity of the insulating layer is preferably 1.0 × 10 ¹² Ω · m or more, more preferably 1.0 × 10 ¹³ Ω · m or more. More preferably, it is 0 × 10 ¹⁴ Ω · m or more. It is because a short circuit can be prevented stably when the volume resistivity is within the above range.
The volume resistivity can be measured by a method based on standards such as JIS K6911, JIS C2318, and ASTM D257.

The thickness of the insulating layer in the present invention is particularly limited as long as the desired insulating property can be exhibited and X represented by the above formula (A) can be within a predetermined range. is not.
Specifically, in the present invention, the thickness of the first insulating layer is not particularly limited as long as a desired insulating property can be exhibited between the metal support substrate and the first conductor layer. However, it is preferably in the range of 5 to 30 μm, more preferably in the range of 5 to 18 μm, and still more preferably in the range of 5 to 12 μm.
In addition, the thickness of the second insulating layer is not particularly limited as long as it has a thickness capable of exhibiting a desired insulating property between the first conductor layer and the second conductor layer. The thickness of the second insulating layer from the top surface of the first conductor layer to the bottom surface of the second conductor layer is, for example, preferably in the range of 3 μm to 20 μm, and more preferably in the range of 5 μm to 18 μm. More preferably, it is in the range of 7 μm to 15 μm.
Furthermore, the thickness of the third insulating layer is preferably a thickness that can prevent deterioration (corrosion) of the second conductor layer, for example, preferably in the range of 2 μm to 30 μm, and 2 μm to 15 μm. More preferably, it is within the range, and further preferably within the range of 2 μm to 10 μm.
In addition, the thickness of the insulating layer in the present invention refers to the thickness based on the coating amount.

  The material of the insulating layer used in the present invention is not particularly limited as long as it can achieve the linear thermal expansion coefficient and insulation required for each insulating layer. For example, polyimide resin, polybenzoxazole resin, A polybenzimidazole resin, an acrylic resin, a polyether nitrile resin, a polyether sulfone resin, a polyethylene terephthalate resin, a polyethylene naphthalate resin, and a polyvinyl chloride resin can be exemplified, and among them, a polyimide resin is preferable. It is because it is excellent in insulation, heat resistance and chemical resistance. In addition, the material of the insulating layer may be a photosensitive material or a non-photosensitive material.

  In the present invention, it is particularly preferable that the polyimide resin (sometimes simply referred to as polyimide) contains a structure represented by the following formula (1). This is because the adjustment of the linear thermal expansion coefficient is easy, and in particular, a material having a low linear thermal expansion coefficient can be easily prepared.

(R ₁ is a tetravalent organic group, R ₂ is a divalent organic group, R ₁ and R ₂ may have a single structure or a combination of two or more types, n is a natural number of 1 or more)

In the formula (1), generally, R ₁ is a structure derived from tetracarboxylic dianhydride, and R ₂ is a structure derived from diamine.
Examples of the acid dianhydride applicable to the polyimide used in the present invention include ethylene tetracarboxylic dianhydride, butane tetracarboxylic dianhydride, cyclobutane tetracarboxylic dianhydride, and cyclopentane tetracarboxylic dianhydride. , Pyromellitic dianhydride, 3,3 ′, 4,4′-benzophenone tetracarboxylic dianhydride, 2,2 ′, 3,3′-benzophenone tetracarboxylic dianhydride, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride, 2,2 ′, 3,3′-biphenyltetracarboxylic dianhydride, 2,2 ′, 6,6′-biphenyltetracarboxylic dianhydride, 2 , 2-bis (3,4-dicarboxyphenyl) propane dianhydride, 2,2-bis (2,3-dicarboxyphenyl) propane dianhydride, bis (3,4-dicarboxypheny ) Ether dianhydride, bis (3,4-dicarboxyphenyl) sulfone dianhydride, 1,1-bis (2,3-dicarboxyphenyl) ethane dianhydride, bis (2,3-dicarboxyphenyl) ) Methane dianhydride, bis (3,4-dicarboxyphenyl) methane dianhydride, 2,2-bis (3,4-dicarboxyphenyl) -1,1,1,3,3,3-hexafluoro Propane dianhydride, 2,2-bis (2,3-dicarboxyphenyl) -1,1,1,3,3,3-hexafluoropropane dianhydride, 1,3-bis [(3,4- Dicarboxy) benzoyl] benzene dianhydride, 1,4-bis [(3,4-dicarboxy) benzoyl] benzene dianhydride, 2,2-bis {4- [4- (1,2-dicarboxy) Phenoxy] phenyl} propane dianhydride

2,2-bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} propane dianhydride, bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} ketone dianhydride Bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} ketone dianhydride, 4,4′-bis [4- (1,2-dicarboxy) phenoxy] biphenyl dianhydride, 4,4′-bis [3- (1,2-dicarboxy) phenoxy] biphenyl dianhydride, bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} ketone dianhydride, bis { 4- [3- (1,2-dicarboxy) phenoxy] phenyl} ketone dianhydride, bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} sulfone dianhydride, bis {4- [3- (1,2-dicarbox ) Phenoxy] phenyl} sulfone dianhydride, bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} sulfide dianhydride, bis {4- [3- (1,2-dicarboxy) phenoxy ] Phenyl} sulfide dianhydride, 2,2-bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} -1,1,1,3,3,3-hexafulpropane dianhydride 2,2-bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} -1,1,1,3,3,3-propane dianhydride, 2,3,6,7- Naphthalenetetracarboxylic dianhydride, 1,4,5,8-naphthalenetetracarboxylic dianhydride, 1,2,5,6-naphthalenetetracarboxylic dianhydride, 1,2,3,4-benzenetetra Carboxylic dianhydride, 3,4,9,10 -Perylenetetracarboxylic dianhydride, 2,3,6,7-anthracenetetracarboxylic dianhydride, 1,2,7,8-phenanthrenetetracarboxylic dianhydride and the like.
These may be used alone or in combination of two or more.

  The tetracarboxylic dianhydride preferably used from the viewpoint of the heat resistance, linear thermal expansion coefficient, etc. of the polyimide used in the present invention is preferably an aromatic tetracarboxylic dianhydride, and particularly preferably used tetracarboxylic acid. Pyromellitic dianhydride, merophanic dianhydride, 3,3 ′, 4,4′-benzophenone tetracarboxylic dianhydride, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride Anhydride, 2,3,3 ′, 4′-biphenyltetracarboxylic dianhydride, 2,3,2 ′, 3′-biphenyltetracarboxylic dianhydride, 2,2 ′, 6,6′-biphenyl Tetracarboxylic dianhydride, bis (3,4-dicarboxyphenyl) ether dianhydride, 2,2-bis (3,4-dicarboxyphenyl) -1,1,1,3,3,3 Hexafluoropropane dianhydride, bis (3,4-carboxyphenyl) ether dianhydride.

Among them, from the viewpoint of making the linear thermal expansion coefficient of polyimide equivalent to or lower than that of the metal support substrate or conductor layer, pyromellitic dianhydride, merophanic dianhydride, 3, 3 ′, 4, 4'-biphenyltetracarboxylic dianhydride, 2,3,3 ', 4'-biphenyltetracarboxylic dianhydride, 2,3,2', 3'-biphenyltetracarboxylic dianhydride, 1,4 , 5,8-Naphthalenetetracarboxylic dianhydride is preferable because a linear thermal expansion coefficient of the finally obtained polyimide becomes small. Among these, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride and pyromellitic dianhydride are particularly preferable from the viewpoint of a balance between the linear thermal expansion coefficient, availability, and cost.
From the viewpoint of reducing hygroscopic expansion, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride, 2,3,3 ′, 4′-biphenyltetracarboxylic dianhydride, 2 ′, 3′-biphenyltetracarboxylic dianhydride and bis (3,4-dicarboxyphenyl) ether dianhydride are particularly preferred.
That is, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride is particularly preferable from the viewpoint of a low linear thermal expansion coefficient and a low linear humidity expansion coefficient.

  When an acid dianhydride into which fluorine is introduced is used as the acid dianhydride used in combination, the linear humidity expansion coefficient of the polyimide is lowered. However, a polyimide precursor having a fluorine-containing skeleton is difficult to dissolve in a basic aqueous solution and needs to be developed with a mixed solution of an organic solvent such as alcohol and a basic aqueous solution.

  In the case of having an alicyclic skeleton as the acid dianhydride, there is a merit that the linear hygroscopic expansion coefficient becomes small and the transparency to light in the ultraviolet or visible light region is improved. From this, it becomes a highly sensitive photosensitive resin composition. On the other hand, the heat resistance and insulation after the polyimide is inferior compared to the aromatic polyimide.

When an aromatic tetracarboxylic dianhydride is used, there is a merit that it becomes a polyimide having excellent heat resistance and a low linear thermal expansion coefficient. Therefore, in the polyimide, it is preferable that 33 mol% or more of R ₁ in the formula (1) is any one of structures represented by the following formulas (2-1) to (2-5).

The polyimide having the above structure is a polyimide that exhibits high heat resistance and low linear thermal expansion coefficient. Therefore, the content of the structures represented by the above formulas (2-1) to (2-5) is preferably as close as possible to 100 mol% of R _{1 in} the above formula (1), but in the present invention, It should just contain 33 mol% or more, it is preferable to contain 50 mol% or more, and it is more preferable to contain 70 mol% or more.

  On the other hand, the diamine component applicable to the polyimide used in the present invention can also be used alone or in combination of two or more diamines. The diamine component used is not limited, but p-phenylenediamine, m-phenylenediamine, o-phenylenediamine, 3,3′-diaminodiphenyl ether, 3,4′-diaminodiphenyl ether, 4,4′-diamino. Diphenyl ether, 3,3′-diaminodiphenyl sulfide, 3,4′-diaminodiphenyl sulfide, 4,4′-diaminodiphenyl sulfide, 3,3′-diaminodiphenyl sulfone, 3,4′-diaminodiphenyl sulfone, 4,4 '-Diaminodiphenylsulfone, 3,3'-diaminobenzophenone, 4,4'-diaminobenzophenone, 3,4'-diaminobenzophenone, 3,3'-diaminodiphenylmethane, 4,4'-diaminodiphenylmethane, 3,4' -Diaminodiph Nylmethane, 2,2-di (3-aminophenyl) propane, 2,2-di (4-aminophenyl) propane, 2- (3-aminophenyl) -2- (4-aminophenyl) propane, 2,2 -Di (3-aminophenyl) -1,1,1,3,3,3-hexafluoropropane, 2,2-di (4-aminophenyl) -1,1,1,3,3,3-hexa Fluoropropane, 2- (3-aminophenyl) -2- (4-aminophenyl) -1,1,1,3,3,3-hexafluoropropane, 1,1-di (3-aminophenyl) -1 -Phenylethane, 1,1-di (4-aminophenyl) -1-phenylethane, 1- (3-aminophenyl) -1- (4-aminophenyl) -1-phenylethane, 1,3-bis ( 3-Aminophenoxy) benzene, 1,3 Bis (4-aminophenoxy) benzene, 1,4-bis (3-aminophenoxy) benzene, 1,4-bis (4-aminophenoxy) benzene, 1,3-bis (3-aminobenzoyl) benzene, 1, 3-bis (4-aminobenzoyl) benzene, 1,4-bis (3-aminobenzoyl) benzene, 1,4-bis (4-aminobenzoyl) benzene, 1,3-bis (3-amino-α, α -Dimethylbenzyl) benzene, 1,3-bis (4-amino-α, α-dimethylbenzyl) benzene, 1,4-bis (3-amino-α, α-dimethylbenzyl) benzene, 1,4-bis ( 4-amino-α, α-dimethylbenzyl) benzene, 1,3-bis (3-amino-α, α-ditrifluoromethylbenzyl) benzene, 1,3-bis (4-amino-α, α-dito Trifluoromethylbenzyl) benzene, 1,4-bis (3-amino-α, α-ditrifluoromethylbenzyl) benzene, 1,4-bis (4-amino-α, α-ditrifluoromethylbenzyl) benzene, 2 , 6-bis (3-aminophenoxy) benzonitrile, 2,6-bis (3-aminophenoxy) pyridine, 4,4′-bis (3-aminophenoxy) biphenyl, 4,4′-bis (4-amino) Phenoxy) biphenyl, bis [4- (3-aminophenoxy) phenyl] ketone, bis [4- (4-aminophenoxy) phenyl] ketone, bis [4- (3-aminophenoxy) phenyl] sulfide, bis [4- (4-aminophenoxy) phenyl] sulfide,

  Bis [4- (3-aminophenoxy) phenyl] sulfone, bis [4- (4-aminophenoxy) phenyl] sulfone, bis [4- (3-aminophenoxy) phenyl] ether, bis [4- (4-amino) Phenoxy) phenyl] ether, 2,2-bis [4- (3-aminophenoxy) phenyl] propane, 2,2-bis [4- (4-aminophenoxy) phenyl] propane, 2,2-bis [3- (3-Aminophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane, 2,2-bis [4- (4-aminophenoxy) phenyl] -1,1,1,3 3,3-hexafluoropropane, 1,3-bis [4- (3-aminophenoxy) benzoyl] benzene, 1,3-bis [4- (4-aminophenoxy) benzoyl] ben 1,4-bis [4- (3-aminophenoxy) benzoyl] benzene, 1,4-bis [4- (4-aminophenoxy) benzoyl] benzene, 1,3-bis [4- (3-amino Phenoxy) -α, α-dimethylbenzyl] benzene, 1,3-bis [4- (4-aminophenoxy) -α, α-dimethylbenzyl] benzene, 1,4-bis [4- (3-aminophenoxy) -Α, α-dimethylbenzyl] benzene, 1,4-bis [4- (4-aminophenoxy) -α, α-dimethylbenzyl] benzene, 4,4'-bis [4- (4-aminophenoxy) benzoyl ] Diphenyl ether, 4,4′-bis [4- (4-amino-α, α-dimethylbenzyl) phenoxy] benzophenone, 4,4′-bis [4- (4-amino-α, α-dimethylbenzen) ) Phenoxy] diphenylsulfone, 4,4′-bis [4- (4-aminophenoxy) phenoxy] diphenylsulfone, 3,3′-diamino-4,4′-diphenoxybenzophenone, 3,3′-diamino-4 , 4′-Dibiphenoxybenzophenone, 3,3′-diamino-4-phenoxybenzophenone, 3,3′-diamino-4-biphenoxybenzophenone, 6,6′-bis (3-aminophenoxy) -3,3 3 ′, 3′-tetramethyl-1,1′-spirobiindane, 6,6′-bis (4-aminophenoxy) -3,3,3 ′, 3′-tetramethyl-1,1′-spirobiindane, , 3-bis (3-aminopropyl) tetramethyldisiloxane, 1,3-bis (4-aminobutyl) tetramethyldisiloxane, α, ω-bis ( -Aminopropyl) polydimethylsiloxane, α, ω-bis (3-aminobutyl) polydimethylsiloxane, bis (aminomethyl) ether, bis (2-aminoethyl) ether, bis (3-aminopropyl) ether, bis ( 2-aminomethoxy) ethyl] ether, bis [2- (2-aminoethoxy) ethyl] ether, bis [2- (3-aminoprotoxy) ethyl] ether,

  1,2-bis (aminomethoxy) ethane, 1,2-bis (2-aminoethoxy) ethane, 1,2-bis [2- (aminomethoxy) ethoxy] ethane, 1,2-bis [2- (2 -Aminoethoxy) ethoxy] ethane, ethylene glycol bis (3-aminopropyl) ether, diethylene glycol bis (3-aminopropyl) ether, triethylene glycol bis (3-aminopropyl) ether, ethylenediamine, 1,3-diaminopropane, 1,4-diaminobutane, 1,5-diaminopentane, 1,6-diaminohexane, 1,7-diaminoheptane, 1,8-diaminooctane, 1,9-diaminononane, 1,10-diaminodecane, 1, 11-diaminoundecane, 1,12-diaminododecane, 1,2-diaminocyclohex 1,3-diaminocyclohexane, 1,4-diaminocyclohexane, 1,2-di (2-aminoethyl) cyclohexane, 1,3-di (2-aminoethyl) cyclohexane, 1,4-di (2- Aminoethyl) cyclohexane, bis (4-aminocyclohexyl) methane, 2,6-bis (aminomethyl) bicyclo [2.2.1] heptane, 2,5-bis (aminomethyl) bicyclo [2.2. 1] A diamine obtained by substituting some or all of the hydrogen atoms on the aromatic ring of the above diamine with a substituent selected from a fluoro group, a methyl group, a methoxy group, a trifluoromethyl group, or a trifluoromethoxy group. Can be used.

  Furthermore, depending on the purpose, any one or two or more of the ethynyl group, benzocyclobuten-4′-yl group, vinyl group, allyl group, cyano group, isocyanate group, and isopropenyl group serving as a crosslinking point, Even if it introduce | transduces into some or all of the hydrogen atoms on the aromatic ring of diamine as a substituent, it can be used.

  The diamine can be selected depending on the desired physical properties. If a rigid diamine such as p-phenylenediamine is used, the finally obtained polyimide has a low linear thermal expansion coefficient. Rigid diamines include p-phenylenediamine, m-phenylenediamine, 1,4-diaminonaphthalene, 1,5-diaminonaphthalene, 2, 6 as diamines in which two amino groups are bonded to the same aromatic ring. -Diaminonaphthalene, 2,7-diaminonaphthalene, 1,4-diaminoanthracene and the like can be mentioned.

  In addition, diamines in which two or more aromatic rings are bonded by a single bond, and two or more amino groups are each bonded directly or as part of a substituent on a separate aromatic ring, for example, There exists what is represented by following formula (3). Specific examples include benzidine and the like.

  (A is a natural number of 0 or 1 or more, and the amino group is bonded to the meta position or the para position with respect to the bond between the benzene rings.)

  Furthermore, in the above formula (3), a diamine having a substituent at a position where the amino group on the benzene ring is not substituted and which does not participate in the bond with another benzene ring can also be used. These substituents are monovalent organic groups, but they may be bonded to each other.

  Specific examples include 2,2′-dimethyl-4,4′-diaminobiphenyl, 2,2′-ditrifluoromethyl-4,4′-diaminobiphenyl, 3,3′-dichloro-4,4′-diamino. Biphenyl, 3,3′-dimethoxy-4,4′-diaminobiphenyl, 3,3′-dimethyl-4,4′-diaminobiphenyl and the like can be mentioned.

  In addition, when fluorine is introduced as a substituent of the aromatic ring, the linear humidity expansion coefficient can be reduced. However, a polyimide precursor containing fluorine, particularly polyamic acid, is difficult to dissolve in a basic aqueous solution and may need to be developed with a mixed solution with an organic solvent such as alcohol.

  On the other hand, when a diamine having a siloxane skeleton such as 1,3-bis (3-aminopropyl) tetramethyldisiloxane is used as the diamine, the adhesiveness with the substrate is improved or the finally obtained polyimide has an elastic modulus. The glass transition temperature can be lowered.

  Here, the selected diamine is preferably an aromatic diamine from the viewpoint of heat resistance. However, depending on the desired physical properties, the diamine may be an aliphatic diamine or siloxane within a range not exceeding 60 mol%, preferably not exceeding 40 mol%. Non-aromatic diamines such as diamines may be used.

In the above polyimide it is preferably 33 mol% or more of _{R 2} in the formula (1) is any one of structures represented by the following formula (4-1) to (4-6).

(R ₃ is a divalent organic group, oxygen atom, sulfur atom, or sulfone group, and R ₄ and R ₅ are a monovalent organic group or a halogen atom.)

When it has the above structure, the heat resistance of the polyimide finally obtained improves and a linear thermal expansion coefficient becomes small. Therefore, the content of the structures represented by the above formulas (4-1) to (4-6) is preferably as close as possible to 100 mol% of R _{2 in} the above formula (1), but in the present invention, It should just contain 33% or more, it is preferable to contain 50 mol% or more, and it is more preferable to contain 70 mol% or more.

  In addition to the above polyimide, it may be used as an insulating layer (first insulating layer, second insulating layer, and third insulating layer) in the present invention in combination with an adhesive polyimide or the like as appropriate.

  Moreover, when utilizing said polyimide as a photosensitive polyimide, a well-known method can be used. For example, a polyimide precursor obtained by introducing an ethylenic double bond with an ester bond or an ionic bond into the carboxyl group of a polyamic acid to mix with a photo radical initiator to form a solvent-developed negative photosensitive polyimide, polyamic acid And naphthoquinone diazide compound added to the partially esterified product to make an alkali development positive photosensitive polyimide, and nifedipine compound added to polyamic acid to make an alkali development negative photosensitive polyimide. It is not limited to.

  These photosensitive polyimides are added with 15% to 35% of a photosensitizing component with respect to the weight of the polyimide. Therefore, even if it is heated at 300 ° C. to 400 ° C. after pattern formation, the residual derived from the photosensitizing component remains in the polyimide. Therefore, in the present invention, it is preferable to use non-photosensitive polyimide.

  In particular, in the present invention, it is a polyimide having a small linear thermal expansion coefficient that the polyimide resin constituting the insulating layer contains any of the structures represented by the following formula (A-1) or (A-2). From the viewpoint of resin, it is preferable. This is because a circuit board with small warpage can be obtained.

(In the above formulas (A-1) and (A-2), R ₁ is a divalent organic group.)

  Furthermore, in this invention, it is preferable that the polyimide resin which comprises a 2nd insulating layer contains the structure represented by the said Formula (A-1). This is because not only a polyimide resin having a small linear thermal expansion coefficient but also a polyimide exhibiting low humidity expansion can be obtained, and a circuit board with a smaller warp can be obtained.

  Furthermore, in the present invention, the divalent organic group is preferably any one of structures represented by the following formulas (B-1) to (B-5).

(In the above formula (B-3), R ₂ and R ₃ are hydrogen or a monovalent organic group, and may be the same or different.)

  In the present invention, the divalent organic group is preferably any one of structures represented by the following formulas (B-1) to (B-3).

(In the above formula (B-3), R ₂ and R ₃ are hydrogen, a methyl group or a trifluoromethyl group, and may be the same or different.)

The method for forming an insulating layer in the present invention is not particularly limited as long as it is a method capable of forming an insulating layer having a desired thickness. For example, a coating liquid for forming an insulating layer containing a material capable of forming an insulating layer The method of apply | coating, the method of bonding a dry film-like insulating layer, etc. can be mentioned.
When forming the first and second conductive layers formed in a pattern on the second and third insulating layers by applying an insulating layer forming coating solution, the conductive layer A part of the coating liquid for forming the insulating layer flows down on the insulating layer on which the conductor layer is formed due to the influence of gravity. For this reason, in such a case, it is preferable to adjust the amount of each insulating layer forming coating solution to be applied on the conductor layer in consideration of the amount flowing down. Specifically, in the case of a specification in which a 5 μm or 10 μm insulating layer is formed immediately above the conductor layer, the coating amount is adjusted so that the coating thickness is thicker than the target thickness of 6.5 μm or 12 μm. Is preferred.

(2) Metal support substrate The metal support substrate in the present invention functions as a support for a circuit board. Moreover, when the circuit board in the present invention is a suspension board, the metal support board preferably has a predetermined spring property.

  The material for the metal support substrate is not particularly limited, and for example, stainless steel can be used. Among them, SUS304 (linear thermal expansion coefficient: 17.3 ppm / ° C.), SUS410 (linear thermal expansion coefficient: 10. 4 ppm / ° C.), SUS430 (linear thermal expansion coefficient: 10.4 ppm / ° C.), SUS630 (linear thermal expansion coefficient: 11.6 ppm / ° C.), and the like. SUS304 is particularly preferable. In particular, in the present invention, it is preferable that the linear thermal expansion coefficients of the materials for the metal support substrate, the first conductor layer, and the second conductor layer are in the range of 10 ppm / ° C. to 30 ppm / ° C.

  Although the thickness of a metal supporting substrate is not specifically limited, For example, it is preferable to exist in the range of 3 micrometers-30 micrometers, and it is more preferable to exist in the range of 10 micrometers-25 micrometers. This is because if the thickness of the metal support substrate is too thin, the mechanical strength may be lowered, and if the thickness of the metal support substrate is too thick, the rigidity may be too high. In addition, the thinner the metal support substrate is, the more precisely it is necessary to control the linear thermal expansion coefficient of each insulating layer.

  Although the remaining ratio of the metal supporting board in a circuit board is not specifically limited, For example, it is preferable that it is 30% or more, and it is more preferable that it exists in the range of 30%-60%. The residual ratio of the metal support substrate refers to the ratio of the planar view area of the metal support substrate to the planar view area of the circuit board. Moreover, the planar view area of the circuit board is an area surrounded by the outer diameter line of the circuit board, and when a through hole is formed inside, includes the plan view area of the through hole.

(3) Conductor layer The conductor layers (first conductor layer and second conductor layer) in the present invention are formed on the insulating layer. More specifically, the first conductor layer is a layer formed on the first insulating layer, and the second conductor layer is a layer formed on the second insulating layer.

  Although it will not specifically limit as a material of a 1st conductor layer and a 2nd conductor layer, if it has electroconductivity, For example, copper (Cu: rolled copper, electrolytic copper) etc. can be mentioned. Note that the linear thermal expansion coefficient of copper is usually 16.7 ppm / ° C. Although the thickness of a 1st conductor layer and a 2nd conductor layer is not specifically limited, For example, it is preferable to exist in the range of 1 micrometer-18 micrometers, respectively, and it is more preferable to exist in the range of 3 micrometers-12 micrometers. . Moreover, although the line width of a 1st conductor layer and a 2nd conductor layer is not specifically limited, For example, it is preferable to exist in the range of 10 micrometers-100 micrometers, for example, and it may be in the range of 15 micrometers-50 micrometers. More preferred.

  Further, a protective plating layer may be formed on the surfaces of the first conductor layer and the second conductor layer by Ni plating, Au plating, or the like. This is because deterioration (such as corrosion) can be effectively prevented. The thickness of the protective plating layer is preferably 5 μm or less, and more preferably in the range of 1 μm to 2 μm.

  The functions of the first conductor layer and the second conductor layer are not particularly limited. Specific examples of the function include a function as a signal transmission wiring, a function as a ground wiring, and a power supply wiring. In particular, when the circuit board in the present invention is a suspension board, specific examples of the above functions include a function as a write wiring or a lead wiring, a function as a flight height control wiring, a function as a ground wiring, and a power wiring. Functions as a sensor wiring, a function as an actuator wiring, a function as a heat assist wiring, a function as a microwave assist wiring, and the like. In the present invention, a plurality of first conductor layers and a plurality of second conductor layers may be formed.

(4) Circuit board The circuit board in this invention has the metal support board | substrate mentioned above, a 1st insulating layer, a 1st conductor layer, a 2nd insulating layer, a 2nd conductor layer, and a 3rd insulating layer. Among them, in the circuit board according to the present invention, the material of the metal supporting board is SUS304, the material of the first conductor layer and the second conductor layer is Cu, and the first insulating layer, the second insulating layer, and the third insulating layer The material is polyimide resin, the thickness of the metal support substrate is in the range of 16 μm to 20 μm, the thickness of the first insulating layer is in the range of 4 μm to 12 μm, and the thickness of the first conductor layer is Within the range of 4 μm to 6 μm, the thickness of the second insulating layer formed on the first conductor layer is within the range of 4 μm to 12 μm, and the thickness of the second conductor layer is within the range of 4 μm to 6 μm. The thickness of the third insulating layer formed on the second conductor layer is preferably in the range of 4 μm to 6 μm.

  Further, the use of the circuit board in the present invention is not particularly limited, but it is a suspension board, a digital still camera board, a digital video camera board, a mobile phone board, a portable personal computer board, a liquid crystal television. Board, LCD driver board, cassette deck board, CD player board, DVD player board, Blu-ray player board, copier board, fax board, satellite board, missile board, jet battle Examples include machine substrates.

The size of the circuit board in the present invention is different depending on the use of the circuit board designed by the design method of the present invention,
The maximum length of the portion of the stacked structure is preferably 25 mm or more, and particularly preferably within a range of 30 mm to 40 mm. This is because the warp reduction effect due to the fact that X represented by the above formula (A) is within the above range can be effectively exhibited.

B. Next, a method for manufacturing a circuit board according to the present invention will be described.
The circuit board manufacturing method of the present invention includes a metal supporting board, a first insulating layer formed on the metal supporting board, a first conductor layer formed on the first insulating layer, and the first conductor. A circuit board manufacturing method comprising: a second insulating layer formed on a layer; a second conductor layer formed on the second insulating layer; and a third insulating layer formed on the second conductor layer. The circuit board design method includes a design step of designing a circuit board using the circuit board design method.

Such a method of manufacturing a circuit board according to the present invention will be described with reference to the drawings. FIG. 3 is a process diagram showing an example of a circuit board manufacturing method according to the present invention.
First, with respect to the linear thermal expansion coefficient of the metal support substrate, the thickness and the linear thermal expansion coefficient of the first insulating layer, the second insulating layer, and the third insulating layer were determined using the above design method. A circuit board is designed by selecting an insulating layer forming material capable of forming an insulating layer having a coefficient of linear thermal expansion (design process).
Next, a laminated member in which the metal supporting board 1X, the first insulating layer 2X, and the first conductor layer 3X are laminated in this order is prepared (FIG. 3A). Next, a dry resist film (DFR) is disposed on both surfaces of the laminated member, and exposure and development are performed to form a predetermined resist pattern. Next, the portion exposed from the resist pattern is wet-etched to form the metal support substrate 1 and the first conductor layer 3 (FIG. 3B). Thereafter, the second insulating layer 4 is formed so as to cover the first conductor layer 3 (FIG. 3C). When the material of the second insulating layer 4 is a photosensitive material, a predetermined pattern can be formed by exposure and development. On the other hand, when the material of the second insulating layer 4 is a non-photosensitive material, a predetermined resist pattern is formed using DFR, and a portion exposed from the resist pattern is wet-etched to form the predetermined pattern. be able to. Next, a seed layer is formed on the second insulating layer 4, and a predetermined resist pattern is formed on the seed layer using DFR. Next, the second conductor layer 5 is formed by electrolytic plating (FIG. 3D). Next, the third insulating layer 6 is formed so as to cover the second conductor layer 5, and then the first insulating layer 2X is wet-etched to form the first insulating layer 2 (FIG. 3E). Thereby, a circuit board can be obtained.

  According to the present invention, a circuit board having a stacked structure with less warpage can be stably obtained because the design process using the circuit board design method is provided.

The circuit board manufacturing method of the present invention includes at least the above-described design process.
Hereafter, each process in the manufacturing method of the circuit board of this invention is demonstrated in detail.

1. Design Process The design process in the present invention is a process for designing a circuit board using the above-described circuit board design method.
Such a design method can be the same as the content described in the section “A. Circuit board design method”, and therefore the description thereof is omitted here.

2. Method for Manufacturing Circuit Board The method for manufacturing a circuit board of the present invention includes at least the above design process, and usually includes a circuit board forming process for forming a circuit board designed by the above design process.

The method for forming the circuit board in this step is not particularly limited as long as it can accurately form the circuit board designed by the design process, and a general circuit board forming method is used. be able to.
In this step, as shown in FIG. 3 which has already been described, first, a method of using a laminated member in which a metal support substrate, a first insulating layer and a first conductor layer are laminated in this order as a starting material may be used. preferable. This is because formation is easy.

  The circuit board formed by this step can be the same as the content described in the above section “A. Circuit board design method”, and thus the description thereof is omitted here.

C. Circuit Board Next, the circuit board of the present invention will be described.
The circuit board of the present invention includes a metal supporting board, a first insulating layer formed on the metal supporting board, a first conductor layer formed on the first insulating layer, and the first conductor layer. A circuit board having a formed second insulating layer, a second conductor layer formed on the second insulating layer, and a third insulating layer formed on the second conductor layer, wherein X shown by (A) satisfies the range of 24 to 64.

  t1 * (CTE1-CTEbase) + t2 * (CTE2-CTEbase) + t3 * (CTE3-CTEbase) = X (A)

(T1, t2 and t3 in the formula (A) represent thicknesses (μm) of the first insulating layer, the second insulating layer and the third insulating layer, respectively. CTE1, CTE2 and CTE3 are the first insulating layer, respectively. The linear thermal expansion coefficient (ppm / ° C.) of the second insulating layer and the third insulating layer is shown, and CTEbase shows the linear thermal expansion coefficient (ppm / ° C.) of the metal support substrate.

  Specific examples of such a circuit board include those shown in FIGS. 1 and 2 described above.

  According to the present invention, when the thickness and the linear thermal expansion coefficient of each of the insulating layers satisfy the above formula (A), the warp can be reduced.

  The circuit board of the present invention can be the same as that described in the above section “A. Circuit board design method”, and thus the description thereof is omitted here.

D. Next, the suspension substrate of the present invention will be described. The suspension board of the present invention is the circuit board described above.

  FIG. 1 and FIG. 2 described above are schematic views illustrating the suspension substrate of the present invention. In the present invention, as shown in FIGS. 1 and 2, the first conductor layer 3 and the second conductor layer 5 are wiring layers that electrically connect between the element mounting region 11 and the external circuit board connection region 12. Preferably there is. This is because it is easy to reduce the impedance. In addition, as shown in FIG. 2, it is preferable that the first conductor layer 3 and the second conductor layer 5 are arranged so that at least both of them overlap in a plan view, and more preferably completely overlap. preferable. Further, the wiring pair composed of the first conductor layer 3 and the second conductor layer 5 may be a write wiring or a read wiring, but is preferably a write wiring. This is because the light wiring is particularly required to have a low impedance. Furthermore, in the present invention, as shown in FIG. 2, the metal support substrate 1 has an opening region under the wiring pair composed of the first conductor layer 3 and the second conductor layer 5 in plan view. May be. Thereby, it is possible to prevent an increase in transmission loss due to transmission of electrical signals (particularly high-frequency signals) through a metal support substrate having low conductivity.

  According to the present invention, by using the circuit board described above, it is possible to provide a suspension board with less warpage. The circuit board is the same as the contents described in the above-mentioned section “A. Circuit board design method”, and the description is omitted here.

E. Suspension Next, the suspension of the present invention will be described. The suspension of the present invention includes the above-described suspension substrate.

  According to the present invention, by using the suspension substrate described above, a suspension with a small warpage can be obtained.

  FIG. 4 is a schematic plan view showing an example of the suspension of the present invention. A suspension 40 shown in FIG. 4 includes the suspension substrate 20 described above and a load beam 30 provided on the surface of the suspension substrate 20 opposite to the surface on which the element mounting region 11 is formed. is there.

  The suspension of the present invention has at least a suspension substrate, and usually further has a load beam. The suspension substrate is the same as that described in “D. Suspension substrate”, and therefore, the description thereof is omitted here. The load beam can be the same as the load beam used for a general suspension.

F. Next, the suspension with an element of the present invention will be described. A suspension with an element of the present invention includes the above-described suspension and an element mounted in an element mounting region of the suspension.

  According to the present invention, by using the suspension substrate described above, a suspension with an element with small warpage can be obtained.

  FIG. 5 is a schematic plan view showing an example of the suspension with an element of the present invention. A suspension 50 with an element shown in FIG. 5 includes the suspension 40 described above and an element 41 mounted on the element mounting region 11 of the suspension 40.

  The suspension with an element of the present invention has at least a suspension and an element. The suspension is the same as that described in the above “E. Suspension”, and the description is omitted here. In addition, examples of elements mounted in the element mounting area include a magnetic head slider, an actuator, and a semiconductor. The actuator may have a magnetic head or may not have a magnetic head.

G. Next, the hard disk drive of the present invention will be described. The hard disk drive of the present invention is characterized by including the above-described suspension with an element.

  According to the present invention, a hard disk drive with higher functionality can be obtained by using the above-described suspension with an element.

  FIG. 6 is a schematic plan view showing an example of the hard disk drive of the present invention. The hard disk drive 60 shown in FIG. 6 includes the above-described suspension 50 with an element, a disk 51 on which the element suspension 50 writes and reads data, a spindle motor 52 that rotates the disk 51, and the elements of the suspension 50 with an element. And a voice coil motor 54, and a case 55 for sealing the above-described members.

  The hard disk drive of the present invention has at least a suspension with an element, and usually further includes a disk, a spindle motor, an arm, and a voice coil motor. Since the suspension with an element is the same as the content described in “F. Suspension with an element”, description thereof is omitted here. As other members, the same members as those used in a general hard disk drive can be used.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the technical idea described in the claims of the present invention has substantially the same configuration and exhibits the same function and effect regardless of the case. It is included in the technical scope of the invention.

  Hereinafter, the present invention will be described more specifically with reference to examples.

[Production Example 1]
First, 18 μm thick SUS304 (metal support substrate, linear thermal expansion coefficient 17.3 ppm / ° C.), 5 μm thick polyimide resin layer (first insulating layer, linear thermal expansion coefficient 21.0 ppm / ° C.), 5 μm thick A laminated member having an electrolytic copper layer (first conductor layer, linear thermal expansion coefficient 16.7 ppm / ° C.) was prepared.

  Next, a pattern resist was formed by patterning simultaneously using a dry film so that a jig hole whose positional accuracy is important on the SUS side and a desired first conductor layer on the electrolytic copper side can be formed. . Then, it etched using the ferric chloride liquid, and resist stripping was performed after the etching. Here, by positioning the dry film at the same time, it is possible to improve the positional accuracy of both surfaces on the SUS side and the first conductor layer side.

  Next, a polyimide precursor solution 1 synthesized so as to have a linear thermal expansion coefficient of 18.7 ppm / ° C. is coated on the patterned first conductor layer with a die coater, dried, resist-engraved, and simultaneously with development. The polyimide precursor film was etched, and then cured (imidized) by heating in a nitrogen atmosphere to form a second insulating layer made of polyimide 1. The second insulating layer was formed so as to cover the first conductor layer, and the thickness of the second insulating layer formed immediately above the first conductor layer was 5 μm (6.5 μm based on the actual coating amount).

  Next, a seed layer was formed on the second insulating layer by a sputtering method, and a resist pattern was formed on the seed layer using DFR. Thereafter, an electrolytic copper layer (second conductor layer, coefficient of linear thermal expansion 16.7 ppm / ° C.) having a thickness of 5 μm was formed on the seed layer exposed from the resist pattern by electrolytic plating.

  Next, on the second conductor layer, polyimide 2 was prepared in the same manner as when the second insulating layer was formed using the polyimide precursor solution 2 synthesized so that the linear thermal expansion coefficient was 18.3 ppm / ° C. A third insulating layer was formed. The third insulating layer was formed so as to cover the second conductor layer, and the thickness of the third insulating layer formed immediately above the second conductor layer was 4 μm (6.0 μm based on the actual coating amount). Thereafter, the first insulating layer and the metal supporting board were etched to obtain a circuit board (suspension board). In addition, the dimension of the obtained circuit board is shown in FIG.

[Production Examples 2 to 9]
Production Example, except that the metal support, the first insulating layer, the first conductor layer, the second insulating layer, the second conductor layer, the thickness of the third insulating layer and the CTE having the values shown in Table 1 below were used. In the same manner as in Example 1, a circuit board was obtained.
The thickness of the insulating layer in Table 1 is based on the coating amount. The thickness of the second insulating layer immediately above the conductor layer is 6.5 μm and 12 μm on the basis of the coating amount, and 5 μm and 10 μm, respectively. The thickness of the third insulating layer immediately above the conductor is based on the coating amount. In the case of 6.0 μm and 6.5 μm, they were 4.0 μm and 4.5 μm, respectively.

[Examples 1-4 and Comparative Examples 1-5]
The amount of substrate warpage was measured for the circuit boards obtained in Production Examples 1 to 9.
The amount of board warpage is determined by separating the circuit board piece from the sheet, placing the board on a surface plate, fixing the tail portion (one end of the circuit board) with a holding jig, and the circuit board head (circuit board). The amount of warpage at the other end was measured with a ruler. The length between the tail portion and the head portion of the circuit board was 38 mm. The results are shown in Table 1 below.
X in Table 1 is represented by the above formula (A), and the units of thickness and linear thermal expansion coefficient of each layer are μm and ppm / ° C.
The unit of substrate warpage is mm. When the value is positive, it indicates that the substrate is warped, and when the value is negative, it is warped on the metal support substrate. Is shown.

From Table 1, by setting the value of X within the range of 24 to 64 (μm · ppm / ° C.), the amount of warpage per 38 mm length of the circuit board can be within ± 2 mm, and the warpage is stable. It was confirmed that it can be made less.
Moreover, it has confirmed that it was preferable to set it as the value of X which calculated said Formula (1) on the basis of the thickness on a conductor layer about the thickness of each insulating layer in the range of 24-57.

DESCRIPTION OF SYMBOLS 1 ... Metal support board 2 ... 1st insulating layer 3 ... 1st conductor layer 4 ... 2nd insulating layer 5 ... 2nd conductor layer 6 ... 3rd insulating layer 11 ... Element mounting area 12 ... External circuit board connection area 13 ... Wiring Layer 20 ... circuit board

Claims (7)

A metal support substrate, a first insulating layer formed on the metal support substrate, a first conductor layer formed on the first insulating layer, and a second insulating layer formed on the first conductor layer A circuit board design method comprising: a second conductor layer formed on the second insulating layer; and a third insulating layer formed on the second conductor layer,
With respect to the linear thermal expansion coefficient of the metal support substrate, the thicknesses and linear thermal expansion coefficients of the first insulating layer, the second insulating layer, and the third insulating layer are expressed as follows. A circuit board design method comprising: a condition determining step for determining so as to be within the range.
t1 * (CTE1-CTEbase) + t2 * (CTE2-CTEbase) + t3 * (CTE3-CTEbase) = X (A)
(T1, t2 and t3 in the formula (A) represent thicknesses (μm) of the first insulating layer, the second insulating layer and the third insulating layer, respectively. CTE1, CTE2 and CTE3 are the first insulating layer, respectively. , Shows the linear thermal expansion coefficient (ppm / ° C.) of the second insulating layer and the third insulating layer, and CTEbase shows the linear thermal expansion coefficient (ppm / ° C.) of the metal support substrate. A metal support substrate, a first insulating layer formed on the metal support substrate, a first conductor layer formed on the first insulating layer, and a second insulating layer formed on the first conductor layer And a method of manufacturing a circuit board having a second conductor layer formed on the second insulating layer and a third insulating layer formed on the second conductor layer,
A circuit board manufacturing method comprising a design step of designing a circuit board using the circuit board design method according to claim 1. A metal support substrate, a first insulating layer formed on the metal support substrate, a first conductor layer formed on the first insulating layer, and a second insulating layer formed on the first conductor layer And a circuit board having a second conductor layer formed on the second insulating layer and a third insulating layer formed on the second conductor layer,
A circuit board characterized in that X represented by the following formula (A) satisfies a range of 24 to 64.
t1 * (CTE1-CTEbase) + t2 * (CTE2-CTEbase) + t3 * (CTE3-CTEbase) = X (A)
(T1, t2 and t3 in the formula (A) represent thicknesses (μm) of the first insulating layer, the second insulating layer and the third insulating layer, respectively. CTE1, CTE2 and CTE3 are the first insulating layer, respectively. , Shows the linear thermal expansion coefficient (ppm / ° C.) of the second insulating layer and the third insulating layer, and CTEbase shows the linear thermal expansion coefficient (ppm / ° C.) of the metal support substrate.   A circuit board according to claim 3, wherein the suspension board is a circuit board.   A suspension comprising the suspension substrate according to claim 4.   6. A suspension with an element, comprising: the suspension according to claim 5; and an element mounted in an element mounting region of the suspension.   A hard disk drive comprising the suspension with an element according to claim 6.

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