JP2013066087A - Image reader and image forming apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable charging of a capacitor for giving offset to the output signal of a CCD (charged coupled device) sensor to a predetermined target voltage in a short time.SOLUTION: An image reader 10 includes: a CCD sensor 201 having a capacitor for giving offset to an output signal and a cramp circuit for giving a first predetermined voltage Va to the capacitor and the output part of the CCD sensor 201 at a timing indicated by a CCD cramp signal to be input; an AC coupling capacitor 203 to be connected downstream of the CCD sensor 201; and a cramp circuit 204 for supplying a second predetermined voltage to the AC coupling capacitor 204 at a timing indicated by a cramp gate signal, and charging the AC coupling capacitor 203. The CCD sensor 201 is controlled so as to keep the output of the CCD sensor 201 at a fixed voltage while the cramp circuit 204 supplies the second predetermined voltage to the AC coupling capacitor 203.

Description

  The present invention relates to an image reading apparatus including a CCD (Charge Coupled Device) sensor which is a line image sensor, and an image forming apparatus including the image reading apparatus as an image reading unit.

Conventionally, a CCD sensor, which is a line image sensor, has been widely used to read image information of a document or the like.
This CCD sensor generally includes a photoelectric conversion element that accumulates charges according to the intensity of reflected light from a reading target, a charge transfer circuit that sequentially transfers the charges accumulated by the photoelectric conversion elements for each pixel, and the charge transfer. A charge voltage conversion circuit for converting the charge output from the circuit into an analog voltage signal and outputting the analog voltage signal is provided.

  In the subsequent stage of such a CCD sensor, an analog front end that generally performs various analog processing on the analog voltage signal obtained from the output of the CCD sensor and converts it into a digital image signal. An IC in which each circuit for analog processing called (AFE) is integrated is connected, and an AC coupling capacitor is inserted in series between the AFE and the CCD.

This capacitor is used to add an offset to the analog voltage signal from the CCD sensor. In order to provide this offset, a clamp circuit is connected to the capacitor. Charging is performed during a period when the clamp gate signal input to the clamp circuit is asserted, and the charge stored in the capacitor is set to a predetermined clamp level. Therefore, an offset is provided.
The charge maintained as the clamp level in the capacitor by charging becomes an integral amount between the clamp level and the assert period of the clamp gate signal.

  Here, when performing document reading, the clamp circuit performs a black pixel period excluding an effective pixel period among an effective pixel period, a black pixel period, and an empty transfer period that constitute a reading period of one main scanning line of the CCD sensor. During the idle transfer period, the clamp gate signal is asserted to charge the capacitor, and the offset level for each reading of one main scanning line is kept constant. The offset clamp level is set as the black level of the image data.

However, when starting the image reading apparatus, charging is started from a state where there is no charge on the capacitor. Therefore, if the assertion period of the clamp gate signal in one main scanning line is short, it takes time to charge to the clamp level. The problem is known as described in Patent Document 1 below.
Therefore, in Patent Document 1, it is proposed to extend the clamp period by extending the assertion period of the clamp gate signal to the effective pixel period immediately after the power is turned on (0048). In Patent Document 1, a method of performing a clamping operation including reset noise output from the CCD in an effective pixel period and a method of performing a clamping operation in an area excluding reset noise output from the CCD in an effective pixel period. Has proposed.
Patent Document 2 proposes another technique for solving the problem described in Patent Document 1.

Here, an example of the detailed configuration inside the CCD sensor and the detailed configuration downstream of the CCD sensor will be described with reference to FIG. FIG. 6 is an internal block diagram of the CCD sensor 201 and the AFE 205 and a circuit configuration therebetween.
First, as shown in FIG. 6, the CCD sensor 201 includes a photodiode 201a, a charge transfer circuit 201b, a charge-voltage conversion circuit 201c, a charge reset circuit 201d, a built-in clamp circuit 201e, and a buffer amplifier 201f. In the following description, clamping means that the signal offset is set to a predetermined reference level set in advance. This clamping can be realized, for example, by charging a capacitor connected in series with the signal transmission path so as to have a predetermined potential difference and transmitting an electric signal through the capacitor.

Among the elements included in the CCD sensor 201, the photodiode 201a is a photoelectric conversion element that accumulates electric charges according to the intensity of reflected light from the reading target. The photodiodes 201a are arranged for the number of pixels in one line in the main scanning direction.
The charge transfer circuit 201b includes a plurality of transfer registers arranged for the number of pixels corresponding to the photodiodes 201a arranged for the number of pixels. The charge transfer circuit 201b temporarily accumulates the charges received from the photodiode 201a and transfers the subsequent transfer registers. This is a circuit for sequentially transferring each pixel.

The charge-voltage conversion circuit 201c is a circuit that converts the charge output from the charge transfer circuit 201b into an analog voltage signal and outputs the analog voltage signal.
The charge reset circuit 201d is a circuit that resets the charge of the charge-voltage conversion circuit 201c.

The built-in clamp circuit 201e is composed of a power source for supplying the reference potential Va, a switch, and a capacitor, and is a circuit for clamping an electric signal passing through the capacitor by charging the capacitor.
Here, when the CCD clamp signal is asserted, the switch is turned on, and the electrode downstream (right side in the figure) becomes the reference potential Va and is charged by the potential difference (voltage) from the upstream electrode potential during this assertion period. Is done.

For example, when the potential output from the charge-voltage conversion circuit 201c during the assertion period of the CCD clamp signal is a constant Vb, the voltage applied to the capacitor is Va-Vb. Is charged.
When the built-in clamp circuit 201e is switched off after charging, the capacitor works as a voltage source having the voltage Va-Vb, and the output from the charge-voltage conversion circuit 201c is constant Vb even after the switch is turned off. In the period in which the discharge amount of the capacitor is negligible, the potential downstream of the capacitor is Va.

Similarly, even when a reset potential or an image signal is applied to the output of the charge-voltage conversion circuit 201c and the voltage fluctuates, an offset corresponding to the amount of charge charged in the capacitor can be given to the voltage.
The buffer amplifier 201f is provided at the output stage of the CCD sensor 201 to absorb the influence of backflow and load fluctuation from the subsequent stage.

Next, the buffer 202 is for performing impedance matching between the CCD sensor 201 and the AFE 205.
The buffer 202 may be composed of, for example, an emitter follower using an NPN type bipolar transistor. Since the emitter follower has a high input impedance and a low output impedance, it can be inserted between the CCD sensor 201 and the AFE 205 to match the low impedance in the input stage of the AFE 205.

The AC coupling capacitor 203 is a capacitor for giving an offset to the CCD output signal (the potential on the input side of the AFE 205) by the potential difference between the electrodes at both ends.
The clamp circuit 204 includes a power supply voltage Vcc, two resistors, and a switch. When the clamp gate signal supplied from the timing signal generation circuit 210 is asserted, the clamp circuit 204 charges the AC coupling capacitor 203 by turning on the switch. This is a circuit for clamping the potential of the CCD output signal to a desired potential.
This charge is caused by the potential difference between the potential Vcc ′ divided by the ratio of the two resistors of the clamp circuit 204 and the analog potential from the CCD output during the assertion period of the clamp gate signal. This is done by applying a voltage between the terminals.

The AFE 205 is an IC that includes a sample hold circuit 206, a variable gain amplifier (not shown), an A / D converter, and the like, and these circuits are integrated. As a circuit inside the AFE 205, only the sample hold circuit 206 is shown for convenience of explanation.
The sample and hold circuit 206 is a circuit for sampling an analog voltage signal to be subjected to A / D conversion and temporarily holding the analog voltage signal.

The timing signal generation circuit 210 is for controlling the rise or fall of signals supplied to the CCD sensor 201 and the clamp circuit 204 according to the timing setting set by the control unit 211 ′ and taking the operation timing of each circuit. .
Here, controlling the rise and fall of the supplied signal means controlling the assertion or negation timing of the CCD shift signal, CCD drive signal, CCD reset signal and CCD clamp signal for the CCD sensor 201. For the clamp circuit 204, it means that the assertion or negation timing of the clamp gate signal is controlled.
The control unit 211 ′ is a control unit that sets the timing in the timing signal generation circuit 210 and controls the operation timing of the CCD sensor 201 and the clamp circuit 204.

  Next, an example of a clamping operation performed when reading a document will be described with reference to FIGS. 7 is a timing chart of signals input to the CCD sensor 201 and the clamp circuit 204 during document reading. FIG. 8 is a partially enlarged view of the CCD output and clamp gate signal of FIG. 7 in the black pixel period. It is.

Note that the black pixel period means that some of the photodiodes 201a arranged in one line in the main scanning direction for the number of pixels are optically masked to block light, and the photo of the masked portion is photomasked. This is the period during which charge is taken out from the diode. Therefore, the output signal level in the black pixel period is basically equal to the output signal level when the black image of the original is read.
In addition, the clamping operation at the time of document reading is realized by the control unit 211 ′ controlling the timing signal generation circuit 210 to output each control signal at the timing shown in the timing chart of FIG.

As shown in FIG. 6, the signals input to the CCD sensor 201 include a CCD shift signal, a CCD drive signal, a CCD reset signal, and a CCD clamp signal. The signals input to the clamp circuit 204 include a clamp gate signal. is there. Then, the drive control of the CCD sensor 201 and the charging timing of the AC coupling capacitor 203 are controlled by the rise or fall of these signals. FIG. 7 also shows changes in the analog voltage signal output from the CCD. This CCD output is the same as the change in the analog voltage signal appearing in the CCD output shown in FIG.
In the figure, the case where charging is performed in the black pixel period among the black pixel period, the effective pixel period, and the empty transfer period constituting the reading period of one line in the main scanning direction is shown. It is omitted for convenience.

  Of the signals input to the CCD sensor 201, the CCD shift signal is a signal for shifting the charge accumulated in the photodiode 201a to the transfer register of the charge transfer circuit 201b. By asserting this CCD shift signal, all charges are shifted from the photodiode 201a arranged in the number of pixels in one line to the transfer register side of the charge transfer circuit 201b.

The CCD driving signal is a two-phase driving signal for sequentially transferring the charges accumulated in the transfer register of the charge transfer circuit 201b of the CCD sensor 201 to the transfer register at the subsequent stage for each pixel.
The CCD reset signal is a signal for driving the charge reset circuit 201d to reset the charge of the charge-voltage conversion circuit 201c.
The CCD clamp signal is a signal for charging the capacitor by turning on the switch of the built-in clamp circuit 201e.

When the CCD sensor 201 is driven at the timing shown in FIG. 7, all charges are first transferred from the photodiode 201a arranged in the number of pixels in one line by the rising edge of the CCD shift signal (arrow A portion). Shift to the transfer register side.
Next, the charge of the charge-voltage conversion circuit 201c is reset by the rise of the CCD reset signal (arrow B portion). When the charge is reset, reset noise appears in the CCD output (arrow C). The reset noises in the figure all show the same waveform, but are actually random noises with sharp spikes.

  Next, when the CCD clamp signal rises (arrow D portion), the built-in clamp circuit 201e is switched on, so the CCD output becomes the reference potential Va (arrow E portion). Thereafter, at the timing of the fall of the CCD drive signal (arrow F portion), the charge accumulated in the transfer register at the final stage is converted into an analog voltage signal by the charge-voltage conversion circuit 201c, superimposed on minus on Va and output to the CCD. (Arrow G part). The CCD clamp signal falls simultaneously with the CCD drive signal.

  By repeating the input of these signals, in the black pixel period, an analog voltage signal corresponding to the analog voltage signal obtained when the black image of the original is read is sequentially extracted for each pixel. Note that the analog voltage signal corresponding to reading of the black image in the black pixel period is substantially constant for each pixel.

  On the other hand, in the effective pixel period, the timing of each signal input to the CCD sensor 201 is the same as that of the black pixel period, and the difference is that the analog voltage signal appearing at the CCD output at the falling timing of the CCD drive signal is the original document. It is a point which is an analog voltage signal according to the reflected light intensity from (arrow H portion). The analog voltage corresponding to the intensity of the reflected light from the original is the same for all pixels in the figure, but actually differs depending on the amount of reflected light.

  Here, FIG. 8 shows a partially enlarged view of the CCD output and clamp gate signal of FIG. 7 in the black pixel period. As shown in FIG. 8, the CCD output in the black pixel period is a set of the reset noise shown in (1), the feedthrough level shown in (2), and the signal area of the black pixel shown in (3). Thus, these signals appear continuously for each pixel.

  Note that the feedthrough level shown in (2) is a period from when the charge of the charge voltage conversion circuit 201c is reset by the CCD reset signal to before the analog voltage signal is input after the CCD drive signal falls. It shows the level in a certain feedthrough period. Since the CCD clamp signal is asserted as shown in FIG. 7 during this feedthrough period, the field through level is Va when the CCD sensor 201 has the configuration shown in FIG.

  On the other hand, as shown in FIG. 8, the clamp gate signal is asserted in accordance with the signal region of the black pixel, and charged by applying a potential difference to the AC coupling capacitor 203 with the analog voltage in this black pixel signal region and Vcc ′. The offset amount with reference to the signal voltage of the black pixel can be determined. Therefore, the voltage of the input image signal to the AFE 205 when the black pixel is read in the effective image area is Vcc ′, and when the pixel that is not black is read, the signal is separated from Vcc ′ according to the brightness. In the AFE 205, the pixel value of each pixel can be obtained based on Vcc ′.

  As described above, in the example of the clamping operation described with reference to FIGS. 7 and 8, the CCD driving signal, the CCD reset signal, and the CCD clamping are performed at the timing corresponding to each pixel (for example, every pixel) when reading the document. While the signal is input to the CCD sensor 201, the clamp circuit 204 applies Vcc ′ to the AC coupling capacitor 203 at the timing when the analog voltage signal corresponding to the black pixel is output from the CCD sensor 201, and the AC coupling capacitor 203 is set. The CCD clamp signal is controlled to be charged.

Thus, the AC coupling capacitor 203 can be charged in accordance with the black pixel signal region in the black pixel period. The offset of the output signal of the CCD sensor 201 passing through the AC coupling capacitor 203 can be set to a predetermined reference level based on the output signal voltage in the black pixel signal region.
Such charging operation of the AC coupling capacitor 203 for clamping is hereinafter referred to as “normal clamping operation”.

  However, as described in the background section, when starting the image reading apparatus, charging starts from a state in which the AC coupling capacitor 203 has no charge. Therefore, the normal clamping operation described with reference to FIGS. However, since the assertion period of the clamp gate signal is short, there is a problem that it takes time to charge the AC coupling capacitor 203.

  In order to solve this problem, at the time of starting the image reading apparatus, for example, the assertion period of the clamp gate signal is set to the entire reading period of one main scanning line, and the charging period is increased to shorten the charging period. A method can be considered. This method is called “solid clamp operation”.

  Here, an example of the solid clamp operation will be described with reference to FIGS. 9 and 10. FIG. 9 is a timing chart corresponding to FIG. 7 when the solid clamp operation is performed, and FIG. 10 is a portion of the CCD output and the clamp gate signal in the black pixel period when the solid clamp operation is performed. It is a typical enlarged view.

  In FIG. 9, the input timing of each signal input to the CCD sensor 201 and the change in the analog voltage signal appearing in the CCD output are the same as those in the timing chart of the normal clamping operation in FIG. In order to charge the AC coupling capacitor 203 not only in the area but also at high speed, the clamp gate signal is asserted over the entire period.

  In the case of the solid clamp operation, the clamp gate signal is asserted in the entire period. Therefore, as shown in the enlarged view of FIG. 10, in the black pixel period, (1) reset noise, (2) feedthrough level and ( 3) Each voltage is applied to the upstream electrode of the AC coupling capacitor 203 during each period of the signal region of the black pixel. In addition to this, each voltage in the signal region corresponding to the reset noise of the CCD output, the field through level, and the reflected light intensity from the document in the effective pixel period is also applied to the upstream electrode of the AC coupling capacitor 203. For this reason, during the period when the clamp gate signal is asserted, the potential of the electrode on the upstream side of the AC coupling capacitor 203 changes every moment.

  On the other hand, since the clamp gate signal is asserted and the switch of the clamp circuit 204 is turned on, the constant Vcc ′ is applied to the downstream electrode of the AC coupling capacitor 203. For this reason, the potential difference finally applied to the AC coupling capacitor 203 is the potential difference between the average level potential of the signal applied to the upstream side and the constant potential Vcc ′ applied to the downstream side electrode. (Broken line) and this is the offset level.

  By performing the solid clamp operation as described above, the charging time during one main scanning line can be extended. Therefore, the AC coupling capacitor 203 can be obtained in a shorter time than in the case of the normal clamp operation described with reference to FIGS. Can be charged.

However, in this solid clamp operation, the potential difference between the average level potential of the upstream signal that changes every moment during the assertion period and the constant potential Vcc ′ applied to the downstream electrode becomes an offset level. This offset level is shifted from the offset level corresponding to the signal area of the black pixel.
Further, the signal area corresponding to the reflected light intensity in the effective pixel period changes in signal level due to external light.For example, when a solid clamp operation is performed with the cover of the image reading device open at the time of activation, There is a possibility that the offset level greatly deviates from the signal area of the black pixel. Moreover, there is a possibility that the reset noise greatly deviates.

For this reason, after the offset level has converged to some extent after the solid clamping operation, it is necessary to switch to the normal clamping operation and gradually correct the offset level deviation.
However, depending on the degree of deviation, there is a problem that the time until the normal offset level corresponding to the signal area of the black pixel is stabilized becomes long, and the time until the original image can be read after starting is increased. .

  With respect to this point, in Patent Document 1 described in the background art section, when the assertion period of the clamp gate signal is extended to the effective pixel period, the clamp operation is performed in an area excluding the reset noise output from the CCD. If this method is applied, it is considered that the offset level does not greatly deviate from the normal offset level due to reset noise.

  However, in the method of Patent Document 1, since the clamping operation is performed using a signal region corresponding to the reflected light intensity in the effective pixel period, external light is incident depending on the state of the image reading device, and the signal whose offset level is a black pixel. There is a possibility that it will deviate greatly from the one corresponding to the area. For this reason, even if the invention disclosed in Patent Document 1 is applied, the above problem cannot be solved.

  Accordingly, the present invention solves such a problem, and in an image reading apparatus equipped with a CCD sensor, a capacitor for giving an offset to the output signal of the CCD sensor can be charged to a predetermined target voltage in a short time. The purpose is to do so.

  In order to achieve the above object, the present invention sequentially transfers a photoelectric conversion element that accumulates charges according to the intensity of reflected light from a reading target and a charge accumulated by the photoelectric conversion elements at a timing indicated by an input drive signal. A charge transfer circuit that converts the charge output from the charge transfer circuit into an image signal that is an analog voltage signal, and outputs the charge of the charge voltage conversion circuit at the timing indicated by the input reset signal. A reset circuit for resetting the output signal, a capacitor for giving an offset to the output signal, and a clamp circuit for giving a first predetermined voltage to the output of the capacitor and the CCD sensor at the timing indicated by the input CCD clamp signal Connected to the CCD sensor and downstream of the CCD sensor to offset the output signal of the CCD sensor And a clamp control means for supplying a second predetermined voltage to the capacitor at a timing indicated by a clamp signal. The clamp control means applies the second predetermined voltage to the capacitor. During the supply, the drive signal and the reset signal are provided so that the charge transfer and reset do not occur while the clamp circuit or the capacitor supplies the first predetermined voltage to the output terminal of the CCD sensor. And a first clamp control means for controlling the CCD clamp signal.

  According to the image reading apparatus of the present invention as described above, in the image reading apparatus provided with the CCD sensor, the capacitor for giving an offset to the output signal of the CCD sensor can be charged to a predetermined target voltage in a short time. .

1 is a cross-sectional view illustrating a schematic configuration of an image forming apparatus according to an embodiment of the present invention. FIG. 2 is a diagram illustrating a schematic configuration of an image reading apparatus provided in the image forming apparatus illustrated in FIG. 1. FIG. 3 is a block diagram illustrating a hardware configuration of the image reading apparatus illustrated in FIG. 2. 3 is a timing chart of signals input to a CCD sensor and a clamp circuit in a first clamping operation of the image reading apparatus shown in FIG. FIG. 5 is a partially enlarged view of FIG. 4. It is the figure which showed the internal block diagram of a CCD sensor and AFE, and the circuit structure between them. 5 is a timing chart of signals input to a CCD sensor and a clamp circuit when reading a document. FIG. 8 is a partially enlarged view of the CCD output and clamp gate signal of FIG. 7 in a black pixel period. FIG. 8 is a timing chart corresponding to FIG. 7 when a solid clamp operation is performed. It is the elements on larger scale in the black pixel period of CCD output at the time of performing solid clamp operation and a clamp gate signal.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
First, a schematic configuration of an image forming apparatus according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view showing a schematic configuration of the image forming apparatus.

In FIG. 1, the image forming apparatus 100 includes an image reading device 10 and a main body unit 20. In the figure, R indicated by a broken line indicates an optical path of reflected light from the original, and L indicates an optical path of laser light for writing.
Among these, the image reading apparatus 10 is an image reading apparatus that can automatically convey a document and perform sheet-through reading. The detailed configuration of the image reading apparatus 10 will be described later.

The main body 20 includes a paper feed unit 21, a transport unit 22, a registration roller 23, an image forming unit 24, a writing unit 25, a transport belt 26, a fixing unit 27, a paper discharge unit 28, and a paper discharge tray 29.
Among these, the paper feeding unit 21 includes three paper feeding units provided in each of the three trays, and the uppermost document among the documents stacked on each tray is fed by any of the paper feeding units. A sheet feeding unit that feeds out one sheet and feeds the sheet to the transport unit 22.

The transport unit 22 includes a plurality of transport rollers, a guide plate (not shown), and the like, and is a transport unit that transports a document fed from the paper feed unit 21 to the registration rollers 23.
The registration roller 23 performs skew correction by once abutting and stopping the document conveyed by the conveyance unit 22, and the skew-corrected document between the photosensitive drum of the image forming unit 24 and the conveyance belt 26. This is a roller for feeding the toner image developed on the photosensitive drum to the nip portion at the timing when the toner image comes.

The image forming unit 24 includes a photosensitive drum, a charger for charging the surface of the photosensitive drum to a predetermined potential, a developing unit for developing a toner image on the electrostatic latent image formed by the writing unit 25, and the like. As an integrated image forming means.
The writing unit 25 irradiates and exposes the surface of the charged photosensitive drum with laser light L corresponding to the image information read by the image reading apparatus 10, thereby forming an electrostatic latent image on the surface of the photosensitive drum. belongs to.

The conveyance belt 26 rotates at the same speed as the photosensitive drum, and conveys the original after transferring the toner image to the fixing unit 27.
The fixing unit 27 includes a fixing roller and a pressure roller, and is a fixing unit that fixes unfixed toner on the document by heating and pressing the document conveyed by the conveyance belt 26.
The paper discharge unit 28 is a paper discharge unit for guiding the fixed original to the paper discharge tray 29. The paper discharge tray 29 is for stacking and holding the discharged originals.

In the image forming apparatus 100 as described above, when an image is formed on a document, first, one document on the uppermost surface among the documents stacked on one of the trays is fed by the sheet feeding unit 21 and then transported. 22 is conveyed to a position where it contacts the registration roller 23.
On the other hand, the image information read by the image reading device 10 is written on the photosensitive drum by the laser light L from the writing unit 25, and a toner image is formed by passing through the developing unit.

Then, the document is conveyed by a registration roller in accordance with the timing at which the developed toner image reaches the transfer position, and is conveyed by a conveyance belt 26 that rotates at the same speed as the rotation of the photosensitive drum, while the toner on the photosensitive drum. The image is transferred to the original.
Thereafter, unfixed toner is fixed by the fixing unit 27, and the paper is discharged onto the paper discharge tray 219 by the paper discharge unit 28.

Next, a detailed configuration of the image reading apparatus 10 will be described with reference to FIG. The image reading apparatus 10 can be configured as a single apparatus. FIG. 2 is a diagram showing a schematic configuration of the image reading apparatus.
In FIG. 2, the image reading apparatus 10 includes an automatic document feeder (ADF) 11, a sheet-through reading slit 12, a contact glass 13, a reference white plate 14, a first carriage 15, a second carriage 16, a lens unit 17, and A CCD sensor 201 is provided. Note that R indicated by a broken line in the drawing indicates an optical path of reflected light from the document. The CCD sensor 201 is the same as the CCD sensor 201 shown in FIG.

Among these, the ADF 11 is an automatic conveying means for automatically feeding and conveying the documents P1 placed on the document table one by one automatically.
The sheet-through reading slit 12 is a reading position for reading the document P1 automatically conveyed by the ADF 11, and is a gap through which irradiation light from the light source 15a passes. The sheet-through reading slit 12 may be a member (for example, glass) that transmits the irradiation light from the light source 15a.

The contact glass 13 is for placing the document P2.
The reference white plate 14 is used for reading a document to adjust the signal level output from the CCD sensor 201 to a predetermined reference level in order to effectively use the dynamic range of an A / D converter 207 (see FIG. 3) described later. This is a reference member that is read in advance.

The first carriage 15 includes a light source 15a for document exposure and a first reflecting mirror 15b. The first carriage 15 is driven by a stepping motor (not shown) to move the document P2 placed on the contact glass 13 in the direction indicated by the arrow A (sub-scanning). Optical scanning while moving in the direction). Further, it is also possible to stop at the reading position of the sheet-through reading slit 12 and use it for reading an image of the document P1 automatically conveyed by the ADF 11.
In addition, as a light source, well-known illumination means, such as LED and a fluorescent lamp, can be used.

The second carriage 16 includes a second reflecting mirror 16a and a third reflecting mirror 16b. The second carriage 16 is driven by a stepping motor (not shown) similarly to the first carriage 15, and follows the first carriage 15 in the direction of arrow A. To move on.
The lens unit 17 collects the reflected light, which is sequentially reflected and deflected from the first reflecting mirror 15b to the third reflecting mirror 16b, onto the CCD sensor 201 to form an image.

In such an image reading apparatus 10, when reading an image of the document P2 placed on the contact glass 13, the light source 15 a is turned on, and the first carriage 15 and the second carriage 16 are moved to the right by a stepping motor (not shown). The original P2 is read by scanning.
On the other hand, when the original P1 conveyed by the ADF 11 is read, the light source 15a is turned on, and the first carriage 15 is kept in a standby state at the reading position of the sheet-through reading slit 12. Then, the document P2 is guided by the plurality of rollers of the ADF 11 in the direction of the arrow B, thereby scanning the document P2 at the position of the sheet through reading slit 12.

  In any of these reading methods, the reflected light from the original illuminated by the light source 15a is sequentially reflected and deflected from the first reflecting mirror 15b to the third reflecting mirror 16b and guided to the lens unit 17, and received by the CCD sensor 201. A reduced image is formed on the surface, and an analog voltage is output by photoelectric conversion. The analog voltage from the CCD sensor 201 is processed by various circuits integrated into the AFE 205 to obtain digital image data.

Next, the hardware configuration inside the image reading apparatus 10 will be described with reference to FIG.
FIG. 3 is a block diagram showing a hardware configuration of the image reading apparatus 10. In the hardware configuration in FIG. 3, the same components as those in FIG.
As illustrated in FIG. 3, the image reading apparatus 10 includes a CCD sensor 201, a buffer 202, an AC coupling capacitor 203, a clamp circuit 204, an AFE 205, a timing signal generation circuit 210, and a control unit 211 as internal hardware. .

Among these, the CCD sensor 201 is the same as that shown in FIG. 6, and its internal configuration is also the same. That is, the CCD sensor 201 shown in FIG. 3 includes a photodiode 201a, a charge transfer circuit 201b, a charge-voltage conversion circuit 201c, a charge reset circuit 201d, a built-in clamp circuit 201e, and a buffer amplifier 201f. Corresponding signals (CCD shift signal, CCD drive signal, CCD reset signal, and CCD clamp signal) are supplied from the timing signal generation circuit 210.
The buffer 202, the AC coupling capacitor 203, and the clamp circuit 204 are the same as those shown in FIG.

The AFE 205 is basically the same as that shown in FIG. 6, but in FIG. 3, in addition to the sample hold circuit 206, each circuit of the variable gain amplifier 207, the A / D converter 208, and the image processing unit 209. IC.
Among these, the variable gain amplifier 207 is a variable amplifier that amplifies the analog voltage signal after the sample hold with a set gain (amplification factor). The gain to be set is determined so that the level of the analog voltage signal obtained by reading the reference white plate 14 when the image reading apparatus is started becomes the target white level. By determining the gain in this way, the dynamic range of the A / D converter 208 can be widely used.

The A / D converter 208 is a circuit for converting the analog voltage signal amplified by the variable gain amplifier 207 into a digital signal.
An image processing unit 209 performs various data processing such as shading correction and gamma correction on the digital signal output from the A / D converter 208 to generate image data. This image data is used for various purposes such as being transmitted to the writing unit 25 of the image forming apparatus 100 and used for image formation, stored in a storage unit (not shown) via the control unit 211, and transmitted to an external device. it can.

  The timing signal generation circuit 210 corresponds to that shown in FIG. 6. In FIG. 3, in addition to the CCD sensor 201 and the clamp circuit 204, the sample hold circuit 206 of the AFE 205, the A / D converter 208, and the image processing. A signal for taking the operation timing of each circuit is also input to the unit 209. Thus, the timing at which the sample hold circuit 206 of the AFE 205 performs sample hold on the analog image signal, the timing at which the A / D converter 208 performs A / D conversion, and the timing at which the image processing unit 209 performs image processing are also controlled. Like to do.

The control unit 211 is a control unit that controls the operation timing of the CCD sensor 201, the clamp circuit 204, and the like by setting the timing in the timing signal generation circuit 210, sets the gain in the variable gain amplifier 207, and the image processing unit. The control unit 209 controls various image processing performed by 209 to obtain image data of a document read by the image reading apparatus 10.
In this embodiment, the control unit 211 not only controls the image reading apparatus 10 but also appropriately controls motors and sensors (not shown) of the main body unit 20 to feed and transfer a document for printing. The entire image forming apparatus 100 is controlled by performing fixing, paper discharge, and the like.

In the image reading apparatus 10 described above with reference to FIGS. 2 and 3, one characteristic point is the control of each signal when the AC coupling capacitor 203 is charged for the clamping operation.
Accordingly, in connection with this point, an example of a clamping operation performed by the image reading apparatus 10 will be described below with reference to FIGS. 4 and 5.
4 is a timing chart of signals input to the CCD sensor 201 and the clamp circuit 204 in the first clamping operation of the image reading apparatus 10, and FIG. 5 is a partially enlarged view of FIG.
The description of each signal input to the CCD sensor 201 and the clamp gate signal input to the AC coupling capacitor 203 shown in FIG. 4 is the same as described with reference to FIG.

As shown in FIG. 4, in the first clamping operation, both the black pixel period and the effective pixel period are not affected by the analog voltage signal corresponding to the reset noise or the reflected light intensity output in the effective pixel period. The CCD shift signal, the CCD drive signal, and the CCD reset signal are not asserted, and only the CCD clamp signal is asserted to execute the clamp operation.
Such an operation can be performed by the controller 211 performing a required timing setting for the timing signal generation circuit 210.

Here, when the CCD clamp signal is asserted, the switch of the built-in clamp circuit 201e in FIG. 6 is closed, and the reference potential Va is applied to the downstream electrode of the capacitor and the output portion of the CCD sensor 201. In this state, the output voltage of the CCD sensor 201 becomes the reference potential Va.
At this time, since the CCD shift signal, the CCD drive signal, and the CCD reset signal are not asserted, the output from the charge-voltage conversion circuit 201c applied to the electrode on the upstream side of the capacitor has a constant potential, and Va And the capacitor are charged up to the potential difference between them and the constant potential.

After the capacitor is charged, even if the CCD clamp signal is negated and the switch of the built-in clamp circuit 201e is turned off, if the output from the charge-voltage conversion circuit 201c is a constant potential, the potential on the downstream side of the capacitor is Va. Thus, a signal having the same potential Va as that when the CCD clamp signal is asserted is output as the CCD output.
In the first clamp operation, after the switch is turned off, the CCD clamp signal is repeatedly asserted at a predetermined interval for recharging, considering that the feedthrough level gradually decreases due to the discharge of the capacitor. Yes.

  As described above, in the first clamping operation, while the CCD clamp signal is asserted and the predetermined voltage Vcc ′ is supplied to the AC coupling capacitor 203, the CCD clamp signal is asserted at a constant interval, so that during the assertion period. The reference potential Va can be output from the power supply to the output of the CCD sensor 201 from the capacitor during the negation period.

  At this time, since the CCD drive signal and the CCD reset signal are not asserted, a constant field through level is applied to the upstream electrode of the capacitor included in the clamp circuit 201e. As a result, as described above, the reference potential Va can be output from the capacitor to the output of the CCD sensor 201 even during the negation of the CCD clamp signal.

The output of the CCD sensor 201 is supplied to the upstream electrode of the AC coupling capacitor 203.
Therefore, the AC coupling capacitor 203 can be charged by applying constant voltages Vcc ′ and Va to both electrodes.

  The offset level due to the charging potential charged with Vcc ′ and Va is close to the normal offset level used as a reference for the black level due to the charging potential charged with Vcc ′ and the analog voltage in the signal region of the black pixel. This is because the value of the feedthrough level is close to the value of the analog voltage in the signal region of the black pixel, as seen in FIG. For this reason, as compared with the solid clamp operation in which charging is performed including an analog voltage signal corresponding to reset noise and reflected light intensity as shown in FIGS. It can be made small without depending on the influence of.

  In addition, in the case of the first clamping operation, control is performed so that charge transfer from the photodiode 201a does not occur, so that the cover of the image reading device 10 is open and light enters the photodiode 201a. Even in a bad state, it is not affected by extraneous light.

For this reason, first, after the charging voltage of the AC coupling capacitor 203 is brought close to the charging voltage that can be used as the reference of the black level by the first clamping operation, the first clamping operation is invalidated, and FIGS. By switching to the normal clamping operation (second clamping operation) shown in FIG. 9, the charging voltage of the AC coupling capacitor 203 is used as a reference for the black level earlier than when performing the solid clamping operation shown in FIGS. The charging voltage used can be adjusted.
Therefore, by using the first clamping operation, it is possible to reduce the time required for charging the AC coupling capacitor 203, and from when the AC coupling capacitor 203 is discharged to when the original image can be read. Time can be shortened.

  Therefore, it is useful to use the first clamping operation when starting up the image reading apparatus in which the AC coupling capacitor 203 is considered to be discharged. Here, the time of starting up is when the power is turned on or when returning from the power saving state or the standby state to the readable state.

Further, in the first clamping operation, charge transfer and reset of the CCD sensor 201 are not performed, so that power consumption for driving the CCD sensor 201 can be reduced.
For this reason, it is conceivable to reduce the power consumption of the CCD sensor 201 by performing this first clamping operation not only when the image reading apparatus 10 is started up but also during other periods.

  For example, by performing the first clamping operation in the standby state of the image reading apparatus 10, the CCD sensor is maintained while maintaining the charging voltage of the AC coupling capacitor 203 close to the charging voltage that can be used as a black level reference. The power consumption of 201 can be reduced. The standby state here means a state in which it stands by and stands by so that an image can be read immediately.

In this way, even in the standby state, by performing the first clamping operation, it is possible to reduce the total standby power until the image reading apparatus 10 is turned off.
Then, when the reading of the document is instructed, the first clamping operation is disabled and the normal clamping operation is switched to quickly use the charging voltage of the AC coupling capacitor 203 as the black level reference. Can be adapted to

Further, for example, after the document reading is completed, a time measuring unit such as a timer is provided to measure the elapsed time after the document reading, and when the predetermined time or more has elapsed, the normal clamping operation is invalidated and the first clamping operation is performed. It is good to return to operation.
In this way, when the document set by the user is read continuously, the normal clamping operation remains without returning to the first clamping operation immediately after reading the first document. Since continuous scanning can be executed, it is possible to shorten the time until the start of scanning of the next document. In the first clamping operation, although slightly, the charging voltage of the AC coupling capacitor 203 deviates from the charging voltage used as the black level reference. Therefore, it is desirable to continue the normal clamping operation when reading immediately.

  This is the end of the description of the embodiment. In the present invention, the configuration of the image reading apparatus 10, the input timing of each signal input to the CCD sensor 201 and the clamp circuit 204 by the control unit 211, the start timing of the first clamping operation. However, it is needless to say that is not limited to that described in the above-described embodiment.

  For example, in the timing chart of FIG. 4, the CCD shift signal, the CCD drive signal, and the CCD reset signal are not input during the period when the clamp gate signal is asserted, but the CCD shift signal is not input. Is not essential, and at least the CCD drive signal and the CCD reset signal need not be input. This is because even if a CCD shift signal is input, charge transfer is not performed unless a CCD drive signal is input.

  Similarly, in the timing chart of FIG. 4, the CCD clamp signal is input to the built-in clamp circuit 201e of the CCD sensor 201 at the same timing as the normal clamp operation, but this is not essential, and the clamp gate signal is As long as the CCD output can be maintained at a constant feedthrough level while the AC coupling capacitor 203 is asserted and charged, it may be input at a timing other than that shown in FIG.

  In the example of FIG. 4, the CCD clamp signal is asserted at a predetermined interval in consideration of the discharge of the capacitor of the built-in clamp circuit 201e. For example, the CCD clamp signal is always asserted to output a constant feedthrough level. Alternatively, if the potential clamped once to the feedthrough level does not drop due to discharge or the like, the CCD clamp signal may be input only once.

  When the timing setting of the control unit 211 performed for the timing signal generation circuit 210 is performed by the software operation of the control unit 211, the timing signal generation circuit 210 itself is set to the first clamp shown in FIG. By configuring with an IC that performs the operation, the first clamping operation can be executed before the software of the control unit 211 is activated, and the clamping time when the power is turned on can be further shortened.

Of course, the image reading apparatus 10 provided with the CCD sensor 201 may be provided as an image reading means in an image forming apparatus such as a digital copying machine, a facsimile machine, or a complex machine combining these functions.
In addition, the configurations of the above-described embodiments and modifications can be applied in any combination as long as they do not contradict each other.

  100: image forming apparatus, 10: image reading apparatus, 11: ADF, 12: sheet-through reading slit, 13: contact glass, 14: reference white plate, 15: first carriage, 16: second carriage, 17: lens unit , 20: body portion, 21: paper feeding unit, 22: transport unit, 23: registration roller, 24: image forming unit, 25: writing unit, 26: transport belt, 27: fixing unit, 28: transport unit, 29: Paper discharge tray 201: CCD 202: Buffer 203: AC coupling capacitor 204: Clamp circuit 205: AFE 206: Sample hold circuit 207: Variable gain amplifier 208: A / D converter 209: Image processing Unit 210: timing signal generation circuit 211: control unit

JP2008-236247 Patent No. 3778402

Claims (9)

A photoelectric conversion element that accumulates charges according to the intensity of reflected light from the reading target, a charge transfer circuit that sequentially transfers charges accumulated by the photoelectric conversion elements at a timing indicated by an input drive signal, and an output from the charge transfer circuit A charge-voltage conversion circuit that converts the generated charge into an image signal that is an analog voltage signal and outputs it, a reset circuit that resets the charge of the charge-voltage conversion circuit at the timing indicated by the input reset signal, and an offset in the output signal A CCD sensor comprising: a capacitor for providing; and a clamp circuit for applying a first predetermined voltage to the output unit of the capacitor and the CCD sensor at a timing indicated by an input CCD clamp signal;
A capacitor connected downstream of the CCD sensor for providing an offset to the output signal of the CCD sensor;
An image reading apparatus comprising clamp control means for supplying a second predetermined voltage to the capacitor at a timing indicated by a clamp signal,
While the clamp control means supplies the second predetermined voltage to the capacitor, the charge transfer is performed while the clamp circuit or the capacitor supplies the first predetermined voltage to the output terminal of the CCD sensor. An image reading apparatus comprising: a first clamp control unit that controls the drive signal, the reset signal, and the CCD clamp signal so that the reset does not occur. The image reading apparatus according to claim 1,
An image reading apparatus characterized in that the signal control by the first clamp control means is performed when the image reading apparatus is started up. The image reading apparatus according to claim 1, wherein
While the drive signal and the reset signal are input to the CCD sensor at a timing corresponding to each pixel, the clamp control means is configured to output the second image signal corresponding to the black pixel from the CCD sensor. Second clamp control means for controlling the clamp signal to supply a predetermined voltage to the capacitor;
An image reading apparatus that controls a signal by the second clamp control unit in a state in which the signal control by the first clamp control unit is invalidated when an instruction to read a document is given. The image reading apparatus according to claim 3,
With timekeeping means,
When the time measured by the time measuring unit from the previous document reading exceeds a predetermined time, the control of the signal by the second clamp control unit is invalidated and the control of the signal by the first clamp control unit is started. An image reading apparatus. A photoelectric conversion element for accumulating charges according to the intensity of reflected light from the reading object, means for outputting an image signal according to the charges accumulated by the photoelectric conversion element, a capacitor for giving an offset to the output signal, and the CCD A CCD sensor comprising a clamp circuit for applying a first predetermined voltage to the output of the sensor;
A capacitor connected downstream of the CCD sensor;
An image reading apparatus comprising: a clamp control unit configured to supply a second predetermined voltage to the capacitor and charge the capacitor at a timing indicated by a clamp signal;
While the second predetermined voltage is supplied to the capacitor by the clamp control means, the CCD sensor is controlled so that the output of the CCD sensor is maintained at a constant voltage by the clamp circuit and the capacitor. An image reading apparatus comprising one clamp control unit. The image reading apparatus according to claim 5,
An image reading apparatus characterized in that the signal control by the first clamp control means is performed when the image reading apparatus is started up. The image reading apparatus according to claim 5, wherein:
While the CCD sensor outputs the image signal for each pixel at a timing corresponding to each pixel, the clamp control means outputs the second predetermined voltage at a timing when the image signal corresponding to the black pixel is output from the CCD sensor. Second clamp control means for controlling the clamp signal to supply the capacitor to the capacitor,
An image reading apparatus that performs signal control by the second clamp control unit while the signal control by the first clamp control unit is disabled during reading of a document. The image reading apparatus according to claim 7,
With timekeeping means,
After the time measured by the time measuring means from the previous document reading exceeds a predetermined time, the signal control by the second clamp control means is invalidated and the signal control by the first clamp control means is started. To do.   An image forming apparatus comprising the image reading apparatus according to claim 1 as an image reading unit.

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