JP2013042452A - Communication device, communication method and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a communication device in which the transmission characteristics can be enhanced by simplifying the processing of applying frequency clipping while distinguishing between systematic bits and parity bits.SOLUTION: A communication device comprises an encoding unit which creates sign bits including systematic bits and parity bits by performing error correction coding of information bits, a bit loading unit which determines the order of sign bits so that at least one frequency signal block based only on the parity bits is created, a frequency signal creating unit which creates a frequency signal based on a bit string formed by dividing a plurality of sign bits and consisting of a plurality of sign bits continuous in the above-mentioned order, and a transmission unit which transmits a signal where the frequency signals are arranged on a sub-carrier. Each frequency signal block consists of a frequency signal based on the above-mentioned bit string.

Description

  The present invention relates to a communication device, a communication method, and a program.

  The standardization of LTE (Long Term Evolution) system, which is the wireless communication system of the 3.9th generation mobile phone, has been completed. Recently, LTE-A (LTE-Advanced), which has further developed the LTE system, Standardization is performed as one of wireless communication systems (also referred to as IMT-A or the like).

  Furthermore, as a new transmission method, a spectrum shaping technique for clipping (deleting or deleting) a frequency spectrum (frequency signal) on the transmission side is disclosed (Patent Document 1). On the receiving side, the clipped subcarrier is regarded as being received via a propagation path having a propagation path gain of zero. At this time, since strong intersymbol interference newly occurs, an equalizer capable of removing strong intersymbol interference such as turbo equalization which is nonlinear iterative equalization is necessary, and such reception processing is employed. .

FIG. 13 is a schematic block diagram illustrating a configuration example of a conventional communication apparatus (transmission apparatus). The information bits to be transmitted are turbo encoded by the turbo encoder 1001. The code bits are converted into modulation symbols such as QPSK (Quaternary Phase Shift Keying), 16QAM (Quadrature Amplitude Modulation), and 64 QAM by the modulation unit 1002. In DFT section 1003, signal subjected to modulation discrete Fourier transform of the _{N DFT} points: is converted into a frequency signal by (DFT Discrete Fourier Transform). The obtained frequency signal is deleted (clipped) by N _clip (where N _clip <N _DFT ) points by the clipping unit 1004, and a frequency signal of N _DFT -N _clip points is generated.

The clipped frequency signal is assigned to an arbitrary subcarrier in the system band by the frequency mapping unit 1005. Arbitrary subcarriers may be determined based on allocation information notified from another communication apparatus serving as a control station, may be determined by the communication apparatus, or may be a predefined allocation. The frequency signal allocated to the subcarrier is converted into a time signal by IFFT unit 1006 by inverse fast Fourier transform (IFFT) of N _FFT points, and a reference signal for demodulation is multiplexed by reference signal multiplexing unit 1007. Is done. After the reference signal is multiplexed, a CP (Cyclic Prefix) unit 1008 adds a CP to the time signal. Finally, the radio unit 1009 up-converts to a radio frequency and transmits from the antenna 1010.

  In contrast, Non-Patent Document 1 proposes a method of performing clipping at different clipping rates for each of a DFT block based on systematic bits (also referred to as systematic bits) and a DFT block based on parity bits. .

JP 2008-219144 A

Koichi Tahara and Kenichi Higuchi, “Examination of Puncturing with Differentiating Systematic Bits and Parity Bits in Turbo Coding with Frequency Domain Puncturing”, IEICE, IEICE Tech. SIP 2010-99, RCS 2010-229 (2011- 01)

  However, in the method described in Non-Patent Document 1, specific transmission processing other than the arithmetic expression is not disclosed, and when trying to realize the arithmetic expression as it is, only the frequency signal based on the systematic bits and only the parity bit are used. Therefore, there is a problem that the processing becomes complicated because frequency signals based on the above are generated and frequency puncturing is separately performed on these signals and multiplexed.

  The present invention has been made in view of such circumstances, and an object of the present invention is to simplify a process of applying frequency clipping by distinguishing systematic bits and parity bits and improving transmission characteristics. It is to provide a communication method and a program.

(1) The present invention has been made to solve the above-described problem, and an aspect of the present invention is an encoding unit that performs error correction encoding on information bits and generates code bits including systematic bits and parity bits. A bit loading unit that determines an arrangement order of the code bits so that at least one frequency signal block based only on the parity bits is generated, and a bit string obtained by dividing the code bits for which the arrangement order is determined. A frequency signal generation unit that generates a frequency signal based on a bit string composed of a plurality of code bits that are consecutive in the arrangement order, and a transmission unit that transmits a signal in which the frequency signal is arranged in a subcarrier, Each of the frequency signal blocks is configured by a frequency signal based on one bit string.

(2) Further, another aspect of the present invention is the communication apparatus described above, wherein the order of arrangement determined by the bit loading unit is one bit string composed only of the parity bits and one composed only of the systematic bits. The bit sequence is a sequence in which two bit sequences are concatenated.

(3) Another aspect of the present invention is the communication apparatus described above, wherein the error correction coding is a turbo code.

(4) According to another aspect of the present invention, in the communication device described above, the number of bits of the bit string including only the parity bits in the bit string is greater than the number of bits of the other bit strings. Features.

(5) Another aspect of the present invention is the communication apparatus described above, wherein a clipping unit that deletes a part of the frequency signal that constitutes the frequency signal block and a frequency that constitutes the frequency signal block. And a clipping control unit that determines the number of subcarriers to be deleted by the clipping unit according to whether or not the signal is based only on parity bits.

(6) According to another aspect of the present invention, there is provided a communication apparatus as described above, wherein a clipping unit that deletes a part of a frequency signal that constitutes the frequency signal block, and the bit string includes only the parity bit. And a clipping control unit for determining the number of frequency signals to be deleted by the clipping unit from the frequency signal block based on the bit string.

(7) Further, according to another aspect of the present invention, there is provided a first process in which information bits are subjected to error correction coding to generate code bits including systematic bits and parity bits, and a frequency signal block based only on the parity bits. A second step of determining the order of the code bits so that at least one is generated, and a bit string obtained by dividing the plurality of code bits, and comprising a plurality of code bits continuous in the order A third process of generating a frequency signal based on a bit string and a fourth process of transmitting a signal in which the frequency signal is arranged in a subcarrier, and each of the frequency signal blocks includes one bit string It is a communication method characterized by being comprised by the frequency signal based on.

(8) According to another aspect of the present invention, there is provided a code unit for generating a code bit including a systematic bit and a parity bit by performing error correction coding on an information bit and a frequency signal block based only on the parity bit. A bit loading unit that determines the arrangement order of the code bits, and a bit string obtained by dividing the plurality of code bits into a bit string composed of a plurality of code bits that are continuous in the arrangement order. A frequency signal generating unit that generates a frequency signal, and a program for causing the frequency signal to be transmitted as a transmission unit that transmits a signal in which the frequency signal is arranged in a subcarrier, wherein one frequency signal block is included in one bit string. It is a program composed of frequency signals based on it.

  According to the present invention, it is possible to simplify the process of applying frequency clipping by distinguishing systematic bits and parity bits, and improve transmission characteristics.

It is a schematic block diagram which shows the structure of the mobile communication system in 1st Embodiment of this invention. FIG. 3 is a conceptual diagram illustrating an example of an uplink subframe configuration for illustrating the concept of the embodiment. 2 is a schematic block diagram showing a configuration of a first communication device 100 in the same embodiment. FIG. It is a conceptual diagram which shows the frequency signal of the DFT block which is not clipped in the embodiment. It is a conceptual diagram which shows the frequency signal of the DFT block clipped in the same embodiment. FIG. 2 is a schematic block diagram showing configurations of a turbo encoding unit 1 and a bit loading unit 2 in the same embodiment. It is a schematic block diagram which shows the structure of the virtual circular buffer 16 in the same embodiment. It is a conceptual diagram which shows the concept of the virtual circular buffer 16 in the same embodiment. It is a schematic block diagram which shows the structure of the DFT part 4 in the same embodiment. It is a schematic block diagram which shows the structure of the 2nd communication apparatus 200 in the embodiment. It is a figure which shows an example of a structure of the sub-frame in 2nd Embodiment of this invention. It is a schematic block diagram which shows the structure of the bit loading part 2a in the same embodiment. It is a schematic block diagram which shows the structural example of the conventional communication apparatus.

  Embodiments for carrying out the present invention will be described below with reference to the drawings. In the following embodiments, turbo coding is assumed as an error correction coding method, but other error correction codes may be used as long as they are error correction codes composed of systematic bits (also referred to as systematic bits) and parity bits. But you can. In the following embodiments, a single carrier frequency division multiple access (SC-FDMA) that assigns a frequency signal generated by transforming by DFT (Discrete Fourier Transform) to arbitrary continuous frequencies. (Division Multiple Access) method will be described as an example, but a Clustered DFT-S-OFDMA (DFT-Spread Orthogonal Frequency Division Multiple Access) method or a multicarrier method for frequency spreading may be used. Further, the present invention can be applied to multi-antenna techniques such as transmission diversity using a plurality of transmission antennas (antenna ports) and MIMO (Multiple-Input Multiple-Output) multiplexing. In the following embodiments, uplink (communication from a mobile station apparatus to a base station apparatus) is targeted, but the present invention is not limited to this.

[First Embodiment]
FIG. 1 is a schematic block diagram showing a configuration of a mobile communication system according to the first embodiment of the present invention. The mobile communication system 300 according to the present embodiment includes a plurality of first communication devices 100 that are mobile stations and a second communication device 200 that is a base station. Each first communication device 100 wirelessly communicates with the second communication device 200 in both directions.

FIG. 2 is a conceptual diagram illustrating an example of an uplink subframe configuration for illustrating the concept of the present embodiment. The subframe 43 is configured by time-multiplexing a plurality of DFT blocks (frequency signal blocks) composed of a plurality of modulation symbols. In FIG. 2, each rectangle denoted by reference numeral 41 indicates a DFT block including a modulation symbol composed of systematic bits. In addition, each rectangle to which reference numeral 42 is attached indicates a DFT block made up of only modulation symbols made up of only parity bits. In the present embodiment, the number of DFT blocks constituting one subframe is 5, and a frequency signal of _{NDFT 1} point is transmitted per 1 DFT block. This embodiment is characterized in that whether or not clipping is changed between the DFT block 41 and the DFT block 42. Therefore, the DFT block 41 includes N _DFT1 modulation symbols, and the DFT block 42 includes N _DFT1 + N _clip modulation symbols for clipping. That is, the number of bits of a bit string represented by a DFT block (for example, DFT block 42) based only on parity bits is larger than the number of bits of a bit string represented by another DFT block (for example, DFT block 41). At this time, in order to control whether or not clipping is performed, a parameter called a block number of the DFT block is newly set, and the first block number of the DFT block to be clipped is used for controlling whether or not clipping is performed. . In the case of FIG. 2, block numbers 1 to 5 exist, and the first block number of the DFT block to be clipped is 3.

  FIG. 3 is a schematic block diagram illustrating a configuration of the first communication device 100. The first communication apparatus 100 includes a turbo encoding unit 1, a bit loading unit 2, a modulation unit 3, a DFT unit 4, a clipping control unit 5, a clipping unit 6, a frequency mapping unit 7, an IFFT (Inverse Fast Fourier Transform). A conversion unit 8, a reference signal multiplexing unit 9, a CP insertion unit 10, a radio unit 11, a transmission antenna 12, a reception antenna 13, and a reception unit 14 are included. The receiving antenna 13 receives a signal transmitted by the second communication device 200 that is a base station device. The receiving unit 14 extracts at least the transport block size TBS, the modulation scheme information S, and the subcarrier allocation information MI, which are control information for the first communication apparatus 100, from the signal received by the receiving antenna 13. The transport block size TBS is output to the turbo encoding unit 1 and the bit loading unit 2. The modulation scheme information S is output to the bit loading unit 2 and the modulation unit 3. The subcarrier allocation information MI is output to the frequency mapping unit 7. The transport block size TBS is information indicating the number of information bits B transmitted in one subframe. The modulation scheme information S is information indicating a modulation scheme (BPSK (Binary Phase-Shift Keying), QPSK (Quadrature Phase-shift Keying, etc.)) used for transmission, and the subcarrier allocation information MI is a subcarrier in which a frequency signal is arranged. It is information which shows.

  As the information bits B, information bits of the number of information bits (transport block size TBS) notified as control information from the second communication apparatus 200 are input to the turbo encoder 1. The turbo encoder 1 turbo-encodes the information bits B and generates code bits composed of systematic bits and parity bits. Here, the unit of information bits B encoded by the turbo encoder 1 may be encoded as a code block in units of code blocks. The bit loading unit 2 determines the arrangement order of the code bits and stores the code bits in the virtual circular buffer in the arrangement order. The bit loading unit 2 outputs code bits in order from the virtual circular buffer. That is, the bit loading unit 2 outputs the sign bits in the determined arrangement order. Details of the bit loading unit 2 will be described later.

  The modulation unit 3 generates modulation symbols from the code bits in the order output by the bit loading unit 2. At this time, the modulation scheme specified by the modulation scheme information S is used as the modulation scheme. The DFT unit 4 (frequency signal generation unit) performs a discrete Fourier transform (DFT) on the modulation symbol generated by the modulation unit 3 to generate a frequency signal. At this time, the bit loading unit 2 calculates the block number of the DFT block composed only of the parity bits from the transport block size (other information may be used as long as the information indicates the DFT block composed only of the parity bits) Input to the DFT unit 4.

Based on the block number notified from the bit loading unit 2, the DFT unit 4 determines whether or not a modulation symbol based on the systematic bit is included in the modulation symbol subjected to DFT. When a modulation symbol based on systematic bits is included, the DFT unit 4 performs DFT on the number of points N _DFT1 and generates a frequency signal of the modulation symbol composed of systematic bits. Note that the number of points N _DFT1 is the number of subcarriers in the transmission band specified by the second carrier apparatus 200 by the subcarrier allocation information MI. In addition, when the modulation symbol based on the systematic bits is not included, that is, when only the modulation symbol based on the parity bit is included, the DFT unit 4 performs DFT with N _DFT1 + N _clip points, and a frequency with a wide bandwidth by N _clip points. Generate a signal. That is, the number of bits from which the modulation symbol that is the target of the DFT is larger when only the modulation symbol based on the parity bit is included than when the modulation symbol based on the systematic bit is included. The frequency signal output from the DFT unit 4 is input to the clipping unit 6. Note that performing DFT with the number of points X means performing discrete Fourier transform on X modulation symbols that are consecutive in the order generated by the modulation unit 3 to generate X frequency signals. The X frequency signals constitute one DFT block (frequency signal block). In addition, the DFT unit 4 acquires the number N _clip of points (subcarriers) to be clipped from the clipping control unit 5 described later.

On the other hand, the block number output from the bit loading unit 2 is also input to the clipping control unit 5. Based on the block number, the clipping control unit 5 outputs to the clipping unit 6 a control signal that does not clip frequency signals generated from modulation symbols based on bits including systematic bits. In addition, the clipping control unit 5 outputs to the clipping unit 6 a control signal that deletes N _clip points for the frequency signal generated only from the modulation symbol based on the parity bit. In the present embodiment, N _clip is set in advance to an optimized value corresponding to the modulation method within a range where the error rate does not increase. The clipping control unit 5 obtains N _clip by selecting a value corresponding to the modulation scheme specified by the modulation scheme information S from the preset values. Note that the preset value is not the N _clip itself but the clipping rate, and the clipping control unit 5 multiplies the selected clipping rate by the number of subcarriers specified in the subcarrier allocation information MI. , N _clip may be calculated. Further, in the case where the second communication device 200 designates not only the modulation method but also the coding rate, a value corresponding to the combination of the modulation method and the coding rate may be set. . In the clipping unit 6, the frequency signal output from the DFT unit 4 is a control signal output from the clipping control unit 5 (for example, whether or not the frequency signal is a modulation symbol composed of only parity bits, or Clipping is performed based on a control signal instructing not to perform clipping and a control signal instructing the number of clippings.

4 and 5 show the concept of the frequency signal of each DFT block. FIG. 4 shows a frequency signal when clipping is not performed. FIG. 5 shows a frequency signal in the case of clipping. N _clip subcarriers (hatched portions) are deleted from the frequency signal after DFT of N _DFT1 + N _clip points, and the remaining N _DFT1 sub Send carrier. Here, the high frequency component is deleted, but any subcarrier may be deleted.

  The clipping unit 6 applies the clipping as shown in FIG. 4 to the frequency signal generated from the modulation symbol including the systematic bits in accordance with the control signal from the clipping control unit 5, and starts from the modulation symbol based only on the parity bit. Applies to the generated frequency signal.

The frequency mapping unit 7 _{arranges the NDFT 1-} point frequency signal output from the clipping unit 6 on subcarriers based on the subcarrier allocation information MI. The IFFT unit 8 performs inverse fast Fourier transform on the frequency signal arranged on the subcarrier to convert it into a time signal. Thereafter, the reference signal multiplexing unit 9 multiplexes the reference signal with the time signal. The CP insertion unit 10 inserts a CP (Cyclic Prefix) into the time signal on which the reference signal is multiplexed. Finally, the radio unit 11 performs digital / analog conversion on the time signal in which the CP is inserted, further up-converts it to a radio frequency, and transmits it from the transmission antenna 12.

  Next, features of this embodiment will be described. A detailed process from the turbo encoder 1 to the bit loading 2 will be described. FIG. 6 is a schematic block diagram showing the configuration of the turbo encoding unit 1 and the bit loading unit 2. The bit loading unit 2 includes sub-block interleave units 15-1, 15-2, and 15-3, a virtual circular buffer 16, and a block number calculation unit 17.

  The turbo encoder 1 to which the transport block size TBS is input turbo-encodes information bits B having the number of bits indicated by the transport block size TBS. At this time, since the mother rate of the turbo code is 1/3, the systematic bit sequence BS, the first parity bit sequence BP1, and the second parity bit sequence BP2 having the same number of bits as the transport block size TBS are output. . Each is input to the bit loading unit 2. For each bit sequence, the sub-block interleave units 15-1, 15-2, and 15-3 perform the same block interleaving on these bit sequences BS, BP1, and BP2. Then, the sub-block interleaving units 15-1, 15-2, and 15-3 use the block interleaved systematic bit sequence BS ′, the first parity bit sequence BP1 ′, and the second parity bit sequence BP2 ′, as a virtual circular buffer. 16 is output. As a result, these bit sequences are combined into one bit sequence. For block interleaving, the method disclosed in, for example, a document (3GPP TS36.212) is applied. As in the document, the number of code bits called when calling from the virtual circular buffer 16 in order. As long as the interleaving has an effect of setting an arbitrary coding rate, the sub-block interleaving units do not have to be the same, and other methods may be used.

  On the other hand, the block number calculation unit 17 calculates the block number BN (start number) of the DFT block composed only of parity bits from the transport block size TBS and the modulation scheme information S by the following equation (1). Here, the block number of the DFT block is expressed by the following equation.

In the formula (1), _{N B} is the block number, TBS is transport block size, Q is if the number of bits that can be transmitted in one modulation symbol (modulation level is 4 in QPSK, Q = 2, the modulation level In the case of 16QAM in Expression 16, Q = 4). N _DFT1 represents the number of subcarriers used for signal transmission (the number of DFT points when clipping is not performed). Moreover, ceil (x) is a ceiling function and represents the smallest integer equal to or greater than the real number x. In this way, the bit loading unit 2 also outputs the calculated block number at the same time.

  FIG. 7 is a schematic block diagram showing the configuration of the virtual circular buffer 16. The virtual circular buffer 16 includes a code bit collection unit 21 and a rate matching unit 22. The sign bit collecting unit 21 arranges the obtained bit sequences BS ′, BP1 ′, BP2 ′ in order from the systematic bits, and alternately arranges the first parity bit and the second parity bit, and serializes them. . In this arrangement order, parity bits are continuously arranged after systematic bits. Therefore, when modulation and DFT are performed in this order, at least one DFT block based only on parity bits is generated. For example, if the transport block size is 16, there are 16 × 3 = 48 sign bits, but they are serialized as in the following equation (2).

In Expression (2), s (m) is the mth bit of the systematic bit sequence BS ′, c ₁ (m) is the mth bit of the first parity bit sequence BP1 ′, and c ₂ (m ) Is the mth bit of the second parity bit sequence BP2 ′. This is input to the rate matching unit 22, and the rate matching unit 22 calls the code bit from the circular buffer 16. The output code bit is input to the modulation unit 3. FIG. 8 is a conceptual diagram showing the concept of the virtual circular buffer. The rate matching unit 22 stores the sign bit in a virtual circular buffer such as 31, and stores the sign bit in the direction of the arrow in the figure, using the position 32 as a buffer for storing the first sign bit. . In the actual circuit, when the sign bit is called up to the end, the first sign bit is loaded as the succeeding sign bit. Although the virtual circular buffer is used here, a buffer having a transport block size × 3 bits may be used.

  Next, means for calling a bit from the transport block size input to the rate matching unit 22 will be described. The block number BN described above is 3 in the example of FIG. Considering this, the code bits that can be transmitted are loaded from the virtual circular buffer 16 to the modulation unit 3 from the rate matching unit 22. The number of code bits to be loaded is expressed by the following equation (3).

In Equation (3), N _sys is the number of DFT blocks including modulation symbols composed of systematic bits, and N _par is the number of DFT blocks including only modulation symbols composed of only parity bits. N _sys + N _par satisfies the number of DFT blocks included in the subframe.

FIG. 9 is a schematic block diagram showing the configuration of the DFT unit 4. The DFT unit 4 includes a DFT operation unit 51 and a DFT point calculation unit 52. Based on the DFT point input from the DFT point calculation unit 52, the DFT operation unit 51 performs discrete Fourier transform on the input modulation symbol. In DFT point calculation unit 62, is a block for applying the DFT, when the input block number BN _smaller, type _{N DFT1} point DFT calculation unit 51, if more than the input block _{number, N DFT1} The + N _clip point is input to the DFT calculation unit 51.

  FIG. 10 is a schematic block diagram illustrating a configuration of the second communication device 200 that is a base station device. The second communication device 200 includes a reception antenna 70, a radio unit 71, a CP removal unit 72, a reference signal separation unit 73, an FFT unit 74, a frequency demapping unit 75, a cancellation unit 76, an equalization unit 77, an IDFT (Inverse Discrete). Fourier Transform (Inverse Discrete Fourier Transform) unit 78, demodulation unit 79, decoding unit 80, replica generation unit 81, received signal replica generation unit 82, propagation path estimation unit 83, zero insertion unit 84, scheduling unit 85, transmission unit 86, A transmission antenna 87 is included.

  The reception signal received from the reception antenna 70 is down-converted into a baseband signal in the radio unit 71. The CP is removed from the baseband signal by the CP removing unit 72 and the reference signal is separated by the reference signal separating unit 73. The separated reference signal is input to the propagation path estimation unit 83. On the other hand, the received signal from which the reference signal is separated, that is, the data signal is converted into a frequency signal by the FFT unit 74, and only the subcarrier used for transmission is extracted by the frequency demapping unit 75. Thereafter, the received signal replica input from the received signal replica generation unit 82 is canceled by the reception signal input from the frequency demapping unit 75 to the cancellation unit 76, and distortion due to the radio propagation path is equalized by the equalization unit 77. The Thereafter, the signal is converted into a time signal by IDFT, and the LLR (Log Likelihood Ratio) of the code bit is calculated by the demodulator.

  The LLR of the code bit is error-corrected by performing turbo decoding by the decoding unit 80. The decoding unit 80 calculates an LLR for information bits and an LLR for code bits. The LLR of the information bits is output to obtain a decoded bit, and the LLR of the sign bit is converted from the LLR to the soft replica by the replica generation unit 81 and input to the reception signal replica generation unit 82.

On the other hand, the propagation path estimation unit 83 estimates the propagation path characteristics of the subcarriers used for transmission from the input reference signal. _{For the clip} subcarrier, zero is inserted into the channel estimation value estimated by the channel estimation unit 83, and an equivalent channel characteristic is generated in which frequency clipping is regarded as a channel gain on the frequency axis. At this time, the zero insertion unit 84 is characterized in that only N _clip subcarriers are inserted into only the DFT block of the modulation scheme composed of only parity bits.

  The reception signal replica generation unit 82 generates a reception signal replica by multiplying the replica by the equivalent propagation path characteristic calculated as described above, and inputs the reception signal replica to the cancellation unit 76. The above process is repeated an arbitrary number of times (for example, a predetermined number of times until there is no error in the decoded bit), and finally, the decoded bit is obtained by making a hard decision on the LLR of the information bit output from the decoding unit 80.

  Moreover, the propagation path estimation unit 83 estimates the propagation path characteristics of each subcarrier for each of the first communication apparatuses 100. The scheduling unit 85 assigns subcarriers to be used in the uplink to each first communication apparatus 100 based on the estimation result of the propagation path characteristics, and determines the modulation scheme and the transport block size. Then, the scheduling unit 85 outputs the subcarrier allocation information MI, the modulation scheme information S, and the transport block size TBS representing these to the transmission unit 86 as control information. The transmission unit 86 multiplexes the control information with the transmission data TD and transmits the control information from the transmission antenna 87 to the first communication device 100.

  In this embodiment, the clipping control unit 5 does not perform clipping on a DFT block including a modulation symbol based on systematic bits, but performs clipping on a DFT block including only modulation symbols based on parity bits. In addition, the clipping unit 6 was controlled. However, the number of subcarriers to be clipped is changed between the DFT block including the modulation symbol based on the systematic bit and the DFT block including only the modulation symbol based on the parity bit, and clipping is performed for both DFT blocks. Also good. In this case, it is preferable that a DFT block including a modulation symbol based on systematic bits has a smaller number of subcarriers to be clipped.

  In this embodiment, the order of the code bits output from the bit loading unit 2 is such that a bit string consisting only of parity bits is connected to a bit string consisting only of systematic bits, but in the reverse order, The order may be such that a bit string consisting only of systematic bits is connected to a bit string consisting only of parity bits. Alternatively, some code bits may be deleted before being arranged.

  Thus, by determining the arrangement order of the code bits and calculating the block number of the DFT block consisting only of the parity bits based on the arrangement order, frequency clipping can be appropriately performed with simple processing. Since the processing can be simplified, the cost of hardware can be reduced when these processing is realized by dedicated hardware. Further, when these processes are realized by a computer and a program, the program can be prevented from becoming complicated, and the performance required of the computer can be suppressed, so that the cost can be reduced.

[Second Embodiment]
The second embodiment of the present invention will be described below. In the first embodiment, a large number of parity bits are transmitted by uniformly clipping a DFT block composed only of modulation symbols based on parity bits. On the other hand, in the mobile communication system according to the present embodiment, the reliability of the parity bits is not made uniform, and the high reliability parity bits and the low reliability parity bits are mixed.

FIG. 11 is a diagram illustrating an example of a configuration of a subframe in the present embodiment. This figure is a configuration example of a subframe 93 made up of five DFT blocks as in FIG. As in FIG. 2, clipping is not applied to the DFT block denoted by reference numeral 91, that is, the first two DFT blocks 91 of the subframe 93. However, the subsequent three DFT blocks 92-1, 92-2, and 92-3 with reference numeral 92 are alternately clipped. For example, when clipping N _clip subcarriers to the DFT block 92-1, clipping is not applied to the DFT block 92-2, and clipping is applied to the DFT block 92-3 in the same manner as the DFT block 92-1. .

  In the present embodiment, the method of FIG. 4 is adopted for the two DFT blocks denoted by reference numeral 91 in FIG. 11 and the DFT block 92-2. And the method of FIG. 5 is employ | adopted with respect to DFT block 92-1,92-3. In the first embodiment, the method of FIG. 4 is adopted for the DFT block denoted by reference numeral 41 in FIG. 2, and the method of FIG. 5 is adopted for the DFT block denoted by reference numeral 42. By applying this embodiment, the reliability of parity bits can be biased, error correction capability is increased, and transmission characteristics are improved.

  The mobile communication system in the present embodiment has the same configuration as that of the mobile communication system 300 shown in FIG. 1 except that the first communication device 100 includes a bit loading unit 2a instead of the bit loading unit 2.

  FIG. 12 is a schematic block diagram showing the configuration of the bit loading unit 2a. In the figure, portions corresponding to the respective portions in FIG. 6 are denoted by the same reference numerals (1, 15-1, 15-2, 15-3, 16), and description thereof is omitted. The bit loading unit 2a includes sub-block interleave units 15-1, 15-2, 15-3, a virtual circular buffer 16, and a clipping block number calculation unit 17a. The clipping block number calculation unit 17a calculates the block number BN of the DFT block to be clipped. For example, in the case of FIG. 11, since the DFT blocks to be clipped are the third and fifth, the block numbers 3 and 5 are output and output to the virtual circular buffer 16, the clipping control unit 5, and the DFT unit 4. In other processing, control is performed as to whether or not clipping is performed based on the block number, and a signal is transmitted.

  The block number calculation unit 17a may use a system number determined in advance when clipping is performed alternately as in the present embodiment, and performs clipping in frequency clipping on a modulation symbol composed of parity bits. The number of subcarriers may not be the same in all DFT blocks.

  The scheme described so far has described that clipping is not applied to DFT blocks including modulation symbols based on systematic bits, but clipping is applied to DFT blocks including only modulation symbols based on parity bits. However, the number of subcarriers to be clipped due to the importance of systematic bits and parity bits is not applied to DFT blocks including modulation symbols composed of systematic bits, and only DFTs of modulation symbols composed of parity bits are applied. A method of changing by blocks may be used, and such a method may be used.

Further, in each of the above-described embodiments, it has been described that N _clip is calculated by the clipping control unit 5. However, the N _clip is calculated by the scheduling unit 85 of the second communication apparatus 200 and transmitted in the same manner as the transport block size TBS or the like. The first communication device 100 may receive and use it. The first communication device 100 receives and uses the clip rate calculated by the scheduling unit 85 of the second communication device 200 instead of N _clip and transmitted in the same manner as the transport block size TBS or the like. May be. Alternatively, the clipping control unit 5 calculates the number of modulation symbols for transmitting the transport block based on the transport block size TBS, the modulation scheme information S, and the coding rate of the turbo coding unit 1, N _clip may be determined so that the number of modulation symbols can be transmitted with the number of subcarriers specified by the subcarrier allocation information MI.

Further, in each of the above-described embodiments, when the N _clip selected by the clipping control unit 5 is used and all the DFT blocks cannot be arranged with the number of subcarriers specified by the subcarrier allocation information MI, the arrangement is performed. A DFT block that cannot be transmitted may not be transmitted. In this case, since some code bits are not transmitted, the first communication apparatus 100 as a whole can be transmitted at an arbitrary coding rate even if the coding rate of the turbo coding unit 1 is fixed. Become. At this time, since the bit loading unit 2 determines the arrangement order of the code bits so that the parity bits are behind, the code bits that are not transmitted are only the parity bits.

In each of the above-described embodiments, the case where the coding rate of the turbo coding unit 1 is fixed to 1/3 has been described. However, it may be as follows. First, the scheduling unit 85 of the second communication apparatus 200 determines the coding rate and transmits it in the same manner as the transport block size TBS or the like. The receiving unit 14 of the first communication apparatus 100 receives this, and the turbo encoding unit 1 performs puncturing on the code bits so that the received coding rate is obtained.
In each of the above-described embodiments, the DFT unit 4 calculates the number of modulation symbols necessary for calculating the frequency signal of each DFT block. However, the bit loading unit 2 calculates the frequency signal of each DFT block. The number of code bits necessary for calculation is calculated, and a code bit string having the number of bits is output, and the DFT unit 4 uses the modulation symbol group based on the code bit string to generate a frequency constituting one DFT block. The signal may be calculated.

  A program for realizing the functions of the first communication device 100 and the second communication device 200 in each of the above-described embodiments is recorded on a computer-readable recording medium, and the program recorded on the recording medium is stored in a computer system. The functions of each device may be realized by being read and executed. A program for controlling a CPU or the like (a program for causing a computer to function) so as to realize the functions of the first communication device 100 and the second communication device 200 in each of the above-described embodiments. Information handled by these devices is temporarily stored in the RAM at the time of processing, then stored in various ROMs and HDDs, read out by the CPU, and corrected and written as necessary. As a recording medium for storing the program, a semiconductor medium (for example, ROM, nonvolatile memory card, etc.), an optical recording medium (for example, DVD, MO, MD, CD, BD, etc.), a magnetic recording medium (for example, magnetic tape, Any of a flexible disk etc. may be sufficient. In addition, by executing the loaded program, not only the functions of the above-described embodiment are realized, but also based on the instructions of the program, the processing is performed in cooperation with the operating system or other application programs. The functions of the invention may be realized.

In the case of distribution in the market, the program can be stored and distributed in a portable recording medium, or transferred to a server computer connected via a network such as the Internet. In this case, the storage device of the server computer is also included in the present invention. Moreover, you may implement | achieve part or all of the mobile station apparatus and base station apparatus in embodiment mentioned above as LSI which is typically an integrated circuit. Each functional block of the mobile station apparatus and the base station apparatus may be individually chipped, or a part or all of them may be integrated into a chip. Further, the method of circuit integration is not limited to LSI, and may be realized by a dedicated circuit or a general-purpose processor. In addition, when an integrated circuit technology that replaces LSI appears due to progress in semiconductor technology, an integrated circuit based on the technology can also be used.
The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and the design and the like within the scope not departing from the gist of the present invention are also claimed. Included in the range.

  The present invention is suitable for use in a mobile communication system in which a mobile phone device is a mobile station device, but is not limited thereto.

DESCRIPTION OF SYMBOLS 1 ... Turbo code 2, 2a ... Bit loading 3 ... Modulation part 4 ... DFT part 5 ... Clipping control part 6 ... Clipping part 7 ... Frequency mapping part 8 ... IFFT part 9 ... Reference signal multiplexing part 10 ... CP insertion part 11 ... Radio | wireless Unit 12: Transmitting antenna 13: Receiving antenna 14: Receiving unit 15-1, 15-2, 15-3 ... Sub-block interleaving unit 16 ... Virtual circular buffer 17 ... Block number calculating unit 17a ... Clipping block number calculating unit 21 ... Symbol Bit collection unit 22 ... rate matching unit 51 ... DFT operation unit 52 ... DFT point calculation unit 70 ... reception antenna 71 ... radio unit 72 ... CP removal unit 73 ... reference signal separation unit 74 ... FFT unit 75 ... frequency mapping unit 76 ... cancel Unit 77 ... Equalization unit 78 ... IDFT unit 79 ... Demodulation unit 8 ... Decoding unit 81 ... Replica generation unit 82 ... Received signal replica generation unit 83 ... Propagation path estimation unit 84 ... Zero insertion unit 85 ... Scheduling unit 86 ... Transmission unit 87 ... Transmission antenna 100 ... First communication device 200 ... Second Communication device 300 ... mobile communication system

Claims (8)

A code part for error-correcting the information bits to generate code bits including systematic bits and parity bits;
A bit loading unit that determines an arrangement order of the code bits so that at least one frequency signal block based only on the parity bits is generated;
A frequency signal generation unit that generates a frequency signal based on a bit string obtained by dividing the code bits for which the arrangement order is determined, and a plurality of code bits continuous in the arrangement order;
A transmission unit that transmits a signal in which the frequency signal is arranged in a subcarrier, and
Each of the frequency signal blocks is configured by a frequency signal based on one bit string.   2. The arrangement order determined by the bit loading unit is an arrangement order of a bit string obtained by connecting one bit string composed only of the parity bits and one bit string composed only of the systematic bits. The communication device described.   The communication apparatus according to claim 1, wherein the error correction coding is a turbo code.   2. The communication apparatus according to claim 1, wherein the number of bits of the bit string including only the parity bits in the bit string is larger than the number of bits of the other bit strings. A clipping unit that deletes a part of the frequency signal constituting the frequency signal block;
2. A clipping control unit that determines the number of subcarriers to be deleted by the clipping unit according to whether or not the frequency signal constituting the frequency signal block is based on only parity bits. The communication apparatus as described in. A clipping unit that deletes a part of the frequency signal constituting the frequency signal block;
A clipping control unit that determines the number of frequency signals to be deleted by the clipping unit from the frequency signal block based on the bit sequence according to whether or not the bit sequence consists only of the parity bits. The communication device according to claim 1. A first step of error correcting encoding the information bits to generate code bits including systematic bits and parity bits;
A second step of determining an arrangement order of the code bits so that at least one frequency signal block based only on the parity bits is generated;
A third step of generating a frequency signal based on a bit string obtained by dividing a plurality of code bits, the bit string including a plurality of code bits continuous in the arrangement order;
A fourth process of transmitting a signal in which the frequency signal is arranged on a subcarrier, and
Each of the frequency signal blocks is composed of a frequency signal based on one bit string. Computer
A code unit that performs error correction coding on the information bits to generate code bits including systematic bits and parity bits;
A bit loading unit that determines an arrangement order of the code bits so that at least one frequency signal block based only on the parity bits is generated;
A frequency signal generation unit that generates a frequency signal based on a bit string that is a bit string obtained by dividing a plurality of the code bits and that is composed of a plurality of code bits that are continuous in the arrangement order;
A program for functioning as a transmitter for transmitting a signal in which the frequency signal is arranged in a subcarrier,
One frequency signal block includes a frequency signal based on one bit string.

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