JP2013041955A - Photoelectric conversion element and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion element that is excellent in productivity and excellent in conversion efficiency.SOLUTION: In a photoelectric conversion element including a photoelectric conversion unit that is constituted by a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer, an interface semiconductor layer is provided between the i-type semiconductor layer and the n-type semiconductor layer. It is desirable that the interface semiconductor layer has bandgap energy larger than that of the i-type semiconductor layer and is composed of an amorphous silicon oxide, for example.

Description

  The present invention relates to a photoelectric conversion element and a manufacturing method thereof.

  A photoelectric conversion element made of amorphous silicon (hereinafter sometimes referred to as “a-Si photoelectric conversion element”) can be thinned, can be manufactured by a low-temperature process, or has a large-area glass substrate or Due to the fact that it can be easily formed on a stainless steel substrate, development is underway as a favorite of low-cost solar cells.

  Such an a-Si photoelectric conversion element is generally configured by laminating a transparent electrode layer, a photoelectric conversion unit having one or more pin junctions, and a back electrode layer on the upper surface of a transparent insulating substrate. Yes. Here, the photoelectric conversion unit is generally formed by stacking a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer in this order or vice versa. An i-type photoelectric conversion layer occupying the main part of the photoelectric conversion unit is called an amorphous photoelectric conversion unit, and an i-type semiconductor layer is crystalline is called a crystalline photoelectric conversion unit. .

  Most of the thickness of the photoelectric conversion unit in the a-Si photoelectric conversion element is occupied by the i-type semiconductor layer which is a substantially intrinsic semiconductor layer. The photoelectric conversion action mainly occurs in this i-type semiconductor layer. Therefore, it is preferable that the i-type semiconductor layer, which is a photoelectric conversion layer, is thicker for light absorption. However, when the film thickness becomes larger than necessary, it takes time to deposit the i-type semiconductor layer. In addition, when the i-type semiconductor layer is amorphous, photodegradation (Staebler-Wronsky effect) becomes prominent, and the characteristics of the photoelectric conversion element tend to deteriorate.

  In general, the p-type semiconductor layer is often used as a window layer. In order to efficiently transmit light to the i-type semiconductor layer which is a photoelectric conversion layer, a silicon alloy material having a sufficiently large band gap energy such as silicon carbide is used for the p-type semiconductor layer. However, when a silicon alloy material is used for the p-type semiconductor layer and amorphous silicon is used for the i-type semiconductor layer, defects due to composition mismatch occur at the interface between the p-type semiconductor layer and the i-type semiconductor layer. As a result, holes drifting to the p-type semiconductor layer side among the electron-hole pairs generated inside the i-type semiconductor layer may be trapped by the defect (interface defect), and the short circuit current is reduced. . In addition, the fill factor decreases due to series resistance. From these things, there exists a problem that the conversion efficiency of a photoelectric conversion element falls.

  In order to solve this problem, Patent Document 1 describes providing a graded buffer layer that gradually decreases the concentration of the alloy material as it proceeds from the p-type semiconductor layer side to the interface between the p-type semiconductor layer and the i-type semiconductor layer. Has been. Further, in Patent Document 1, by providing such a graded buffer layer, generation of defects due to the above-described composition mismatch is suppressed, and interface characteristics between the p-type semiconductor layer and the i-type semiconductor layer are improved. It is described. Moreover, the technique which further improved the technique of patent document 1 is proposed (for example, patent document 2).

Patent Document 3 describes a stacked photoelectric conversion device in which an n-type Si _1-x O _x layer (0 ≦ x ≦ 1) is inserted as a low refractive index layer. This n-type Si _1-x O _x layer has an oxygen concentration of 25 atomic% or more and 60 atomic% or less in order to achieve both conductivity and low refractive index. The n-type Si _1-x O _x layer has a refractive index of 1.7 to 2.5 and a dark conductivity of 10 ⁻⁸ to 10 ⁻¹ S / cm.

Patent Document 3 describes that the n-type Si _1-x O _x layer preferably contains a silicon crystal phase. This is because the current path through this silicon crystal phase is considered to be formed in the thickness direction of the n-type Si _1-x O _x layer, and the silicon crystal phase contributes to the formation of a good ohmic contact. This is because it is considered. Furthermore, Patent Document 3 also describes that it is desirable that the n-type Si _1-x O _x layer contains amorphous silicon doped as an alternative to the silicon crystal phase. As is well known, if the impurity is sufficiently doped, both the n-type semiconductor layer and the p-type semiconductor layer become a low resistance film sufficient to form an ohmic contact.

  In Patent Document 4, a layer having a band gap energy larger than that of an i-type semiconductor layer is used as an n-type semiconductor layer, and a small amount of n-type impurity is contained in the i-type semiconductor layer, whereby the i-type semiconductor layer and n-type semiconductor layer A technique for improving the photoelectric conversion efficiency by improving the interface with the semiconductor layer is described. In Patent Document 4, a positive space charge is formed in an i-type semiconductor layer to increase an internal electric field in the vicinity of the interface between the p-type semiconductor layer and the i-type semiconductor layer. By reducing the internal electric field at the interface with the n-type semiconductor layer to a state close to a flat band, current loss due to carrier recombination near the interface between the p-type semiconductor layer and the i-type semiconductor layer is reduced. Furthermore, by using a wide gap material for the n-type semiconductor layer, the carrier loss is reduced by using the band offset at the interface between the n-type semiconductor layer and the i-type semiconductor layer, thereby improving the cell efficiency. Have been described.

Japanese Unexamined Patent Publication No. 1989-25486 JP 1999-298015 A JP 2005-45129 A JP 2002-9313 A

N. Pellaton Vaucher, B. Rech, D. Fischer, S. Dubail, M. Goetz, H. Keppner, and A. Shah, Technical Digest of 9th International Photovoltaic Science and Engineer Conference Miyazaki, 1996, pp.651

  Although the techniques described in Patent Documents 1 and 2 lead to improvement of the fill factor, it is necessary to use a plurality of gases such as a silane-based gas, a dopant gas, and diluted hydrogen in order to insert a new buffer layer. For this reason, a layer having a significantly different composition is formed as an interface layer due to the ease of gas decomposition at the interface between the p-type semiconductor layer and the i-type semiconductor layer, which not only increases the resistance but also recombines. The present inventors have discovered that acting as the center also causes deterioration in conversion efficiency.

  Further, in the techniques described in Patent Documents 3 to 4, since a wide band gap material is used as the material of the n-type semiconductor layer, there are two adverse effects. The first adverse effect is that the conductivity of the n-type semiconductor layer is reduced by about 1 to 2 digits as compared with the conventional n-type amorphous silicon. The second adverse effect is that the film thickness of the n-type semiconductor layer needs to be about several tens of nanometers in order to obtain a sufficient open-circuit voltage. Therefore, the series resistance caused by the low-conductivity n-type semiconductor layer This increases the short-circuit current and the fill factor, and hinders the improvement in conversion efficiency.

In Non-Patent Document 1, for the purpose of producing an n-type semiconductor layer in a tunnel junction layer of a tandem cell, an a-Si i-type semiconductor layer is irradiated with CO ₂ plasma to form an n-type μc-Si (fine A technique for forming a crystalline Si) layer with a thickness of 10 nm or less is described.

  The present invention has been intensively studied in view of such problems, and an object thereof is to provide a photoelectric conversion element that is excellent in mass productivity and excellent in conversion efficiency.

  The photoelectric conversion element according to the present invention includes a photoelectric conversion unit including a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer. An interface semiconductor layer is provided between the i-type semiconductor layer and the n-type semiconductor layer.

  Here, the interface semiconductor layer means a semiconductor layer having a larger band gap energy than the i-type semiconductor layer.

  The interface semiconductor layer preferably includes any one of amorphous silicon oxide, amorphous silicon carbide, amorphous silicon oxycarbide, amorphous silicon nitride, and amorphous silicon oxynitride.

  It is preferable to provide a plurality of photoelectric conversion units. The interface semiconductor layer is preferably provided between the i-type semiconductor layer and the n-type semiconductor layer in the photoelectric conversion unit located on the light incident side among the plurality of photoelectric conversion units. The light incident side means the substrate side when the substrate is a translucent substrate, and means the side opposite to the substrate when the substrate is a non-translucent substrate.

  The photoelectric conversion unit is preferably provided on a substrate, and it is preferable that a light-transmitting conductive film and a second conductive film are provided in order on the photoelectric conversion unit.

  A method for manufacturing a photoelectric conversion element according to the present invention includes a step of sequentially forming a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer, and an upper surface of the i-type semiconductor layer in an oxygen atmosphere or a carbon dioxide atmosphere. And a step of performing plasma treatment on the interface semiconductor layer having a larger band gap energy than that of the i-type semiconductor layer.

  The photoelectric conversion element according to the present invention is excellent in mass productivity and conversion efficiency.

It is sectional drawing of the photoelectric conversion element which concerns on one Embodiment of this invention. It is an energy band figure for demonstrating the effect | action which the photoelectric conversion element which concerns on one Embodiment of this invention show | plays. It is sectional drawing of the photoelectric conversion element which concerns on another embodiment of this invention. 6 is a cross-sectional view of a photoelectric conversion element in Comparative Example 1. FIG. 10 is a cross-sectional view of a photoelectric conversion element in Comparative Example 2. FIG.

  Hereinafter, a photoelectric conversion element and a manufacturing method thereof according to the present invention will be described with reference to the drawings. In the drawings of the present invention, the same reference numerals represent the same or corresponding parts. In addition, dimensional relationships such as length, width, thickness, and depth are changed as appropriate for clarity and simplification of the drawings, and do not represent actual dimensional relationships.

<First Embodiment>
<Configuration of photoelectric conversion element>
FIG. 1 is a cross-sectional view of the photoelectric conversion element according to the first embodiment. The photoelectric conversion element according to this embodiment is configured by laminating a transparent electrode 2, a photoelectric conversion unit A, a translucent conductive film 6, and a second conductive film 7 on a translucent substrate 1. . The photoelectric conversion unit A is configured by stacking a p-type semiconductor layer 3, an i-type semiconductor layer 4, and an n-type semiconductor layer 5, and there is an interface between the i-type semiconductor layer 4 and the n-type semiconductor layer 5. A semiconductor layer 8 is produced.

<Translucent substrate>
The translucent substrate 1 means a substrate that can transmit sunlight, and is, for example, a glass plate. Therefore, since sunlight passes through the translucent substrate 1 and enters the photoelectric conversion unit A, the photoelectric conversion element according to the present embodiment is disposed so that the translucent substrate 1 faces the outside (incident side). It will be. Therefore, the photoelectric conversion element according to this embodiment is excellent in weather resistance.

  Although translucent board | substrate 1 is not specifically limited to the thickness, What is necessary is just to have thickness of 0.7 mm or more and 6 mm or less. Thereby, the light which permeate | transmitted the translucent board | substrate 1 injects into the photoelectric conversion unit A, causing little intensity loss.

<Transparent electrode>
The transparent electrode 2 is preferably made of a conductive metal oxide such as SnO ₂ or ZnO. The surface of the transparent electrode 2 may be a smooth surface, but preferably has irregularities. Thereby, the effect of increasing the scattering of incident light is obtained. Although the transparent electrode 2 is not specifically limited to the film thickness, it should just have a film thickness of 500 nm or more and 2500 nm or less.

<P-type semiconductor layer and n-type semiconductor layer>
The p-type semiconductor layer 3 and the n-type semiconductor layer 5 serve to generate a diffusion potential in the photoelectric conversion unit A, and the open-ended voltage, which is one of the important characteristics of the thin photoelectric conversion device, depending on the magnitude of the diffusion potential. The value of Voc is affected. However, the p-type semiconductor layer 3 and the n-type semiconductor layer 5 are inactive layers that hardly contribute to photoelectric conversion, and light absorbed by the impurities doped in the p-type semiconductor layer 3 and the n-type semiconductor layer 5 is generated. The loss is almost no contribution to. Therefore, the thicknesses of the p-type semiconductor layer 3 and the n-type semiconductor layer 5 are preferably as thin as possible within a range in which a sufficient diffusion potential is generated, and may be, for example, 7 nm or more and 35 nm or less.

  The p-type semiconductor layer 3 and the n-type semiconductor layer 5 are not limited to the composition thereof, and may have the same composition as the i-type semiconductor layer 4 below, or a composition different from the i-type semiconductor layer 4 below. It may consist of. Further, the p-type semiconductor layer 3 and the n-type semiconductor layer 5 may have the same composition or different compositions. Preferably, each composition of the p-type semiconductor layer 3 and the n-type semiconductor layer 5 is set so that the photoelectric conversion unit A has a built-in potential.

  For example, each of the p-type semiconductor layer 3 and the n-type semiconductor layer 5 includes amorphous silicon, amorphous silicon alloy, crystalline silicon (called microcrystalline silicon or μc-Si), or microcrystalline silicon alloy, respectively. Etc. More preferably, amorphous silicon carbide is used as the material of the p-type semiconductor layer 3 and microcrystalline silicon is used as the material of the n-type semiconductor layer 5. Here, the amorphous silicon alloy means amorphous silicon containing elements such as carbon, oxygen, nitrogen, and germanium. The amorphous silicon contains elements such as carbon, oxygen, nitrogen, and germanium. The amount may be, for example, 5% by mass or more and 30% by mass or less. The microcrystalline silicon alloy means microcrystalline silicon containing elements such as carbon, oxygen, nitrogen, and germanium. The content of elements such as carbon, oxygen, nitrogen, and germanium in the microcrystalline silicon is 2 What is necessary is just mass% or more and 10 mass% or less. Furthermore, the microcrystalline silicon is composed of fine crystalline silicon having a crystal having a size of nm level, and may mean that which includes amorphous silicon in part.

Examples of the p-type impurity doped in the p-type semiconductor layer 3 include Be or Mg. The p-type impurity concentration in the p-type semiconductor layer 3 is not particularly limited, but may be, for example, 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less.

Examples of the n-type impurity doped in the n-type semiconductor layer 5 include Si, P, As, or Sb. The n-type impurity concentration in the n-type semiconductor layer 5 is not particularly limited, but may be 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less.

<I-type semiconductor layer>
The i-type semiconductor layer 4 is a semiconductor layer that contributes to photoelectric conversion, and ideally is an intrinsic semiconductor layer that does not contain impurities that determine the conductivity type. However, even if the semiconductor layer contains a small amount of the impurity, if the Fermi level of the semiconductor layer is approximately at the center of the forbidden band, the semiconductor layer functions as a pin junction i-type semiconductor layer. Therefore, the i-type semiconductor layer 4 in this specification includes not only an intrinsic semiconductor layer that does not include an impurity that determines a conductivity type but also a Fermi level that has a forbidden band although it includes a small amount of impurity. A semiconductor layer in the center is also included. Here, containing a trace amount of impurities means containing impurities of, for example, 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁸ cm ⁻³ or less. When such an i-type semiconductor layer 4 is formed by a CVD (Chemical Vapor Deposition) method, the i-type semiconductor layer 4 may be formed without adding a dopant gas that becomes an impurity that determines the conductivity type to the source gas. The i-type semiconductor layer 4 may be formed by adding the above impurities within an allowable range that functions as an i-type semiconductor layer, or to remove the influence of impurities caused by the atmosphere or the base layer on the Fermi level. The i-type semiconductor layer 4 may be formed by intentionally adding a small amount of dopant gas.

The i-type semiconductor layer 4 may be an amorphous semiconductor layer or a crystalline semiconductor layer. As the amorphous semiconductor layer, an amorphous silicon layer or an amorphous silicon alloy layer can be used, but a hydrogenated amorphous silicon layer containing 5 to 20 atomic% of hydrogen in the amorphous semiconductor layer or It is preferable to use a hydrogenated amorphous silicon alloy layer. In an amorphous silicon layer or an amorphous silicon alloy layer that does not contain hydrogen, the defect density derived from dangling bonds (dangling bonds) is as high as 10 ¹⁹ to 10 ²⁰ cm ^−3. It is difficult to use a porous silicon layer or an amorphous silicon alloy layer for a semiconductor device such as a photoelectric conversion element. On the other hand, in the hydrogenated amorphous silicon layer and the hydrogenated amorphous silicon alloy layer, since hydrogen terminates dangling bonds, the defect density is reduced to 10 ¹⁵ to 10 ¹⁷ cm ⁻³ . Therefore, the hydrogenated amorphous silicon layer and the hydrogenated amorphous silicon alloy layer can be used for a semiconductor device such as a photoelectric conversion element. Here, the hydrogenated amorphous silicon alloy layer means a hydrogenated amorphous silicon layer containing elements such as carbon, oxygen, nitrogen, and germanium.

  As the crystalline semiconductor layer, a microcrystalline silicon layer, a microcrystalline silicon alloy layer, or the like can be used, but a hydrogenated microcrystalline silicon layer or a hydrogenated microcrystalline silicon alloy layer is preferably used for the above reasons. Microcrystalline silicon is as defined in the above <p-type semiconductor layer and n-type semiconductor layer>. The microcrystalline silicon alloy layer means a microcrystalline silicon layer containing elements such as carbon, oxygen, nitrogen, and germanium, and the hydrogenated microcrystalline silicon alloy layer means elements such as carbon, oxygen, nitrogen, and germanium. Means a hydrogenated microcrystalline silicon layer. Hydrogenation means containing 5 to 20 atomic% of hydrogen in the layer as described above.

<Interface semiconductor layer>
The interface semiconductor layer 8 is a semiconductor layer having a larger band gap energy than the i-type semiconductor layer 4. As a result, a band offset is generated at the interface between the i-type semiconductor layer 4 and the n-type semiconductor layer 5 as shown in FIG. Therefore, a defect (interface defect) occurs at the interface between the i-type semiconductor layer 4 and the n-type semiconductor layer 5 due to the i-type semiconductor layer 4 and the n-type semiconductor layer 5 having different compositions. Even if it exists, the effect which keeps the carrier generate | occur | produced in the i-type semiconductor layer 4 from this interface defect is acquired. Accordingly, carriers generated in the i-type semiconductor layer 4 can be prevented from being trapped by the interface defects, so that carrier loss is greatly reduced, leading to an increase in short-circuit current and an improvement in conversion efficiency.

  As described above, the interface semiconductor layer 8 preferably has a larger band gap energy than the i-type semiconductor layer 4. For this reason, the material of the interface semiconductor layer 8 depends on the material of the i-type semiconductor layer 4 and cannot be generally described. However, considering that the work functions of the materials listed in <i-type semiconductor layer> are about 5.30 to 5.45 eV, the work function of the material of the interface semiconductor layer 8 is preferably 5.45 eV or more. More preferably, it is 5.45 eV or more and 5.8 eV or less, and further preferably 5.65 eV or more and 5.80 eV or less. When the work function of the silicon material was measured with an atmospheric photoelectron spectrometer (AC-3, manufactured by Riken Keiki Co., Ltd.), the work function of amorphous silicon oxide was 5.45 to 5.63 eV, and the work function of amorphous silicon oxycarbide was Was 5.45 to 5.80 eV, and the work function of amorphous silicon nitride was 5.65 to 5.80 eV. In addition to these materials, for example, amorphous silicon carbide or amorphous silicon oxynitride is considered to have a larger work function than amorphous silicon. Therefore, the interface semiconductor layer 8 preferably includes any one of amorphous silicon oxide, amorphous silicon carbide, amorphous silicon oxycarbide, amorphous silicon nitride, and amorphous silicon oxynitride.

  The film thickness of the interface semiconductor layer 8 is not particularly limited. However, the interface semiconductor layer 8 does not serve to generate a diffusion potential in the photoelectric conversion unit A and does not contribute to photoelectric conversion, and the interface between the i-type semiconductor layer 4 and the n-type semiconductor layer 5. Only generate a band offset. Considering these, the film thickness of the interface semiconductor layer 8 is preferably 5 nm or less, and more preferably 1 nm or more and 5 nm or less.

<Translucent conductive film>
The translucent conductive film 6 may be a conductive oxide such as ITO, SnO ₂ , or ZnO, and may have a film thickness of 500 nm to 2500 nm.

<Second conductive film>
The second conductive film 7 may be made of at least one material of, for example, Al, Ag, Au, Cu, Pt, Cr, Ti, Zn, and Mo, and may have a film thickness of 100 nm or more. It ’s fine.

<Method for producing photoelectric conversion element>
The manufacturing method of the photoelectric conversion element according to this embodiment includes a step of sequentially forming the p-type semiconductor layer 3, the i-type semiconductor layer 4, and the n-type semiconductor layer 5, and an n-type after forming the i-type semiconductor layer 4. Before the semiconductor layer 5 is formed, a process of performing plasma treatment on the upper surface of the i-type semiconductor layer 4 to form the interface semiconductor layer 8 is provided. Each forming method of the p-type semiconductor layer 3, the i-type semiconductor layer 4, and the n-type semiconductor layer 5 is not particularly limited, but for example, it is preferable to use a plasma CVD method (preferably a high-frequency plasma CVD method).

  In addition, the method for manufacturing the photoelectric conversion element according to this embodiment may include a step of forming the transparent electrode 2 on the upper surface of the translucent substrate 1 by, for example, a CVD method, a sputtering method, or an evaporation method. The transparent electrode 2 may be provided with the process of preparing the board | substrate previously formed on the upper surface of the translucent board | substrate 1. FIG.

  Further, in the method for manufacturing the photoelectric conversion element according to this embodiment, after forming the n-type semiconductor layer 5, the translucent conductive film 6 and the second conductive film 7 are made to be n-type by, for example, sputtering or vapor deposition. It is preferable that a step of sequentially forming on the upper surface of the semiconductor layer 5 is provided.

<Formation of p-type semiconductor layer>
The source gas may be appropriately determined according to the material of the p-type semiconductor layer 3. For example, when the p-type semiconductor layer 3 made of amorphous silicon or microcrystalline silicon is formed, the source gas may be a chain or cyclic silane compound and a compound that becomes a p-type impurity material. good. When the p-type semiconductor layer 3 made of an amorphous silicon alloy or a microcrystalline silicon alloy is formed, the source gas includes a chain or cyclic silane compound, a compound serving as a p-type impurity material, A compound containing carbon, oxygen, nitrogen, or germanium may be used.

  The supply amount of the chain or cyclic silane compound may be appropriately set according to the film thickness of the p-type semiconductor layer 3 to be formed, and may be, for example, 2 sccm (Standard Cubic Centimeter per Minutes) or more and 200 sccm or less. What is necessary is just to set suitably the addition amount of the compound used as the material of a p-type impurity with respect to the chain | strand-shaped or cyclic silane compound according to the p-type impurity density | concentration in the p-type semiconductor layer 3 formed. What is necessary is just to set suitably the addition amount of the compound containing carbon etc. with respect to the chain | strand-shaped or cyclic silane compound according to the density | concentrations of carbon etc. in the p-type semiconductor layer 3 formed.

Examples of the chain or cyclic silane compound include SiH ₄ , Si ₂ H ₆ , SiF ₄ , SiFH ₃ , SiF ₂ H ₂ , SiF ₃ H, Si ₃ H ₈ , SiD ₄ , SiHD ₃ , SiH ₂ D ₂ , SiH ₃ D, SiFD ₃ , SiF ₂ D ₂ , Si ₂ D ₃ H ₃ , (SiF ₂ ) ₅ , (SiF ₂ ) ₆ , (SiF ₂ ) ₄ , Si ₂ F ₆ , Si ₃ F ₈ , Si ₂ H ₂ F ₄ , Si ₂ H ₃ F ₃ , SiCl ₄ , (SiCl ₂ ) ₅ , SiBr ₄ , (SiBr ₂ ) ₅ , Si ₂ Cl ₆ , SiHCl ₃ , SiH ₂ Br ₂ , SiH ₂ Cl ₂ , and Si ₂ At least one such as Cl ₃ F ₃ can be used.

When boron is selected as the p-type impurity, the compounds used as the material for the p-type impurity include B ₂ H ₆ , B ₄ H ₁₀ , B ₅ H ₉ , B ₅ H ₁₁ , B ₆ H ₁₀ , B _6. Boron hydrides such as H ₁₂ and B ₆ H ₁₄ may be used, and boron halides such as BF ₃ and BCl ₃ may be used. Among these, B ₂ H ₆ or BF ₃ is preferable.

Examples of the compound containing carbon include CH ₄ , CD ₄ , C _n H _{2n + 2} (n is an integer), C _n H _2n (n is an integer), C ₂ H ₂ , C ₆ H ₆ , CO ₂ , CO, At least one of Si (CH ₃ ) H ₃ , Si (CH ₃ ) ₂ H ₂ , and Si (CH ₃ ) ₃ H can be used. Thereby, an amorphous silicon layer containing carbon or a microcrystalline silicon layer containing carbon is formed.

As the compound containing oxygen, at least one of O ₂ , CO, CO ₂ , NO, NO ₂ , N ₂ O, CH ₃ CH ₂ OH, CH ₃ OH, and H ₂ O can be used. Thus, an amorphous silicon layer containing oxygen or a microcrystalline silicon layer containing oxygen is formed.

As the compound containing nitrogen, at least one of N ₂ , NH ₃ , ND ₃ , NO, NO ₂ , and N ₂ O can be used. Thus, an amorphous silicon layer containing nitrogen or a microcrystalline silicon layer containing nitrogen is formed.

The compounds containing germanium include GeH ₄ , GeD ₄ , GeF ₄ , GeFH ₃ , GeF ₂ H ₂ , GeF ₃ H, GeHD ₃ , GeH ₂ D ₂ , GeH ₃ D, Ge ₂ H ₆ , and Ge ₂ D _6. At least one of the above can be used. Thereby, an amorphous silicon layer containing germanium or a microcrystalline silicon layer containing germanium is formed.

The conditions for generating the high-frequency plasma are not particularly limited, but may be the following conditions.
Temperature of translucent substrate 1: 100 ° C. or higher and 300 ° C. or lower Pressure in CVD apparatus: 30 Pa or higher and 1500 Pa or lower High frequency electrode shape: flat plate electrode arranged in parallel to each other Frequency of high frequency power source: 10 MHz or higher and 100 MHz or lower Power of high frequency power source Density: 0.01 W / cm ² or more and 0.5 W / cm ² or less.

In addition to the source gas, a gas such as H ₂ , He, Ne, Ar, Xe, or Kr may be supplied as a carrier gas into the chamber of the CVD apparatus. This is also true in the following <formation of i-type semiconductor layer>, <production of interface semiconductor layer>, and <formation of n-type semiconductor layer>.

In addition, the volume ratio of SiH ₄ gas to H ₂ gas is 1 volume% to 40 volume%, the pressure in the CVD apparatus is 30 Pa to 800 Pa, and the power density of the high-frequency power source is 0.02 W / cm ^{2 to} 0.3 W / If the cm ² or less and the temperature of the light-transmitting substrate 1 are 100 ° C. or more and 250 ° C. or less, the amorphous p-type semiconductor layer 3 is formed. On the other hand, the volume ratio of SiH ₄ gas to H ₂ gas is 30 volume% to 400 volume%, the pressure in the CVD apparatus is 30 Pa to 1300 Pa, and the power density of the high-frequency power source is 0.02 W / cm ^{2 to} 0.3 W / If the temperature of cm ² or less and the temperature of the translucent substrate 1 are 100 ° C. or more and 250 ° C. or less, the microcrystalline p-type semiconductor layer 3 is formed.

<Formation of i-type semiconductor layer>
The source gas may be determined appropriately according to the material of the i-type semiconductor layer 4. For example, when an i-type semiconductor layer made of hydrogenated amorphous silicon or hydrogenated microcrystalline silicon is formed, a chain or cyclic silane compound and hydrogen gas may be used as the source gas. When forming the i-type semiconductor layer 4 made of a hydrogenated amorphous silicon alloy or a hydrogenated microcrystalline silicon alloy, the raw material gas includes a chain or cyclic silane compound, hydrogen gas, carbon, oxygen, A compound containing either nitrogen or germanium may be used.

  The supply amount of the chain or cyclic silane compound may be appropriately set according to the film thickness of the i-type semiconductor layer 4 to be formed, and may be, for example, 2 sccm or more and 200 sccm or less. What is necessary is just to set suitably the addition amount of the hydrogen gas with respect to a chain | strand-shaped or cyclic | annular silane compound so that the hydrogen content in the i-type semiconductor layer 4 may be 5-20 atomic%. What is necessary is just to set suitably the addition amount of the compound containing carbon etc. with respect to a linear or cyclic silane compound.

  As the chain or cyclic silane compound, the compound containing carbon, the compound containing oxygen, the compound containing nitrogen, and the compound containing germanium, the compounds listed in <Formation of p-type semiconductor layer> may be used.

  The conditions for generating the high-frequency plasma are not particularly limited, but may be any conditions listed above in <Formation of p-type semiconductor layer>.

  The conditions for forming the amorphous i-type semiconductor layer 4 and the microcrystalline i-type semiconductor layer 4 are as described above in <Formation of p-type semiconductor layer>.

<Fabrication of interface semiconductor layer>
Plasma treatment is performed on the upper surface of the i-type semiconductor layer 4 to produce the interface semiconductor layer 8. Here, the plasma treatment is to irradiate the upper surface of the i-type semiconductor layer 4 with a plasma source gas. The plasma source gas is embedded in the i-type semiconductor layer 4, and thus the interface semiconductor layer 8 is produced. Since the interface semiconductor layer 8 is produced in this manner, the boundary between the i-type semiconductor layer 4 and the interface semiconductor layer 8 may not be clear. In such a case, a portion of the i-type semiconductor layer 4 where the concentration of the element derived from the source gas is high (a portion of the i-type semiconductor layer 4 having a large band gap energy) corresponds to the interface semiconductor layer 8.

For example, when the interface semiconductor layer 8 made of amorphous silicon oxide is produced, O ₂ may be used as a source gas. When the interface semiconductor layer 8 made of amorphous silicon nitride is produced, at least one of N ₂ and NH ₃ may be used as a source gas. When the interface semiconductor layer 8 made of amorphous silicon oxycarbide is produced, CO ₂ may be used as a source gas. When the interface semiconductor layer 8 made of amorphous silicon carbide is manufactured, CH ₄ may be used. When the interface semiconductor layer 8 made of amorphous silicon oxynitride is produced, NO ₂ may be used as the source gas. Thus, the interface semiconductor layer 8 is produced without using a plurality of gases because it is produced by using O ₂ , N ₂ , NH ₃ , CO ₂ , CH _4, NO _2, or the like as a source gas. . Therefore, it is possible to improve the mass productivity of the photoelectric conversion element.

The supply amount of O ₂ gas or the like may be appropriately set according to the thickness of the interface semiconductor layer 8 to be manufactured. Since the thickness of the interface semiconductor layer 8 is preferably 5 nm or less, the supply amount of O ₂ gas or the like is preferably 200 sccm or less, and more preferably 100 sccm or less.

  The plasma generation conditions for producing the interface semiconductor layer 8 are not particularly limited, but are preferably the following conditions.

Translucent substrate 1 temperature: 100 ° C. or higher and 400 ° C. or lower Pressure in CVD apparatus: 7 Pa or higher and 800 Pa or lower High frequency electrode shape: flat plate electrode arranged parallel to each other Frequency of high frequency power source: 10 MHz or higher and 100 MHz or lower; 2 GHz to 100 GHz (frequency at microwave level)
Power density of the high frequency power source: 0.01 W / cm ² or more and 0.5 W / cm ² or less.

  When the p-type semiconductor layer 3, the i-type semiconductor layer 4, and the n-type semiconductor layer 5 are formed in separate chambers, it is preferable that the interface semiconductor layer 8 is formed in the chamber in which the i-type semiconductor layer 4 is formed. Since the interface semiconductor layer 8 is substantially an i-type semiconductor layer, the interface semiconductor layer 8 can be manufactured in the same chamber as the i-type semiconductor layer 4. Thereby, the rate of the tact of the chamber in which the i-type semiconductor layer 4 is formed can be prevented, so that the manufacturing tact of the photoelectric conversion element can be shortened and the manufacturing cost of the photoelectric conversion element can be reduced. On the other hand, when the interface semiconductor layer 8 is produced in the chamber in which the n-type semiconductor layer 5 is formed, impurities such as a dopant component adhering to the inner wall surface of the chamber affect the interface semiconductor layer 8. Causes a decrease in the fill factor (FF) of the photoelectric conversion element due to an increase in defect density. The same problem occurs when the interface semiconductor layer 8 is produced in the chamber in which the p-type semiconductor layer 3 is formed. Also from this point, it is preferable to produce the interface semiconductor layer 8 in the chamber in which the i-type semiconductor layer 4 is formed.

<Formation of n-type semiconductor layer>
The source gas may be appropriately determined according to the material of the n-type semiconductor layer 5. For example, when the n-type semiconductor layer 5 made of amorphous silicon or microcrystalline silicon is formed, a chain or cyclic silane compound and a compound serving as an n-type impurity material are used as the source gas. good. When the n-type semiconductor layer 5 made of an amorphous silicon alloy or a microcrystalline silicon alloy is formed, the source gas includes a chain or cyclic silane compound, a compound serving as a p-type impurity material, A compound containing carbon, oxygen, nitrogen, or germanium may be used.

  The supply amount of the chain or cyclic silane compound may be appropriately set according to the film thickness of the n-type semiconductor layer 5 to be formed, and may be, for example, 2 sccm or more and 200 sccm or less. What is necessary is just to set suitably the addition amount of the compound used as the material of an n-type impurity with respect to a chain | strand-shaped or cyclic silane compound according to the n-type impurity density | concentration in the n-type semiconductor layer 5. FIG. What is necessary is just to set suitably the addition amount of the compound containing carbon etc. with respect to a linear or cyclic silane compound.

  As the chain or cyclic silane compound, the compound containing carbon, the compound containing oxygen, the compound containing nitrogen, and the compound containing germanium, the compounds listed in <Formation of p-type semiconductor layer> may be used.

When phosphorus is selected as the n-type impurity, phosphorus ₃ hydride such as PH ₃ or P ₂ H ₄ may be used as the n-type impurity material, or PH ₄ I, PF ₃ , Phosphorus halides such as PF ₅ , PCl ₃ , PCl ₅ , PBr ₃ , PBr ₅ , or PI ₃ may be used. Among these, PH ₃ or PF ₃ is preferable.

  The conditions for generating the high-frequency plasma are not particularly limited, but may be any conditions listed above in <Formation of p-type semiconductor layer>.

  The conditions for separately forming the amorphous n-type semiconductor layer 5 and the microcrystalline n-type semiconductor layer 5 are as described in the above <Formation of p-type semiconductor layer>.

<Second Embodiment>
FIG. 3 is a cross-sectional view of the photoelectric conversion element according to the second embodiment. In the photoelectric conversion element according to the present embodiment, a separate is provided between the photoelectric conversion unit (hereinafter may be referred to as “front-side photoelectric conversion unit”) A and the translucent conductive film 6 in the first embodiment. A photoelectric conversion unit (hereinafter may be referred to as a “rear photoelectric conversion unit”) B is provided. The rear photoelectric conversion unit B does not include the interface semiconductor layer 8. Thus, if the front side photoelectric conversion unit A includes the interface semiconductor layer 8, an effect that the short circuit current density (Jsc) and the fill factor (FF) of the front side photoelectric conversion unit A are improved can be obtained.

  The p-type semiconductor layer 9, the i-type semiconductor layer 10, and the n-type semiconductor layer 11 are made of substantially the same material as the p-type semiconductor layer 3, the i-type semiconductor layer 4, and the n-type semiconductor layer 5, respectively. Alternatively, the p-type semiconductor layer 3, the i-type semiconductor layer 4, and the n-type semiconductor layer 5 may be made of different materials. For example, the p-type semiconductor layer 3 may be a p-type microcrystalline silicon layer doped with 0.01 atomic% or more of a p-type impurity such as boron, and the n-type semiconductor layer 5 has an n-type impurity such as phosphorus. Any n-type microcrystalline silicon layer doped with 0.01 atomic% or more may be used.

  However, it is preferable to determine the compositions of the i-type semiconductor layer 4 and the i-type semiconductor layer 10 so that the optical forbidden band width of the i-type semiconductor layer 4 is larger than the optical forbidden band width of the i-type semiconductor layer 10. . Thereby, in the front side photoelectric conversion unit A, the optical forbidden band width of the photoelectric conversion layer is larger than that in the rear side photoelectric conversion unit B, so that photoelectric conversion is possible over a wide wavelength range of incident light. Therefore, since incident light can be used effectively, the conversion efficiency of the photoelectric conversion element is improved as compared with the first embodiment. Specifically, when the i-type semiconductor layer 4 is made of amorphous silicon, the i-type semiconductor layer 10 may be made of microcrystalline silicon.

  Further, each of the i-type semiconductor layer 4 and the i-type semiconductor layer 10 has a wavelength range of light that can be photoelectrically converted in the i-type semiconductor layer 4 wider than a wavelength range of light that can be photoelectrically converted in the i-type semiconductor layer 10. It is preferable to determine the composition. Thereby, in the front side photoelectric conversion unit A, compared with the back side photoelectric conversion unit B, photoelectric conversion is possible over a wide wavelength range. Therefore, since incident light can be used effectively, the conversion efficiency of the photoelectric conversion element is improved as compared with the first embodiment. Specifically, when the i-type semiconductor layer 4 is made of microcrystalline silicon, the i-type semiconductor layer 10 may be made of amorphous silicon.

  In the present embodiment, the number of photoelectric conversion units may be three or more. In this case, the wavelength range of light that can be photoelectrically converted is gradually increased from the rear side (rear side with respect to the incident light, the same applies hereinafter) to the front side (the front side with respect to the incident light, the same applies hereinafter). If the composition of the i-type semiconductor layer of each photoelectric conversion unit is adjusted, the conversion efficiency of the photoelectric conversion element is further improved as compared with the present embodiment. Further, if the composition of the i-type semiconductor layer of each photoelectric conversion unit is adjusted so that the optical forbidden band width increases stepwise from the rear side to the front side, the conversion of the photoelectric conversion element compared to this embodiment Efficiency is further improved.

<Other embodiments>
A non-translucent substrate may be used in place of the translucent substrate 1 (substrate type photoelectric conversion element). In this case, an n-type semiconductor layer, an i-type semiconductor layer, and a p-type semiconductor layer are sequentially formed on the non-transparent substrate. When a non-translucent substrate is used, light is incident from the side opposite to the non-translucent substrate, and thus the non-transparent substrate faces inward (the side opposite to the incident side). Therefore, a transparent barrier film or cover glass is required on the incident side. However, it is advantageous in that it is rich in substrate material selectivity and substrate flexibility. In addition, since the non-translucent substrate can be made conductive, a transparent electrode is unnecessary. Here, the non-translucent substrate is a substrate that is difficult to transmit sunlight, for example, a metal plate.

  A reflective layer having a refractive index smaller than that of the i-type semiconductor layer is preferably provided behind the photoelectric conversion unit as viewed from the light incident side. Thereby, since the light of a specific wavelength is reflected effectively by the reflective layer, the light confinement effect can be improved. Therefore, the conversion efficiency of the photoelectric conversion element can be further improved. Furthermore, since the thickness of the photoelectric conversion unit A can be reduced as much as possible by providing the reflective layer, the productivity of the photoelectric conversion element, that is, the cost reduction of the photoelectric conversion element can be achieved. Here, the reflective layer is provided behind the photoelectric conversion unit as viewed from the light incident side, not only when the reflective layer is in contact with the photoelectric conversion unit, but also when the reflective layer passes through another layer of the photoelectric conversion unit. Including the case where it is arranged on the rear side.

  EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated in detail, this invention is not limited to a following example, unless the meaning is exceeded. Moreover, in each figure, the same referential mark is attached | subjected to the same member and the overlapping description is abbreviate | omitted.

  In the following Example 1 and Comparative Example 1, a photoelectric conversion element including one amorphous photoelectric conversion unit was produced, and its output characteristics were measured.

<Example 1>
In Example 1, the photoelectric conversion element shown in FIG. 1 was produced. An amorphous photoelectric conversion unit A was produced on an Asahi-U substrate manufactured by Asahi Glass Co., Ltd., which is a translucent substrate 1 with a transparent electrode 2, using a plasma CVD apparatus having three film forming chambers. The film forming chamber of the CVD apparatus includes a chamber (P1 chamber) for forming a p-type semiconductor layer, a chamber (I1 chamber) for forming an i-type semiconductor layer, and a chamber chamber (N1 chamber) for forming an n-type semiconductor layer. It has. First, the p-type semiconductor layer 3 is formed in the P1 chamber under the conditions in Table 1, the i-type semiconductor layer 4 is formed in the I1 chamber under the conditions in Table 1, and then the interface semiconductor layer 8 is expressed in the I1 chamber. The n-type semiconductor layer 5 was formed under the conditions shown in Table 1 in the N1 chamber. Thereafter, a light-transmitting conductive film 6 made of a ZnO film having a thickness of 60 nm was formed by sputtering, and then a second conductive film 7 made of an Ag film having a thickness of 120 nm was formed by sputtering. Thereby, the photoelectric conversion element in Example 1 was obtained. AM1.5 light was irradiated at a light amount of 100 mW / cm ² , and the output characteristics of the obtained photoelectric conversion element were measured at room temperature.

  In Table 1, power is the power of the high-frequency power source, the substrate temperature is the temperature of the translucent substrate 1, and the pressure is the pressure in the CVD apparatus. The same applies to Tables 2 and 4 below.

<Comparative Example 1>
In Comparative Example 1, the photoelectric conversion element shown in FIG. 4 was produced. An amorphous photoelectric conversion unit C was produced on an Asahi-U substrate manufactured by Asahi Glass Co., Ltd., which is a translucent substrate 1 with a transparent electrode 2, using a plasma CVD apparatus having three film forming chambers. In Comparative Example 1, a general-purpose continuous separation formation type CVD apparatus can be used as the plasma CVD apparatus. The film forming chamber includes a chamber (P1 chamber) for forming a p-type semiconductor layer and an i-type semiconductor. A chamber (I1 room) for forming a layer and a chamber room (N1 room) for forming an n-type semiconductor layer are formed. The p-type semiconductor layer 3 was formed in the P1 chamber, the i-type semiconductor layer 4 was formed in the I1 chamber, and the n-type semiconductor layer 5 was formed in the N1 chamber. Table 2 shows the respective film forming conditions. Thereafter, a light-transmitting conductive film 6 made of a ZnO film having a thickness of 60 nm was formed by sputtering, and then a second conductive film 7 made of an Ag film having a thickness of 120 nm was formed by sputtering. Thus, the photoelectric conversion element in Comparative Example 1 was obtained. And according to the method similar to the said Example 1, the output characteristic of the obtained photoelectric conversion element was measured.

<Results and discussion>
The results are shown in Table 3.

When the output characteristics of the photoelectric conversion element of Example 1 were measured, the open-circuit voltage (Voc) was 0.803 V, the short-circuit current density (Jsc) was 15.06 mA / cm ² , and the fill factor (FF) was It was 0.685, and the conversion efficiency (Eff) was 8.29%.

When the output characteristics of the photoelectric conversion device of Comparative Example 1 were measured, the open circuit voltage (Voc) was 0.812 V, the short circuit current density (Jsc) was 14.86 mA / cm ² , and the fill factor (FF) was 0.680, and the conversion efficiency (Eff) was 8.20%.

  In Example 1, compared with Comparative Example 1, the short circuit current density (Jsc) and the fill factor (FF) were improved. The reason is as described in the first embodiment. That is, an ultrathin interface semiconductor layer 8 having a valence band deeper than that of the i-type semiconductor layer 4 is produced by plasma treatment using oxygen gas as a raw material, and the interface semiconductor layer 8 generates carriers due to reverse diffusion of hole carriers. Rebinding is inhibited. Therefore, it is considered that the carrier loss is reduced and the short circuit current density (Jsc) and the fill factor (FF) are improved.

  In the following Example 2 and Comparative Example 2, a photoelectric conversion element including an amorphous photoelectric conversion unit and a microcrystalline photoelectric conversion unit was produced, and its output characteristics were measured.

<Example 2>
In Example 2, the photoelectric conversion element shown in FIG. 3 was produced. After producing the amorphous photoelectric conversion unit in Example 1, the microcrystalline p-type semiconductor (μc-p) layer 9 is formed in the P1 chamber, and the microcrystalline i-type semiconductor (μc-i) layer 10 is formed in the I1 chamber. A microcrystalline n-type semiconductor (μc-n) layer 11 was formed in the N1 chamber. Table 4 shows the respective film forming conditions. Thereafter, a light-transmitting conductive film 6 made of a ZnO film having a thickness of 60 nm was formed by sputtering, and then a second conductive film 7 made of an Ag film having a thickness of 120 nm was formed by sputtering. Thus, the photoelectric conversion element in Example 2 was obtained.

<Comparative example 2>
In Comparative Example 2, the photoelectric conversion element shown in FIG. 5 was produced. After producing the amorphous photoelectric conversion unit in Comparative Example 1, the microcrystalline p-type semiconductor layer 9 is formed in the P1 chamber, the microcrystalline i-type semiconductor layer 10 is formed in the I1 chamber, and the microcrystalline n-type semiconductor is formed. Layer 11 was formed in the N1 chamber. Table 4 shows the respective film forming conditions. Thereafter, a light-transmitting conductive film 6 made of a ZnO film having a thickness of 60 nm was formed by sputtering, and then a second conductive film 7 made of an Ag film having a thickness of 120 nm was formed by sputtering. Thus, the photoelectric conversion element in Comparative Example 2 was obtained.

<Results and discussion>
The results are shown in Table 3.

When the output characteristics of the photoelectric conversion element of Example 2 were measured, the open-circuit voltage (Voc) was 1.32 V, the short-circuit current density (Jsc) was 11.80 mA / cm ² , and the fill factor (FF) was It was 0.752, and the conversion efficiency (Eff) was 11.71%.

When the output characteristics of the photoelectric conversion device of Comparative Example 2 were measured, the open circuit voltage (Voc) was 1.35 V, the short circuit current density (Jsc) was 11.54 mA / cm ² , and the fill factor (FF) was The conversion efficiency (Eff) was 11.60%.

  Comparing Comparative Example 2 and Example 2, the short-circuit current density (Jsc) and the fill factor (FF) are improved in Example 2 compared to Comparative Example 2 as in the case of the amorphous silicon single cell (Example 1 above). did. Therefore, it is conceivable that the same phenomenon as that of the amorphous silicon single cell (the first embodiment) occurs in the tandem cell (the second embodiment). Therefore, it is considered that producing the interface semiconductor layer 8 between the i-type semiconductor layer 4 and the n-type semiconductor layer 5 is a practical method for improving the conversion efficiency. The present inventors believe that the same effect can be expected even when a non-translucent substrate is used instead of the Asahi-U substrate manufactured by Asahi Glass Co., Ltd. (substrate type photoelectric conversion element).

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  1 translucent substrate, 2 transparent electrode, 3 p-type semiconductor layer (amorphous), 4 i-type semiconductor layer (amorphous), 5 n-type semiconductor layer (amorphous), 6 translucent conductive film, 7 second conductive film, 8 interface semiconductor layer, 9 p-type semiconductor layer (microcrystalline), 10 i-type semiconductor layer (microcrystalline), 11 n-type semiconductor layer (microcrystalline), A photoelectric conversion unit, B photoelectric conversion unit, C photoelectric conversion unit.

Claims (7)

A photoelectric conversion element including a photoelectric conversion unit composed of a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer,
An interface semiconductor layer provided between the i-type semiconductor layer and the n-type semiconductor layer;
The interface semiconductor layer is a photoelectric conversion element having a larger band gap energy than the i-type semiconductor layer.   2. The photoelectric conversion element according to claim 1, wherein the interface semiconductor layer includes any one of amorphous silicon oxide, amorphous silicon carbide, amorphous silicon oxycarbide, amorphous silicon nitride, and amorphous silicon oxynitride. A plurality of the photoelectric conversion units are provided,
The said interface semiconductor layer is provided between the said i-type semiconductor layer and the said n-type semiconductor layer in the photoelectric conversion unit located in the light incident side among the some said photoelectric conversion units. Photoelectric conversion element. The photoelectric conversion unit is provided on a substrate,
The photoelectric conversion element according to any one of claims 1 to 3, wherein a translucent conductive film and a second conductive film are sequentially provided on the photoelectric conversion unit.   The photoelectric conversion element according to claim 4, wherein the substrate is a translucent substrate.   The photoelectric conversion element according to claim 4, wherein the substrate is a non-translucent substrate. A method for producing the photoelectric conversion element according to claim 1,
sequentially forming a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer;
And a step of performing plasma treatment on the upper surface of the i-type semiconductor layer in an oxygen atmosphere or a carbon dioxide atmosphere to produce an interface semiconductor layer having a larger band gap energy than the i-type semiconductor layer. A method for manufacturing a conversion element.

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