JP2013033046A - Verification apparatus and verification method of infrared thermal image array module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a verification apparatus and a verification method of infrared thermal image array module.SOLUTION: The verification apparatus and the verification method of the infrared thermal image array module includes a thermal image module specification design, epitaxial, and optical property verification 10, to calibrate an epitaxial parameter. A single sensing component manufacturing process and a temperature-changing photoelectric quantity measurement verification 20 are performed, and the epitaxial completes low-temperature temperature change and transformation measurement calibration of the sensing component. A focal plane array manufacturing process and its photoelectric uniformity are verified as a verification 30, and a dark current uniformity test is performed. Adhesion between the focal plane array and a signal reading integrated circuit, and a polishing manufacturing process verification 40 are performed, and indium adhesion is performed between a sensing module and the signal reading integrated circuit, to convert a photoelectric signal. A thermal image quality integration test verification 50 is performed, and optimum driving, control output parameter analysis, and measurement are adjusted. A thermal image array module model is performed, and bonding with a focal plane sensing array is performed, to thereby complete 60 an image sensing array module model.

Description

  The present invention relates to a kind of infrared thermal image array module. In particular, it relates to a verification apparatus and verification method for a kind of infrared thermal image array module.

In order to meet the special demands of various image applications, in the selection of array detection module materials, the optimization of the component structure design, the improvement of image analysis and detection has been the result of high-quality infrared thermal image array modules over the past 10 years. It was a goal in development.
In 2002, Masalkar of Japan (Patent Document 1) submitted the steps to improve the structure of the multiple quantum well manufacturing process in the sensing structure and simplify the manufacturing process. According to this, the detection measurement efficiency of an infrared sensor can be improved effectively.
In 2004, Jeffrey B. Barton of the US (Patent Document 2) submitted a method for improving the module manufacturing process using a newly designed near-infrared light detection structure for an indium phosphide substrate, and used it for array structure detection. ing.
In 2005, Michael G. Engelmann and others from the US (Patent Document 3) submitted an improved structure to the high-resolution visible light and near-infrared light array image sensor structure of large pixels. In the same year, Frederick E. Koch et al. (Patent Document 4) presented for the first time a thermal image application of a quantum dot infrared focal plane array module structure CMOS signal reading circuit structure.

US20020088943A1 specification US Patent No. 20040061056A1 Specification US Patent 20050104089A1 Specification US Patent No. 20050017176A1

In other words, the development of thermal image modules requires technical personnel from various specialized fields. For example, infrared sensor array epitaxials and designs included in a complete infrared thermal image array module require specialists in physics, optoelectronic materials, and material epitaxials, and array optical signal reading integrated circuit (ROIC) units are integrated circuit designs, analog Digital electronics specialists are required, thermal display calibration circuits require logic and image circuit design specialists, and system integration specialists are required for best integration of all modules and error detection. However, until now, at the time of integrated technology development, only local performance optimization verification was performed in individual specialized areas, and a specific infrared image detection module verification process and its structure manufacturing integration method have not been submitted. .
Therefore, the present invention provides a kind of infrared thermal image array module verification for the above problems, not only to improve the traditional thermal image sensing material, heterogeneous joint and image display structure and manufacturing process defects, but also It can be applied to different thermal image sensing materials, heterogeneous bonding and image display structures and manufacturing processes, improving the error detection efficiency in various thermal image array modules and solving the above problems.

  A main object of the present invention is to provide an infrared thermal image array module verification apparatus and verification method, thereby improving array detection module performance and error detection efficiency.

  Another object of the present invention is to provide an infrared thermal image array module verification apparatus and method, thereby reducing research and development costs.

That is, the infrared thermal image array module verification apparatus and verification method includes a thermal image module standard design, a verification module used for epitaxial and optical property verification,
First, calibrate the epitaxial parameters,
After passing the verification, the single-infrared type infrared sensor manufacturing process and temperature-variable photoelectric measurement verification are performed. In fact, the epitaxial has completed the heat-conducting adhesive insulation test, and the coaxial conductor or low-noise signal line is derived from the gold wire. And through the transformation, measure the dark current, dark electrical resistance, reaction spectrum, detectability calibration,
After passing this verification, verify the focal plane array manufacturing process and its photoelectric uniformity,
If rejected, return to thermal image module standard design, epitaxial and optical physical property verification, and after passing, verify the focal plane array manufacturing process and photoelectric uniformity, and match the set infrared sensor standard, The focal plane array manufacturing process is performed, and the manufacturing process uses the single-bottom-type parameters to fabricate the array.After that, the test area is selected and the dark current uniformity test is performed. Conducted adhesion and polishing manufacturing process verification of readout integrated circuit,
If it fails, return to thermal image module standard design, epitaxial and optical physical property verification, and after passing, verify the bonding and polishing manufacturing process of the focal plane array and signal readout integrated circuit, and then detect the plane detection module and signal readout integrated circuit. Indium bonding between them, the sensing array module converts the photoelectric signal,
After passing this verification, continue the thermal image quality integration test (including optical equipment) verification,
If it fails, go back to the verification of the focal plane array manufacturing process and its photoelectric uniformity, and verify again.
After passing, the thermal image quality integration test (including the light machine) is continuously verified, the optimum drive and control output parameters are adjusted, the module thermal image quality is analyzed and measured,
After passing this verification, continue the thermal image array module template,
If it fails, go back to the adhesion and polishing manufacturing process verification of the focal plane array and signal readout integrated circuit, and verify again,
After passing, the thermal image array module template is continuously performed, and the indium column junction method is used to join the focal plane sensing array, and the photocurrent in each array unit is stored in the integration capacitor signal, and the row and column multiplexing is performed. The selector unit sequentially passes through the signal output end, outputs it to the sensor buffer module and the image processing system, performs image signal processing, and completes the image sensing array module template,
Thus, the infrared thermal image array module is characterized in that the performance of the array detection module can be improved and the time required for verification of the detection module can be shortened.

The invention of claim 1 includes a module for verifying the focal plane array manufacturing process and its photoelectric uniformity in the infrared thermal image array module verification apparatus, and the verification contents of the module include the uniformity of each unit detection inspection unit. It is a verification apparatus for an infrared thermal image array module characterized in that the line width error is smaller than 10% and the total photocurrent uniformity during the optical spectrum reaction is larger than 75%.
According to a second aspect of the present invention, in the verification apparatus according to the first aspect of the present invention, the verification apparatus is characterized by including a film polymer layer that prevents the surface from receiving exudation of moisture and contaminants from the outside. .

The infrared thermal image array module verification apparatus and verification method of the present invention includes modules used for thermal image module standard design, epitaxial verification and optical physical property verification, and first calibrates epitaxial parameters. Absorption infrared wave body verification is performed using near, middle, and far infrared rays. After passing, the single infrared type infrared sensor manufacturing process and temperature-variable photoelectric measurement verification are performed. Complete the calibration. After passing this verification, the focal plane array manufacturing process and its photoelectric uniformity are verified, a dark current uniformity test is performed, and if not, the process returns to thermal image module standard design, epitaxial and optical physical property verification. After passing, the adhesion between the focal plane array and the signal readout integrated circuit and the polishing manufacturing process verification are performed, and indium adhesion is performed between the plane detection module and the signal readout integrated circuit to convert the photoelectric signal. If it fails, return to the focal plane array manufacturing process and verification of the photoelectric uniformity, and verify again.
After passing, the thermal image quality integration test verification is continued and the optimum drive and control output parameter analysis and measurement are adjusted. If it fails, the process returns to the verification of the adhesion of the focal plane array and the signal readout integrated circuit and the polishing manufacturing process. After the acceptance, the thermal image array module template is continuously performed, and the indium column bonding method is used to join the focal plane sensing array to complete the image sensing array module template.

It is a flowchart of the infrared thermal image array module of this invention. It is a structural diagram of the infrared thermal image array module of the present invention. It is a structural diagram of the infrared thermal image array module of the present invention. It is a top view of the infrared thermal image array module of this invention. It is a block chart of the infrared thermal image array module of this invention. It is a three-dimensional view of the infrared thermal image array module of the present invention.

As shown in FIG. 1 which is a flowchart of the infrared thermal image array module of the present invention, the present invention includes thermal image module standard design, epitaxial and optical physical property verification 10, and first calibrates the epitaxial parameters. Absorbs wavelength bands using near, medium and far infrared rays.
The detection module infrared penetration substrate 102 selects the superiority or inferiority of the quality of the detection module and affects the penetration rate of infrared rays that receive the immediate wavelength band.
In the bottom heavy doped contact layer 104, the infrared rays affect the contact quality between the semiconductor and the conductive metal ohmic.
The infrared absorption layer 106 (active layer) absorbs the influence photoconductive gain and quantum efficiency of infrared rays.
The essential layer 108 (depletion layer) absorbs the thickness and intrinsic concentration of infrared rays and affects the quantum efficiency and the dark current value of the infrared sensor.
The energy barrier blocking layer 110 affects the impedance of the infrared sensor, and codes the high injection photocurrent efficiency, the infrared sensor dark current value, and the activation ability value at the operating temperature.
The top heavy doped contact layer 112 affects the ohmic contact characteristics and the efficiency of photoelectron current output.

After passing the above verification, the single infrared type infrared sensor manufacturing process and the variable temperature photoelectric measurement verification 20 are performed.
In fact, Epitaxial has completed adhesion test insulation of heat conductive adhesive, and is derived via gold wire through coaxial wire or low noise signal wire, low temperature change and transformation measurement dark current, dark electrical resistance, reaction spectral, detection sensitivity calibration After passing through this verification, the focal plane array manufacturing process and its photoelectric uniformity verification 30 are performed. If not, the process returns to the thermal image module standard design, epitaxial and optical physical property verification 10 and verification is performed again.
After the acceptance, the focal plane array manufacturing process and its photoelectric uniformity verification 30 are performed, and the focal plane array manufacturing process is performed according to the infrared sensor standard encoded in the setting. The process performs an array policy according to the single-end type parameter used. After this, a test area is selected and a dark current uniformity test is performed. Subsequently, the selected test area is subjected to a dark current uniformity test, and after passing the verification, the focal plane array, the signal readout integrated circuit adhesion, and the polishing manufacturing process verification 40 are performed. If not, the process returns to the thermal image module standard design, epitaxial and optical physical property verification 10 and verification is performed again.

After passing, the focal plane array, signal readout integrated circuit adhesion and polishing manufacturing process verification 40 are performed, and an indium junction is made between the plane detection module and the signal readout integrated circuit for the convenience of the photoelectric conversion of the sensing array module. .
The row sample is held, the circuit unit is enlarged 418, stored in the integrating capacitor 1020, and the sensed signal / noise ratio (S / N ratio) is input to the injection unit 412. The injection unit 412 injects a charge signal into the integrating capacitor 1020 and outputs it to the output terminal.
Amplifier module unit, increased signal profits.
Row 414 and column 416 multi-selector units pick up a sequence of sensing units.
The clock generation control unit 420 controls reading and signal integration time by the main clock 426, and after passing the verification, performs the image integration test (including the optical system) verification 50. In the case of failure, the process returns to the focal plane array manufacturing process and its photoelectric uniformity verification 30 to perform verification again.

After passing, the image integration test (including the optical system) verification 50 is continuously performed, the optimum drive is adjusted, the output parameter is controlled, and the module thermal image quality is analyzed and measured.
Among them, the low-temperature vacuum coolable chamber 502 is a focal plane array, a signal reading integrated circuit image chip module and a filter, a cold isolation inlet tube, and an infrared lens joint with the outside.
The sensor buffer module 524 is an interface driving module between the focal plane array, the signal reading integrated circuit image chip, and the image processing module.
The image display processing circuit module 526 processes and outputs an image data signal.
The control processor 522 controls the entire command and image signal output, and is connected to the host computer.
After passing the verification, the thermal image array module template completion 60 is performed. When the verification is not successful, the process returns to the focal plane array, the signal readout integrated circuit adhesion, and the polishing manufacturing process verification 40, and the verification is performed again.

  After the acceptance, the thermal image array module template completion 60 is continuously performed, and the indium column bonding method is used to join the focal plane sensing array. The photocurrent in each array unit is stored in the integrating capacitor 1020 signal, so that the row 414 and column 416 multiplexers are sent in sequence to the sensor buffer module 524 via the signal output and in the image processing system the image signal. Then, the thermal image array module template is completed 60.

  As shown in FIGS. 1 and 2 which are structural diagrams of the present invention, the thermal image module standard design, epitaxial and optical property verification 10 of the present invention is based on the design parameters, and the infrared infrared sensor in the required thermal image array module. Standard definition of structure. The epitaxial and high-temperature diffusion equipment uses molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), or high-temperature diffusion furnace (HTDO) as the manufacturing method for the optimal component structure. . If the infrared absorption layer 106 is designed as a quantum confinement structure such as a quantum well (Quantum Well) or quantum dot (Quantum Dot) sensing structure operation, it is biased toward the molecular beam epitaxial method or the metal organic CVD method.

  On the other hand, if the sensing structure mainly consists of a bulk type PN or PIN, M is always grown on the N and I layers by molecular beam epitaxy or metal organic CVD, and then diffused at higher temperatures. Use a furnace to diffuse the P layer. The substrate used is Group 4 such as silicon (Si), Group 35 such as GaAs, Inp, etc., and its sensing material, cycle structure and thickness are Si / SizGel-z (z = 0.1 to 0.5, 10 to 40 nm / 1 10 nm, 10-50 cycles), AlxGal-xAs / GaAs (x = 0.1-0.5, 10-40 nm / 1-10 nm, 10-50 cycles), AlxGal-xAs / InyGal-yAs / GaAs (x = 0.1-0.5, y = 0.1 to 0.3, 10 to 40 nm / 1 to 5 nm / 1 to 10 nm, 10 to 50 cycles), the substrate type sensing material is InSb, MCT, Inp, and the PIN of I-essential layer (thickness: 0 to 5 μm) It has a structure, and the P pole is formed using the HTDO diffusion method, and the P pole diffusion material is a ZnAs compound, Zn, Cd, and the depth is 1 to 3 μm.

Before growing the designed infrared sensor structure by molecular beam epitaxy, metal organic CVD, or high-temperature diffusion furnace (HTDO) epitaxial diffusion stand, first, material stacking ratio, cycle structure integrity, structural crystal quality, polarity and doping It is necessary to calibrate epitaxial parameters such as concentration. The above is the process of epitaxial structure design of the infrared sensor module structure, the epitaxial parameter verification and the infrared sensor structure.
After this, a part of the same infrared sensor epitaxial piece (about 1/4 to 1/5 of the total chip area) is cut out, a single infrared sensor manufacturing process and a temperature-variable photoelectric measurement verification 20 are performed, mainly the actual epitaxial. Confirm the difference in photoelectric characteristics and quality between the completed infrared sensor structure and the design part structure.

  During the single infrared sensor manufacturing process, the photomask body part manufacturing process line width is <10% error, and when performing temperature-variable photoelectric measurement verification, the operating temperature error from 10 to 300K is <15%, resulting spectrum The uniformity of the morphology is> 80%, and it is a suitable etching water solvent to be adjusted (including weak PH value acid solution: hydrogen peroxide: deionized water = 2 to 5: 1 to 2: 5 to 20). The etching reading is the thickness (about 1 to 10 μm) between the electron-electric hole layers generated in the upper part of the component layer structure layer, and the purpose is to prevent side leakage current. If it is a Planar-type defined part area manufacturing process, use it in the high-temperature diffusion P-pole (diffusion depth 0.5-5 μm), and also use a surface polishing method (1-5 μm particle size aluminum oxide: deionized water) = 1 to 2 to 5), polishing to 0.25 to 2 μm to form an optimal P-pole area. The non-component area is an I-essential layer lateral spreading current, and the photocurrent localization flows from the component main structure layer to the contact electrode region to achieve maximum quantum efficiency.

  Subsequently, plasma enhanced chemical vapor deposition (PECVD) method (substrate temperature is 300 to 500 ° C), photochemical deposition (plasma vapor deposition, PVD) (substrate temperature is 80 to 200 ° C), ion sputtering (generally He (Using an Ar ion blunt gas) or a thermal evaporation plating method to grow silicon oxide (SiOx) or silicon nitride (SiNx). The surface insulating coating layer 116 of the infrared sensor has a thickness of 50 to 300 nm, and chemical ion dry method (Reactive Ion Etching, RIE) S is a wet etching method (hydrogen fluoride: deionized water, Buffer HF: DI water = 1-5: 20) to define the semiconductor contact metal section, and if the contact metal material used by the upper and lower 1010 electrode sections of this kind of infrared sensor is N-type, palladium (Pd) 1-20 nm / chrome ( Cr) 1-20nm / gold Germanium alloy (Au / Ge) 50-300nm / gold (Au) 50-300nm, P-type palladium (Pd) 1-20nm / chrome (Cr) 1-20nm / gold beryllium alloy ( Au / Be) or zinc (Zn) 50 to 300 nm / gold (Au) 50 to 300 nm, and a metal electrode is manufactured using thermal evaporation, electron gun warm evaporation or ion sputtering.

The Rapid Thermal Annealing (RTA) manufacturing process forms an optimal semiconductor-metal ohmic contact. The heating stable temperature and time are 350 to 500 ° C. and 15 to 60 sec, respectively, and the heating temperature ramp rate is 100 to 200 ° C./sec. If defined by the platform (Mesa) infrared sensor area manufacturing process, the etching area depth is more than 1/3 to 1/2 of the bottom heavy doped polar area thickness in addition to using photomask lithography to define the etching area. Must. Other manufacturing processes are the same as those of the planar type.
In the quantum well infrared sensor structure manufacturing process, a cycleable light fence structure must be added after the platform-type infrared sensor area manufacturing process. Its structure is a one-dimensional rod shape, two-dimensional square shape or rhombus shape, and the distance between light fences and altitude are the same as the etching method between 1-5μm and 10-500nm and the platform type sensing definition area manufacturing process method. The above are the main steps of the single-infrared infrared sensor manufacturing process, and the purpose is to use this manufacturing process parameter as a reference parameter for manufacturing the focal plane array structure.

  After completing the single-type infrared sensor structure, adhere to the test insulation base (aluminum oxide carrier base, etc.) with a heat conductive adhesive, pull out the upper and lower signal ends of the gold wire, and place it in a circulating liquid helium low temperature variable temperature vacuum chamber, In addition, the terminal pin signal line is derived from the feedthrough interface through a coaxial conductor or low noise signal line, via low temperature temperature change and transformation measurement, dark current, dark electrical resistance, reaction spectral (by FTIR spectrum analyzer, Incident light source, Fourier spectrum conversion is performed to obtain absorption spectrum distribution, low noise current expander: voltage setting, signal sensitivity and profit increase expansion, detection inspection degree calibration (black body radiation source, FTIR light source intensity calibration) , Phase lock magnifier, synchro-modulation photocurrent conversion control voltage signal reading), and measurement and verification of photoelectric physical parameters After that, if it meets the specified infrared sensor standards such as signal-to-noise ratio, photoreaction waveband, reactivity, detection inspection degree, dark current, dark differential electrical resistance, etc., 3/4 ~ 4 / The chip area of 5 is a photomask using an array type.

  In addition, the focal plane array manufacturing process is performed directly, the uniformity line width error of each unit detection inspection unit is <10%, the total photocurrent uniformity during spectral reaction is> 75%, The mold parameters are mainly used for array production. Finally, a dark current uniformity test 13 is added to the component test section, and if the sensing array manufactured using a low energy gap sensing material is indium antimonide or mercury cadmium antimony, plasma and UV-assisted on the sensing array surface. By using a method such as VD or superheated vacuum lamination, a passivation layer (thickness: 50 to 300 nm) such as silicon oxide or silicon nitride, or a spin coating film polymer layer (thickness: 0.5 to 3 μm) is placed on the array layer. Need to grow. The main purpose is to prevent the surface from being exposed to ambient moisture or oozing of contaminants, increasing the moist energy state of the surface, creating a side dark current and affecting the sensing quality.

  Next, as shown in FIG. 3, which is a structural diagram of the present invention, indium pillars 118 (altitude is 3 to 12 μm and the bottom area is smaller than the metal electrode section) grown on the upper and lower metal electrode ends are The signal readout integrated circuit performs indium bonding at the moment when the temperature approaches 90 ° C. to 200 ° C. and reaches the melting point of the indium pillar 118. Subsequently, an adhesive injection solidification process (Polymer polymer material, etc.) is performed to complete a perfect focal plane array and signal readout integrated circuit structure. In the figure, a focal plane array within a set of nxn pixels and a signal readout integrated circuit single unit structure unit are displayed. The main function of the signal readout integrated circuit is photoelectric signal pickup conversion, and the structure of each pixel unit corresponds to a set of buffer, direct injection, gate pole adjustment, capacitor resistance conversion expansion injection pickup signal integration unit It is. Therefore, by utilizing the degree of support between the focal plane array sensing unit structure and the signal readout integrated well module, the shear stress accumulation caused by polishing is released moderately.

In the adhesive injection process, first, a portion that does not need to be filled with the adhesive between the focal plane array module to which the infrared sensor array and the signal readout integrated circuit are coupled is protected by a photomask, and the polymer (Polymer) is polymerized by the adhesive solution. insert. It is sufficient if the bubbles do not come out from the boundary position between the infrared sensor array and the signal readout integrated circuit chip. After being taken out, put it in the culture and dry it in a moisture-proof box. After at least 8 to 12 hours, the protective photomask and the remaining adhesive originally fixed on the focal plane array module chip are removed again with an organic solution such as acetone and trichloromethane.
Finally, as shown in FIG. 4, it is similar to a single-end type sensing chip, and is first fixed on a 68 or 84 pin chip base with a thermally conductive adhesive. Bonding pin connection methods on the base are a focal plane array and a tunnel output end point 70 in a signal readout integrated circuit, a bias and power supply end point 72, a clock end point 74, a chip temperature sensing diode output end point 76, and an output module end point 78. Each of the end points is a sense conversion output signal, a power supply signal, a clock and synchro drive input output I / O signal, a test diode signal, and an operating temperature inspection measurement signal.

  As shown in FIG. 5 which is a block chart of the present invention, after completion, it is placed in a low-temperature vacuum coolable chamber 502 and a clock driving process is first performed by a clock generation module 510. The purpose is to provide a normal working state for the focal plane array module 508 and maintain the output signal in a normal working mode. At this time, using the digital scope, the image analog output terminal in the sensor buffer board module 524 is cut out, and the required output signal standard is confirmed. Before this, the focal plane array at room temperature and the signal readout integrated circuit junction resistance value signal screen will be tested to understand the basic bonding situation. Further, the temperature is set to an appropriate temperature operating range of the infrared thermal image array module waiting for verification. This operating temperature is an absolute Casparian temperature of 40-300K. The temperature stabilizes at this set temperature, and at least 15 minutes later, the bias establishment module 512 adjusts the external module operation bias and switches between the absolute pressure of 10 MV to 4 V, which is connected across the infrared sensor. . Adjustment signal readout Integration time in integrated circuit is adjusted corresponding to between 10μsec and 32msec. The functional ends of the signal conversion inhibition expansion and compensation 504 and the buffer profit increase function 506 are determined based on the post-class expansion and the complementary circuit. All of the above important adjustment parameters are adjusted to the background of the image detection module sensing monotonous middle temperature zone, and the original image signal is gray level on the display monitor.

  At the same time, the image output end signal is continuously monitored by the scope, and a relatively large dynamic value is displayed with respect to the temperature change. In this image display processing circuit module (Video Processing Module) 526, an analog / digital conversion circuit 514, an output image data signal processing and control circuit 516, a programmable clock generation circuit 518, a programmable power supply circuit 520 are designed, and a main clock is also provided. It is supplied to the computer via the VME bus transmission key, and the entire control command and image signal output structure are also connected to the bit I / F interface card of the control processor 522 in the host computer via the RS232 interface, and the command and I / O function I do. Subsequently, an infrared optical lens is further installed at the front focal length position of the detection module (F # is 1.5 to 3.5), and the thermal image integration test (including the optical system) 50 performs fine adjustment of parameters. Finally, image signal linearity compensation is performed at two points, low temperature and high temperature, and the uniformity of the dynamic image is calibrated.

Next, as shown in FIG. 6, which is a three-dimensional view of the present invention, after completion of the image adjustment process, during the production of the infrared thermal image array module, the focal plane array of the focal plane sensing array and the signal readout integrated circuit module are detected modules. After confirming that the infrared light signal 802 can be received by the back contact zone 804, the read circuit chip 808 of the signal readout integrated circuit is connected to the indium column junction type and the sensing array by the photocurrent input terminal 806 on the signal readout integrated circuit. A signal stored in the integrating capacitor 1020 by the photocurrent in each array unit by the focal plane array junction is sequentially sent to the sensor buffer plate module 524 and the image display processing circuit via the signal output terminal 814 by the column 810 and the row multiplexer 812. It is sent into the module 526 to perform processes such as image signal processing.
The control temperature of the focal plane array environmental cooler for low-temperature operation is 40 to 150K ± 0.5K, and the enclosed internal vacuum pressure is 10E-5 to 5E-2torr. The uniformity of the image screen after the image quality compensation for both points is> 98%, the operation rate of the EPA module detection inspection unit is> 95%, and finally, a set of image module templates 60 is completed.

10 Thermal image module standard design, epitaxial and optical physical property verification 20 Single-infrared sensor manufacturing process and variable temperature photoelectric measurement verification 30 Focal plane array manufacturing process and photoelectric uniformity verification 40 Focal plane array and signal readout integrated circuit adhesion and polishing Manufacturing process verification 50 Image integration test (including optical system) verification 60 Thermal image array module template completion 102 Detection module infrared penetrating substrate 104 Bottom heavy doped contact layer 106 Infrared absorbing layer 108 Essential layer 110 Energy barrier blocking layer 112 Top heavy doped Contact layer 114 Upper electrode section 116 Infrared sensor surface insulation coating layer 118 Indium pillar 1010 Lower electrode section 1012 Possible output to P-MOSFET transistor 1014 P-MOSFET transistor switching output and installation 1016 Infrared sensor installed Adjust and install P-MOSFET transistor 1018 possible again in P-MOSFET transistor 1020 Integration capacitor 1022 Select possible end point 1024 Inject bias into end point 1026 Install end point again 1028 Negative end point 1030 Signal output end 412 Injection unit 414 Row multiplexer 416 Column multiplexer 418 Holds row samples and expands circuit unit 420 Clock generation control unit 424 Line clock 426 Main clock 428 Row selection port 2110 Reinstall column port 2111 Column selection port 2112 Column port again Installed 2113 A tunnel output end 2114 B tunnel output end 70 Tunnel output end point 72 Pressure and power supply end point 74 Clock end point 76 Chip temperature sensing diode output end point 78 Output module end point 502 Low temperature vacuum coolable chamber 504 signal Conversion inhibition expansion and compensation 506 Buffer increase function 508 Focal plane array module 510 Clock generation module 512 Polarization establishment module 526 Image display processing circuit module 514 Analog to digital conversion circuit 516 Output image data signal processing and control circuit 518 Programmable clock generation circuit 520 Programmable Power supply circuit 522 Control processor 524 Sensor buffer module 802 Infrared light signal 804 Detection module rear surface contact area 806 Photocurrent input terminal 808 on signal readout integrated circuit Reading circuit chip 810 of signal readout integrated circuit Column multiplexer (multiplex communication device) )
812 row multiplexer 814 signal output terminal

Claims (2)

  Infrared thermal image array module verification device includes a focal plane array manufacturing process and a module for verifying its photoelectric uniformity. Infrared thermal image array module verification apparatus, characterized in that it is small and includes a total photocurrent uniformity greater than 75% during the optical spectrum reaction.   2. The verification apparatus according to claim 1, further comprising a coating polymer layer that prevents the surface from receiving moisture and / or contaminants from the outside.

Images