JP2013025703A - Method, device and program for estimating performance of making software into hardware and recording medium thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method, device, and program for estimating the performance of making software into hardware and a recording medium thereof.SOLUTION: A central arithmetic processing unit 100 executes a parallelizing performance estimation program 8004, calculates the processing time of each task on the basis of a task name 8002 subjected to parallelization and a degree of parallelization 8003, extracts a timing in which one task starts the other task when variables propagate between the tasks, and determines the execution order of the task having the task name subjected to parallelization such that the processing time becomes the shortest with the degree of parallelization under the consideration of the timing in which one task starts the other task. When the processing time does not satisfy target performance, the central arithmetic processing unit 100 re-executes the parallelizing performance estimation program 8004, and reflects a processing time 8008 of the task to be made into hardware and a timing 8009 in which the task to be made into hardware starts the other task on the determination of the execution order.

Description

  The present invention relates to a hardware performance estimation method, apparatus, program, and recording medium thereof.

  In recent years, in order to improve the processing speed, all or part of functions realized by software of a computer have been implemented by a semiconductor integrated circuit. In designing a semiconductor integrated circuit in which software is implemented as hardware, the overall performance of the software part and the hardware part, ie, processing time, when the whole or part of the software is implemented as hardware in order to improve the processing speed. Need to estimate. That is, when implementing hardware, it is necessary to set a target performance and estimate whether or not the total performance of the software portion and the hardware portion satisfies the target performance. 2. Description of the Related Art Conventionally, a performance estimation method for parallelizing software functions for a multiprocessor is known. Japanese Patent Application Laid-Open No. 2004-341750 discloses a technique in which an evaluation index calculation of parallel performance such as parallel efficiency of a parallel computer system is performed in a single measurement without the need for multiple measurements performed while changing the number of processors. ing.

JP 2004-341750 A

The conventional performance estimation method can estimate the performance when the software is operated in parallel for multiprocessors, but the software part is combined with the hardware part when the whole or part of the software is made into hardware. The overall performance cannot be estimated.
The object of the present invention is to estimate the overall performance of the software part and the hardware part when the whole or a part of the software is converted into hardware and to parallelize it, It is to provide a program and its recording medium.

In order to achieve the above object, the present invention provides the following hardware performance estimation method, apparatus, program, and recording medium for software.
(1) A method for estimating the hardware performance of software,
Entering the task name to be parallelized in the specified software and its degree of parallelism,
Calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof,
Extracting a timing when one task activates the other task when a variable is propagated between the tasks;
Determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of performing the activation;
Outputting a processing time according to the execution order;
When the processing time does not satisfy the target performance, a step of inputting a processing time of a task to be hardwareized in the task and a timing at which the activation by the task to be hardwareized is input; and Reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
With a method.
(2) A hardware performance estimation device for software,
A means to input the task name to be parallelized in the specified software and its degree of parallelism,
Means for calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof;
Means for extracting a timing at which one task activates the other task when a variable is propagated between the tasks;
Means for determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of the activation;
Means for outputting a processing time according to the execution order;
Means for inputting a processing time of a task to be hardwareized in the task and a timing for performing the activation by the task to be hardwareized when the processing time does not satisfy a target performance; and Means for reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
With a device.
(3) To estimate the performance of hardware implementation of software,
A means to input the task name to be parallelized in the specified software and its degree of parallelism,
Means for calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof;
Means for extracting a timing at which one task activates the other task when a variable is propagated between the tasks;
Means for determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of the activation;
Means for outputting a processing time according to the execution order;
Means for inputting a processing time of a task to be hardwareized in the task and a timing for performing the activation by the task to be hardwareized when the processing time does not satisfy a target performance; and Means for reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
Program to function as.
(4) To estimate the performance of hardware implementation of software,
A means to input the task name to be parallelized in the specified software and its degree of parallelism,
Means for calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof;
Means for extracting a timing at which one task activates the other task when a variable is propagated between the tasks;
Means for determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of the activation;
Means for outputting a processing time according to the execution order;
Means for inputting a processing time of a task to be hardwareized in the task and a timing for performing the activation by the task to be hardwareized when the processing time does not satisfy a target performance; and Means for reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
A computer-readable recording medium in which a program for functioning as a computer is recorded.

According to the first aspect of the invention, when the entire software or a part of the software is converted into hardware and parallelized, the overall performance of the software portion and the hardware portion is estimated, and the performance estimation of the hardware implementation of the software You can get the method.
According to the second aspect of the present invention, when the whole or a part of the software is converted into hardware and parallelized, the total performance of the software part and the hardware part is estimated, and the hardware performance estimation A device can be obtained.
According to the third aspect of the invention, when the entire software or a part of the software is converted into hardware and parallelized, the total performance of the software portion and the hardware portion is estimated, and the performance estimation of the hardware implementation of the software You can get a program for.
According to the invention of claim 4, the performance estimation of the hardware implementation of the software, which estimates the overall performance of the software portion and the hardware portion when the whole or a part of the software is converted into hardware and parallelized It is possible to obtain a computer-readable recording medium on which a program for recording is recorded.

It is a figure which shows an example of the performance estimation flow of the software by a prior art. It is a figure which shows an example of the performance estimation flow of the software by this invention. It is a figure which shows an example of the conventional system structure at the time of parallelizing software for multiprocessors and estimating a performance. It is a figure which shows an example of the software used as the object which estimates performance. FIG. 5 is a diagram illustrating an example in which scheduling is performed with the degree of parallelism set to 1 for the software of FIG. 4. FIG. 5 is a diagram illustrating an example in which scheduling is performed with the degree of parallelism set to 2 for the software of FIG. 4. It is a figure which shows an example of the change of the process at the time of hardware-izing a software task. It is a figure which shows an example of the system configuration | structure for implementing the performance estimation method of the hardware implementation of the software which concerns on this invention. The figure for demonstrating an example of embodiment of this invention for estimating the whole performance which match | combined the software part and the hardware part at the time of hardware-izing the whole software or a part for the improvement of a processing speed. is there. It is a figure which shows the structural example of the performance estimation apparatus of the hardware implementation of the software which concerns on this invention.

  Hereinafter, before describing embodiments of the present invention, a conventional performance estimation method for a multiprocessor will be described. FIG. 3 is a diagram showing an example of a conventional system configuration when parallelizing software for a multiprocessor and estimating the performance. As shown in the figure, the performance estimation program 3004 is executed by designating software 3001 whose performance is to be estimated, and using the parallel function in the software, that is, the task name 3002 and the degree of parallelism 3003. The performance estimation program 3004 schedules the input task and outputs a processing time 3005 after parallelization. Then, it is determined whether the processing time after parallelization satisfies the target performance.

  Here, scheduling is to determine the execution order of each task so that the total processing time is the shortest among a plurality of tasks. At that time, task activation and variable propagation, that is, dependency between tasks must be considered. This scheduling will be described below with reference to FIGS. 4, 5, and 6. FIG.

  FIG. 4 is a diagram illustrating an example of software whose performance is to be estimated. In the software of this example, there are three types of tasks, task 1 (source code 4001), task 2 (source code 4002), and task 3 (source code 4003). Task 3> task 1. In the software of this example, task 3 is activated (4004) when task 2 is present, and variable c (4005) and variable d (4006) are propagated from task 2 to task 3.

  FIG. 5 is a diagram illustrating an example in which scheduling is performed with the parallel degree set to 1 for the software of FIG. When scheduling is performed with the degree of parallelism set to 1, the processing time 5001 of the performance estimation result is the processing time 5002 of the task 1, the processing time 5003 of the task 2, and the processing time of the task 3 5004 is the sum.

  FIG. 6 is a diagram illustrating an example in which scheduling is performed with the parallel degree set to 2 for the software of FIG. The task 2 processing time 6002 is longer than the task 1 processing time 6001 and the task 3 processing time 6003. For this reason, if the task 1 and the task 3 are not processed before and after the processing of the task 2, but are processed in parallel with the task 2, the total processing time can be minimized. At this time, since there is no dependency between task 1 and task 2, execution of task 1 and task 2 can be started simultaneously, and scheduling is performed so as to perform parallel processing. However, between task 2 and task 3, task 3 is activated at the end of process 6004 of task 2 and there is a dependency. For this reason, task 3 must wait for processing until processing A 6004 of task 2 is completed. Since there is no dependency relationship between the task 2 A process 6004 and the task 3 and the task 3, the task 2 and the task 3 are scheduled to be processed in parallel after the task 3 activation timing. In this case, the processing time 6005 of the estimation result is equal to the processing time 6002 of the task 2 having the longest processing time as shown in the figure. In FIG. 6, problems in the prior art when the task 2 having the longest processing time is implemented as hardware in order to shorten the processing time will be described below.

  FIG. 7 is a diagram illustrating an example of a change in processing when a software task is implemented as hardware. Task 2 (7001) is the same as Task 2 (6002) in FIG. 6, and Task 2 includes A (7002), B (7003), C (7004), D (7005), and E (7006). There is a process of B → C → A → D → E. When this task 2 is made hardware (7007) and speeded up, the hardware task 2 is compared with each processing time 7008 of A, B, C, D, and E, which is each processing of the software task 2. Each processing time 7014 of A ′ (7009), B ′ (7010), C ′ (7011), D ′ (7012), and E ′ (7013), which are the processes of FIG. Further, when the processing B ′ and C ′ of the hardware task 2 are processed in parallel (7015) by the hardware implementation (7007), the timing at which A ′ is processed changes.

  That is, the task 2 that has been software until now is hardwareized, so that each processing time 7014 becomes shorter than each processing time 7008 before hardware and the timing at which A ′ is processed. Change. As a result, the processing timing of task 1 and task 3 of the software changes, and there is an effect that the relationship between tasks to be processed in parallel changes. Therefore, in order to estimate the overall performance of the software part and the hardware part after hardware conversion, it is necessary to reschedule in consideration of the influence of the change in the processing timing described above.

  However, in the prior art, with respect to the hardware implementation of task 2, the change in the processing time of the task is parameterized (numerized), the processing time of the result of hardware examination is set, and the task of hardware implementation is It is not possible to parameterize the start timing of the task to be started and set the start timing of the task as a result of the hardware study. In other words, it is not possible to reschedule after reflecting the processing time of the hardware study result and the task start timing of the hardware study result in the scheduling calculation. There is a problem that the overall performance cannot be estimated.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 8 is a diagram showing an example of a system configuration for implementing the hardware performance estimation method for software according to the present invention. First, the software 8001 for which performance is to be estimated is specified, and the parallelized performance estimation program 8004 is executed using the task name 8002 to be parallelized and the degree of parallelism 8003 in the software. Subsequently, according to the parallelization performance estimation program 8004, a processing time for each task is calculated based on the task name to be parallelized and the degree of parallelism. Here, when a variable is propagated between tasks, the timing at which one task activates the other task is extracted. Then, the execution order of tasks with task names to be parallelized is determined (scheduled) so as to minimize the processing time with the above degree of parallelism in consideration of the timing of starting, and the processing time 8005 according to the execution order after parallelization is determined. Is output. When the processing time after the parallelization does not satisfy the target performance (target time), a task 8006 to be hardware-ized among a plurality of tasks related to the software 8001 is determined, and the task name 8007 and the processing time 8008 of the task are determined. The parallelization performance estimation program 8004 is executed using the timing 8009 for performing the activation by the task. As a result, the processing time of the task to be hardwareized and the timing to start the task by the hardwareized task are reflected in the determination of the execution order by the parallelization performance estimation program 8004.

  That is, when the processing time after parallelization does not satisfy the target performance, the task 8006 to be hardware-ized is determined in consideration of the output processing time after parallelization. The parallelized performance estimation program 8004 is executed using the task processing time 8008 related to the task name 8007 to be hardware and the task start timing 8009 that the task starts to perform rescheduling. As a result, when the processing time after the parallelization satisfies the target performance, the total processing time 8010 of the software part and the hardware part when the whole or part of the parallelized software is converted into hardware is output.

  FIG. 10 is a diagram showing a configuration example of a hardware performance estimation apparatus for software according to the present invention. As illustrated, a central processing unit (CPU) 100, a storage device 101, an input device 102, and an output device 103 are connected as a computer via a bus 104. The storage device 101 stores software 8001 whose performance is to be estimated, a parallelization performance estimation program 8004, a processing time 8005 after parallelization, and a total processing time 8010 that combines the software part and the hardware part. From the input device 102, the task name 8002 to be parallelized, the degree of parallelism 8003, the task name 8007 of the task to be hardwareized, the processing time 8008 of the task to be hardwareized, and the task to be activated by the task to be hardwareized Activation timing 8009 can be input. The output device 103 can output the processing time 8005 after parallelization and the total processing time 8010 that combines the software part and the hardware part. Note that the storage device 101 is shown as a single device in this example, but may be composed of a plurality of storage devices. The storage device 101 is, for example, a semiconductor memory, but is not limited thereto, and may be a hard disk or a combination thereof. The input device 102 is, for example, a keyboard, but is not limited thereto, and may be a touch panel or the like. The output device 103 is, for example, a printer, but is not limited thereto, and may be a display device or the like.

  In this way, in the hardware hardware performance estimation device, the input device 102 inputs the task name to be parallelized in the designated software and the degree of parallelism. When the central processing unit 100 executes the parallelization performance estimation program 8004 using the input task name to be parallelized and the degree of parallelism, calculates the processing time for each task, and propagates variables between tasks The task execution timing of the task name to be parallelized so that the processing time is the shortest with the above-mentioned degree of parallelism is determined in consideration of the timing at which one task activates the other task. To do. The output device 103 can output the processing time (processing time after parallelization) according to this execution order, but this is not essential, and the processing time after parallelization is output to the storage device 101 and stored. be able to. Further, when the processing time does not satisfy the target performance, the input device 102 determines a task to be hardwareized in a plurality of tasks, and applies the task name, the processing time of the task, and the activation by the task Timing can be input. In this case, the central processing unit 100 executes the parallelization performance estimation program 8004 and executes the above-described task name of the task to be hardwareized, the processing time of the task to be hardwareized, and the task to be hardwareized. The timing for starting can be reflected in the determination of the execution order.

Next, a flow for estimating the total performance of the software portion and the hardware portion when the whole or a part of the software according to the present invention is implemented as hardware will be described. Before that, the performance estimation of the software according to the prior art will be described. The flow will be described.
FIG. 1 is a diagram showing an example of a software performance estimation flow according to the prior art. In FIG. 1, in step 1001, the software whose performance is to be estimated is specified. In step 1002, task names in the software are listed. In step 1003, the task name to be parallelized in software and the degree of parallelism are input. In step 1004, the processing time for each task in the software is calculated. In step 1005, task activation and variable propagation between tasks are extracted and listed. In step 1006, the task with the input task name to be parallelized is scheduled with the input parallelism. In step 1007, the processing time after parallelization is output. In step 1008, it is determined whether or not the processing time after parallelization satisfies the target performance. If the target performance is not satisfied, the addition and change of the task to be parallelized or the parallelism is changed, and then again. The above steps are repeated from step 1003, and when the target performance is satisfied, the process proceeds to step 1009 and the process ends.

  FIG. 2 is a diagram showing an example of a software performance estimation flow according to the present invention. In FIG. 2, in step 2001, the software whose performance is to be estimated is designated. In step 2002, task names in the software are listed. In step 2003, the task name to be parallelized in software and the degree of parallelism are input. In step 2004, the processing time for each task in the software is calculated. In step 2005, task activation and variable propagation between tasks are extracted and listed. In step 2006, the task with the input task name to be parallelized is scheduled with the input parallelism. In step 2007, the processing time after parallelization is output. In step 2008, it is determined whether or not the processing time after parallelization satisfies the target performance. If the target performance is not satisfied, step 2009 is executed. If the target performance is satisfied, the processing proceeds to step 2012 and the processing ends. In step 2009, a task to be hardware is determined. In step 2010, the processing time of the task to be implemented as hardware is set. In step 2011, the start timing of the task to be started by the task to be hardware is set. Thereafter, the process returns to step 2006, and the setting information of the processing time of the task to be implemented in hardware and the setting information of the timing of the task activated by the task to be implemented in hardware are reflected in the scheduling calculation and rescheduled. In step 2007, the processing time after hardware conversion is output, and it is determined in step 2008 whether the target performance is satisfied. If the condition is not satisfied again, the task to be hardwareized is determined (changed) in step 2009, the processing time of the task to be hardwareized is set (changed) in step 2010, and the hardware is converted in step 2011. The start timing of the task to be started is set (changed), and the processes after the process 2006 are repeated again. And when satisfy | filling target performance, it progresses to the process 2012 and is complete | finished.

  The difference between the prior art and the embodiment of the present invention is that, in the flow of the prior art in FIG. 1, when the processing time after scheduling in step 1008 does not satisfy the target performance, the process returns to step 1003 and the task to be parallelized is added. In the flow according to the present invention in FIG. 2, if the processing time after scheduling does not satisfy the target performance in the determination in step 2008, the hardware is changed in step 2009. The task to be hardware is determined, the processing time of the task to be hardwareized is set in step 2010, the start timing of the task to be activated by the task to be hardware is set in step 2011, and using them, step 2006 is used. In this case, scheduling is performed again.

  FIG. 9 illustrates an example of an embodiment of the present invention for estimating the total performance of the software part and the hardware part when the whole or a part of the software is hardwareized to improve the processing speed. FIG. In FIG. 9, the task 1 (processing time 9008), task 2 (processing time 9001), and task 3 (processing time 9003) of software are scheduled with a parallel degree of 2, and the processing time 9009 of the estimation result is the target performance. In the case where the above condition is not satisfied, a state is shown in which rescheduling is performed by making the task 2 in the hardware into hardware. That is, the processing time 9002 of the task 2 to be implemented in hardware and the activation timing 9004 of the task 3 activated from the task 2 are set, and the rescheduling 9005 is performed. After rescheduling 9005, task 2 that has been hardwareized has a reduced processing time 9006 and the start timing of task 3 changes. As a result, the processing time 9007 of the estimation result is the sum of the processing time 9008 of task 1 and the processing time 9003 of task 3. As shown in the figure, the activation timing at the end of the process A in task 2 before hardware implementation becomes the activation timing at the end of the process A 'in task 2 after hardware implementation and is earlier in time. That is, the processing time is shortened as a whole.

  The above can be implemented by causing a computer to execute the following program. That is, the program includes a task name for parallelizing a computer in specified software and a degree of parallelism for estimating the hardware performance of the software, the task name for parallelization and the degree of parallelism. Means for calculating the processing time for each task based on the above, means for extracting the timing at which one task activates the other task when a variable is propagated between the tasks, and considering the timing at which the activation is performed Means for determining the execution order of tasks of the task names to be parallelized so that the processing time is the shortest in parallel degree, means for outputting the processing time according to the execution order, and when the processing time does not satisfy the target performance, The processing time of the task to be hardwareized in the task and the start by the task to hardwareize That means for inputting the timing, and the hardware implementation to means for reflecting the timing for applying the activation by the task of processing time and the hardware of the task to determine the execution order, to function as a. The program can be stored in a storage device, but is not limited thereto, and can be recorded on a computer-readable recording medium such as a CDROM or provided from outside by a communication unit.

  As described above, the present invention parameterizes the processing time change of the task to set the processing time of the result of the hardware study, and parameterizes the start timing of the task to be activated by the task to be hardware-implemented. The task start timing of the study result is set, the processing time of the hardware study result and the task start timing of the hardware study result are reflected in the scheduling calculation and rescheduled, and the entire software or It estimates the overall performance of the software part and the hardware part when a part is made into hardware and parallelized.

  That is, the present invention estimates the total performance of the software part and the hardware part when the whole or a part of the software is hardwareized in order to improve the processing speed. Function, the task name to be parallelized in the software, and the degree of parallelism are input, and the processing time for each task is calculated, and task activation and variable propagation between tasks are extracted and listed. And a processing time for each task, task activation between the tasks, a variable propagation list, a task name to be parallelized in the software, and a function of scheduling with the parallel degree as input. In addition, a function for specifying a task to be hardwareized from among the scheduled software, a function for setting a processing time of the task to be hardwareized, and task activation and variable propagation between the listed tasks Based on the above, a function for setting a start timing of a task to be started by a hardware task, a start timing of a task to be started by the set hardware task, and processing of the hardware task The time setting information is reflected in the scheduling calculation and has a function of rescheduling. In this way, in order to improve the software performance, that is, the processing time, to the target performance, the total performance, that is, the processing time of the software portion and the hardware portion when the whole or a part of the software is converted into hardware is estimated. This makes it possible to improve design productivity.

  3001: Software, 3002: Name of task to be parallelized, 3003: Parallel degree, 3004: Performance estimation program, 3005: Processing time after parallelization, 4001: Source code of task 1, 4002: Source code of task 2, 4003: Task 3 source code, 4004: Task activation, 4005 to 4006: Task 3 input variable, 5001: Estimated result processing time, 5002 to 5004: Task processing time, 6001 to 6003: Task processing time, 6004: Task 2 A processing, 6005: Estimation result processing time, 7001: Task 2, 7002 to 7006: Software task 2 processing, 7007: Hardware implementation, 7008: Software task 2 processing processing time, 7009 To 7013: processing of hardware task 2; 014: Processing time of processing of hardware task 2, 7015: Parallel processing of processing B and processing C, 8001: Software, 8002: Task name to be parallelized, 8003: Parallel degree, 8004: Performance estimation program, 8005: Parallel Processing time after conversion, 8006: Task to be converted to hardware, 8007: Task name of task to be converted to hardware, 8008: Processing time of task to be converted to hardware, 8009: Startup of task that is activated by task to be converted to hardware Timing, 8010: total processing time of software part and hardware part, 9001: task 2 processing time, 9002: task processing time to be hardware, 9003: task 3 processing time, 9004: hardware implementation Task start timing 9005: Re-scheduling processing, 9006: processing time hardware task 2, 9007: processing time estimate results after hardware implementation, 9008: processing time of the task 1, 9009: processing time hardware implementation previous estimation result

Claims (4)

A method for estimating the hardware performance of software,
Entering the task name to be parallelized in the specified software and its degree of parallelism,
Calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof,
Extracting a timing when one task activates the other task when a variable is propagated between the tasks;
Determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of performing the activation;
Outputting a processing time according to the execution order;
When the processing time does not satisfy the target performance, a step of inputting a processing time of a task to be hardwareized in the task and a timing at which the activation by the task to be hardwareized is input; and Reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
With a method. A hardware performance estimation device for software,
A means to input the task name to be parallelized in the specified software and its degree of parallelism,
Means for calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof;
Means for extracting a timing at which one task activates the other task when a variable is propagated between the tasks;
Means for determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of the activation;
Means for outputting a processing time according to the execution order;
Means for inputting a processing time of a task to be hardwareized in the task and a timing for performing the activation by the task to be hardwareized when the processing time does not satisfy a target performance; and Means for reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
With a device. Computer for hardware performance estimation of software,
A means to input the task name to be parallelized in the specified software and its degree of parallelism,
Means for calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof;
Means for extracting a timing at which one task activates the other task when a variable is propagated between the tasks;
Means for determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of the activation;
Means for outputting a processing time according to the execution order;
Means for inputting a processing time of a task to be hardwareized in the task and a timing for performing the activation by the task to be hardwareized when the processing time does not satisfy a target performance; and Means for reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
Program to function as. Computer for hardware performance estimation of software,
A means to input the task name to be parallelized in the specified software and its degree of parallelism,
Means for calculating a processing time for each task based on the task name to be parallelized and the degree of parallelism thereof;
Means for extracting a timing at which one task activates the other task when a variable is propagated between the tasks;
Means for determining the task execution order of the task names to be parallelized so that the processing time is the shortest in the degree of parallelism in consideration of the timing of the activation;
Means for outputting a processing time according to the execution order;
Means for inputting a processing time of a task to be hardwareized in the task and a timing for performing the activation by the task to be hardwareized when the processing time does not satisfy a target performance; and Means for reflecting the processing time and the timing of performing the activation by the task to be implemented in hardware in the determination of the execution order;
A computer-readable recording medium in which a program for functioning as a computer is recorded.

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