JP2013019834A - Angular velocity detection circuit, integrated circuit device and angular velocity detection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an angular velocity detection circuit, an integrated circuit device and an angular velocity detection device capable of limiting an output voltage range within a desired range while securing an effective detection range as wide as possible.SOLUTION: An angular velocity detection circuit (detection circuit 30) includes: a detector unit (synchronous detector circuit 340) that detects an angular velocity component included in an output signal of an angular velocity detection element 4; and an angular velocity signal generating unit that generates an angular velocity signal referring to an output signal of the detector unit (synchronous detector circuit 340). The angular velocity signal generating unit includes: a sensitivity adjustment unit (variable gain amplifier 360) that adjusts a voltage range of the angular velocity signal according to a detection sensitivity of the angular velocity detection element 4; and a voltage limit unit (voltage limit circuit 370) arranged at a subsequent stage of the sensitivity adjustment unit (variable gain amplifier 360) that limits voltage of the angular velocity signal within a desired range.

Description

  The present invention relates to an angular velocity detection circuit, an integrated circuit device, and an angular velocity detection device.

  Today, gyro sensors are installed in various electronic devices such as digital cameras, navigation devices, and mobile phones. In recent years, downsizing of gyro sensors and high detection accuracy have been demanded, and as a gyro sensor that satisfies these requirements, for example, a vibration gyro sensor using a resonance phenomenon of a crystal resonator is widely used.

JP 2007-292680 A

  By the way, depending on the type of application using angular velocity data, a gyro sensor having a wide detection range of ± several hundreds dps (deg / sec) may be required. On the other hand, there are cases where it is desired to limit the output voltage of the gyro sensor to a desired range due to various circumstances such as restrictions on the allowable range of the input voltage in the device subsequent to the gyro sensor. However, taking into account variations in parameters such as reference voltage (analog ground voltage) and sensitivity, and fluctuations in power supply voltage, in order to limit the output voltage of the gyro sensor to the desired range, the detection range is narrowed and a large margin is set. It was difficult to ensure a wide effective detection range.

  The present invention has been made in view of the above problems, and according to some aspects of the present invention, the output voltage range is limited to a desired range while ensuring an effective detection range as much as possible. It is possible to provide an angular velocity detection circuit, an integrated circuit device, and an angular velocity detection device that are capable of satisfying the requirements.

  (1) The present invention is an angular velocity detection circuit that generates an angular velocity signal corresponding to the magnitude of the angular velocity based on an output signal of the angular velocity detection element, and detects an angular velocity component included in the output signal of the angular velocity detection element. A detector, and an angular velocity signal generator that generates the angular velocity signal based on an output signal of the detector. The angular velocity signal generator is a voltage of the angular velocity signal according to the detection sensitivity of the angular velocity detector. A sensitivity adjusting unit that adjusts the range; and a voltage limiting unit that is provided at a subsequent stage of the sensitivity adjusting unit and limits the voltage of the angular velocity signal to a desired range.

  According to the angular velocity detection circuit of the present invention, by providing a voltage limiting unit, it is not necessary to secure an excessive margin in consideration of variations in parameters such as reference voltage and sensitivity and fluctuations in power supply voltage. There is no need to unnecessarily narrow the range.

  Further, according to the detection circuit of the present invention, since the voltage limiting unit is provided at the subsequent stage of the sensitivity adjustment unit, after the sensitivity adjustment is performed according to the characteristics of the angular velocity detection element, the sensitivity adjusted signal is applied. The output voltage can be limited to a desired range. A detection range as wide as possible can be ensured within a desired detection range regardless of variations in the characteristics of the angular velocity detection elements.

  (2) In this angular velocity detection circuit, the voltage limiting unit may be an inverting amplifier.

  When the reference potential of the inverting amplifier is Vref, the gain of the inverting amplifier is G (G <0), and the ground potential is Vgnd, the lower limit of the output voltage Vo of the inverting amplifier is limited to Vgnd, and the upper limit is −G × (Vref−Vgnd ) + Vref. Therefore, by realizing the voltage limiting unit with an inverting amplifier, the output voltage range can be limited even if the input voltage of the inverting amplifier exceeds a specified range.

  (3) In this angular velocity detection circuit, the angular velocity signal generation unit may further include a filter unit provided at a subsequent stage of the voltage limiting unit.

  (4) In this angular velocity detection circuit, the angular velocity signal generation unit may further include a filter unit provided at a stage after the detection unit and before the voltage limiting unit.

  (5) In this angular velocity detection circuit, the reference potential of the sensitivity adjustment unit and the reference potential of the voltage limiting unit may be the same.

  (6) In this angular velocity detection circuit, the absolute value of the gain of the voltage limiting unit may be 1.

  For example, if the voltage limiting unit is an inverting amplifier, the gain of the inverting amplifier may be -1. When the reference potential of the inverting amplifier is Vref, the gain of the inverting amplifier is −1, and the ground potential is Vgnd, the lower limit of the output voltage Vo of the inverting amplifier is limited to Vgnd, and the upper limit is limited to 2 × Vref−Vgnd. That is, the upper and lower limits of the output voltage of the inverting amplifier can be made symmetric with respect to the reference potential.

  (7) The present invention is an integrated circuit device including any one of the angular velocity detection circuits described above.

  (8) The present invention is an angular velocity detection device including the integrated circuit device described above and an angular velocity detection element.

The functional block diagram of the angular velocity detection apparatus of this embodiment. The figure which shows the structural example of the detection circuit of 1st Embodiment. The figure which shows the structural example of a variable gain amplifier. The figure which shows the structural example of a voltage limiting circuit. The figure which shows the example of a waveform in case the power supply voltage is a regulation value in 1st Embodiment. The figure which shows the example of a waveform when a power supply voltage exceeds a regulation value in 1st Embodiment. The figure which shows the structural example of the detection circuit of 2nd Embodiment. The figure which shows the example of a waveform in case the power supply voltage is a regulation value in 2nd Embodiment. The figure which shows the example of a waveform when a power supply voltage exceeds a regulation value in 2nd Embodiment. The figure which shows the other example of a waveform in case the power supply voltage is a regulation value in 2nd Embodiment. The figure which shows the other example of a waveform when a power supply voltage exceeds a regulation value in 2nd Embodiment.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

1. Angular Velocity Detection Device FIG. 1 is a functional block diagram of the angular velocity detection device of the present embodiment. An angular velocity detection device 1 according to the present embodiment includes an angular velocity detection element 4 and an angular velocity detection IC (integrated circuit device) 2.

The angular velocity detecting element 4 of the present embodiment has two drive electrodes and two detection electrodes formed on a so-called double T-type crystal vibrating piece having two T-type drive vibrating arms and one detection vibrating arm therebetween. And sealed in a package (not shown). However, the vibration piece of the angular velocity detection element 4 may not be a double T type, and may be, for example, a tuning fork type or a comb tooth type, or a sound piece type having a triangular prism shape, a quadrangular prism shape, a cylindrical shape, or the like. May be. Moreover, as a material of the resonator element of the angular velocity detecting element 4, for example, a piezoelectric single crystal such as lithium tantalate (LiTaO ₃ ), lithium niobate (LiNbO ₃ ) or zirconate titanate instead of quartz (SiO ₂ ). A piezoelectric material such as a piezoelectric ceramic such as lead (PZT) may be used, or a silicon semiconductor may be used. Further, for example, a structure in which a piezoelectric thin film such as zinc oxide (ZnO) or aluminum nitride (AlN) sandwiched between drive electrodes is arranged on a part of the surface of a silicon semiconductor may be used.

  The two drive vibration arms of the angular velocity detection element 4 are subjected to bending vibration (excitation vibration) in which the tips of the two are repeatedly approached and separated by an inverse piezoelectric effect when an AC voltage signal is given as a drive signal. If the amplitudes of the bending vibrations of the two driving vibrating arms are equal, the two driving vibrating arms always bend and vibrate in a line-symmetric relationship with respect to the detection vibrating arm, so that the detecting vibrating arm does not vibrate.

  In this state, when an angular velocity having an axis perpendicular to the excitation vibration surface of the angular velocity detection element 4 as a rotation axis is applied, the two drive vibration arms are aligned in a direction perpendicular to both the bending vibration direction and the rotation axis. Gain power. As a result, the symmetry of the bending vibration of the two drive vibrating arms is lost, and the detection vibrating arm performs bending vibration so as to maintain a balance. The phase of the bending vibration of the detection vibrating arm and the bending vibration (excitation vibration) of the driving vibrating arm due to the Coriolis force is shifted by 90 °.

  However, actually, even if no Coriolis force is applied, the amplitudes of the bending vibrations of the two drive vibrating arms are slightly different, so that the detection vibrating arms slightly bend and vibrate so as to maintain a balance. This bending vibration is called leakage vibration and is in phase with the drive signal. Then, AC charges having opposite phases (phases differ by 180 °) based on these bending vibrations are generated in the two detection electrodes by the piezoelectric effect. The AC charge generated based on the Coriolis force changes according to the magnitude of the Coriolis force (in other words, the magnitude of the angular velocity applied to the angular velocity detecting element 4), whereas the AC charge generated based on the leakage vibration. Is constant irrespective of the magnitude of the angular velocity applied to the angular velocity detecting element 4.

  The two drive electrodes of the angular velocity detection element 4 are connected to the DS terminal and the DG terminal of the angular velocity detection IC 2, respectively. The two detection electrodes of the angular velocity detection element 4 are connected to the S1 terminal and the S2 terminal of the angular velocity detection IC 2, respectively.

  The angular velocity detection IC 2 of the present embodiment includes a power supply circuit 10, a drive circuit 20, a detection circuit (angular velocity detection circuit) 30, a reference circuit 40, a nonvolatile memory 50, and a serial interface circuit 60. Note that the angular velocity detection IC 2 of the present embodiment may have a configuration in which some of these configurations (elements) are omitted or another configuration (element) is added.

  The power supply circuit 10 is supplied with a power supply voltage VDD (for example, 3 V) and a ground voltage GND (0 V) from the VDD terminal and the VSS terminal, respectively, and generates a power supply voltage inside the angular velocity detecting IC 2.

  The reference circuit 40 generates a constant voltage and a constant current such as a reference potential Vref (analog ground voltage) from the power supply voltage generated by the power supply circuit 10 and supplies the constant voltage and the constant current to the drive circuit 20 and the detection circuit 30.

  The drive circuit 20 generates a drive signal for exciting and vibrating the angular velocity detection element 4 and supplies the drive signal to one drive electrode of the angular velocity detection element 4 via the DS terminal. Further, the drive circuit 20 receives a drive current (crystal current) generated in the other drive electrode by the excitation vibration of the angular velocity detecting element 4 via the DG terminal, and the amplitude of the drive current is kept constant. Feedback control is performed on the amplitude level of the drive signal. Further, the drive circuit 20 generates a reference signal for the synchronous detection circuit included in the detection circuit 30 and a clock signal for the switched capacitor filter (SCF).

  The detection circuit 30 receives AC charges (detection currents) generated in the two detection electrodes of the angular velocity detection element 4 via the S1 terminal and the S2 terminal, respectively, and is included in these AC charges (detection currents). Only the angular velocity component is detected, a voltage level signal (angular velocity signal) corresponding to the magnitude of the angular velocity is generated, and output to the outside via the VO terminal. This angular velocity signal is A / D converted by a microcomputer (not shown) connected to the VO terminal, for example, and used for various processing as angular velocity data. Note that the angular velocity detection IC 2 of this embodiment may include an A / D converter and output digital data representing the angular velocity to the outside via the serial interface circuit 60, for example.

  The nonvolatile memory 50 holds various adjustment data for the drive circuit 20 and the detection circuit 30, and can be configured as, for example, an EEPROM (Electrically Erasable Programmable Read-Only Memory).

  The serial interface circuit 60 performs processing of writing and reading adjustment data to and from the nonvolatile memory 50 by two-line logic using a clock signal and a serial data signal, respectively, via the CLK terminal and the DATA terminal. When writing data to the nonvolatile memory 50, a high power supply voltage (for example, 15 V or more) is supplied via the VPP terminal in order to supply energy sufficient to invert the data held in the memory element. .

2. Angular velocity detection circuit 2-1. First Embodiment FIG. 2 is a diagram illustrating a configuration example of a detection circuit (angular velocity detection circuit) 30 according to a first embodiment. As shown in FIG. 2, the detection circuit 30 of the first embodiment includes charge amplifiers (QV amplifiers) 300 and 302, a differential amplifier 310, a high pass filter 320, an AC amplifier 330, a synchronous detection circuit 340, an offset adjustment DAC 342, a low pass. The filter 350 includes a programmable gain amplifier (PGA) 360, a voltage limiting circuit 370, and a switched capacitor filter (SCF) 380. The detection circuit 30 of the present embodiment may have a configuration in which some of these configurations (elements) are omitted or another configuration (element) is added.

  The charge amplifier 300 receives AC charges including an angular velocity component and a vibration leakage component from one detection electrode (first detection electrode) of the angular velocity detection element 4 via the S1 terminal. Similarly, AC charge including an angular velocity component and a vibration leakage component is input to the charge amplifier 302 from the other detection electrode (second detection electrode) of the angular velocity detection element 4 via the S2 terminal. The charge amplifiers 300 and 302 convert the input AC charges into AC voltage signals. The phases of the output signal of the charge amplifier 300 and the output signal of the charge amplifier 302 are opposite to each other (shifted by 180 °).

  The differential amplifier 310 differentially amplifies the output signal of the charge amplifier 300 and the output signal of the charge amplifier 302. The differential amplifier 310 cancels the in-phase component and adds and amplifies the anti-phase component.

  The high pass filter 320 cancels the DC component included in the output signal of the differential amplifier 310, and the AC amplifier 330 AC amplifies the output signal of the high pass filter 320.

  The synchronous detection circuit 340 synchronously detects the angular velocity component included in the output signal of the AC amplifier 330 with the reference signal SDET generated by the drive circuit 20. For example, the synchronous detection circuit 340 selects the output signal of the AC amplifier 330 as it is when the voltage level of the reference signal SDET is higher than the analog ground voltage, and AC when the voltage level of the reference signal SDET is lower than the analog ground voltage. It can be configured as a switch circuit that selects a signal obtained by inverting the output signal of the amplifier 330 with respect to the analog ground voltage.

  The output signal of the AC amplifier 330 includes an angular velocity component and a vibration leakage component. The angular velocity component is in phase with the reference signal SDET, whereas the vibration leakage component is in antiphase. Therefore, the angular velocity component is detected by the synchronous detection circuit 340, but the vibration leakage component is not detected.

  Further, the synchronous detection circuit 340 performs offset adjustment (zero point adjustment) according to the output voltage of the offset adjustment DAC 342. The offset adjustment DAC 342 receives the offset adjustment data stored in the nonvolatile memory 50 and outputs a voltage corresponding to the offset adjustment data. In the inspection process, offset adjustment data corresponding to the characteristics of the angular velocity detecting element 4 is obtained and stored in the nonvolatile memory 50, so that the characteristic variation of the angular velocity detecting element 4 is absorbed and the zero point voltage is a constant voltage (for example, analog The offset can be adjusted so as to be at the ground voltage.

  The low-pass filter 350 reduces high frequency components (such as the reference signal SDET and its harmonic components) included in the output signal of the synchronous detection circuit 340, and extracts and outputs a signal in a frequency range determined by specifications. The low-pass filter 350 also functions as a prefilter for the subsequent switched capacitor filter (SCF) 380.

  The variable gain amplifier 360 receives the gain adjustment data stored in the nonvolatile memory 50, and amplifies or attenuates the output signal of the low pass filter 350 according to the gain adjustment data and outputs the amplified signal. In the inspection process, gain adjustment data corresponding to the characteristics of the angular velocity detecting element 4 is obtained and stored in the nonvolatile memory 50, so that the characteristic variation of the angular velocity detecting element 4 is absorbed and the angular velocity detection range becomes constant. The sensitivity can be adjusted.

  The voltage limiting circuit 370 limits the voltage level of the angular velocity signal output to the outside via the VO terminal so as not to exceed a desired range.

  A switched capacitor filter (SCF) 380 (an example of a filter) performs low-pass processing on the output signal of the voltage limiting circuit 370 based on the clock signal SCFCLK generated by the drive circuit 20. In this embodiment, the output signal of the switched capacitor filter (SCF) 380 is output from the VO terminal as an angular velocity signal.

  In the present embodiment, the synchronous detection circuit 340 corresponds to the detection unit. A circuit portion including a low-pass filter 350, a variable gain amplifier (PGA) 360, a voltage limiting circuit 370, and a switched capacitor filter (SCF) 380 corresponds to the angular velocity signal generation unit. The variable gain amplifier (PGA) 360 and the voltage limiting circuit 370 correspond to a sensitivity adjustment unit and a voltage limiting unit, respectively.

  FIG. 3 is a diagram illustrating a configuration example of the variable gain amplifier (PGA) 360. As illustrated in FIG. 3, the variable gain amplifier (PGA) 360 includes, for example, two variable resistors 364 and 366 connected in series between the output terminal of the operational amplifier (op-amp) 362 and the reference potential Vref, and the variable resistor 364. , 366 and the non-inverting input terminal (+ input terminal) of the operational amplifier (op-amp) 362 are connected, and the input signal (low-pass filter 350) is connected to the inverting input terminal (-input terminal) of the operational amplifier (op-amp) 362. The output signal can be realized. Then, the output signal of the operational amplifier (op-amp) 362 is input to the voltage limiting circuit 370.

  The variable resistors 364 and 366 are, for example, a plurality of resistors connected in series between the output terminal of the operational amplifier (operational amplifier) 362 and the reference potential Vref, and each connection point between the resistors and the non-inversion of the operational amplifier (operational amplifier) 362. This can be realized by connecting a switch between each input terminal (+ input terminal) and controlling opening and closing of each switch according to gain adjustment data.

  FIG. 4 is a diagram illustrating a configuration example of the voltage limiting circuit 370. As shown in FIG. 4, for example, the voltage limiting circuit 370 connects a resistor 376 between an inverting input terminal (−input terminal) of an operational amplifier (op-amp) 372 and an output terminal of the operational amplifier (op-amp) 372 to perform an arithmetic operation. The non-inverting input terminal (+ input terminal) of the amplifier (operational amplifier) 372 is connected to the reference potential Vref, and the input signal (variable gain amplifier) is connected to the inverting input terminal (−input terminal) of the operational amplifier (operational amplifier) 372 via the resistor 374. 360 output signal) can be realized as an inverting amplifier (inverting amplification type DC amplifier). Then, the output signal of the operational amplifier (op-amp) 372 is input to the switched capacitor filter (SCF) 380.

_Assuming that the resistance value of the resistor 374 in FIG. 4 is R1, the resistance value of the resistor 376 is R2, and the output voltage of the variable gain amplifier 360 is V _PGAO , the output voltage V _DCO of the voltage limiting circuit 370 (inverting amplifier) is 1).

Since V _PGAO ≧ GND (0 V), V _DCO is maximized when V _PGAO = GND (0 V), and the maximum value of V _DCO is given by the following equation (2).

On the other hand, since V _PGAO ≦ VDD, V _DCO is minimized when V _PGAO = VDD, and the minimum value of V _DCO is given by the following equation (3).

However, since V _DCO cannot be lower than GND (0V), when VDD ≧ (R1 + R2) / R2 × Vref, the minimum value of V _DCO is GND (0V).

From the above, V _DCO is limited to the range of GND (0 V) to (R2 / R1 + 1) × Vref. If the absolute value of the gain of the voltage limiting circuit 370 is 1 (the gain (−R2 / R1) of the inverting amplifier is −1), the range of V _DCO is GND (0 V) to 2 Vref, and the upper and lower limits are set to the reference potential. Can be symmetric with respect to Vref.

When the gain of the switched capacitor filter (SCF) 380 is G _SCF (> 0), the output voltage V _SCFO of the switched capacitor filter (SCF) 380 is expressed by the following equation (4).

Since V _DCO is in the range of GND (0V) to (R2 / R1 + 1) × Vref, from Formula (4), V _SCFO becomes maximum when V _DCO = (R2 / R1 + 1) × Vref, and the maximum value of V _SCFO Is given by the following equation (5).

On the other hand, V _SCFO is minimized when V _DCO = GND (0 V), and the minimum value of V _SCFO is given by the following equation (6).

However, V _SCFO cannot be lower than GND (0 V), so when G _SCF > 1, the minimum value of V _SCFO is GND (0 V).

Since the output signal of the switched capacitor filter (SCF) 380 is an angular velocity signal, the output voltage of the detection circuit 30 (voltage of the angular velocity signal) is in the range of GND (0 V) to (R2 / R1 × G _SCF +1) × Vref. Limited. The absolute value of the first gain of the voltage limiting circuit 370 (the inverting amplifier gain (-R2 / R1) -1), equal to 1 the gain _{G SCF} of the switched capacitor filter (SCF) 380, the detection circuit 30 outputs The range of the voltage (voltage of the angular velocity signal) is GND (0 V) to 2 Vref, and the upper and lower limits can be made symmetrical with respect to the reference potential Vref.

  Next, an example of a specific waveform will be shown to explain that the output voltage of the angular velocity detection circuit 30 is limited to a desired range regardless of the power supply voltage.

5 and 6 show the variable gain amplifier 360, the voltage limiting circuit 370, and the switched capacity when applied to the angular velocity detecting element 4 while slowly changing the angular velocity within a predetermined range (several Hz to several tens of Hz) according to the sine function. It is a figure which shows an example of the output signal waveform of a filter (SCF) 380. In both the examples of FIGS. 5 and 6, the gain of the voltage limiting circuit 370 (inverting amplifier) is set to −1, the gain of the switched capacitor filter (SCF) 380 is set to 1, and Vref = V _1/2 .

In the example of FIG. 5, VDD matches the specified voltage value V _1, and the signal waveform of the output (PGAO) of the variable gain amplifier 360 upon receiving the detection signal of the angular velocity detection element 4 has an amplitude of V ₁ / It is a sine wave of 2. The signal waveform of the output (DCO) of the voltage limiting circuit 370 is a sine wave obtained by inverting the output signal of the variable gain amplifier 360 on the basis of Vref (a sine having a phase opposite to that of the output signal of the variable gain amplifier 360 and an amplitude of V _1/2. Wave). As a result, the output of the switched capacitor filter (SCF) 380, that is, the signal waveform of the VO terminal (angular velocity signal waveform) is a sine wave having the same phase as the output signal of the voltage limiting circuit 370 and an amplitude of V _1/2 . Thus, when VDD is consistent with the voltage value _{V 1} of the provisions, the voltage of the angular velocity signal is limited necessarily to a range of GND (0V) ~V _1.

In contrast, in the example of FIG. 6, but the same angular velocity as the example of FIG. 5 is applied to the angular velocity detection element 4, since the VDD exceeds the voltage value V ₁ of the provisions, the output of the variable gain amplifier 360 ( The signal waveform of (PGAO) is a waveform obtained by clipping a sine wave with an amplitude of VDD-V _{1/2 at} GND (0 V). The signal waveform of the output (DCO) of the voltage limiting circuit 370 is a waveform in which the output voltage of the variable gain amplifier 360 is inverted from the output signal of the variable gain amplifier 360 with reference to Vref in the range of GND (0 V) to V ₁ . The range where the output voltage of the variable gain amplifier 360 is V _{1 to} VDD is clipped to GND (0 V). That is, the signal waveform of the output (DCO) of the voltage limiting circuit 370 is always limited to the range of GND (0 V) to V ₁ . Therefore, even if the VDD exceeds the voltage value _{V 1} of the provisions, the output of the switched capacitor filter (SCF) 380, i.e., (the waveform of the angular velocity signal) signal waveform VO terminals may always GND (0V) of ~V ₁ Limited to range.

  That is, as is apparent from the examples of FIGS. 5 and 6, the output voltage of the angular velocity detection circuit 30 is always limited to a desired range regardless of the power supply voltage.

  As described above, according to the angular velocity detection circuit of the present embodiment, by providing an inverting amplifier as the voltage limiting circuit 370, an excessive margin that takes into account variations in parameters such as reference voltage and sensitivity and fluctuations in power supply voltage is taken into account. Therefore, it is not necessary to narrow the effective detection range unnecessarily.

  Further, according to the angular velocity detection circuit of the present embodiment, since the voltage limiting circuit 370 is provided in the subsequent stage of the variable gain amplifier (PGA) 360, the sensitivity is adjusted after performing sensitivity adjustment according to the characteristics of the angular velocity detection element 4. The output voltage can be limited to a desired range for the adjusted signal. Accordingly, a detection range as wide as possible can be ensured regardless of variations in the characteristics of the angular velocity detection element 4.

  In addition, according to the present embodiment, the voltage limiting circuit 370 is realized by an inverting amplifier, so that the input voltage is compared with the upper limit voltage and the lower limit voltage, and compared with the case where it is realized by a limiter circuit that limits the output voltage range. Thus, the circuit area and power consumption can be further reduced.

  Further, according to the present embodiment, in the test mode, the input of the voltage limiting circuit 370 (inverting amplifier) is connected to the external terminal of the angular velocity detecting IC 2 and a desired input signal is input from the external terminal to output the VO terminal. The voltage range can be easily inspected.

  For example, when it is desired to increase the detection sensitivity (detection resolution) of the angular velocity, it is necessary to increase the total gain of the detection circuit 30, and a method of increasing the gain of the variable gain amplifier (PGA) 360 is conceivable. However, since the two variable resistors 364 and 366 of the variable gain amplifier (PGA) 360 are generally realized by a large number of resistors and a large number of switches, the gain of the variable gain amplifier (PGA) 360 is increased. It is necessary to increase the resistance value of each resistor. For this reason, this method significantly increases the circuit area. On the other hand, in this embodiment, an inverting amplifier is provided as the voltage limiting circuit 370, and the gain of the inverting amplifier is increased N times (resistance ratio (R2 / R1) of the resistor 376 and the resistor 374 is increased N times). As a result, the total gain of the detection circuit 30 can be increased. As a result, the angular velocity detection sensitivity (detection resolution) can be increased while suppressing an increase in circuit area as compared with the case where the gain of the variable gain amplifier (PGA) 360 is increased.

2-2. Second Embodiment FIG. 7 is a diagram illustrating a configuration example of a detection circuit (angular velocity detection circuit) 30 according to a second embodiment. As shown in FIG. 2, the detection circuit 30 of the second embodiment includes charge amplifiers (QV amplifiers) 300 and 302, a differential amplifier 310, a high-pass filter 320, an AC amplifier 330, synchronous detection, as in the first embodiment. The circuit 340 includes an offset adjustment DAC 342, a low-pass filter 350, a variable gain amplifier (PGA) 360, a voltage limiting circuit 370, and a switched capacitor filter (SCF) 380. The detection circuit 30 of the present embodiment may have a configuration in which some of these configurations (elements) are omitted or another configuration (element) is added.

  In the detection circuit 30 of the second embodiment, a switched capacitor filter (SCF) 380 is connected to the output of the variable gain amplifier 360, a voltage limiting circuit 370 is connected to the output of the switched capacitor filter (SCF) 380, and the voltage limiting circuit 370 is connected. Becomes an angular velocity signal and is output to the outside through the VO terminal. That is, the detection circuit 30 of the second embodiment is different from the first embodiment in the connection order of the voltage limiting circuit 370 and the switched capacitor filter (SCF) 380, and the other configurations are the same as those of the first embodiment.

In the detection circuit 30 of the second embodiment, when the gain of the switched capacitor filter (SCF) 380 is G _SCF (> 0), the output voltage V _SCFO of the switched capacitor filter (SCF) 380 is _expressed by the following equation (7). Is done.

The output voltage V _DCO of the voltage limiting circuit 370 (inverting amplifier) is expressed by the following equation (8).

  Substituting equation (8) into equation (7) yields the following equation (9).

Since V _PGAO ≧ GND (0 V), V _DCO is maximized when V _PGAO = GND (0 V), and the maximum value of V _DCO is given by the following equation (10).

On the other hand, since V _PGAO ≦ VDD, V _DCO is minimized when V _PGAO = VDD, and the minimum value of V _DCO is given by the following equation (11).

However, since V _DCO cannot be lower than the GND potential (0 V), when VDD ≧ (R1 + R2) / R2 × _GSDF × Vref, the minimum value of V _DCO is the GND potential (0 V).

In this embodiment, since the output signal of the voltage limiting circuit 370 (inverting amplifier) is an angular velocity signal, the output voltage (voltage of the angular velocity signal) of the detection circuit 30 is GND (0 V) to (R2 / R1 × G _SCF +1). ) × Vref. The absolute value of the first gain of the voltage limiting circuit 370 (the inverting amplifier gain (-R2 / R1) -1), equal to 1 the gain _{G SCF} of the switched capacitor filter (SCF) 380, the detection circuit 30 outputs The range of the voltage (voltage of the angular velocity signal) is GND (0 V) to 2 Vref, and the upper and lower limits can be made symmetrical with respect to the reference potential Vref.

  Next, an example of a specific waveform will be shown to explain that the output voltage of the angular velocity detection circuit 30 is limited to a desired range regardless of the power supply voltage.

8 and 9 show a variable gain amplifier 360 and a switched capacitor filter (SCF) when applied to the angular velocity detecting element 4 while slowly changing the angular velocity within a predetermined range (several Hz to several tens Hz) according to a sine function. 380 is a diagram illustrating an example of an output signal waveform of the voltage limiting circuit 370. FIG. In both the examples of FIGS. 8 and 9, the gain of the switched capacitor filter (SCF) 380 is set to 1, the gain of the voltage limiting circuit 370 (inverting amplifier) is set to −1, and Vref = V _1/2 .

In the example of FIG. 8, VDD matches the specified voltage value V _1, and the signal waveform of the output (PGAO) of the variable gain amplifier 360 upon receiving the detection signal of the angular velocity detection element 4 has an amplitude of V ₁ / It is a sine wave of 2. The signal waveform of the output (SCFO) of the switched capacitor filter (SCF) 380 is a sine wave having the same phase as the output signal of the variable gain amplifier 360 and having an amplitude of V _1/2 . As a result, the output (DCO) of the voltage limiting circuit 370, that is, the signal waveform of the VO terminal (waveform of the angular velocity signal) is a sine wave (switched capacitor) obtained by inverting the output signal of the switched capacitor filter (SCF) 380 with reference to Vref. A sine wave having an amplitude of V _{1/2 in} reverse phase to the output signal of the filter (SCF) 380. Thus, when VDD is consistent with the voltage value _{V 1} of the provisions, the voltage of the angular velocity signal is limited necessarily to a range of GND (0V) ~V _1.

In contrast, in the example of FIG. 9, although the same angular velocity as the example of FIG. 8 are applied to the angular velocity detection element 4, since the VDD exceeds the voltage value V ₁ of the provisions, the output of the variable gain amplifier 360 ( The signal waveform of (PGAO) is a waveform obtained by clipping a sine wave with an amplitude of VDD-V _{1/2 at} GND (0 V). Similarly, the signal waveform of the output (SCFO) of the switched capacitor filter (SCF) 380 is a waveform obtained by clipping a sine wave having an amplitude of VDD-V _{1/2 at} GND (0 V). The output of the voltage limiting circuit 370 (DCO), i.e., the signal waveform of the VO terminal (waveform of the angular velocity signal), the range output voltage of the switched capacitor filter (SCF) 380 is GND (0V) of ~V ₁ is based on the Vref The output signal of the switched capacitor filter (SCF) 380 is inverted and the output voltage of the switched capacitor filter (SCF) 380 is clipped to GND (0 V) in the range of V _{1 to} VDD. Therefore, even if the VDD exceeds the voltage value _{V 1} of the provisions, the output of the voltage limiting circuit 370 (DCO), i.e., (the waveform of the angular velocity signal) signal waveform VO terminal is always GND (0V) of ~V ₁ Limited to range.

10 and 11 show a variable gain amplifier 360 and a switched capacitor filter (SCF) when applied to the angular velocity detecting element 4 while slowly changing the angular velocity in a predetermined range (several Hz to several tens Hz) according to a sine function. 380 is a diagram illustrating another example of an output signal waveform of the voltage limiting circuit 370. FIG. In both the examples of FIGS. 10 and 11, the gain of the voltage limiting circuit 370 (inverting amplifier) is set to −1, the gain of the switched capacitor filter (SCF) 380 is set to 2, and Vref = V _1/2 .

In the example of FIG. 10, VDD matches the specified voltage value V _1, and the signal waveform of the output (PGAO) of the variable gain amplifier 360 upon receiving the detection signal of the angular velocity detection element 4 has an amplitude of V ₁ / It is a sine wave of 4. The signal waveform of the output (SCFO) of the switched capacitor filter (SCF) 380 is a sine wave having the same phase as the output signal of the variable gain amplifier 360 and having an amplitude of V _1/2 . As a result, the output (DCO) of the voltage limiting circuit 370, that is, the signal waveform of the VO terminal (waveform of the angular velocity signal) is a sine wave (switched capacitor) obtained by inverting the output signal of the switched capacitor filter (SCF) 380 with reference to Vref. A sine wave having an amplitude of V _{1/2 in} reverse phase to the output signal of the filter (SCF) 380. Thus, when VDD is consistent with the voltage value _{V 1} of the provisions, the voltage of the angular velocity signal is limited necessarily to a range of GND (0V) ~V _1.

In contrast, in the example of FIG. 11, the same angular velocity as that of the example of FIG. 10 is applied to the angular velocity detection element 4, but the power supply voltage VDD exceeds the specified voltage value V ₁ . signal waveform of the output (PGAO), the amplitude becomes large sine wave than _V 1/4. Therefore, the signal waveform of the output (SCFO) of the switched capacitor filter (SCF) 380 is a waveform obtained by clipping a sine wave between VDD and GND. The output of the voltage limiting circuit 370 (DCO), i.e., the signal waveform of the VO terminal (waveform of the angular velocity signal), the range output voltage of the switched capacitor filter (SCF) 380 is GND (0V) of ~V ₁ is based on the Vref The output signal of the switched capacitor filter (SCF) 380 is inverted and the output voltage of the switched capacitor filter (SCF) 380 is clipped to GND (0 V) in the range of V _{1 to} VDD. Therefore, even if the VDD exceeds the voltage value _{V 1} of the provisions, the output of the voltage limiting circuit 370 (DCO), i.e., (the waveform of the angular velocity signal) signal waveform VO terminal is always GND (0V) of ~V ₁ Limited to range.

  That is, as apparent from the examples of FIGS. 8 and 9 or the examples of FIGS. 10 and 11, the output voltage of the angular velocity detection circuit 30 is independent of the power supply voltage and the gain of the switched capacitor filter (SCF) 380. It is always limited to the desired range.

  The angular velocity detection circuit of the second embodiment also has the same effect as the angular velocity detection circuit of the first embodiment.

  The present invention is not limited to the present embodiment, and various modifications can be made within the scope of the gist of the present invention. For example, the following modifications can be considered.

  For example, the angular velocity detection element 4 is not only for detecting the angular velocity using the piezoelectric effect, but also for detecting the angular velocity using a change in capacitance (silicon MEMS (Micro Electro Mechanical Systems) or the like, and the configuration of the angular velocity detection IC may be changed as appropriate in accordance with the operation principle of the angular velocity detection element 4.

  The present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations that have the same functions, methods, and results, or configurations that have the same objects and effects). In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that exhibits the same operational effects as the configuration described in the embodiment or a configuration that can achieve the same object. Further, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

1 angular velocity detection device, 2 angular velocity detection IC, 4 angular velocity detection element, 10 power supply circuit, 20 drive circuit, 30 detection circuit, 40 reference circuit, 50 nonvolatile memory, 60 serial interface circuit, 300, 302 charge amplifier, 310 differential Amplifier, 320 High-pass filter, 330 AC amplifier, 340 Synchronous detection circuit, 342 Offset adjustment DAC, 350 Low-pass filter, 360 Variable gain amplifier (PGA), 362 Operational amplifier (op amp), 364, 366 Variable resistance, 370 Voltage limiting circuit, 372 operational amplifier (op amp), 374, 376 resistor, 380 switched capacitor filter (SCF)

Claims (8)

An angular velocity detection circuit that generates an angular velocity signal corresponding to the magnitude of the angular velocity based on an output signal of the angular velocity detection element,
A detection unit for detecting an angular velocity component included in the output signal of the angular velocity detection element;
An angular velocity signal generation unit that generates the angular velocity signal based on an output signal of the detection unit,
The angular velocity signal generator is
A sensitivity adjustment unit that adjusts a voltage range of the angular velocity signal according to the detection sensitivity of the angular velocity detection element;
An angular velocity detection circuit including a voltage limiting unit that is provided at a subsequent stage of the sensitivity adjustment unit and limits a voltage of the angular velocity signal to a desired range. In claim 1,
The voltage limiter is an angular velocity detection circuit which is an inverting amplifier. In claim 1 or 2,
The angular velocity signal generator is
The angular velocity detection circuit further includes a filter unit provided at a subsequent stage of the voltage limiting unit. In claim 1 or 2,
The angular velocity signal generator is
The angular velocity detection circuit further includes a filter unit provided after the detection unit and before the voltage limiting unit. In any one of Claims 1 thru | or 4,
An angular velocity detection circuit in which a reference potential of the sensitivity adjustment unit and a reference potential of the voltage limiting unit are the same. In any one of Claims 1 thru | or 5,
An angular velocity detection circuit in which the absolute value of the gain of the voltage limiting unit is 1.   An integrated circuit device comprising the angular velocity detection circuit according to claim 1. An integrated circuit device according to claim 7;
An angular velocity detection device including an angular velocity detection element.

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