JP2013016720A - Manufacturing method of mask for euvl - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique of manufacturing a mask for EUVL having substantially no phase defect, by performing local layout change of an absorber pattern.SOLUTION: When transferring a mask pattern onto the principal surface of a wafer, a phase defect PD giving a transfer error larger than a permissible value is detected, and a determination is made as to whether or not local layout change of absorber patterns ABS-3, ABS-4 around the phase defect PD is possible. If it is determined that the layout change is possible, the shape of the absorber pattern ABS-3 close to the phase defect PD is locally corrected. Furthermore, the layout of the other adjacent absorber pattern ABS-4 is locally changed in accordance with the shape of the corrected absorber patterns ABS-3.

Description

  The present invention relates to a technology for manufacturing a mask for lithography used for forming a circuit pattern of a semiconductor device, and particularly, uses so-called extreme ultraviolet (EUV (Extreme Ultra-Violet) light) exposure having a wavelength of about 10 to 15 nm. The present invention relates to a technique effective when applied to a manufacturing method of an extreme ultraviolet exposure mask used in a lithography process.

  A semiconductor device (semiconductor integrated circuit device) irradiates exposure light onto a mask, which is an original on which a circuit pattern is drawn, and applies the circuit pattern to a main part of a semiconductor substrate (hereinafter referred to as a wafer) via a reduction projection optical system. It is produced by repeatedly using optical lithography that transfers onto the surface.

  However, in recent years, EUV lithography (hereinafter referred to as EUVL) using EUV light having a wavelength shorter than that of light used for photolithography exposure has been developed in response to demands for miniaturization of semiconductor devices. By using this EUVL, the resolution can be improved and a finer circuit pattern can be transferred.

  In the EUV light wavelength range (for example, the central wavelength of 13.5 nm), the transmission mask cannot be used because of the light absorption of the substance, so that the multilayer film reflection utilizing the reflection by the multilayer film such as molybdenum (Mo) and silicon (Si). The substrate is used as EUVL mask blanks (hereinafter referred to as mask blanks). An EUVL mask is formed by forming an absorber pattern on the surface of the mask blank (for example, Non-Patent Document 1).

  Further, since a transmissive lens cannot be used, for example, as described in Japanese Patent Application Laid-Open No. 2007-158828 (Patent Document 1), the reduction projection optical system includes molybdenum (Mo) and silicon (Si). And a reflection type exposure optical system (reflection type imaging optical system, EUV optical system) composed only of a multilayer film reflecting surface. The light from the light source is made uniform through a reflection type illumination optical system and irradiated to the EUVL mask. The light irradiated on the EUVL mask is reflected by the EUVL mask, reaches the wafer through a reflective projection optical system, and the absorber pattern of the EUVL mask is projected onto the main surface of the wafer.

  In EUVL, even if a height abnormality of only a few nanometers occurs on the surface of the mask blank, a large phase change is caused in the EUV reflected light due to the height abnormality, and the absorber pattern is transferred onto the main surface of the wafer. In this case, defects such as a dimensional change or poor resolution are caused. A defect that gives such a phase change is called a phase defect. Therefore, it is necessary to detect the phase defect at the stage of the mask blank before depositing the absorber pattern.

  As a general mask blank inspection method, there is a method of irradiating a mask blank with a laser beam and detecting a foreign substance from light that is diffusely reflected, or a method of detecting a bright field image (microscope image). However, since the influence of phase defects also depends on the internal structure of the multilayer film, it is considered that the same wavelength inspection method for detecting defects using detection light having the same wavelength as EUV light used for exposure is appropriate. As an example of this method, a method using a dark field inspection image is disclosed in, for example, Japanese Patent Application Laid-Open No. 2003-114200 (Patent Document 2). Further, for example, Japanese Patent Application Laid-Open No. 2007-219130 (Patent Document 3) discloses an inspection method for distinguishing unevenness on the surface of a phase defect. Further, when the absorber pattern is formed while the phase defect already exists, a technique for improving the projected image when the pattern is transferred by the exposure apparatus by correcting the outline of the absorber pattern is disclosed in, for example, JP-T-2002. No. 532738 (Patent Document 4).

JP 2007-158828 A JP 2003-114200 A JP 2007-219130 A Japanese translation of PCT publication No. 2002-532738

Isao Tabuchi, Yoichi Takehana, Morihisa Homoto, “Introductory Photomask Technology”, Industrial Research Committee, published in December 2006, p. 266-268

  The dark field detection method using EUV light described in Patent Document 2 can detect a phase defect present in a mask blank with a high sensitivity as a bright spot. However, there is no mention of a method of using it as a mask for EUVL when a phase defect is detected.

  Further, in the inspection method described in Patent Document 3, it is possible to determine the distinction between the unevenness of the phase defect present in the mask blank. However, there is no suggestion of a method for manufacturing an EUVL mask by subsequently forming an absorber pattern.

  Further, even if the phase defect remains after the absorber pattern is formed in the above-mentioned Patent Document 4, local disturbance of the reflected light caused by the phase defect is detected in the contour of the absorber pattern adjacent to the phase defect. A method is disclosed in which the EUVL mask can be handled as a non-defective product after being repaired or offset by correction. However, there is an application limit to the correction of the contour of the absorber pattern close to the phase defect, and the correction itself may be difficult.

  Thus, in any of the above-described methods, if there is a phase defect in the mask blank and the local contour of the absorber pattern close to the phase defect cannot be corrected, the manufactured EUVL mask is It will be handled as a defective product and will be disposed of.

  An object of the present invention is to provide a technique capable of manufacturing an EUVL mask substantially free of phase defects by locally changing the layout of an absorber pattern.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in this application, an embodiment of a representative one will be briefly described as follows.

  This embodiment is a method for manufacturing an EUVL mask, and includes a step of detecting a phase defect remaining in an EUVL mask having a multilayer film that reflects EUV light and a plurality of absorber patterns that absorb EUV light; , Among the phase defects, a step of storing position coordinates of the first phase defect that gives a transfer error larger than an allowable value when pattern-transferring a plurality of absorber patterns onto the main surface of the transfer object; A step of determining whether or not a local layout change is possible in the absorber pattern around and the shape of the absorber pattern adjacent to the first phase defect if it is determined that the layout change is possible And locally changing the layout of other absorber patterns adjacent to the modified absorber pattern according to the shape of the modified absorber pattern. Than is.

  Among the inventions disclosed in the present application, effects obtained by one embodiment of a representative one will be briefly described as follows.

  By changing the layout of the absorber pattern locally, a mask for EUVL substantially free of phase defects can be manufactured.

(A) is a principal part top view of the surface in which the absorber pattern of the EUVL mask by Embodiment 1 of this invention was formed, (b) is a part along the AA line of the same figure (a). It is principal part sectional drawing which expands and shows. 1 is a schematic diagram of an EUV projection exposure apparatus according to Embodiment 1 of the present invention. (A) is principal part sectional drawing of the mask blank which has the phase defect by Embodiment 1 of this invention, (b) is an absorber pattern and a buffer layer in the mask blank which has the phase defect by Embodiment 1 of this invention. It is principal part sectional drawing of the formed mask for EUVL. It is a figure explaining an example which correct | amends local disturbance of the reflected light resulting from a phase defect by correct | amending the outline of the absorber pattern by Embodiment 1 of this invention. (A) is a principal part top view which shows the mask pattern which has a phase defect adjacent to an absorber pattern, (b) is the projection image on the wafer main surface at the time of pattern-transferring the mask pattern of the figure (a) (C) is a principal part plan view showing a mask pattern in which contour correction is performed on another absorber pattern adjacent to the absorber pattern adjacent to the phase defect, and (d) is the figure (c). 2) is a plan view of a principal part showing a projected image on the wafer main surface when the mask pattern of FIG. By correcting the shape of the absorber pattern according to the first embodiment of the present invention and changing the layout of another absorber pattern adjacent to the corrected absorber pattern, local disturbance of reflected light caused by phase defects is repaired. It is a figure explaining the other example to do. (A) is a principal part top view which shows the mask pattern which has a phase defect adjacent to an absorber pattern, (b) is a principal part which shows the mask pattern which coat | covered the area | region which contains a phase defect in part with absorber material. (C) is a plan view of a main part showing a mask pattern in the process of locally changing the layout in another absorber pattern adjacent to the absorber pattern with which the phase defect is close, and (d) is locally It is a principal part top view which shows the mask pattern containing the absorber pattern which modified the shape, and the absorber pattern which changed the layout locally. It is process drawing which put together the flow of the mask manufacturing method by Embodiment 1 of this invention. It is a principal part top view which shows the structure of a part of multilayer wiring of the semiconductor device by Embodiment 2 of this invention. It is a figure explaining an example of the mask pattern of the mask for EUVL used for the lithography process for implement | achieving the multilayer wiring of the semiconductor device by Embodiment 2 of this invention. (A) is a principal part top view which shows the mask pattern of the mask for EUVL for pattern-transferring the wiring pattern group of the 1st layer on the main surface of a wafer, (b) is a contact hole group on the main surface of a wafer FIG. 5C is a plan view of a main part showing a mask pattern of an EUVL mask for transferring a pattern onto the main surface of the wafer. FIG. 8C shows a mask pattern of an EUVL mask for projecting a second layer wiring pattern group onto the main surface of the wafer. It is a principal part top view. It is a figure explaining an example of the mask pattern of the mask for EUVL which performed the layout change used for the lithography process for implement | achieving the multilayer wiring of the semiconductor device by Embodiment 2 of this invention. (A) is a principal part top view which shows the mask pattern of the mask for EUVL for pattern-transferring the wiring pattern group of the 1st layer on the main surface of a wafer, (b) is a contact hole group on the main surface of a wafer It is a principal part top view which shows the mask pattern of the mask for EUVL for pattern-transferring. It is a principal part top view which shows the structure of a part of multilayer wiring of the semiconductor device formed using the mask for EUVL which performed the layout change by Embodiment 2 of this invention.

  In the following embodiments, when necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other, and one is the other. There are some or all of the modifications, details, supplementary explanations, and the like.

  Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number. Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges.

  Further, in the drawings used in the following embodiments, hatching may be added to make the drawings easy to see even if they are plan views. In the following embodiments, the term “wafer” is mainly a Si (Silicon) single crystal wafer. However, not only that, but also an SOI (Silicon On Insulator) wafer and an integrated circuit are formed thereon. Insulating film substrate or the like. The shape includes not only a circle or a substantially circle but also a square, a rectangle and the like.

  In all the drawings for explaining the following embodiments, components having the same function are denoted by the same reference numerals in principle, and repeated description thereof is omitted. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
In order to clarify the significance of the EUVL mask inspection method according to the first embodiment, first, the configuration of the EUVL mask and the projection optical system (reduced projection optical system, reflective exposure optical system, The configuration of the reflective imaging optical system and EUV optical system will be described with reference to FIGS. 1A and 1B and FIG. FIG. 1A is a plan view of an essential part of the surface on which the absorber pattern of the EUVL mask is formed, and FIG. 1B is an enlarged view along a line AA in FIG. It is principal part sectional drawing. FIG. 2 is a schematic view of an EUV projection exposure apparatus.

  As shown in FIG. 1A, the central portion of the EUVL mask M has a device pattern area MDE having a circuit pattern of the semiconductor integrated circuit device, and the EUVL mask M is aligned at the peripheral portion. Alignment mark areas MA1, MA2, MA3, MA4 including a mark or a wafer alignment mark are arranged.

  As shown in FIG. 1B, the mask blank of the EUVL mask M includes a substrate MS made of quartz glass or low thermal expansion glass, molybdenum (Mo) and silicon (Si) formed on the main surface of the substrate MS. ) Are alternately stacked (for example, each layer is about 40 layers), the capping layer CAP formed on the multilayer film ML, and the back surface (surface opposite to the main surface) of the substrate MS. The EUVL mask M is composed of a metal film CF for electrostatic chucking. The thickness of the substrate MS is, for example, about 7 to 8 mm, and the thickness of the multilayer film ML is, for example, about 300 nm. Furthermore, the absorber pattern ABS is formed on the capping layer CAP via the buffer layer BUF. The thickness of the absorber pattern ABS is, for example, about 50 to 70 nm.

  Next, an EUV projection exposure apparatus using an EUVL mask will be described with reference to FIG.

  As shown in FIG. 2, EUV light having a central wavelength of 13.5 nm emitted from a light source 1 is a surface (hereinafter referred to as a pattern) on which a mask pattern of an EUVL mask M is formed via an illumination optical system 2 composed of a multilayer mirror. The surface). The reflected light from the pattern surface passes through the reduction projection optical system 3 composed of a multilayer film reflecting mirror, and pattern transfer (transfer, projection, pattern projection) of the mask pattern of the EUVL mask M onto the main surface of the wafer 4 is performed. The wafer 4 is mounted on the stage 5, and many mask patterns of the EUVL mask M are transferred to a desired region on the main surface of the wafer 4 by moving the stage 5 and repeating pattern transfer.

  Next, phase defects occurring in the mask blank of the EUVL mask will be described with reference to FIGS. 3A is a cross-sectional view of a main part of a mask blank having a phase defect, and FIG. 3B is a cross-sectional view of a main part of a mask for EUVL in which an absorber pattern and a buffer layer are formed on the mask blank having a phase defect. is there.

  3A is a cross-sectional view of the main part of the mask blank shown in FIG. 3A, when the multilayer film ML is deposited on the substrate MS, the multilayer film ML is covered with a fine depression on the main surface of the substrate MS. An example in which a concave phase defect PD is generated as a result of the deposition is shown.

  When the buffer layer BUF and the absorber pattern ABS are formed while leaving the phase defect PD, the concave phase defect PD remains as it is between the adjacent absorber patterns ABS as shown in FIG. If there is a depression of phase defect PD of about 2 to 3 nm, the projection image (transfer image) transferred onto the main surface of the wafer using the EUV projection exposure apparatus is disturbed, and the transfer error is larger than the allowable value in the projection image. For example, a dimensional change exceeding the standard value occurs. In FIGS. 3A and 3B, an example of the dent defect is shown, but even a minute protrusion defect has the same phase defect.

  Even if a phase defect exists in the mask blank, if the absorber pattern to be formed thereafter covers the phase defect, it is not a phase defect at the stage of the EUVL mask. Therefore, the phase defect which is a problem in the EUVL mask is limited to the phase defect which exists in the multilayer film constituting the mask blank and is partially or completely exposed without being completely covered with the absorber pattern. . Such a substantial phase defect is recognized as a defect portion from a projection image obtained by actually transferring the absorber pattern onto the main surface of the wafer, and is a normal DUV (Deep Ultra-Violet). The mask pattern defect inspection means that uses light or an electron beam as inspection light can identify the position as a portion that cannot be found as a defect in the absorber pattern. Also, the absorber pattern of the EUVL mask is inspected with an inspection device that uses EUV light as inspection light and an inspection device that uses DUV (Deep Ultra-Violet) light or an electron beam as inspection light, and the results are compared. By doing so, the phase defect can be specified.

  Next, when a phase defect remaining in the EUVL mask is detected, a detailed description will be given of a method of correcting the absorber pattern so that the EUVL mask can be handled as an EUVL mask substantially free from the influence of the phase defect. To do. Here, a method for correcting the absorber pattern adjacent to the phase defect will be described. A phase defect that is "close" to the absorber pattern is a phase defect that is not in contact with the absorber pattern but is in the immediate vicinity of the absorber pattern, and is not in contact with the absorber pattern but is in the immediate vicinity of the absorber pattern. , Phase defects that are substantially in contact, phase defects that are in contact with the absorber pattern, and phase defects that are partially covered by the absorber pattern.

  A first correction method of the absorber pattern according to the first embodiment will be described with reference to FIG. FIG. 4 is a diagram illustrating an example of repairing local disturbance of reflected light caused by a phase defect by correcting the contour of the absorber pattern. FIG. 4A is a plan view of a main part showing a mask pattern in which a phase defect exists in the vicinity of the absorber pattern, and FIG. 4B is a main surface of the wafer when the mask pattern of FIG. FIG. 4C is a principal plan view showing a mask pattern obtained by performing contour correction on another absorber pattern adjacent to the absorber pattern in which the phase defect is close, FIG. FIG. 4D is a plan view of a principal part showing a projected image on the main surface of the wafer when the mask pattern of FIG.

  FIG. 4A is a main part plan view showing a mask pattern in which a phase defect PD exists in the vicinity of the absorber pattern ABS-1. When such a mask pattern is transferred onto the main surface of the wafer using an EUV projection exposure apparatus, as shown in FIG. 4B, a projection image 11 having a transfer error larger than an allowable value is formed. . Here, the region 12 is an undesired defect transfer portion formed between adjacent projection images 11 due to the influence of the phase defect PD.

  Therefore, as shown in FIG. 4C, contour correction is performed on the absorber pattern ABS-2 adjacent to the absorber pattern ABS-1 and located near the phase defect PD. The region 13 is a region where a new absorber material is applied in contact with a part of the absorber pattern ABS-2. The application of the absorber material is performed by locally forming a CVD (Chemical Vapor Deposition) film using a charged beam. For example, a gallium ion beam with an acceleration voltage of 15 kV is irradiated in a phenanthrene gas atmosphere to form a carbon film. On the other hand, the region 14 is a region where a part of the absorber pattern ABS-2 is removed. This removal is performed by locally removing the absorber material using a charged beam. For example, a gallium ion beam having an acceleration voltage of 15 kV is irradiated, and a desired region of the absorber pattern ABS-2 is etched using xenon fluoride as an assist gas.

The method of applying the absorber material is not limited to the above phenanthrene gas, but other carbon materials such as naphthalene or pyrene, TEOS (Tetra Ethyl Ortho Silicate; Si (OC ₂ H ₅ ) ₄ ) or pentaethoxy An organometallic material such as tantalum may be used. The ion beam to be irradiated is not limited to a gallium ion beam, and an electron beam with an appropriate acceleration voltage may be used, or rare gas ions such as a helium ion beam, a neon ion beam, or an argon ion beam may be used. May be. Furthermore, an effect equivalent to the application of the absorber material can be obtained by locally removing the multilayer film. For example, the multilayer film can be removed by sputtering by irradiating a gallium beam having an acceleration voltage of 15 kV.

  On the other hand, the method for removing the absorber material is not limited to the combination of xenon fluoride and a gallium ion beam. For example, an electron beam may be used instead of the charged beam. Various halogen-based gases can be considered as an assist gas for performing etching. Further, the absorber material can be locally removed by processing using AFM-Tip (a probe of an atomic force microscope).

  FIG. 4D is a main part plan view showing a projected image obtained by pattern transfer of the absorber pattern shown in FIG. 4C onto the main surface of the wafer using an EUV projection exposure apparatus. Since the contour correction is performed on the absorber pattern ABS-2, a bent portion 15 is generated in the projected image. Further, since the phase defect PD remains in the EUVL mask, a projection-shaped portion 16 is formed in the projection image. However, although the shape of the projected image changes in this way, the defect transfer portion generated in the region 12 shown in FIG. 4B does not occur, and pattern transfer without any problem can be performed.

  Next, the 2nd correction method of the absorber pattern by this Embodiment 1 is demonstrated using FIG. FIG. 5 shows local reflected light disturbance caused by the phase defect by correcting the shape of the absorber pattern adjacent to the phase defect and changing the layout of another absorber pattern adjacent to the corrected absorber pattern. It is a figure explaining the other example to repair. FIG. 5A is a main part plan view showing a mask pattern in which a phase defect exists close to the absorber pattern, and FIG. 5B shows a mask pattern in which a region partially including the phase defect is covered with an absorber material. The main part plan view, (c) is the main part plan view showing the mask pattern in the process of locally changing the layout in another absorber pattern adjacent to the absorber pattern with which the phase defect is close, and (d) is the local part plan view. It is a principal part top view which shows the mask pattern containing the absorber pattern which modified the shape automatically, and the absorber pattern which changed the layout locally.

  In the first correction method described above, another absorber pattern (absorber pattern ABS-2 in FIG. 4 described above) adjacent to the absorber pattern (absorber pattern ABS-1 in FIG. 4 described above) close to the phase defect. ) Was corrected. On the other hand, in the second correction method, the shape of the absorber pattern close to the phase defect is corrected, and the layout of other absorber patterns adjacent thereto is changed according to the shape of the corrected absorber pattern. .

  The absorber material is also removed or applied in the second correction method, but the method is the same as the absorber pattern correction method used in the first correction method described above.

  FIG. 5 shows a mask pattern in which a plurality of absorber patterns ABS extending along the first direction (X direction, lateral direction) are separated from each other and arranged in a second direction (Y direction, vertical direction) orthogonal to the first direction. The principal part top view of is shown. As shown in FIG. 5A, the phase defect PD remains in the vicinity of the absorber pattern ABS-3 among the plurality of absorber patterns ABS.

  First, the influence of the phase defect PD when the projected image is transferred onto the main surface of the wafer and whether the layout of the circuit pattern around the phase defect PD can be changed are examined. When the influence of the phase defect PD was examined, the projection image of the absorber pattern ABS-3 and the projection image of the absorber pattern ABS-4 adjacent to the absorber pattern ABS-3 were partially caused by the phase defect PD. A short circuit was expected. On the other hand, it was confirmed that even if a part of the absorber patterns ABS-3 and ABS-4 was locally laid out, there was no problem such as significant deterioration in the electrical characteristics of the semiconductor device.

  Therefore, next, as shown in FIG. 5B, an absorber material is applied to the region 21 partially including the phase defect PD in contact with the absorber pattern ABS-3, and a light shielding pattern is formed. The region 21 including the phase defect PD in part is defined as a non-reflecting part. As a method for forming the non-reflective portion, a method of removing the multilayer film may be employed.

  Next, as shown in FIG.5 (c), the layout of absorber pattern ABS-4 is changed. Specifically, first, the absorber pattern ABS that is adjacent to the absorber pattern ABS-3 and requires a layout change by providing a non-reflective portion is specified. Here, the absorber pattern ABS-4 is specified. Subsequently, a partial region (region surrounded by a dotted line in FIG. 5C) of the absorber pattern ABS-4 that enters a region at a predetermined distance (for example, the minimum processing dimension) from the region 21 is specified as the region 23. Subsequently, a new local pattern forming a part of the absorber pattern ABS-4 is formed by avoiding the regions 21 and 23 so that the absorber pattern ABS-4 does not become discontinuous when the region 23 is removed. The region 22 to be specified is specified.

  Next, as shown in FIG.5 (d), the absorber material of the area | region 23 of absorber pattern ABS-4 is removed, and absorber material is provided to the area | region 22. As shown in FIG. At this time, even if the absorber material in the region 23 is removed, the absorber pattern ABS-4 has a series of shapes connected by the absorber material applied to the region 22. The part shown by the code | symbol 24 is the part (non-reflective part) which corrected the absorber pattern ABS-3 in order to cover the phase defect PD, and the part shown by the code | symbol 25 corrected the absorber pattern ABS-3. This is a portion where the layout of the absorber pattern ABS-4 is changed. As a result, the absorber pattern ABS-4 has a bent shape, but it has been confirmed in advance that there is no problem in the electrical characteristics of the semiconductor device. Thereafter, it is confirmed that there is no problem in using the EUVL mask in which the absorber pattern ABS-3 is corrected and the layout of the absorber pattern ABS-4 is changed.

  A flow of a mask manufacturing method employing the above-described second correction method according to the first embodiment will be described with reference to a process diagram shown in FIG.

<Step S101>
First, an EUVL mask based on a multilayer film that reflects EUV light and an absorber pattern that absorbs EUV light is manufactured.

<Step S102>
An inspection of an EUVL mask using EUV light or DUV light as inspection light is performed. This inspection gives a transfer error larger than the allowable value when the mask pattern is transferred onto the main surface of the wafer, identifies the phase defect remaining without being covered with the absorber pattern, and determines the position coordinates of the phase defect. Remember.

<Step S103>
Based on the inspection result of the phase defect, it is determined whether or not the phase defect remains.

<Step S104>
When it is determined in step S103 that the phase defect remains, it is determined whether or not the local layout change of the absorber pattern around the phase defect is possible.

<Step S105>
In step S104, when it is determined that the local layout change of the absorber pattern around the phase defect is possible, the region including the phase defect as a part is processed as a non-reflective portion, and the non-reflective portion Is made part of the absorber pattern close to the phase defect. If it is predicted that the detected phase defect is small and the influence on the periphery is small, the processing for making the non-reflective portion can be omitted.

<Step S106>
As described with reference to FIG. 5 described above, when the non-reflective portion is provided in the absorber pattern and the layout of another absorber pattern adjacent to the absorber pattern needs to be changed, the other absorber pattern Make local layout changes to.

<Step S107>
Evaluate the processed part of the absorber pattern by mask pattern transfer evaluation using EUV projection exposure equipment, mask inspection using SEM (Scanning Electron Microscope), or mask inspection using DUV light or inspection light equivalent to the exposure wavelength. Then, it is determined whether or not the processing is appropriate.

  When it is determined that there is no problem in transferability, the manufacture of the EUVL mask is terminated. If it is determined that there is a problem in transferability, the process returns to step S104 again, and it is determined whether or not a further local layout change of the absorber pattern is possible.

<Step S108>
If it is determined in step S104 that the influence of the phase defect cannot be removed by the local layout change of the absorber pattern around the phase defect, the EUVL mask is processed as a defective product.

  However, the phase defect that normally exists in the mask blank is small, and if the phase defect remains at the mask blank stage, the phase defect is covered with the absorber pattern as much as possible, so most phase defects are absorbed by the absorber pattern. By changing the local layout, there can be no problem in the transferability of the mask pattern.

  Thus, according to the first embodiment, even if the phase defect remains in the EUVL mask, the first correction method for correcting the contour of the absorber pattern, or the shape of the absorber pattern close to the phase defect And a mask for EUVL having an effect equivalent to that of a defect-free EUVL mask by the second correction method for changing the layout of another absorber pattern adjacent to the corrected absorber pattern according to the corrected absorber pattern Can be manufactured. Therefore, the manufacturing yield of the EUVL mask can be improved, and the manufacturing cost of the EUVL mask can be reduced. Furthermore, this makes it possible to reduce the total cost in manufacturing a semiconductor device that repeatedly uses a lithography process.

(Embodiment 2)
In the second embodiment, an example of changing the layout of a mask pattern over a plurality of layers in the process of sequentially forming a plurality of layers while aligning relative positions with each other in manufacturing a semiconductor device will be described.

  FIG. 7 and FIG. 8 are diagrams for explaining an example of a partial structure of a multilayer wiring of a semiconductor device and an example of a mask pattern of an EUVL mask used in a lithography process for realizing the structure.

  FIG. 7 shows the first-layer wiring patterns 31-1, 31-2, 31-3 and the second layer through the contact holes 32-1, 32-2, and 32-3 formed in the interlayer insulating film. It is a principal part top view which shows the example of the wiring structure formed by connecting each wiring pattern 33-1, 33-2, and 33-3.

  FIG. 8A is a main part plan view showing a mask pattern of an EUVL mask for projecting the first layer wiring pattern group onto the main surface of the wafer. Here, reference numerals 34-1, 34-2, and 34-3 are absorber patterns formed on a multilayer film that reflects EUV light. The phase defect PD remains in the vicinity of the absorber pattern 34-2.

  FIG. 8B is a main part plan view showing a mask pattern of an EUVL mask for projecting the contact hole group onto the main surface of the wafer. Here, reference numeral 36 is an absorber pattern formed on the multilayer film that reflects EUV light, and reference numerals 35-1, 35-2, and 35-3 indicate that the multilayer film that reflects EUV light is exposed. It is a hole pattern.

  FIG. 8C is a main part plan view showing a mask pattern of an EUVL mask for projecting the second layer wiring pattern group onto the main surface of the wafer. Here, reference numerals 37-1, 37-2, and 37-3 denote absorber patterns formed on a multilayer film that reflects EUV light.

  As shown in FIG. 8A, the phase defect PD remains adjacent to the absorber pattern 34-2. Therefore, when a mask pattern having the phase defect PD is transferred onto the main surface of the wafer using an EUV projection exposure apparatus, an undesired defect transfer portion is formed between adjacent projection images. Therefore, using the second correction method described in the first embodiment, the shape of the absorber pattern 34-2 is corrected (formation of a light-shielding pattern that covers the phase defect), and the absorber pattern 34-2 is adjacent. The layout of the absorber pattern 34-1 is changed (for example, see FIG. 5 described above).

  FIG. 9A is a main part plan view showing the mask pattern of the EUVL mask after the shape of the absorber pattern 34-1 is corrected and the layout of the absorber pattern 34-2 is changed. Here, the absorber patterns 41-1 and 41-2 correspond to the absorber patterns 34-1 and 34-2 shown in FIG. 8A, respectively. That is, the absorber pattern 41-2 is a pattern having a shape obtained by adding a non-reflective portion that covers a region including a phase defect to the absorber pattern 34-2, and the absorber pattern 41-1 is an absorber. This is a pattern obtained by changing the layout of the absorber pattern 34-1 in accordance with the modification of the shape of the pattern 41-2. In this case, the absorber pattern 34-3 is maintained without changing the layout. However, when the layout of the mask pattern of the EUVL mask used for forming the first layer wiring pattern group is changed in this way, the positional relationship between the first layer wiring pattern and the contact hole is shifted. It is necessary to change the layout of the mask pattern of the EUVL mask used for formation.

  FIG. 9B is a main part plan view showing the mask pattern of the EUVL mask after the layout of the hole pattern 35-1 shown in FIG. 8B is changed.

  As shown in FIG. 9B, the layout of the position of the hole pattern 35-1 is changed, and the hole pattern 42 is formed on the EUVL mask. In changing the layout of the hole pattern 35-1, first, it is determined whether or not the layout of the mask pattern forming the first layer wiring pattern group can be changed as shown in FIG. Investigate. If it is determined that the layout can be changed, it is next checked whether the layout of the hole pattern group can be changed. As a result, if it is determined that the mask pattern of the desired hole pattern group can be formed by the movement of the position of the hole pattern 35-1, and it is determined that the layout can be changed, then the absorber is actually used. The pattern 36 is processed.

  Originally, the EUVL mask for projecting the contact hole group onto the main surface of the wafer has no phase defect, and it is not necessary to change the layout of the hole pattern 35-1, but it is different from the wiring pattern group of the first layer. In order to achieve alignment, the absorber material 36 is applied and removed from the absorber pattern 36.

  FIG. 10 shows a pattern transfer of the EUVL mask for projecting the wiring pattern group of the first layer whose layout has been changed onto the main surface of the wafer and the contact hole group whose layout has been changed to the main surface of the wafer. FIG. 6 is a plan view of a principal part showing a structure of a part of a multilayer wiring of a semiconductor device formed using a EUVL mask for the purpose. When this is compared with the main part plan view showing the structure of part of the multilayer wiring of the semiconductor device shown in FIG. 7, the first layer wiring patterns 31-1 and 31-2 are respectively the first layer wiring patterns. The wiring patterns 51-1 and 51-2 are replaced. The contact hole 32-1 is replaced with a contact hole 52. Thus, even if the layout of the first-layer wiring pattern is locally changed, the deterioration of the electrical continuity characteristics between the first-layer wiring pattern and the second-layer wiring pattern is not observed. There is no problem in the operating characteristics of the semiconductor device.

  As described above, according to the second embodiment, the layout of the mask pattern of the EUVL mask in which the phase defect remains can be changed based on the determination of the consistency between the upper and lower layers. By changing the local layout of the absorber pattern, an EUVL mask having the same effect as the defect-free EUVL mask can be manufactured. Therefore, the manufacturing yield of the EUVL mask can be improved, and the manufacturing cost of the EUVL mask can be reduced. Furthermore, this makes it possible to reduce the total cost in manufacturing a semiconductor device that repeatedly uses a lithography process.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention can be applied to manufacture of a mask for EUVL used in a lithography process which is one of manufacturing processes of a semiconductor device.

DESCRIPTION OF SYMBOLS 1 Light source 2 Illumination optical system 3 Reduction projection optical system 4 Wafer 5 Stage 11 Projection image 12,13,14, Area | region 15 Bending part 16 Projection-shaped part 21,22,23 Area | region 24 Non-reflective part 25 Layout-changed part 31- 1, 31-2, 31-3 First layer wiring pattern 32-1, 32-2, 32-3 Contact hole 33-1, 33-2, 33-3 Second layer wiring pattern 34-1 , 34-2, 34-3 Absorber pattern 35-1, 35-2, 35-3 Hole pattern 36 Absorber pattern 37-1, 37-2, 37-3 Absorber pattern 41-1, 41-2 Absorption Body pattern 42 Hole pattern 51-1, 51-2 First layer wiring pattern 52 Contact hole ABS, ABS-1, ABS-2, ABS-3, ABS-4 Absorber pattern BUF Buff Layer CAP capping layer CF metal film M EUVL mask MA1, MA2, MA3, MA4 alignment mark area MDE device pattern area ML multilayer film MS substrate PD phase defect

Claims (9)

An EUVL mask manufacturing method comprising the following steps:
(A) detecting a phase defect remaining in an EUVL mask having a multilayer film that reflects EUV light and a plurality of absorber patterns that absorb EUV light;
(B) storing the position coordinates of the first phase defect that gives a transfer error larger than an allowable value when the plurality of absorber patterns are transferred onto the main surface of the transfer target among the phase defects;
(C) determining whether a local layout change is possible in the absorber pattern around the first phase defect;
(D) If it is determined that the layout can be changed, the shape of the first absorber pattern adjacent to the first phase defect is locally corrected, and further, the corrected first absorber pattern Changing the layout of the second absorber pattern adjacent to the first absorber pattern locally according to the shape;
(E) A step of performing transferability verification on the mask pattern including the first absorber pattern and the second absorber pattern after the step (d). In the manufacturing method of the mask for EUVL of Claim 1,
The step (d) further includes the following steps: a method for manufacturing an EUVL mask;
(D1) A step of including a region including the first phase defect in a part as a non-reflective part and including the non-reflective part in a part of the first absorber pattern. In the manufacturing method of the mask for EUVL of Claim 2,
By applying an absorber material to the surface of the region partially including the first phase defect, or by removing the multilayer film in the region partially including the first phase defect, the first phase defect is reduced. A method for manufacturing an EUVL mask, characterized in that a region included in a portion is the non-reflecting portion. In the manufacturing method of the mask for EUVL of Claim 1,
In the step (d), the EUVL mask manufacturing method, wherein the absorber material constituting the first absorber pattern or the second absorber pattern is partially removed or partially applied. In the manufacturing method of the mask for EUVL of Claim 1,
In the step (d), a CVD film is locally formed by using a charged beam, and the absorber material constituting the first absorber pattern or the second absorber pattern is partially applied. A method for manufacturing a mask for EUVL. In the manufacturing method of the mask for EUVL of Claim 1,
In the step (d), etching is locally performed using a charged beam to partially remove the absorber material constituting the first absorber pattern or the second absorber pattern. EUVL mask manufacturing method. In the manufacturing method of the mask for EUVL of Claim 1,
In the step (d), the multilayer film is partially removed to locally correct the shape of the first absorber pattern and to change the layout of the second absorber pattern. EUVL mask manufacturing method. In the manufacturing method of the mask for EUVL of Claim 1,
In the step (c), it is further determined whether or not the electrical characteristics of the semiconductor device are deteriorated. In the manufacturing method of the mask for EUVL of Claim 1,
In the step (c), a first layer formed using the EUVL mask, a second layer formed in a pre-process of the first layer, and a third layer formed in a post-process of the first layer. A method for manufacturing a mask for EUVL, comprising determining whether or not there is consistency between a layer or the second layer and the third layer.

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