JP2013009126A - Noise reduction circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform more effective edge detection.SOLUTION: A high pass filter 12 extracts a high frequency component and a subtractor 16 subtracts the component to reduce the high frequency component. An edge detection section 14 compares a change amount of a video signal with a prescribed threshold to detect an edge. A gain adjusting section 18 suppresses reduction of the high frequency component in a noise processing section in an edge section. An edge analysis section 20 estimates a noise amount in a video on the basis of a distribution state of the detected edge, and changes the threshold of edge detection in the edge detection section 14 in accordance with the noise amount.

Description

  The present invention relates to a noise reduction circuit that analyzes a video signal and adaptively performs noise reduction.

  Conventionally, a noise reduction circuit that reduces noise by removing high-frequency components in a video signal is known.

  In this noise reduction circuit, a high frequency component is extracted from the video signal as noise, and is subtracted from the original video signal to remove the noise. Further, since the edge becomes dull when the high frequency component is removed at the edge, the edge is detected, and the high frequency component to be subtracted is reduced at the edge portion.

JP-A-6-153164

  However, if the two-dimensional noise reduction that removes the noise component from the video is excessively applied, the edge of the video is blurred and the sharpness of the video is lost as an adverse effect of noise reduction.

  In order to avoid this as much as possible, there is a method in which S / N is detected in a sync signal portion having no video in an analog weak electric field or the like, and noise reduction is adaptively performed according to the S / N. However, although the S / N of the synchronization signal portion is good, this method cannot be used when noise is present only in the video portion.

  The present invention relates to a noise reduction circuit for a video signal, a noise processing unit that reduces a high-frequency component of the video signal, an edge detection unit that detects an edge by comparing a change amount of the video signal with a predetermined threshold value, and A processing unit that suppresses a decrease in high-frequency components in the noise processing unit at the detected edge, and a distribution state of a change amount of the video signal or a distribution state of the detected edge detected by the edge detection unit. A noise estimation unit that estimates an amount of noise in the video, and changes a threshold value of edge detection in the edge detection unit according to the amount of noise estimated by the noise estimation unit. And

  In addition, it is preferable that the noise estimation unit detects a flat portion of an image in which a predetermined number of consecutive states in which no edge is detected is detected, and determines that the noise is low when the flat portion is present on the screen more than a predetermined amount. It is.

  In addition, the noise estimation unit detects a horizontal line whose number of detected edges is equal to or less than a first predetermined value, and the noise is small when the number of detected horizontal lines is equal to or smaller than the first predetermined number of lines on the screen. Is preferably determined.

  The noise estimation unit detects a horizontal line having a detected number of edges equal to or greater than a second predetermined value greater than a first predetermined value, and the detected number is equal to or greater than a second predetermined line number greater than the first predetermined line number on the screen. In this case, it is preferable to determine that there is a lot of noise.

  According to the present invention, the noise amount is estimated according to the edge distribution state, and the edge detection threshold value is changed according to the estimated noise amount, so that more effective edge detection and noise removal can be performed.

It is a block diagram which shows the whole structure of a noise reduction circuit. It is a block diagram which shows the structure of an edge analysis part (noise estimation part). It is a figure which shows the image | video in the case where there is no noise and it exists.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  There are various types of video signals, but basically a luminance signal representing the luminance of each pixel is the main signal. Therefore, in this embodiment, it is assumed that the video signal is a luminance signal. In FIG. 1, the luminance signal is supplied to the delay circuit 10, the two-dimensional high-pass filter 12, and the edge detection unit 14.

  The luminance signal is supplied to a two-dimensional high-pass filter (2DHPF) 12, where high frequency components in both the vertical and horizontal directions are extracted as noise.

  The high frequency component extracted by the high pass filter 12 is adjusted to an appropriate size by the gain adjusting unit 18 and then subtracted from the luminance signal delayed by the delay circuit 10 by the subtractor 16. The delay time of the delay circuit 10 corresponds to the processing time of the high-pass filter 12 and the gain adjusting unit 18, and the high-frequency component (noise component) obtained in the high-pass filter 12 is subtracted from the luminance signal from which it is extracted. The

  Further, the luminance signal is supplied to the edge detection unit 14, and a portion where the change amount of the luminance signal is equal to or greater than a predetermined threshold value is detected as an edge portion. Then, by reducing the gain of the gain adjusting unit 18 at the edge portion, the edge portion is prevented from performing noise reduction, thereby preventing the edge from becoming dull.

  Furthermore, in the noise reduction circuit of this embodiment, the detection result of the edge portion in the edge detection unit 14 is supplied to the edge analysis unit 20 that functions as a noise estimation unit. The edge analysis unit 20 detects an edge distribution state based on the presence / absence of an edge.

  Then, the edge analysis unit 20 determines whether the luminance signal is in a state with a lot of noise or a state with a small amount from the edge distribution state. When the threshold value is greatly changed and the noise is low, the threshold value for recognizing the edge in the edge detection unit 14 is changed to a small value.

  That is, in the present embodiment, edge detection is performed from the video signal, and the noise amount of the video is estimated by analyzing the detected edge. In the estimation result, when it can be determined that the amount of noise is small, the edge detection threshold value of the edge detection unit 14 is lowered to preserve the edge of the video as much as possible. By estimating the amount of noise from the video signal, the S / N of the sync signal portion is good, and even when the noise is only on the video signal portion, noise reduction can be performed adaptively, Noise reduction can be performed with appropriate strength while preserving as much as possible.

  FIG. 2 shows the configuration of the edge analysis unit 20. The signal of the edge detection result in the edge detection unit 14 is input to the 1H edge counter 40. The 1H edge counter 40 counts the number of edges of one horizontal line.

  The count result of the 1H edge counter 40 is input to the comparators 42 and 44. The comparators 42 and 44 are supplied with the first threshold value and the second threshold value, respectively. The comparators 42 and 44 receive the count value of the 1H edge counter 40, the first threshold value, and the second threshold value. Outputs a threshold comparison result signal. For example, an H level signal is output from the comparator 42 when the count value is smaller than the first threshold value, and an H level signal is output from the comparator 44 when the count value is larger than the second threshold value. . Therefore, when the number of edges falls within the range of the first threshold value to the second threshold value, the H level signals are not output from both the comparators 42 and 44, and the number of edges is the first threshold value. When the value is smaller than the value, the comparator 42 outputs the H level, and when the value is larger than the second threshold value, the comparator 44 outputs the H level. The 1H edge counter 40 receives a horizontal synchronization signal, and the count result is cleared for each horizontal line. The first and second threshold values are different, and the second threshold value is made larger than the first threshold value.

  The outputs of the comparators 42 and 44 are supplied to 1V line counters 46 and 48, respectively. The 1V line counters 46 and 48 count the output H of the 1H comparators 42 and 44, respectively, by 1V (one vertical period).

  The count results of the 1V line counters 46 and 48 are input to the comparators 50 and 52, respectively. The first line threshold value and the second line threshold value are input to the comparators 50 and 52, respectively. The comparators 50 and 52 perform the first line comparison with the count values of the 1V line counters 46 and 48, respectively. A signal of the comparison result of the threshold value and the second line threshold value is output.

  When the input line count value becomes smaller than the first line threshold value, an H level signal is output from the comparator 50, and when the input line count value becomes larger than the second line threshold value, the comparator 52 outputs H level. A level signal is output. Here, the second threshold value is made larger than the first threshold value. As a result, when the signal is within the range from the first threshold value to the second threshold value, no H level signal is output from either of the comparators 50 and 52, and is smaller than the first threshold value. When the comparator 50 is larger than the second threshold value, the comparator 52 outputs an H level. The 1V line counters 46 and 48 receive a vertical synchronization signal, and the count result is cleared every vertical period.

  In this way, the output of the comparator 50 is a signal that is at the H level when the number of lines in one horizontal line is less than the first threshold and the number of lines is greater than the first threshold. The output of the comparator 52 is obtained in each frame as a signal that becomes H level when the number of edges in one horizontal line is equal to or greater than the second threshold value. That is, it is possible to determine how many lines with a large number of detected edges are present in one frame image, and it is possible to determine in three stages: many, ordinary, and few. This determination can be said to be a determination in the vertical direction. It can be determined that there is a lot of noise when there are many detected edges, and it can be determined that there is little noise when there are few detected edges.

  Next, the signal of the edge detection result in the edge detection unit 14 is input to the flat counter 54. A pixel clock is supplied to the flat counter 54, and the flat counter counts the pixel clock and is reset by an edge detection signal. Therefore, the period during which edges are not continuously input is counted up.

  The output of the flat counter 54 is input to the comparator 56, where it is compared with the flat threshold value. When the count value of the flat counter 54 exceeds the flat threshold value, the H level is output. The H level of the comparator 56 is supplied to the reset terminal of the flat counter 54. When the count value of the flat counter 54 reaches the flat threshold value, the flat counter 54 is reset. That is, the comparator 56 outputs an H level when there is no edge input continuously for the number of pixels of the flat threshold value.

  The output of the comparator 56 is input to the flat area number counter 58. Since the flat area number counter 58 is reset every vertical period, the number of flat areas in one vertical period (one frame) is counted. The output of the flat area number counter 58 is supplied to the comparator 60. The comparator 60 is supplied with a flat area threshold that is a threshold for the number of flat areas, and determines whether the number of flat areas in one frame exceeds the flat area threshold. In this way, it is detected in the horizontal direction that the state in which no edge is detected continues for a predetermined amount or more. This determination can be said to be a determination in the horizontal direction.

  The results of the comparators 50, 52 and 60 are supplied to the output controller 64 via the selector 62. The output controller 64 outputs a signal for lowering the threshold value in the edge detector 14 by one step when the signal from the comparator 60 is at H level or when the signal from the comparator 50 is at H level. On the other hand, when the signal from the comparator 52 is at the H level, a signal for raising the threshold value in the edge detection unit 14 by one step is output. In addition, when both the signal from the comparator 60 and the signal from the comparator 52 are at the H level, it is preferable not to change the threshold value in the edge detection unit 14, but either one is given priority. May be. Further, it is preferable that the output controller 64 holds the current threshold value data in the edge detection unit 14 and controls the output so that the threshold value does not exceed the maximum value or the minimum value. .

  In this way, according to the present embodiment, the threshold value in the edge detection unit 14 is adaptively changed according to the edge detection state. Therefore, if it is determined that the noise component does not catch the edge detection even if the edge detection threshold of the edge detection unit 14 is lowered, the edge detection threshold can be lowered to further preserve the image edge. . In the determination by the comparator as described above, determination that is larger or smaller than the threshold value may be a determination that is greater than or equal to the threshold value and less than or equal to the threshold value.

  FIG. 3 shows an example of an image. When FIG. 3A shows no noise, FIG. 3B shows an image with noise. As described above, in general, when there is no noise, the edge of the captured image often has a biased distribution in the image. On the other hand, noise is uniformly distributed throughout the video. In the present embodiment, it can be detected that there is no noise by continuously not detecting edges. Therefore, it is possible to prevent the threshold value from being raised even for an image having many edges as a whole. Further, since the number of edges as a whole is large, it can be determined that noise is detected, and noise can be prevented from being detected as an edge.

  It should be noted that each threshold value in the edge analysis can be changed, and more appropriate determination can be made.

  10 delay circuit, 12 high-pass filter, 14 edge detector, 16 subtractor, 18 gain adjuster, 20 edge analyzer, 40 1H edge counter, 42, 44, 50, 52, 56, 60 comparator, 46, 48 1V Line counter, 54 flat counter, 58 flat area counter, 62 selector, 64 output controller.

Claims (4)

A noise reduction circuit for a video signal,
A noise processing unit that reduces high-frequency components of the video signal;
An edge detection unit that detects an edge by comparing a change amount of the video signal with a predetermined threshold;
A processing unit that suppresses a decrease in high-frequency components in the noise processing unit at the detected edge; and
A noise estimation unit that estimates the amount of noise in the video based on the distribution state of the change amount of the video signal detected in the edge detection unit or the distribution state of the detected edge;
Have
A noise reduction circuit that changes a threshold value of edge detection in the edge detection unit according to an amount of noise estimated by the noise estimation unit. The noise reduction circuit according to claim 1,
A noise reduction circuit, wherein the noise estimation unit detects a flat portion of an image in which a predetermined number of states in which no edge is detected is detected, and determines that the noise is low when the flat portion is present on the screen for a predetermined amount or more. The noise reduction circuit according to claim 1,
The noise estimation unit detects a horizontal line having an edge detection number equal to or less than a first predetermined value, and determines that the noise is small when the number of detected horizontal lines is equal to or less than the first predetermined line number on the screen. A noise reduction circuit. The noise reduction circuit according to claim 3,
The noise estimation unit detects a horizontal line having a detected number of edges equal to or greater than a second predetermined value greater than a first predetermined value, and the detected number is equal to or greater than a second predetermined line number greater than the first predetermined line number on the screen. A noise reduction circuit that determines that there is a lot of noise.