JP2012257332A - Solid-state imaging apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state imaging apparatus which can obtain a high-resolution image even when any one of wires for selecting a row is broken.SOLUTION: A solid-state imaging apparatus 1 comprises: a light-receiving part 10; a signal reading part 20; a row selecting part 30; a column selecting part 40; an overflow prevention part 50; and a control part 60. M×N pieces of pixel parts Pto Peach including a photodiode for generating the amount of electric charge depending on the intensity of incident light, and a switch for reading which is connected to the photodiode, are two-dimensionally arrayed in the M row and N column in the light-receiving part 10. Each of N pieces of the pixel parts Pto Pin the m-th row is connected to the row selecting part 30 and the overflow prevention part 50 by the wire Lfor selection of the m-th row.

Description

  The present invention relates to a solid-state imaging device.

  As a solid-state imaging device, a device using CMOS technology is known, and among them, a passive pixel sensor (PPS) type is known (see Patent Document 1). In a PPS solid-state imaging device, PPS pixel units including photodiodes that generate an amount of charge corresponding to incident light intensity are two-dimensionally arranged in M rows and N columns, and each pixel unit responds to light incidence. The charge generated in the photodiode is accumulated in the capacitive element in the integration circuit, and a voltage value corresponding to the amount of accumulated charge is output.

  In general, the output ends of each of the M pixel units in each column are connected to the input ends of the integration circuits provided corresponding to the columns via readout wirings provided corresponding to the columns. Has been. Then, for each row from the first row to the Mth row, the charge generated in the photodiode of the pixel portion is input to the corresponding integration circuit through the corresponding readout wiring, and the charge is supplied from the integration circuit. A voltage value corresponding to the amount is output.

  Further, each of the N pixel portions of each row is connected to the row selection portion via a row selection wiring provided corresponding to the row, and is transmitted from the row selection portion by the row selection wiring. In accordance with the row selection control signal, the charge generated in the photodiode is output to the readout wiring.

  PPS type solid-state imaging devices are used in various applications, for example, combined with a scintillator panel and used as an X-ray flat panel in medical applications and industrial applications. More specifically, an X-ray CT apparatus and a microfocus X It is also used in line inspection equipment. In a solid-state imaging device used for such a purpose, a light receiving portion in which M × N pixel portions are two-dimensionally arranged has a large area, and each side is integrated on a semiconductor substrate having a length exceeding 10 cm. May be. Therefore, only one solid-state imaging device may be manufactured from one semiconductor wafer.

JP 2006-234557 A

  In the solid-state imaging device as described above, when the row selection wiring corresponding to any one of the rows is disconnected in the middle of manufacture, among the N pixel portions of the row, the location closer to the row selection portion than the disconnection position. A certain pixel portion is connected to the row selection portion by a row selection wiring, but a pixel portion located farther from the disconnection position than the row selection portion is not connected to the row selection portion. Therefore, the charge generated in the photodiode in response to the light incidence in the pixel portion far from the disconnection position with respect to the row selection portion is not read out to the integration circuit and is accumulated in the junction capacitance portion of the photodiode. It ’s just going.

  When the amount of charge accumulated in the junction capacitance portion of the photodiode exceeds the saturation level, the charge exceeding the saturation level overflows to the adjacent pixel portion. Therefore, when one row selection wiring is disconnected, the influence extends not only to the pixel portion of the row connected to the row selection wiring but also to the pixel portions of both adjacent rows, and is continuously continuous. A defective line is generated in the pixel portion of three rows.

  If the defective lines are not continuous and if both sides of one defective line are normal lines, it is possible to interpolate the pixel data of the defective lines using the pixel data of the normal lines on both sides. However, it is difficult to perform the interpolation as described above when defective lines occur in the pixel portions of three consecutive rows. In particular, as described above, a solid-state imaging device having a large-area light receiving unit has a high probability of disconnection due to the long row selection wiring.

  Patent Document 1 proposes an invention intended to eliminate such problems. In the present invention, an average value of all pixel data of adjacent lines adjacent to the defective line is obtained, and an average value of all pixel data of several normal lines adjacent to the defective line is also obtained, and a difference between these two average values is obtained. Is equal to or greater than a certain value, it is determined that the adjacent line is also defective, the pixel data of the adjacent line is corrected, and the pixel data of the defective line is further corrected based on the corrected value of the pixel data of the adjacent line. to correct.

  In the invention described in Patent Document 1, when correcting pixel data of an adjacent line determined to be a defect, an average value of two pixel data on the nearest normal line on both sides of the adjacent line And the average value is used as the pixel data of the adjacent line. Further, when correcting pixel data of a defective line, an average value of two pixel data on adjacent lines on both sides of the defective line is obtained, and the average value is used as pixel data of the defective line.

  However, in the invention described in Patent Document 1, in order to correct pixel data of a defective line (and a line determined to be a defect in the vicinity of the defective line), a process of obtaining an average of the two pixel data is performed. Since the process is repeated a plurality of times, the resolution is lowered in the vicinity of the defect line in the corrected image.

  The present invention has been made to solve the above-described problems, and provides a solid-state imaging device capable of obtaining a high-resolution image even when any row selection wiring is disconnected. Objective.

A solid-state imaging device according to the present invention includes (1) M × N pixel units each including a photodiode that generates an amount of electric charge according to incident light intensity, and a readout switch connected to the photodiode. A light receiving unit in which P _{1,1 to} P _{M, N} are two-dimensionally arranged in M rows and N columns; and (2) M pixel units P _{1, n to} P _{M, n} in the nth column in the light receiving unit. The charge generated in the photodiode included in any one of the _M pixel portions P _{1, n to} P _{M, n} is connected to the read switch included in the pixel portion. Read wiring L _{O, n} read through the switch and (3) each of the read wirings L _{O, 1 to} L _{O, N} is connected to each of the read wirings L _{O, n} and the amount of charge input through the read wiring L _{O, n} A signal reading unit that holds the corresponding voltage value and sequentially outputs the held voltage value; and (4) the m-th row in the light receiving unit. N pixel portions P _{m, 1} ~P _m, is connected to the readout switch included in each _N, the row selecting wiring transmitting a signal for controlling the opening and closing operation of the readout switch to these reading-out switch L _{V, m} and (5) a row selection connected to one end of each of the row selection wirings L _{V, 1 to} L _{V, M} and controlling the opening / closing operation of the readout switch included in each pixel unit P _{m, n} in the light receiving unit By sequentially outputting a control signal to the row selection wiring LV _{, m} for each row _, and closing the readout switch in the pixel portion connected by the row selection wiring, the photodiode included in the pixel portion A row selection unit for outputting the generated charges to the readout wiring L _{O, n} and (6) each pixel unit P in the light receiving unit connected to the other ends of the row selection wirings L _{V, 1 to} L _{V, M m,} and controls opening and closing operations of the readout switches included in the _n Out and outputs the protection signal either row selecting wiring L _V, the _m is, by closing the reading-out switch in the line pixel portions connected by selecting wiring, a photodiode included in the pixel portion An overflow prevention unit that prevents the generated charges from overflowing outside the pixel unit, and (7) a control unit that controls operations of the row selection unit and the overflow prevention unit, respectively. . However, M and N are integers of 2 or more, m is an integer of 1 to M, and n is an integer of 1 to N. Furthermore, the overflow prevention unit includes a plurality of shift registers, and the output terminals of the respective stages of the plurality of shift registers are connected to any one of the row selection wirings L _{V, 1 to} L _{V, M} , and the plurality of shift registers Each has an input terminal for inputting a start signal from the control unit and an output terminal for outputting an end signal to the control unit, and is connected to the shift register when the start signal is input to the input terminal. In addition, an overflow prevention signal is sequentially output to each row selection wiring, and when the overflow prevention signal is output to each row selection wiring connected to the shift register, an end signal is output from the output terminal. To do.

In the solid-state imaging device according to the present invention, a row selection unit is connected to one end of each of the row selection wirings LV _{, 1 to} LV _{, M,} and a row selection control signal is input from this row selection unit. Further, an overflow prevention unit is connected to the other ends of the row selection wirings LV _{, 1 to} LV _{, M} , and an overflow prevention signal is input from this overflow prevention unit. Both the row selection control signal and the overflow prevention signal are signals for controlling the opening / closing operation of the readout switch included in the pixel portion in the light receiving portion. However, the row selection control signal output from the row selection unit is a signal for reading out charges from each pixel unit in the light receiving unit. On the other hand, the overflow prevention signal output from the overflow prevention unit is selected when the row selection wiring is disconnected in the row selection wiring in the light receiving unit. By closing the readout switch in the pixel portion that is far from the disconnection position with respect to the row selection portion among the pixel portions connected to the wiring for wiring, the charges generated in the photodiodes included in the pixel portion are It is a signal for preventing overflowing outside.

In the solid-state imaging device according to the present invention, the overflow prevention unit is disconnected when one of the row selection wirings L _{V, 1 to} L _{V, M} is disconnected. It is preferable to selectively output an overflow prevention signal to the row selection wiring.

In the solid-state imaging device according to the present invention, the overflow prevention unit is disconnected when one of the row selection wirings L _{V, 1 to} L _{V, M} is disconnected. It is preferable to output an overflow prevention signal to each of the row selection wiring and the row selection wiring adjacent thereto.

In the solid-state imaging device according to the present invention, the overflow prevention unit selects the row when outputting the overflow prevention signal to any one of the row selection wirings LV _{, 1 to} LV _{, M.} It is preferable that the overflow prevention signal is output at the same timing as the output of the row selection control signal from the section to the row selection wiring.

  The X-ray CT apparatus according to the present invention includes (1) an X-ray output unit that outputs X-rays toward a subject, and (2) receives X-rays that are output from the X-ray output unit and arrive through the subject. And (3) a moving means for moving the X-ray output unit and the solid-state imaging device relative to the subject, and (4) frame data output from the solid-state imaging device. And an image analysis unit that generates a tomographic image of the subject based on the frame data.

  According to the present invention, an image with high resolution can be obtained even when any of the row selection wirings is disconnected.

1 is a schematic configuration diagram of a solid-state imaging device 1 according to the present embodiment. FIG. 4 is a circuit diagram of each of a pixel unit P _{m, n} , an integrating circuit _Sn, and a holding circuit H _n included in the solid-state imaging device 1 according to the present embodiment. 6 is a timing chart for explaining the operation of the solid-state imaging device 1 according to the present embodiment. It is a figure which shows the 1st structural example of the row selection part 30 and the overflow prevention part 50 which are contained in the solid-state imaging device 1 which concerns on this embodiment. Is a diagram illustrating a shift register 31 _p arrangements included row selecting section 30A. It is a figure which shows the 2nd structural example of the row selection part 30 and the overflow prevention part 50 which are included in the solid-state imaging device 1 which concerns on this embodiment. 1 is a configuration diagram of an X-ray CT apparatus 100 according to the present embodiment.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted.

  FIG. 1 is a schematic configuration diagram of a solid-state imaging device 1 according to the present embodiment. The solid-state imaging device 1 according to the present embodiment includes a light receiving unit 10, a signal reading unit 20, a row selection unit 30, a column selection unit 40, an overflow prevention unit 50, and a control unit 60. When used as an X-ray flat panel, a scintillator panel is overlaid on the light receiving surface 10 of the solid-state imaging device 1.

The light receiving unit 10 is configured such that M × N pixel units P _{1,1 to} P _{M, N} are two-dimensionally arranged in M rows and N columns. The pixel part P _{m, n} is located in the m-th row and the n-th column. Here, M and N are each an integer of 2 or more, m is an integer of 1 to M, and n is an integer of 1 to N. Each pixel unit P _{m, n} is of the PPS system and has a common configuration.

Each of the N pixel units P _{m, 1 to} P _{m, N} in the m-th row is connected to the row selection unit 30 and the overflow prevention unit 50 by the m-th row selection wiring LV _{, m} . M pixel portions P _{1, n} to P _{M, n} respective output terminals of the n-th column is for the n-th column readout wiring L _O, by _n, is connected to the integrating circuit S _n included in the signal readout section 20 ing.

The signal reading unit 20 includes N integration circuits S _{1 to} S _N and N holding circuits H _{1 to} H _N. Each integrating circuit _Sn has a common configuration. Moreover, the holding circuits H _n have a common configuration.

Each integrating circuit S _n readout wiring L _{O, n} and has an input terminal connected to, and accumulates charges input to this input terminal, the output terminal a voltage value corresponding to the accumulated charge amount output to the holding circuit _{H n.} The N integrating circuits _S 1 to S _N, respectively, are connected to the controlling section 60 by a discharge wiring _{L R.}

Each holding circuit H _n integrating circuit has an input terminal connected to the output terminal of the S _n, holds a voltage value input to this input terminal, the output line the held voltage value from an output terminal L Output to _out . The N holding circuits _H 1 to H _N, respectively, are connected to the controlling section 60 by a holding wiring _{L H.} Moreover, each holding circuit H _n is connected to the control unit 60 first n column selecting wiring L _H, the _n.

The row selection unit 30 is connected to one end of each of the row selection wirings LV _{, 1 to} LV _{, M.} In the drawing, the row selection unit 30 is provided on the left side of the light receiving unit 10. The row selection unit 30 sequentially outputs a row selection control signal Vsel (m) for controlling the opening / closing operation of the readout switch included in each pixel unit P _{m, n} in the light receiving unit 10 for each row _. and outputs to _m, the row selecting wiring L _V, by closing the reading-out switch in a pixel portion connected by _m, readout wiring the charge generated in the photodiode included in the pixel portion L _{O, n} To output. The M row selection control signals Vsel (1) to Vsel (M) are sequentially set to significant values. The row selection unit 30 includes a shift register for sequentially outputting M row selection control signals Vsel (1) to Vsel (M) as significant values.

Column selecting section 40, the n-th column selection control signal Hsel (n) to the n-th column selecting wiring L _H, and outputs to _n, gives the n-th column selecting control signal Hsel (n) to the holding circuit H _n . N column selection control signals Hsel (1) to Hsel (N) are also successively set to significant values. The column selection unit 40 includes a shift register for sequentially outputting N column selection control signals Hsel (1) to Hsel (N) as significant values.

The overflow prevention unit 50 is connected to the other end of each of the row selection wirings LV _{, 1 to} LV _{, M.} In the drawing, the overflow prevention unit 50 is provided on the right side of the light receiving unit 10. The overflow prevention unit 50 outputs an overflow prevention signal for controlling the opening / closing operation of the readout switch included in each pixel unit P _{m, n} in the light receiving unit 10 to any one of the row selection wirings LV _{, m} . , the row selecting wiring L _V, by closing the reading-out switch in a pixel connected portion by _m, charges generated in the photodiodes included in the pixel portion is prevented from overflowing outside the pixel portion .

The control unit 60 controls the overall operation of the solid-state imaging device 1. The control unit 60 gives control signals for controlling these operations to the row selection unit 30, the column selection unit 40, and the overflow prevention unit 50, respectively. Control unit 60, a discharging control signal Reset output to the discharge wiring L _R, provide the discharge control signal Reset to each of the N integrating circuits S ₁ to S _N. The control unit 60 outputs a holding control signal Hold to the holding wiring L _H, it gives the holding control signal Hold to the N holding circuits H ₁ to H _N, respectively.

As described above, the control unit 60 performs the readout included in each of _{the N} pixel units P _{m, 1 to} P _{m, N} in the m-th row in the light receiving unit 10 via the row selection unit 30 or the overflow prevention unit 50. It controls the opening and closing operation of the use the switch SW _1, and controls the holding operation and the output operation of the voltage value in the signal readout section 20 directly or via the column selecting section 40. Thereby, the control unit 60 uses the voltage value corresponding to the amount of charge generated in the photodiode PD included in each of the M × N pixel units P _{1,1 to} P _{M, N} in the light receiving unit 10 as frame data. The signal reading unit 20 repeatedly outputs the signal.

FIG. 2 is a circuit diagram of each of the pixel unit P _{m, n} , the integration circuit _Sn, and the holding circuit H _n included in the solid-state imaging device 1 according to the present embodiment. Here, a circuit diagram of the pixel portion P _{m, n} is shown on behalf of the M × N pixel portions P _{1,1 to} PM _{, N,} and an integration is shown on behalf of the _N integration circuits S _{1 to SN.} It shows a circuit diagram of a circuit _{S n,} also shows a circuit diagram of the holding circuit _{H n} as a representative of the n holding circuits _H 1 to H _n. That is, a circuit portion related to the pixel portion P _{m, n in the m-} th row and the n-th column and the n-th column readout wiring L _{O, n} is shown.

Pixel unit P _{m, n} includes a photodiode PD and a readout switch SW _1. The anode terminal of the photodiode PD is grounded, the cathode terminal of the photodiode PD is connected to the n-th column readout wiring L _O via the readout switch SW _1, and _n. The photodiode PD generates an amount of charge corresponding to the incident light intensity, and accumulates the generated charge in the junction capacitor. The read switch SW ₁ is supplied with an m-th row selection control signal from the row selection unit 30 through the m-th row selection wiring LV _{, m} . The m-th row selection control signal instructs an opening / closing operation of the readout switch SW ₁ included in each of _{the N} pixel portions P _{m, 1 to} P _{m, N} in the m-th row in the light receiving unit 10.

The pixel portion P _{m, n,} when the _m-th row selection control signal Vsel (m) is at low level, the readout switch SW ₁ in the open, the charge generated by the photodiode PD, for the n-th column readout Without being output to the wiring L _{O, n} , it is accumulated in the junction capacitance section. On the other hand, when the m-th row selecting control signal Vsel (m) is at high level, closes the readout switch SW _1, the charges accumulated in the junction capacitance portion is generated in the photodiode PD until it is read The signal is output to the n-th column readout wiring L _{O, n} through the switch SW ₁ .

The n-th column readout wiring L _{O, n} is connected to the readout switch SW ₁ included in each of the _M pixel units P _{1, n to} P _{M, n} in the n-th column in the light receiving unit 10. The n-th column readout wiring L _{O, n} receives charges generated in the photodiode PD included in any one of the _M pixel portions P _{1, n to} P _{M, n} in the pixel portion. read out via the readout switch SW ₁ included in, and transfers to the integrating circuit S _n.

The integrating circuit _Sn includes an amplifier A ₂ , an integrating capacitive element C _2, and a discharging switch SW ₂ . Integrating capacitive element C ₂ and the discharge switch SW ₂ are connected in parallel to each other, and provided between an input terminal of the amplifier A ₂ and the output terminal. The input terminal of the amplifier A ₂ is connected to the n-th column readout wiring L _{O, n.} Discharge switch SW ₂ are given the discharge control signal Reset passed through the discharge wiring L _R from the controlling section 60. Discharging control signal Reset is for instructing opening and closing operations of the discharge switches SW ₂ included in N integrating circuits S ₁ to S _N.

In this integrating circuit S _n, when the discharge control signal Reset is at high level, closes the discharge switch SW _2, the integrating capacitive element C ₂ is discharged, the voltage value initial output from the integrating circuit S _n It becomes. When the discharge control signal Reset is at low level, the discharge switch SW ₂ opens, charges input to the input terminal are accumulated in the integrating capacitive element C _2, the voltage value corresponding to the accumulated charge amount is integral output from the circuit _{S n.}

The holding circuit H _n includes an input switch SW ₃₁ , an output switch SW _32, and a holding capacitive element C ₃ . One end of the holding capacitive element C ₃ is grounded. The other end of the holding capacitive element C ₃ is connected via an input switch SW ₃₁ is connected to the output terminal of the integrating circuit S _n, and is connected to the voltage output wiring L _out via the output switch SW _32. Input switch SW ₃₁ is supplied with a holding control signal Hold passed through the holding wiring L _H from the controlling section 60. The holding control signal Hold instructs the opening / closing operation of the input switch SW ₃₁ included in each of the _N holding circuits H _{1 to} H _N. The output switch SW ₃₂ is supplied with the n-th column selection control signal Hsel (n) from the column selection unit 40 through the n-th column selection wiring L _{H, n} . N-th column selecting control signal Hsel (n) is for instructing opening and closing operations of the output switch SW ₃₂ included in the holding circuit H _n.

In the holding circuit H _n , when the holding control signal Hold changes from the high level to the low level, the input switch SW ₃₁ changes from the closed state to the opened state, and the voltage value input to the input terminal at that time is held. It is held in the use capacitive element C _3. Further, when the n-th column selection control signal Hsel (n) is at a high level, the output switch SW ₃₂ is closed, and the voltage value held in the holding capacitor C ₃ is supplied to the voltage output wiring L _out . Is output.

When the control unit 60 outputs a voltage value corresponding to the received light intensity of each of _{the N} pixel units P _{m, 1 to} P _{m, N} in the m-th row in the light receiving unit 10, the control unit 60 uses the discharge control signal Reset to generate N after instructing to open after closing the discharge switch SW ₂ included in the integrating circuits S ₁ to S _N once, the m-th row selection control signal Vsel outputted from the row selecting section 30 (m), the light receiving portion 10 instructs the m-th row of the N pixel portions P _{m, 1} to P _m, the readout switches SW ₁ included in each of _N for a predetermined period close as in. The control unit 60 instructs the input switch SW ₃₁ included in each of the _N holding circuits H _{1 to} H _N to change from the closed state to the open state by the holding control signal Hold during the predetermined period. Then, the control unit 60 is included in each of the _N holding circuits H _{1 to} H _N by the column selection control signals Hsel (1) to Hsel (N) output from the column selection unit 40 after the predetermined period. The output switch SW ₃₂ is instructed to close sequentially for a certain period. The control unit 60 sequentially performs the above control for each row.

  Next, the operation of the solid-state imaging device 1 according to this embodiment will be described. In the solid-state imaging device 1 according to this embodiment, M row selection control signals Vsel (1) to Vsel (M) and N column selection control signals Hsel (1) to Hsel are controlled under the control of the control unit 60. (N), the discharge control signal Reset and the hold control signal Hold each change in level at a predetermined timing, whereby an image of the light incident on the light receiving surface 10 can be taken to obtain frame data.

FIG. 3 is a timing chart for explaining the operation of the solid-state imaging device 1 according to this embodiment. In this figure, in order from the top, (a) a discharge control signal Reset instructing the opening / closing operation of the discharge switch SW ₂ included in each of the _N integration circuits S _{1 to} S _N , (b) the first in the light receiving unit 10. the first row selecting control signal Vsel for instructing the N pixel units P _{1, 1} to P _{1, N} opening and closing operations of the readout switches SW ₁ included in each of the first row (1), in (c) light receiving portion 10 the second row selecting control signal Vsel for instructing opening and closing operations of the readout switches SW ₁ included in the second row N pixel portions P _2,1 to P _{2, N} respectively (2), and, (d) N A holding control signal Hold for instructing an opening / closing operation of the input switch SW ₃₁ included in each of the holding circuits H _{1 to} H _N is shown.

Further, in this figure, (e) the first column selection control signals Hsel (1) and (f) holding circuit H instructing the opening / closing operation of the output switch SW ₃₂ included in the holding circuit H ₁ in sequence. second column selection control signal Hsel for instructing opening and closing operations of the output switch SW ₃₂ included in the ₂ (2), third column for instructing opening and closing operations of the output switch SW ₃₂ included in the (g) the holding circuit H ₃ selection control signal Hsel (3), (h) the n-th column selection control signal Hsel for instructing opening and closing operations of the output switch SW ₃₂ included in the holding circuit H _n (n), and, in (i) the holding circuit H _n the N-th column selection control signal Hsel instructing opening and closing operations of the output switch SW ₃₂ included (N) are shown.

Reading of charges generated in the photodiode PD included in each of _{the N} pixel portions P _{1,1 to} P _{1, N in} the first row and accumulated in the junction capacitance portion is performed as follows. Before the time t _10, M row selecting control signals Vsel (1) ~Vsel (M) , N pieces of column selection control signal Hsel (1) ~Hsel (N) , the discharge control signal Reset, and the holding control signal Hold Each is at a low level.

Period from the time _{t 10} to the time _{t 11,} the discharging control signal Reset to be output from the controlling section 60 to the discharge wiring _{L R} becomes high level, in the N integrating circuits _S 1 to S _N, respectively, the discharge use the switch SW ₂ closes, the integrating capacitive element _{C 2} is discharged. Further, during a period from the time t ₁₂ after the time t ₁₁ to time t _15, the first row selecting control signal Vsel outputted from the row selecting section 30 to the first row selecting wiring L _{V, 1} (1) is high As a result, the readout switch SW ₁ included in each of _{the N} pixel units P _{1,1 to} P _{1, N} in the first row in the light receiving unit 10 is closed.

Within this period (t _{12 to} t ₁₅ ), during the period from time t ₁₃ to time t ₁₄ , the holding control signal Hold that is output from the control unit 60 to the holding wiring L _H becomes high level. In each of the holding circuits H _{1 to} H _N , the input switch SW ₃₁ is closed.

In the period _(t 12 _{~t 15),} the readout switch SW ₁ is closed to be included in each pixel portion P _{1, n} of the first row, the discharge switch SW ₂ of each integrating circuit _{S n} is open Therefore, the charges generated so far in the photodiode PD of each pixel portion P _{1, n} and accumulated in the junction capacitance portion are used for the readout switch SW ₁ and the n-th column readout for the pixel portion P _{1, n} . wiring L _O, through _n, is stored after being transferred to the integrating capacitive element C ₂ of the integrating circuit S _n. Then, a voltage value corresponding to the amount of charges accumulated in the integrating capacitive element C ₂ of each integrating circuit S _n is output from the output terminal of the integrating circuit S _n.

At time _{t 14} in the period _(t 12 _{~t 15)} inside, by holding control signal Hold switches from high level to low level, in the N holding circuits _H 1 to H _N, the input switch _{SW 31} switches from a closed state to an open state, a voltage value being input to the input terminal of the holding circuit H _n are output from the output terminal of the integrating circuit S _n at that time is held in the holding capacitive element C _3.

After the period (t _{12 to} t ₁₅ ), the column selection control signals Hsel (1) to Hsel (N) output from the column selection unit 40 to the column selection wirings L _{H, 1 to} L _{H, N} are sequentially supplied. Therefore, the output switches SW ₃₂ included in each of the _N holding circuits H _{1 to} H _N are sequentially closed for a certain period, so that the holding capacitance element C of each holding circuit H _n is set to a high level. ₃ is sequentially output to the voltage output wiring L _out via the output switch SW ₃₂ . Voltage value V _out to be output to the voltage output wiring L _out is representative of the received light intensity in the photodiode PD included in the N pixel portions P _{1, 1} to P _{1, N} respectively of the first row .

Subsequently, reading of the second row of the N pixel portions P _2,1 to P _{2, N} charge accumulated in the junction capacitance portion generated in the photodiode PD included in each is performed as follows.

Period from time _{t 20} to the time _{t 21,} the discharging control signal Reset to be output from the controlling section 60 to the discharge wiring _{L R} becomes high level, in the N integrating circuits _S 1 to S _N, respectively, the discharge use the switch SW ₂ closes, the integrating capacitive element _{C 2} is discharged. Further, the period from the time t ₂₂ after the time t ₂₁ to time t _25, the second row selection control signal Vsel (2) is a high output from the row selecting section 30 to the second row selecting wiring L _{V, 2} level, and thereby, N pixel units _P of the second row in the photodetecting section 10 _2,1 to P _2, the readout switches SW ₁ included in each _N is closed.

Within this period (t _{22 to} t ₂₅ ), during the period from time t ₂₃ to time t ₂₄ , the holding control signal Hold that is output from the control unit 60 to the holding wiring L _H becomes high level. In each of the holding circuits H _{1 to} H _N , the input switch SW ₃₁ is closed.

After the period (t _{22 to} t ₂₅ ), the column selection control signals Hsel (1) to Hsel (N) output from the column selection unit 40 to the column selection wirings L _{H, 1 to} L _{H, N} are sequentially supplied. Therefore, the output switch SW ₃₂ included in each of the _N holding circuits H _{1 to} H _N is sequentially closed for a certain period.

As described above, the voltage value V _out indicating the received light intensity in the photodiode PD included in the second row N pixel portions P _2,1 to P _{2, N} each is output to the voltage output wiring L _out The

Subsequent to the operations for the first row and the second row as described above, the same operation is performed from the third row to the Mth row, and frame data representing an image obtained in one imaging is obtained. It is done. When the operation is completed for the Mth row, the same operation is performed again from the first row, and frame data representing the next image is obtained. In this way, by repeating the same operation at a constant cycle, the voltage value _Vout representing the two-dimensional intensity distribution of the image of the light received by the light receiving unit 10 is output to the voltage output wiring _Lout , and the frame is repeated. Data is obtained.

By the way, during the period in which the readout switch SW ₁ included in each of _{the N} pixel units P _{m, 1 to} P _{m, N} in the m-th row is closed, the photodiodes of the pixel units P _{m, n in} the _m-th row. PD in generated by charges accumulated in the junction capacitance portion, the pixel portion P _m, for reading switch SW ₁ in and the n-th column reading _n lines L _O, through _n, for the integration of the integrating circuit S _n It is transferred to the capacitor _{C 2.} At this time, the accumulated charge in the junction capacitance part of the photodiode PD of each pixel part P _{m, n in} the _m-th row is initialized.

However, when a certain m-th row selection wiring LV _{, m} is disconnected at an intermediate position, the row selection among _N pixel portions P _{m, 1 to} P _{m, N in} the _m-th row is performed. pixel portions farther from the disconnected position to the part 30 is not m-th row selecting control signal Vsel (m) is transmitted from the row selecting section 30, remains switch SW ₁ is opened for reading, the integrating circuit S _n Therefore, the charge accumulated in the junction capacitance portion of the photodiode PD due to the charge transfer cannot be initialized. In this state, charges generated in the photodiodes in response to light incidence in these pixel portions are being accumulated in the junction capacitance portions of the photodiodes, and if they exceed the saturation level, they overflow to the pixel portions in both adjacent rows. As a result, defective lines are generated in the pixel portions of three consecutive rows.

The solid-state imaging device 1 according to the present embodiment includes an overflow prevention unit 50 to cope with such a problem. The row selection unit 30 is connected to one end of each of the row selection wirings LV _{, 1 to} LV _{, M} , whereas the overflow prevention unit 50 is connected to the row selection wirings LV _{, 1 to} LV _{, M.} It is connected to each other end. In other words, the m-th row selection wiring L _{V, m} extends between the row selection unit 30 and the overflow prevention unit 50, and the N pixel units P _m, of the m-th row in the light receiving unit 10 _{. 1} to P _{m, N} connected to the readout switches SW ₁ included in each transmit signals for controlling the opening and closing operation of the readout switch SW _{1 in} to these readout switch SW _{1 in.} A signal for controlling the opening / closing operation of the read switch SW ₁ is given as a row selection control signal Vsel (m) from the row selection unit 30 and given as an overflow prevention signal from the overflow prevention unit 50.

Prevention signal overflow output from preventing section 50 overflow are points to control the m row selecting wiring L _V, is outputted to the _m and the pixel portion P _m, the opening and closing operations of the readout switches SW ₁ of _n, This is the same as the row selection control signals Vsel (1) to Vsel (M) output from the row selection unit 30.

However, the row selection control signals Vsel (1) to Vsel (M) output from the row selection unit 30 are signals for reading out charges from the pixel units P _{m, n} in the light receiving unit 10. On the other hand, the overflow prevention signal output from the overflow prevention unit 50 is generated when the row selection wiring LV _{, 1 to} LV _{, M} is disconnected in the light receiving unit 10. Of the pixel portion connected to the disconnected row selection wiring at the pixel portion far from the disconnection position with respect to the row selection portion 30, the readout switch SW ₁ is closed, thereby the pixel portion Is a signal for preventing the charge generated in the photodiode PD included in the pixel from overflowing out of the pixel portion.

  Therefore, the row selection control signals Vsel (1) to Vsel (M) output from the row selection unit 30 are sequentially output for each row at a constant cycle. On the other hand, the overflow prevention signal output from the overflow prevention unit 50 is selectively output to the disconnected row selection wiring, or the disconnected row selection wiring and the same. Output to each adjacent row selection wiring. The overflow prevention signal output from the overflow prevention unit 50 does not necessarily need to be output to a row selection wiring that is not disconnected.

The overflow prevention signal output from the overflow prevention unit 50 may be output at a timing different from the output of the row selection control signal from the row selection unit 30 to the row selection wiring. For example, after the row selection control signals Vsel (1) to Vsel (M) are output from the row selection unit 30 and the voltage value _Vout for one frame is output from the signal reading unit 20, It is preferable that the voltage value V _{out for} one frame is before being output from the signal reading unit 20. In this case, when a plurality of row selection wirings are disconnected, it is preferable that an overflow prevention signal is simultaneously output from the overflow prevention unit 50 to the plurality of row selection wirings.

Also, the overflow prevention signal output from the overflow prevention unit 50 may be output at the same timing as the output of the row selection control signal from the row selection unit 30 to the row selection wiring. That is, the m-th row selecting wiring L _V, which is disconnected with _respect to _m, at the same timing as the row selecting section 30 from the row selecting control signal Vsel (m) is output, overflow from preventing section 50 overflow An output prevention signal is output. In this case, the m-th row selecting wiring L _V, which is _{disconnected,} N pixel units connected to _m P _{m, 1} to P _m, among the _N, than the disconnected point to the row selecting section 30 A row selection control signal Vsel (m) is given from the row selection unit 30 to the pixel portion located in the vicinity, and at the same timing as this, to the pixel portion far from the disconnection position with respect to the row selection unit 30. Then, an overflow prevention signal is given from the overflow prevention unit 50.

Accordingly, the m-th row selecting wiring L _V, which is _{disconnected,} N pixel units connected to _m P _{m, 1} to P _m, since the readout switch SW ₁ in the same timing in all _N is closed, The charges that have been generated in the photodiode PD of each pixel portion P _{m, n} and accumulated in the junction capacitance portion until then are read switch SW ₁ and n-th column readout wiring L of the pixel portion P _{m, n. The} signal is transferred to the signal reading unit 20 through _{O, n} . Then, the voltage value V _out representing the light reception intensity in the photodiode PD included in each of _{the N} pixel units P _{m, 1 to} P _{m, N} in the m-th row is output from the signal reading unit 20 to the voltage output wiring L _out . Is output.

As described above, in the solid-state imaging device 1 according to the present embodiment, even when any of the row selection wirings is disconnected, the row selection unit 30 is connected to the disconnected row selection wiring. An overflow prevention signal is provided from the overflow prevention unit 50 provided on the opposite side to the pixel portion that is not connected to the row selection unit 30 due to disconnection. Accordingly, even in pixel portions not connected to the row selecting section 30 due to the disconnection, and the read switch SW ₁ in closed by preventing signal overflow given from preventing section 50 overflow, in the photodiodes according to light incidence The electric charges generated and accumulated in the junction capacitance portion are discharged before reaching the saturation level and do not overflow to the adjacent pixel portion. Therefore, in this solid-state imaging device 1, it is not necessary to perform a conventional correction process, and an image with high resolution can be obtained.

In particular, when an overflow prevention signal is output from the overflow prevention unit 50 to the row selection wiring at the same timing as that at which the row selection control signal is output from the row selection unit 30 to the row selection wiring, the overflow occurs. Charges can also be read out from the pixel portion where the emission prevention signal reaches. If there is only one disconnection in the row selection wiring, the voltage value V _out representing the two-dimensional intensity distribution of the light image received by the light receiving unit 10 is obtained from the signal reading unit 20 in the same manner as in the case where there is no disconnection. The voltage is output to the voltage output wiring L _out .

  Next, configuration examples of the row selection unit 30 and the overflow prevention unit 50 included in the solid-state imaging device 1 according to the present embodiment will be described.

FIG. 4 is a diagram illustrating a first configuration example of the row selection unit 30 and the overflow prevention unit 50. In the first configuration example shown in this figure, a row selection unit 30A as the row selection unit 30 in FIG. 1 includes _P shift registers 31 _{1 to} 31 _P. Further, the overflow prevention unit 50A as the overflow prevention unit 50 in FIG. 1 includes _P shift registers 51 _{1 to} 51P. Each shift register 31 _p and each shift register 51 _p have a common configuration, and are Q-bit shift registers as shown in FIG. Here, P and Q are integers of 2 or more, p is an integer of 1 to P, and q appearing below is an integer of 1 to Q. The product of P and Q is equal to the number of rows M.

FIG. 5 is a diagram showing the configuration of the shift register _31p . The shift register 31 _p is configured by connecting _Q flip-flops 32 _{1 to} 32 _Q in series. The output terminal of the flip-flop 32 _q included in the shift register 31 _p is connected to the m-th row selection wiring LV _{, (p−1) Q + q} . Input terminal of the first stage flip-flop 32 ₁ included in the shift register 31 _p, the start signal Start (p) is inputted from the control unit 60. The output terminal of the flip-flop 32 _Q of the last stage included in the shift register 31 _p outputs end signal End a (p) to the control unit 60.

In the shift register 31 _p , when the pulse of the start signal Start (p) is input from the control unit 60 to the input terminal of the _first flip-flop 32 ₁ , the clocks input to the _Q flip-flops 32 _{1 to} 32 _Q, respectively. In synchronization with the signal, pulses are sequentially output as row selection control signals from the output terminals of the _Q flip-flops 32 _{1 to} 32 _Q. The pulse output from the output terminal of the flip-flop 32 _Q in the final stage is also output to the control section 60 as the end signal End (p).

In the row selection unit 30A, the pulses of the start signal Start (p) are sequentially input to the _P shift registers 31 _{1 to} 31 _P , and the row selection control signals Vsel (1) to Vsel (M) are sequentially input. It is output to the row selection wiring at regular intervals.

In the overflow prevention unit 50A, a pulse of the start signal Start (p) is sequentially input to the _P shift registers 51 _{1 to} 51 _P , and an overflow prevention signal is output to each row selection wiring. Also good. In addition, the pulse of the start signal Start (p) may be input only to the shift register 51 _p connected to the disconnected row selection wiring among the _P shift registers 51 _{1 to} 51 _P. The latter case is preferable because power consumption is small. In the latter case, the inrush current to the row selection unit 30A or the overflow prevention unit 50A generated when the input timings of the row selection control signal and the overflow prevention signal from both ends of the row selection wiring are shifted. Since the influence is small, this point is also preferable.

FIG. 6 is a diagram illustrating a second configuration example of the row selection unit 30 and the overflow prevention unit 50. In the second configuration example shown in this figure, the row selection unit 30B as the row selection unit 30 in FIG. 1 includes an M-bit shift register 33 and M digital buffers 34 _{1 to} 34 _M. The overflow prevention unit 50B as the overflow prevention unit 50 in FIG. 1 includes an M-bit shift register 53 and M three-state buffers 54 _{1 to} 54 _M.

In the row selection unit 30B, when a pulse of the start signal is input from the control unit 60, the row selection control signals Vsel (1) to Vsel (M) are sequentially output in a constant cycle in synchronization with the clock signal. The row selection control signal Vsel (m) is output to the mth row selection wiring LV _{, m} via the digital buffer 34 _m .

In the overflow prevention unit 50B, when a pulse of the start signal is input from the control unit 60, the overflow prevention signal is sequentially output at a constant cycle for each row in synchronization with the clock signal. The overflow prevention signal output corresponding to the m-th row selection wiring LV _{, m} is input to the 3-state buffer 54 _m , and if the enable signal Enable given from the control unit 60 is high level, the 3-state buffer The data is output from 54 _m to the m-th row selection wiring LV _{, m} . However, the enable signal Enable If a low level, third output terminal of the state buffer 54 _m is made into a high impedance state.

Therefore, the overflow prevention unit 50B can selectively output an overflow prevention signal to the disconnected row selection wiring. Further, by the third output terminal of the state buffer 54 _m corresponding to the row selecting wiring of which the wire is not broken with the high impedance state, the influence of inrush current to the row selecting section 30B or overflow out preventing section 50B is small.

  The solid-state imaging device 1 according to the present embodiment can be suitably used in an X-ray CT apparatus. Therefore, an embodiment of an X-ray CT apparatus provided with the solid-state imaging device 1 according to this embodiment will be described next.

  FIG. 7 is a configuration diagram of the X-ray CT apparatus 100 according to the present embodiment. In the X-ray CT apparatus 100 shown in this figure, the X-ray source 106 generates X-rays toward the subject. The irradiation field of X-rays generated from the X-ray source 106 is controlled by the primary slit plate 106b. The X-ray source 106 includes an X-ray tube, and the amount of X-ray irradiation to the subject is controlled by adjusting conditions such as tube voltage, tube current, and energization time of the X-ray tube. The X-ray imager 107 incorporates a CMOS solid-state image pickup device having a plurality of two-dimensionally arranged pixel units, and detects an X-ray image that has passed through the subject. In front of the X-ray imager 107, a secondary slit plate 107a for limiting the X-ray incident area is provided.

  The swivel arm 104 holds the X-ray source 106 and the X-ray imager 107 so as to face each other, and swivels them around the subject during panoramic tomography. In addition, a slide mechanism 113 for linearly displacing the X-ray imager 107 with respect to the subject is provided during linear tomography. The turning arm 104 is driven by an arm motor 110 constituting a rotary table, and the rotation angle is detected by an angle sensor 112. The arm motor 110 is mounted on a movable part of the XY table 114, and the center of rotation is arbitrarily adjusted within a horizontal plane.

  An image signal output from the X-ray imager 107 is converted into, for example, 10-bit (= 1024 level) digital data by the AD converter 120, and once taken in a CPU (Central Processing Unit) 121, the frame memory 122 is then captured. Stored in From the image data stored in the frame memory 122, a tomographic image along an arbitrary tomographic plane is reproduced by a predetermined calculation process. The reproduced tomographic image is output to the video memory 124, converted into an analog signal by the DA converter 125, displayed on the image display unit 126 such as a CRT (cathode ray tube), and used for various diagnoses.

  A work memory 123 necessary for signal processing is connected to the CPU 121, and an operation panel 119 provided with a panel switch, an X-ray irradiation switch, and the like is further connected. The CPU 121 also controls the motor drive circuit 111 for driving the arm motor 110, slit control circuits 115 and 116 for controlling the opening ranges of the primary slit plate 106b and the secondary slit plate 107a, and the X-ray control for controlling the X-ray source 106. Each is connected to a circuit 118 and further outputs a clock signal for driving the X-ray imager 107.

  The X-ray control circuit 118 can perform feedback control of the X-ray irradiation amount to the subject based on the signal imaged by the X-ray imager 107.

  In the X-ray CT apparatus 100 configured as described above, the X-ray imager 107 includes the light receiving unit 10, the signal readout unit 20, the row selection unit 30, the column selection unit 40, and the like of the solid-state imaging device 1 according to the present embodiment. It corresponds to the overflow prevention unit 50 and the control unit 60, and a scintillator panel is provided on the front surface of the light receiving unit 10.

  Since the X-ray CT apparatus 100 includes the solid-state imaging apparatus 1 according to the present embodiment, a tomographic image with a high resolution can be obtained even near the defect line. In particular, in an X-ray CT apparatus, a large number (for example, 300) of frame data is continuously acquired in a short period of time, and the amount of light incident on the light receiving unit 10 of the solid-state imaging device 1 varies from frame to frame. The amount of charge that overflows from the pixel portion to the pixel portion on the adjacent line varies from frame to frame. In such an X-ray CT apparatus, by providing the solid-state imaging device 1 according to the present embodiment, it is possible to perform effective correction on the frame data.

DESCRIPTION OF SYMBOLS 1 ... Solid-state imaging device, 10 ... Light-receiving part, 20 ... Signal reading part, 30 ... Row selection part, 40 ... Column selection part, 50 ... Overflow prevention part, 60 ... Control part, _P1,1 -PM _{, N} ... Pixel part, PD ... Photodiode, SW ₁ ... Read-out switch, S _{1 to} S _N ... Integration circuit, C ₂ ... Integration capacitor element, SW ₂ ... Discharge switch, A ₂ ... Amplifier, H _{1 to} H _N ... holding circuit, C ₃ ... holding capacitor, SW ₃₁ ... input switch, SW ₃₂ ... output switch, L _{V, m} ... m-th row selection wiring, L _{H, n} ... n-th column selection wiring, L _{O, n} ... n-th column readout wiring, L _R ... discharge wiring, L _H ... holding wiring, L _out ... voltage output wiring.

Claims (5)

M × N pixel portions P _{1,1 to} P _{M, N} each including M photodiodes, each of which includes a photodiode that generates an amount of charge corresponding to the incident light intensity, and a readout switch connected to the photodiode, are arranged in M rows. A light receiving section arranged two-dimensionally in N rows;
The light receiving unit is connected to a readout switch included in each of the _M pixel units P _{1, n to} P _{M, n} in the n-th column of the light receiving unit _, and among the _M pixel units P _{1, n to} P _{M, n} A readout wiring L _{O, n} that reads out the charge generated in the photodiode included in any of the pixel portions via the readout switch included in the pixel portion;
Connected to each of the read wirings L _{O, 1 to} L _{O, N} , holds a voltage value corresponding to the amount of charge input through the read wiring L _{O, n} , and sequentially holds the held voltage values. A signal readout unit for outputting to
Connected to the readout switches included in each of _{the N} pixel units P _{m, 1 to} P _{m, N} in the m-th row in the light receiving unit, signals for controlling the opening / closing operation of these readout switches are sent to these readout switches. The line selection wiring LV _{, m}
A row selection control signal connected to one end of each of the row selection wirings L _{V, 1 to} L _{V, M} and controlling the opening / closing operation of the readout switch included in each pixel unit P _{m, n} in the light receiving unit is provided for each row. the outputs sequentially row selecting wiring L _V, to _m, by closing the reading-out switch in a pixel portion connected by the row selecting wiring, reading the charge generated in the photodiode included in the pixel portion A row selection unit for outputting to the wiring L _{O, n} for
Which overflow prevention signal is connected to the other end of each of the row selection wirings L _{V, 1 to} L _{V, M} and controls the opening / closing operation of the readout switch included in each pixel unit P _{m, n} in the light receiving unit. for Kano row selection wiring L _V, and outputs it to _m, by closing the reading-out switch in the row selection pixel unit connected by wire, charge pixel generated in the photodiodes included in the pixel portion An overflow prevention part that prevents overflowing outside the part,
A control unit that controls operations of the row selection unit and the overflow prevention unit;
With
The overflow prevention unit includes a plurality of shift registers,
An output terminal of each stage of each of the plurality of shift registers is connected to _{one of} row selection wirings LV _{, 1 to} LV _{, M} ;
Each of the plurality of shift registers has an input terminal to which a start signal from the control unit is input and an output terminal that outputs an end signal to the control unit, and the start signal is input to the input terminal. Then, the overflow prevention signal is sequentially output to each row selection wiring connected to the shift register, and when the overflow prevention signal is output to each row selection wiring connected to the shift register, the overflow prevention signal is output. Outputting an end signal from the output terminal;
A solid-state imaging device (where M and N are integers of 2 or more, m is an integer of 1 to M, and n is an integer of 1 to N). When the row selection wiring is disconnected from any of the row selection wirings LV _{, 1 to} LV _{, M} , the overflow prevention unit selectively selects the disconnected row selection wiring. Outputting the overflow prevention signal;
The solid-state imaging device according to claim 1. The overflow prevention unit, when one of the row selection wirings LV _{, 1 to} LV _{, M} is disconnected, is adjacent to the disconnected row selection wiring. Outputting the overflow prevention signal to each of the row selection wirings;
The solid-state imaging device according to claim 1. When the overflow prevention unit outputs the overflow prevention signal to any one of the row selection wirings L _{V, 1 to} LV _{, M} , the row selection unit uses the row selection unit to select the row. Outputting the overflow prevention signal at the same timing as the output of the row selection control signal to the wiring;
The solid-state imaging device according to claim 1. An X-ray output unit that outputs X-rays toward the subject;
The solid-state imaging device according to any one of claims 1 to 4, which receives and images X-rays output from the X-ray output unit and reached through the subject;
Moving means for moving the X-ray output unit and the solid-state imaging device relative to the subject;
An image analysis unit that inputs frame data output from the solid-state imaging device and generates a tomographic image of the subject based on the frame data;
An X-ray CT apparatus comprising:

Images