JP2012249448A - Inverter control circuit and vacuum cleaner - Google Patents

Abstract

An inexpensive and stable drive inverter control circuit with high conversion efficiency, in which vertical conduction is reliably avoided and voltage output is accurately executed.
An upper arm side switching circuit comprising switching elements and a lower arm side switching circuit having lower switching speed than the upper arm side switching circuit, and upper and lower arm sides Control means 29 for driving the switching circuit. The control means 29 has a first dead time from when the lower arm side switching circuit is turned off to when the upper arm side switching circuit is turned on, from when the upper arm side switching circuit is turned off. It is longer than the second dead time until the lower arm side switching circuit is turned on. The high speed switching elements 23 to 25 are used on the upper arm side, and the low speed switching elements 26 to 28 are used on the lower arm side. However, vertical conduction is reliably avoided.
[Selection] Figure 1

Description

  The present invention relates to an inverter control circuit configured by a plurality of switching elements, which converts DC power into AC having a desired frequency and drives a load such as a motor, and an electric vacuum cleaner using the inverter control circuit. .

  In a so-called inverter control circuit that converts input power from a power source into alternating current of a desired frequency and is used for driving a motor or the like, two upstream and downstream switching elements are connected in series according to the direction of application of the power source voltage. A switching circuit having a plurality of circuits is common. IGBTs (insulated gate bipolar transistors), MOSFETs, and the like are widely used as the upstream side, so-called upper arm switching elements, and the downstream side, so-called lower arm switching elements.

  In the conventional inverter control circuit, all the switching elements of the upper and lower arms of the switching circuit are composed of the same element. On the other hand, for example, as shown in Patent Document 1, an IGBT or MOSFET capable of high-speed switching is used for the upper arm three phases, and a bipolar transistor is used for the lower arm three phases, so that the DC motor can be driven with an inexpensive configuration. There has been proposed an inverter control circuit that can suppress generation of electromagnetic noise, vibration and noise.

  Further, for example, in another conventional inverter control circuit as shown in Patent Document 2, an IGBT is used for the upper arm, a MOSFET is used for the lower arm, the IGBT of at least one series circuit is turned on and off, and at least another inverter control circuit is used. Loss reduction is realized over a wide range from high load to low load by sequentially switching multiple-phase energization to turn on the MOSFET of one series circuit.

JP-A-7-31182 JP 2007-74858 A

  However, in such a conventional inverter control circuit, since the switching elements of the upper arm and the lower arm are different, the switching time is different, and the dead time time for preventing the upper arm and the lower arm from being vertically connected is the switching time. It is necessary to take a sufficiently long time according to the slow element, and as a result, the dead time time becomes long, and accordingly, the distortion of the output voltage of the inverter control circuit increases, and the current waveform flowing to the motor as a load also increases. There was a problem that the distortion increased.

  In addition, as a countermeasure against distortion of the output voltage due to the dead time, the characteristics of each switching element are different even when performing so-called dead time correction in which the output voltage is corrected in accordance with the direction of current flow. Therefore, it is difficult to correct the dead time accurately, which increases the distortion of the output voltage of the inverter control circuit, and increases the distortion of the current waveform flowing through the motor as a load.

The present invention has been made in view of the above points, and in an inverter control circuit using different types of switching elements for the upper and lower arms, a motor serving as a load by accurately controlling the output voltage. It is an object of the present invention to provide an inverter control circuit that can improve efficiency, and a vacuum cleaner that is inexpensive, has high driving efficiency, and is stable in operation.

  In order to solve the above-described conventional problems, the inverter control circuit of the present invention includes a plurality of upper arm side switching circuits each composed of a switching element, each composed of a switching element, and has a switching speed higher than that of the upper arm side switching circuit. A plurality of low-speed lower arm side switching circuits, and control means for driving the upper arm side switching circuit and the lower arm side switching circuit, the control means from the OFF state of the lower arm side switching circuit to the upper arm The first dead time time, which is the time difference until the side switching circuit is turned on, is set to be greater than the second dead time time, which is the time difference from when the upper arm side switching circuit is turned off to when the lower arm side switching circuit is turned on Fast switching on the upper arm side Children, even in the inverter control circuit using the low-speed switching elements on the lower arm side, ensures the vertical conduction with is avoided, the output of the correct voltage is achieved.

  The inverter control circuit according to the present invention includes a plurality of upper arm side switching circuits each composed of a switching element and a plurality of lower arm side switching circuits each composed of a switching element and having a higher switching speed than the upper arm side switching circuit. And a control means for driving the upper arm side switching circuit and the lower arm side switching circuit, wherein the control means is a time difference from turning off the lower arm side switching circuit to turning on the upper arm side switching circuit. The first dead time time is set to be smaller than the second dead time time which is a time difference from the time when the upper arm side switching circuit is turned off to the time when the lower arm side switching circuit is turned on. A low-speed switching element is connected to the lower arm Also in the inverter control circuit using the switching element, reliably vertical conduction with is avoided, the output of the correct voltage is achieved.

  The vacuum cleaner of the present invention includes a fan motor that generates a suction force and the inverter control circuit according to any one of claims 1 to 10, and the fan motor is driven by the inverter control circuit. An inexpensive vacuum cleaner with high driving efficiency and stable operation is realized.

  The inverter control circuit according to the present invention reliably avoids vertical conduction, accurately outputs voltage, is inexpensive, has high conversion efficiency, and can stably drive a load. By using it in a machine, it is possible to provide an inexpensive vacuum cleaner with high driving efficiency and stable operation.

The block diagram which shows the detailed structure of the inverter control circuit which concerns on the 1st Embodiment of this invention The block diagram which shows the structure for 1 phase of the control block which produces | generates the drive pulse of an upper / lower arm in the control means of the inverter control circuit Timing diagram for generating drive pulses for upper and lower arms in the control means when applying a conventional control method with the same dead time of the inverter control circuit Characteristics diagram showing switching voltage waveform of the inverter control circuit Timing chart for generating drive pulses for upper and lower arms in the control means of the inverter control circuit The block diagram which shows the detailed structure of the inverter control circuit based on the 2nd Embodiment of this invention Characteristics diagram showing switching voltage waveform of the inverter control circuit Timing chart for generating drive pulses for upper and lower arms in the control means of the inverter control circuit Timing chart for generating drive pulses for upper and lower arms in the control means of the inverter control circuit according to the third embodiment of the present invention Timing chart for generating drive pulses for upper and lower arms in the control means of the inverter control circuit Schematic which shows schematic structure of the vacuum cleaner which concerns on the 4th Embodiment of this invention.

  The first invention includes a plurality of upper arm side switching circuits each composed of a switching element, a plurality of lower arm side switching circuits each composed of a switching element and having a lower switching speed than the upper arm side switching circuit, An upper arm side switching circuit and a control means for driving the lower arm side switching circuit, wherein the control means is a first time difference from turning off the lower arm side switching circuit to turning on the upper arm side switching circuit. Is set to be larger than a second dead time, which is a time difference from when the upper arm side switching circuit is turned off to when the lower arm side switching circuit is turned on. Use a low-speed switching element on the lower arm side Also in inverter control circuit, reliably vertical conduction with is avoided, the output of the correct voltage is achieved.

  In the second invention, in particular, the first dead time of the first invention is set to a value larger than the switching time of the switching element of the upper arm side switching circuit, and the second dead time is set to the lower arm side switching. It is set to a value larger than the switching time of the switching element of the circuit, and even in an inverter control circuit using a high-speed switching element on the upper arm side and a low-speed switching element on the lower arm side, vertical conduction is reliably avoided. Thus, an accurate voltage output is realized.

  According to a third aspect of the present invention, there are provided a plurality of upper arm side switching circuits each composed of a switching element, a plurality of lower arm side switching circuits each composed of a switching element and having a switching speed higher than that of the upper arm side switching circuit, An upper arm side switching circuit and a control means for driving the lower arm side switching circuit, wherein the control means is a first time difference from turning off the lower arm side switching circuit to turning on the upper arm side switching circuit. Is set to be smaller than the second dead time, which is the time difference from the turn-off of the upper arm side switching circuit to the turn-on of the lower arm side switching circuit. Using a high-speed switching element on the lower arm side Also in inverter control circuit, reliably vertical conduction with is avoided, the output of the correct voltage is achieved.

  In the fourth invention, in particular, the first dead time of the third invention is set to a value larger than the switching time of the switching element of the lower arm side switching circuit, and the second dead time is set to the upper arm side switching. It is set to a value larger than the switching time of the switching element of the circuit, and even in an inverter control circuit using a low speed switching element on the upper arm side and a high speed switching element on the lower arm side, vertical conduction is reliably avoided. Thus, an accurate voltage output is realized.

In the fifth invention, in particular, the control means of any one of the first to fourth inventions compares the triangular wave counter for counting the pulse period, the output modulation rate and the value of the triangular wave counter, and compares the positive-phase pulse signal and the negative A comparator that outputs a phase pulse signal, a positive phase delay timer that has a function of delaying a positive phase pulse signal for which the first dead time is set, and a negative phase pulse for which a second dead time is set Each of the delay times is changed according to whether the count of the triangular wave counter 101 is in the up direction or the down direction.

  According to a sixth aspect of the invention, in particular, according to the direction of the current output from between the upper arm side switching circuit and the lower arm side switching circuit of any one of the first to fifth aspects, the upper arm side switching circuit and the This is to correct the switching time of the lower arm side switching circuit, and the distortion of the output voltage due to the dead time of the switching elements of the upper and lower arms is reduced regardless of the direction of the current as a load.

  In the seventh invention, in particular, when the current flows in the direction in which the current flows from between the upper arm side switching circuit and the lower arm side switching circuit of the sixth invention, the switching time of the upper arm side switching circuit is set to the first dead time. The time is increased by half the sum of the time and the second dead time, and the switching time of the lower arm side switching circuit is set to half the average value of the first dead time and the second dead time. Even if the types of switching elements used for the upper and lower arms are different, even when the direction of the load current flows in the direction in which the current flows between the arms, the switching elements of the upper and lower arms Reduction of output voltage distortion due to dead time is realized.

  In the eighth invention, in particular, when the current flows in the direction in which the current flows from between the upper arm side switching circuit and the lower arm side switching circuit of the sixth invention, the switching time of the upper arm side switching circuit is set to the first dead time. The time is reduced by half the sum of the time and the second dead time, and the switching time of the lower arm side switching circuit is reduced to half the average value of the first dead time and the second dead time. Even if the types of switching elements used for the upper and lower arms are different, even when the direction of the current that is the load flows in the direction in which the current flows between the arms, the switching elements of the upper and lower arms Reduction of output voltage distortion due to dead time is realized.

  In the ninth aspect of the invention, in particular, among the two types of switching elements constituting the upper arm side switching circuit and the lower arm side switching circuit according to any one of the first to eighth aspects, a higher speed switching element is provided. A (GaN) semiconductor and a slower switching element constituted by an IGBT realize an inexpensive and high conversion efficiency inverter control circuit with a stable operation.

  In the tenth aspect of the invention, in particular, among the two types of switching elements constituting the upper arm side switching circuit and the lower arm side switching circuit according to any one of the first to eighth aspects, a higher speed switching element is provided. A (GaN) semiconductor is used, and a slower switching element is constituted by a MOSFET, so that an inexpensive and high conversion efficiency and stable operation inverter control circuit is realized.

  An electric vacuum cleaner according to an eleventh aspect of the present invention includes a fan motor that generates a suction force and the inverter control circuit according to any one of claims 1 to 10, and the fan motor is driven by the inverter control circuit. Therefore, an inexpensive vacuum cleaner with high driving efficiency and stable operation is realized.

(Embodiment 1)
The inverter control circuit according to the first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a configuration diagram showing a detailed configuration of the inverter control circuit according to the present embodiment.

  In FIG. 1, reference numeral 2 denotes an inverter control circuit according to the present embodiment. The AC power supplied from the AC power supply 1 is once converted to DC by the rectifier circuit 21 and the smoothing capacitor 22 and supplied to the inverter unit 20. .

  The inverter unit 20 has a three-phase series circuit composed of switching elements 23 to 25 on the upper arm side and switching elements 26 to 28 on the lower arm side, and an interconnection point between the upper arm and the lower arm in these series circuits is It is configured to be connected to a motor 3 that is a load.

  The control means 29 controls each switching of the switching elements 23 to 28 so that the inverter unit 20 outputs AC power that causes the motor 3 to rotate at a desired rotational speed. As a switching method, a general pulse width modulation (PWM) method in which the output voltage is controlled by the time width of the drive pulse of the element is used.

  As the switching elements 23 to 25 on the upper arm side, gallium nitride (GaN) semiconductor devices capable of very high speed switching are used. On the other hand, as the switching elements 26 to 28 on the lower arm side, IGBT semiconductor devices that are switched at a lower speed than those on the upper arm side are used, and in addition, reflux diodes 26a to 28a are provided in parallel. By using switching elements with different characteristics for the upper arm and lower arm in this way and using a drive system that matches the respective characteristics, high efficiency of the inverter control circuit can be realized with an inexpensive configuration. .

  The control means 29 is realized by a control circuit using a microcomputer, and generates drive pulses for driving the switching elements 23 to 28 of the upper arm and the lower arm. FIG. 2 shows the configuration of one phase of a control block that generates drive pulses for the upper and lower arms in the control means 29.

  In addition, according to the timing diagram for generating the drive pulses for the upper and lower arms in the control means 29 when applying the conventional control method in which the dead times of the switching pulses for the upper and lower arms shown in FIG. The operation will be described.

  As shown in FIG. 3, the triangular wave counter 101 configured in the control means 29 has the same cycle as the pulse cycle, and the initial value is a dead time counter value, and the carrier cycle is increased by a half cycle. After counting, the dead time counter value is decremented and then the carrier period is half-counted down.

  The counter value of the triangular wave counter 101 is output to the comparator 102 and compared with the output modulation factor value. As a result of the comparison between the counter value and the modulation rate, a positive phase pulse signal and a negative phase pulse signal are output. As for this pulse, an ON signal is output between time t0 and t1 for a positive-phase pulse, and an ON signal is output for a negative-phase pulse at other times. The signals are sent to the positive phase delay timer 103 and the negative phase delay timer 104 provided respectively, and the pulse signal is delayed by the dead time.

  Each delay time is changed according to whether the count of the triangular wave counter 101 is in the up direction or the down direction. When the triangular wave counter 101 is in the up direction, the positive phase output pulse is delayed by the dead time as in the positive phase output pulse signal of FIG. At that time, the negative phase output pulse signal is not delayed.

On the other hand, when the triangular wave counter 101 is in the down direction, the negative phase output pulse is delayed by the dead time as in the negative phase output pulse signal of FIG. At that time, the positive phase output pulse signal is not delayed. The switching elements 23 to 25 on the upper arm side and the switching elements 26 to 28 on the lower arm side are driven through the element driving drivers 105 and 106 by the positive phase output pulse signal and the negative phase output pulse signal output in this way. Is done. Such an operation is performed every carrier period.

  FIG. 4 is a characteristic diagram showing a switching voltage waveform of the inverter control circuit 2 according to the present embodiment. In the inverter control circuit 2, the switching elements 23 to 25 on the upper arm side are very fast in switching, while the switching elements 26 to 28 on the lower arm side are slower to switch than the upper arm side. is there.

  Therefore, as shown in FIG. 4, the switching voltage on the lower arm side changes relatively slowly as the switching time B, and the switching voltage on the upper arm side changes relatively quickly as the switching time A. Therefore, in order to avoid vertical conduction, dead time is set to dead time A time (first dead time time) between times t40 and t41, and dead time B time (second time between times t42 and t43). Dead time). Accordingly, the dead time A time is set longer than the dead time B time.

  FIG. 5 is a timing chart for generating drive pulses for the upper and lower arms in the control means 29 of the inverter control circuit 2 according to the present embodiment. The principle of operation is the same as that in the case where the conventional dead time shown in FIG. 3 is the same in the upper and lower arms, and therefore the details are omitted, but the dead time A time is larger than the dead time B time. Set to

  In the triangular wave counter 101, the initial value is a counter value corresponding to the dead time A, and after the half period up-counting of the carrier period, the counter value corresponding to the dead time A is subtracted, and then the half-period down counting of the carrier period is performed. The The delay times set in the positive phase delay timer 103 and the negative phase delay timer 104 are set to the dead time A time and the dead time B time described above, respectively. Using such a control means 29, an inverter circuit composed of very high-speed switching elements 23 to 25 on the upper arm side and switching elements 26 to 28 on the lower arm side that is slower than the upper arm is controlled. The

  As described above, the inverter control circuit 2 according to the present embodiment has high efficiency with an inexpensive configuration, reliably avoids vertical conduction, improves reliability, and increases the performance of outputting an accurate voltage. Realized.

(Embodiment 2)
FIG. 6 is a block diagram showing a detailed configuration of the inverter control circuit according to the second embodiment of the present invention. The same parts as those of the inverter control circuit in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  In FIG. 6, in the inverter control circuit 5 in the present embodiment, the AC power supplied from the AC power supply 4 is temporarily converted into a direct current by the rectifier circuit 51 and the smoothing capacitor 52 provided in the inverter control circuit 5, and the inverter unit 40.

  The inverter unit 40 has a three-phase series circuit composed of switching elements 53 to 55 on the upper arm side and switching elements 56 to 58 on the lower arm side, and an interconnection point between the upper arm and the lower arm in these series circuits is It is configured to be connected to a motor 6 that is a load.

The control means 59 controls the switching of the switching elements 53 to 58 so that the inverter unit 40 outputs AC power that causes the motor 6 to rotate at a desired rotational speed. As a switching method, a pulse width modulation (PWM) method is used as in the inverter control circuit 2 according to the first embodiment.

  As the switching elements 56 to 58 on the lower arm side, gallium nitride (GaN) semiconductor devices capable of very high speed switching are used. On the other hand, as the switching elements 53 to 55 on the upper arm side, MOSFET semiconductor devices that switch at a lower speed than the lower arm are used, and freewheeling diodes 53a to 55a are provided in parallel.

  In this way, the switching elements 53 to 58 having characteristics different from those of the upper arm and the lower arm are used, and the drive system adapted to the respective characteristics is used, thereby realizing high efficiency of the inverter control circuit 5 with an inexpensive configuration. can do.

  FIG. 7 is a characteristic diagram showing a switching voltage waveform of the inverter control circuit 5 according to the present embodiment. In this inverter control circuit 5, the switching elements 56 to 58 on the lower arm side are very fast in switching, while the switching elements 53 to 55 on the upper arm side are slower to switch than the lower arm. .

  Therefore, as shown in FIG. 7, the switching voltage of the upper arm changes relatively slowly as the switching time A, and the switching voltage of the lower arm changes relatively quickly as the switching time B. Therefore, in order to avoid vertical conduction, the dead time is set to the dead time A time (first dead time) between the times t70 and t71, and the dead time B time (second time) between the times t72 and t73. It is necessary to take less time than the dead time). Accordingly, the dead time A time is set to be shorter than the dead time B time.

  FIG. 8 is a timing chart for generating drive pulses for the upper and lower arms in the control means 59 of the inverter control circuit 5 according to the present embodiment.

  Since the operation principle is the same as the operation shown in FIG. 5 and the details are omitted, the dead time A time is set to a value smaller than the dead time B time. In the triangular wave counter 101, the initial value is a counter value corresponding to the dead time A, and after the half period up-counting of the carrier period, the counter value corresponding to the dead time A is subtracted, and then the half-period down counting of the carrier period is performed. The

  The delay times set in the positive phase delay timer 103 and the negative phase delay timer 104 are set to the dead time A time and the dead time B time described above. By using such a control means 59, an inverter control circuit 5 comprising very fast lower arm side switching elements 56 to 58 and lower arm upper side switching elements 53 to 55 compared to the lower arm is provided. Be controlled.

  As described above, the inverter control circuit 5 according to the present embodiment achieves high efficiency with an inexpensive configuration and high efficiency, reliably avoiding vertical conduction, improving reliability, and outputting an accurate voltage. Is done.

(Embodiment 3)
FIG. 9 is a timing chart for generating drive pulses for the upper and lower arms in the control means of the inverter control circuit according to the third embodiment of the present invention. In addition, the same code | symbol is attached | subjected to the same part as the inverter control circuit in the said embodiment, and the description is abbreviate | omitted.

  Since the other functions and circuit configuration of the control means realized by the microcomputer are the same as those of the inverter control circuits according to the first and second embodiments, description thereof will be omitted.

  The generation principle of the positive phase output pulse and the negative phase output pulse is the same as the operation of the inverter control circuit 5 according to the second embodiment shown in FIG. When the inverter 6 is driven by the inverter control circuit 5, the dead time, the dead time DA time (first dead time time) and the dead time DB time (second dead time time) in FIG. It is known that the output voltage of the inverter control circuit 5 during this period changes to the positive side or the negative side according to the direction of the current flowing through the motor 6 serving as a load.

  When current flows in the direction of flowing out from the inverter control circuit 5 to the motor 6 serving as a load, the output voltage of the inverter control circuit 5 has a dead time as in the positive-phase output effective pulse and the negative-phase output effective pulse in FIG. The potential during the time becomes positive and is set higher by the dead time.

  This appears as a current distortion of the motor 6 serving as a load, and as a result, the motor driving efficiency is reduced. In response to this, in the inverter control circuit 5 in the present embodiment, the switching elements 56 to 58 on the lower arm side are turned off and then the switching elements 53 to 55 on the upper arm side are turned on in response to the output pulse of the circuit. Of the dead time A until the switching time of the upper arm side switching elements 53 to 55 and the switching time of the lower arm side switching elements 56 to 58 being half the average value DS. The output pulse width is corrected by the amount. When a current flows in the direction of flowing out from the inverter control circuit 5 to the motor 6 serving as a load, the pulse width is corrected like the positive phase output compensation pulse and the negative phase output compensation pulse, and the positive phase output compensation pulse (pulse width D3) is corrected. ) And a negative phase output compensation pulse (pulse width D4).

  By correcting the output pulse width in this way, the output voltage of the inverter control circuit 5 becomes positive during the dead time, like the positive phase output compensation effective pulse and the negative phase output compensation effective pulse, As a result, it can be made equal to the pulse width D4 originally desired to be output.

  FIG. 10 shows a case where a current flows in the direction of flowing into the inverter control circuit 5 from the motor 6 serving as a load for generating the drive pulses for the upper and lower arms in the control means 59 of the inverter control circuit 5 according to the present embodiment. FIG.

  When current flows in the direction of flowing from the motor 6 serving as a load to the inverter control circuit 5, the output voltage of the inverter control circuit 5 is equal to the dead time as shown in the positive-phase output effective pulse and the negative-phase output effective pulse in FIG. The potential during the time becomes negative, and is set lower by the dead time. This appears as a current distortion of the motor 6 serving as a load, and as a result, the motor driving efficiency is reduced. In response to this, in the inverter control circuit 5 in the present embodiment, the switching elements 56 to 58 on the lower arm side are turned off and then the switching elements 53 to 55 on the upper arm side are turned on in response to the output pulse of the circuit. Of the dead time A until the switching time of the upper arm side switching elements 53 to 55 and the switching time of the lower arm side switching elements 56 to 58 being half the average value DS. The output pulse width is corrected by the amount.

  When a current flows in the direction of flowing from the motor 6 serving as a load to the inverter control circuit 5, the pulse width is corrected like the positive phase output compensation pulse and the negative phase output compensation pulse, and the positive phase output compensation pulse (pulse width D5) is corrected. ) And a negative phase output compensation pulse (pulse width D6).

By correcting the output pulse width in this way, the output voltage of the inverter control circuit 5 becomes negative during the dead time, like the positive phase output compensation effective pulse and the negative phase output compensation effective pulse, As a result, it can be made equal to the pulse width D5 originally desired to be output.

  As described above, in the inverter control circuit 5 according to the present embodiment, the inverter control that is highly efficient with an inexpensive configuration and outputs an accurate voltage regardless of the direction of the current flowing through the motor 6 serving as a load. Realized.

(Embodiment 4)
FIG. 11: is a schematic diagram which shows schematic structure of the vacuum cleaner which concerns on the 4th Embodiment of this invention. In addition, the same code | symbol is attached | subjected to the same part as the inverter control circuit in the said embodiment, and the description is abbreviate | omitted.

  As shown in FIG. 11, a vacuum cleaner main body 80 of the electric vacuum cleaner according to the present embodiment has a fan motor 82 that receives an AC power from a power outlet (not shown) through a power cord 81 and generates a suction force. And the inverter control circuit 2 (or 5) in the first or second embodiment. The inverter control circuit 2 (or 5) rotates the fan motor 82 at a predetermined rotational speed, thereby generating suction work and fulfilling a function as a vacuum cleaner. Since this inverter control circuit 2 (or 5) is low-cost, high-efficiency, and high in reliability, a high suction work rate can be realized with high reliability.

  As described above, the vacuum cleaner according to the present embodiment is highly efficient with an inexpensive configuration, and can realize a high suction work rate with high reliability.

  In the above embodiment, gallium nitride (GaN) is used as a semiconductor element capable of high-speed switching, and IGBTs and MOSFETs are used as lower-speed semiconductor elements. It goes without saying that different types of semiconductor elements may be used.

  As described above, the inverter control circuit according to the present invention and the vacuum cleaner using the same are used in the inverter control circuit using different types of switching elements for the upper and lower arms, and have high efficiency and reliability. It is useful for inverter control circuits with high voltage and vacuum cleaners.

1, 4 AC power supply 2, 5 Inverter control circuit 3, 6 Motor 23-25, 53-55 Switching element (upper arm side switching circuit)
26-28, 56-58 Switching element (lower arm side switching circuit)
29, 59 Control means

Claims (11)

A plurality of upper arm side switching circuits each composed of a switching element, a plurality of lower arm side switching circuits each composed of a switching element and having a lower switching speed than the upper arm side switching circuit, and the upper arm side switching circuit, Control means for driving the lower arm side switching circuit, the control means, the first dead time time that is a time difference from the lower arm side switching circuit off to the upper arm side switching circuit on, An inverter control circuit, wherein the inverter control circuit is set to be larger than a second dead time, which is a time difference from when the upper arm side switching circuit is turned off to when the lower arm side switching circuit is turned on. The first dead time is set to a value greater than the switching time of the switching element of the upper arm side switching circuit, and the second dead time is set to a value greater than the switching time of the switching element of the lower arm side switching circuit. The inverter control circuit according to claim 1. A plurality of upper arm side switching circuits each consisting of a switching element, a plurality of lower arm side switching circuits each consisting of a switching element, each having a higher switching speed than the upper arm side switching circuit, and the upper arm side switching circuit, Control means for driving the lower arm side switching circuit, the control means, the first dead time time that is a time difference from the lower arm side switching circuit off to the upper arm side switching circuit on, An inverter control circuit, wherein the inverter control circuit is set to be smaller than a second dead time, which is a time difference from turning off the upper arm side switching circuit to turning on the lower arm side switching circuit. The first dead time is set to a value larger than the switching time of the switching element of the lower arm side switching circuit, and the second dead time is set to a value larger than the switching time of the switching element of the upper arm side switching circuit. The inverter control circuit according to claim 3. The control means includes a triangular wave counter that counts a pulse period, a comparator that compares an output modulation rate with the value of the triangular wave counter and outputs a positive phase pulse signal and a negative phase pulse signal, and a first dead time time is set. A positive phase delay timer having a function of delaying the positive phase pulse signal by the time, and a negative phase delay timer having a function of delaying the negative phase pulse signal by the time of the second dead time is set. The inverter control circuit according to any one of claims 1 to 4. 2. The switching time of the upper arm side switching circuit and the lower arm side switching circuit is corrected according to the direction of the current output from between the upper arm side switching circuit and the lower arm side switching circuit. The inverter control circuit according to any one of? When the current flows in the direction in which the current flows from between the upper arm side switching circuit and the lower arm side switching circuit, the switching time of the upper arm side switching circuit is half of the sum of the first dead time time and the second dead time time. The time is increased, and the switching time of the lower arm side switching circuit is decreased by half the average value of the first dead time time and the second dead time time. Inverter control circuit. When the current flows in a direction in which current flows from between the upper arm side switching circuit and the lower arm side switching circuit, the switching time of the upper arm side switching circuit is half of the sum of the first dead time time and the second dead time time. The time is decreased, and the switching time of the lower arm side switching circuit is increased by half the average value of the first dead time time and the second dead time time. Inverter control circuit. Of the two types of switching elements constituting the upper arm side switching circuit and the lower arm side switching circuit, the faster switching element is made of a gallium nitride (GaN) semiconductor, and the slower switching element is made of an IGBT. The inverter control circuit according to any one of claims 1 to 8, characterized in that Of the two types of switching elements constituting the upper arm side switching circuit and the lower arm side switching circuit, the faster switching element is a gallium nitride (GaN) semiconductor, and the slower switching element is configured by a MOSFET. The inverter control circuit according to any one of claims 1 to 8, characterized in that An electric vacuum cleaner comprising: a fan motor that generates a suction force; and the inverter control circuit according to claim 1, wherein the fan motor is driven by the inverter control circuit.