JP2012244510A - Sensor device, focus detection device using the same, ae detection device, and camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress processing amount related to determination whether an output signal after amplifying a plurality of photoelectric conversion elements of a photoelectric conversion element array portion is in a proper level or not, as compared with processing amount when using a peak value.SOLUTION: A sensor device includes a photoelectric conversion element array portion 31A having a plurality of photoelectric conversion elements 31a; an amplifier 33A for amplifying the output of the plurality of the photoelectric conversion elements 31a due to a charge accumulation operation of this time; a counter 38; and a determining portion 51. The counter 38 counts a number of the photoelectric conversion element in which the output amplified by the amplifier 33A is in not less than a standard level or not more than the standard level, of two or more photoelectric conversion elements 31a of the plurality of the photoelectric elements 31a, about each of one or more standard levels. The determining portion 51 determines whether the output amplified by the amplifier 33B is in a proper level or not, on the basis of a count value counted by the counter.

Description

  The present invention relates to a sensor device including a photoelectric conversion element array section having a plurality of photoelectric conversion elements, and a focus detection device, an AE detection device, and a camera using the same.

  In a sensor device having a photoelectric conversion element array section having a plurality of photoelectric conversion elements, in order to perform photometry with high accuracy, an output signal (photometry) of an appropriate level is used regardless of changes in the amount of incident light such as the luminance of a subject. Signal). This is because if the level of the output signal is too low, the difference in the output signal level of the individual photoelectric conversion elements due to the difference in the amount of light incident on the individual photoelectric conversion elements is reduced, and the contrast is reduced. This is because it becomes impossible to perform photometry with high accuracy. On the other hand, if the level of the output signal is too high, the output signal will be saturated and the photometric information will be lost, making it impossible to perform photometry with high accuracy.

  Therefore, conventionally, by adopting a method as described below, the charge accumulation time of the photoelectric conversion element array unit and the gain of the output signal of the photoelectric conversion element array unit are adjusted, and an output signal of an appropriate level is obtained. Trying to get.

  FIG. 6 of Patent Document 1 below shows a sensor device (hereinafter referred to as “first conventional sensor”) including two photoelectric conversion element array portions (“sensor arrays SAA and SAB”) each having a plurality of photoelectric conversion elements. Device ") is disclosed. The first conventional sensor device constitutes a focus detection device using a phase difference detection method. In this sensor device, an elongated monitor sensor (“control sensor SAGCA”) composed of one photoelectric conversion element is adjacent to each photoelectric conversion element of one photoelectric conversion element array section (“sensor array SAA”). It is provided so as to extend in the direction. In addition, an elongated monitor sensor ("control sensor SAGCB") composed of another photoelectric conversion element is adjacent to each photoelectric conversion element of the other photoelectric conversion element array section ("sensor array SAB") in the array direction. It is provided to extend.

  In the first conventional sensor device, the end point of charge accumulation in the photoelectric conversion element array unit is determined according to the signal level of the monitor sensor, and the gain of the output signal of the photoelectric conversion element array unit is determined. By doing so, an output signal of an appropriate level is obtained.

  Further, in the second conventional sensor device including the photoelectric conversion element array section having a plurality of photoelectric conversion elements, the peak value (of the output signals after amplification of the plurality of photoelectric conversion elements by the current charge accumulation operation ( The value of the output signal having the highest level is detected, and based on the peak value, it is determined whether or not the output signal after the current amplification is at an appropriate level. Based on this, the next charge accumulation time and output signal gain are set, and the photoelectric conversion element array unit is controlled to perform the next charge accumulation operation with the charge accumulation time, and finally an output signal of an appropriate level is obtained. The operation described above is repeated.

Japanese Patent No. 2911521

  However, in the first conventional sensor device, the output signal of the monitor sensor is equivalent to the average of the output signals of the photoelectric conversion elements of the photoelectric conversion element array unit, and therefore an output signal (photometric signal) of an appropriate level is obtained. It is difficult to obtain and photometry cannot be performed with high accuracy. For example, when the amount of incident light on only some of the photoelectric conversion elements in the photoelectric conversion element array section is locally large, the level of the output signal of the monitor sensor remains low, so the peak portion is saturated. However, it cannot be detected and an output signal of an appropriate level cannot be obtained.

  On the other hand, in the conventional second sensor device, a peak value is detected from the amplified output signals of the plurality of photoelectric conversion elements of the photoelectric conversion element array unit, and the current amplification is performed based on the peak value. It is possible to obtain an output signal with a more appropriate level because it is determined whether the output signal is at an appropriate level or the next charge accumulation time and the gain of the output signal are set based on the peak value. it can.

  However, in order to detect the peak value, the output signals of all the photoelectric conversion elements must be compared with each other, so that a large amount of processing is required to detect the peak value. Therefore, if the peak value is always detected, for example, a CPU or the like is occupied to perform the processing, which may interfere with other processing.

  The present invention has been made in view of such circumstances, and can obtain an output signal at a more appropriate level than the case where a monitor sensor is used, and the plurality of photoelectric conversion elements of the photoelectric conversion element array section can be obtained. Compared to the processing amount when using the peak value when the processing amount relating to the determination of whether or not the amplified output signal is at an appropriate level is at least a relatively large processing amount is not allowed as the processing amount. It is an object of the present invention to provide a sensor device, and a focus detection device, an AE detection device, and a camera using the sensor device.

  The following aspects are presented as means for solving the problems. The sensor device according to the first aspect includes a photoelectric conversion element array unit having a plurality of photoelectric conversion elements and two or more photoelectric conversion elements of the plurality of photoelectric conversion elements with respect to each of the one or more reference levels. Among these, based on the count unit that counts the number of photoelectric conversion elements whose output is equal to or higher than the reference level, or lower than the reference level, the output is at an appropriate level And a determination unit for determining whether or not.

  A sensor device according to a second aspect includes, in the first aspect, an amplifying unit that amplifies outputs of the plurality of photoelectric conversion elements by a current charge accumulation operation, and the counting unit includes the one or more reference levels. In each of the above, among the two or more photoelectric conversion elements of the plurality of photoelectric conversion elements, a photoelectric conversion element whose output amplified by the amplification unit is equal to or higher than the reference level or lower than the reference level The determination unit determines whether or not the output amplified by the amplification unit is at an appropriate level based on the count value counted by the count unit.

  In the sensor device according to the third aspect, in the first or second aspect, a setting unit configured to set a next charge accumulation time or a next charge accumulation time and a gain of the amplification unit based on the count value. And a control unit that controls the photoelectric conversion element array unit so as to perform the next charge storage operation with the charge storage time set by the setting unit when the determination unit determines that the level is not appropriate. It is provided.

  In the sensor device according to a fourth aspect, in the third aspect, the output of the two or more photoelectric conversion elements or the output of the two or more photoelectric conversion elements amplified by the amplification unit is AD converted. And a storage unit that stores the output value AD-converted by the AD conversion unit, and the determination unit determines whether the output value currently stored in the storage unit is based on the count value. It is determined whether or not the level is appropriate.

  A sensor device according to a fifth aspect includes, in the fourth aspect, an output unit that outputs the output value currently stored in the storage unit only when the determination unit determines that the level is appropriate. It is a thing.

  A sensor device according to a sixth aspect is AD-converted by a photoelectric conversion element array unit having a plurality of photoelectric conversion elements, an AD conversion unit that AD-converts outputs of the two or more photoelectric conversion elements, and the AD conversion unit. For each of the storage unit that stores the output value and one or more reference levels, the output of the two or more photoelectric conversion elements of the plurality of photoelectric conversion elements is equal to or higher than the reference level, or A counting unit that counts the number of photoelectric conversion elements that are equal to or lower than the reference level, and a determination unit that is configured by a CPU, and when the CPU does not have a predetermined capacity or more, based on the count value, It is determined whether or not the output value currently stored in the storage unit is at an appropriate level, and when the CPU has a surplus capacity equal to or greater than the predetermined level, it is stored in the storage unit this time. Based on the peak value of the force value, a determination unit for determining whether or not the output value stored this time in the storage unit is an appropriate level, and when the CPU has no more than the predetermined level, Based on the count value counted by the counting unit, the next charge accumulation time is set, and when the CPU has a surplus capacity equal to or more than the predetermined level, the output value stored this time in the storage unit Based on the peak value, the setting unit for setting the next charge accumulation time, and when the determination unit determines that the level is not appropriate, the next charge accumulation operation is performed with the charge accumulation time set by the setting unit. As described above, when the control unit that controls the photoelectric conversion element array unit and the CPU does not have a surplus capacity greater than the predetermined level, the determination unit determines that the level is appropriate. , And an output unit for outputting the current stored output values in the storage unit, wherein the CPU is configured to perform also a predetermined processing other than the processing as the determination unit.

  The sensor device according to the seventh aspect is amplified by the photoelectric conversion element array section having a plurality of photoelectric conversion elements, an amplification section for amplifying outputs of the plurality of photoelectric conversion elements by the current charge accumulation operation, and the amplification section. The AD conversion unit that AD converts the outputs of the two or more photoelectric conversion elements, the storage unit that stores the AD value converted by the AD conversion unit, and each of the one or more reference levels A counting unit that counts the number of photoelectric conversion elements in which the output amplified by the amplification unit is equal to or higher than the reference level or lower than the reference level among two or more photoelectric conversion elements And a determination unit configured by the CPU, and when the CPU does not have a surplus of a predetermined level or more, the output stored this time in the storage unit based on the count value Is stored in the storage unit based on the peak value of the output values currently stored in the storage unit when the CPU has a surplus capacity equal to or greater than the predetermined level. A determination unit that determines whether or not the output value stored this time is at an appropriate level, and when the CPU does not have the remaining power equal to or greater than the predetermined level, the next time based on the count value counted by the count unit The charge accumulation time and the gain of the amplifying unit are set, and the next charge is determined based on the peak value of the output values currently stored in the storage unit when the CPU has a surplus of the predetermined level or more. A setting unit that sets an accumulation time and a gain of the amplifying unit, and when it is determined by the determination unit that the level is not appropriate, the next charge storage is performed at the charge accumulation time set by the setting unit. In the case where the control unit that controls the photoelectric conversion element array unit so as to perform an operation and the CPU does not have a surplus capacity equal to or greater than the predetermined level, only when the determination unit determines that the level is appropriate, An output unit that outputs the output value stored in the storage unit this time, and the CPU performs predetermined processing other than the processing as the determination unit.

  In the sensor device according to an eighth aspect, in any one of the fifth to seventh aspects, the photoelectric conversion element array unit, the count unit, the AD conversion unit, the storage unit, and the output unit are provided on the same chip. The photoelectric conversion element array unit, the amplification unit, the count unit, the AD conversion unit, the storage unit, and the output unit are provided on the same chip, and the determination unit and the setting unit are It is provided outside the chip.

  The sensor device according to a ninth aspect is the sensor device according to any one of the fourth to eighth aspects, wherein the one or more reference levels are two or more reference levels, and the output value stored in the storage unit is obtained. The comparison unit sequentially compares the two or more reference levels supplied sequentially, and the counting unit counts the number according to a comparison result by the comparison unit.

  In the sensor device according to a tenth aspect, in any of the fourth to eighth aspects, the output value AD-converted by the AD conversion unit is compared with the reference level before being stored in the storage unit. A comparison unit is provided, and the count unit counts the number according to a comparison result by the comparison unit.

  In the sensor device according to an eleventh aspect, in any of the fourth to tenth aspects, an output of any one of the two or more photoelectric conversion elements, or the two or more photoelectric conversion elements. A saturation detection unit that detects that the output after amplification by the amplification unit of any one of the conversion elements is saturated, and the determination unit detects the saturation by the saturation detection unit. If it is determined, the output value stored this time in the storage unit is determined not to be at an appropriate level.

  A sensor device according to a twelfth aspect includes, in any one of the first to eleventh aspects, means for variably selecting the two or more photoelectric conversion elements from the plurality of photoelectric conversion elements. It is.

  A focus detection apparatus according to a thirteenth aspect includes the sensor apparatus according to any one of the first to twelfth aspects.

  An AE detection device according to a fourteenth aspect includes the sensor device according to any one of the first to twelfth aspects.

  A camera according to a fifteenth aspect includes at least one of the focus detection apparatus according to the thirteenth aspect and the detection apparatus for AE according to the fourteenth aspect.

  According to the present invention, it is possible to obtain an output signal at a more appropriate level than when a monitor sensor is used, and the output signals after amplification of the plurality of photoelectric conversion elements in the photoelectric conversion element array section are at an appropriate level. A sensor device that can suppress the processing amount relating to the determination of whether or not the processing amount is at least relatively large as the processing amount, compared to the processing amount when using the peak value, and A focus detection apparatus, an AE detection apparatus, and a camera using the same can be provided.

It is a schematic block diagram which shows the camera by the 1st Embodiment of this invention. FIG. 2 is a schematic configuration diagram illustrating a focus detection optical system, an AF sensor chip, a CPU, and the like in FIG. 1. FIG. 3 is a schematic block diagram illustrating an AF sensor chip, a CPU, and the like in FIGS. 1 and 2. It is a schematic flowchart which shows AF operation | movement of the camera shown in FIG. It is a figure which shows the example of the output signal level of each photoelectric conversion element after amplification of a photoelectric conversion element array part, and the example of the frequency of the photoelectric conversion element of the output signal level with respect to each output signal level after amplification, respectively. It is a schematic flowchart which shows AF operation | movement of the camera by a comparative example. It is a schematic flowchart which shows AF operation | movement of the camera by the 2nd Embodiment of this invention. It is a schematic block diagram which shows AF sensor chip | tip, CPU, etc. of the camera by the 3rd Embodiment of this invention. It is a figure which shows the example of the output signal level of each photoelectric conversion element after amplification of a photoelectric conversion element array part, and the example of the frequency of the photoelectric conversion element of the output signal level with respect to each output signal level after amplification, respectively. It is a schematic block diagram which shows the sensor chip for AF of a camera, CPU, etc. by the 4th Embodiment of this invention. It is a figure which shows typically the other example of arrangement | positioning of a visual field mask pattern and a photoelectric conversion element array part. It is a schematic block diagram which shows the sensor chip for AE, CPU, etc. of the camera by the 5th Embodiment of this invention.

  Hereinafter, a sensor device according to the present invention and a focus detection device, an AE detection device, and a camera using the same will be described with reference to the drawings.

[First Embodiment]
It is a schematic block diagram which shows the camera 1 by the 1st Embodiment of this invention. The camera according to the present invention is configured as a single-lens reflex electronic camera. However, the present invention can be applied not only to a digital single lens reflex camera but also to an electronic camera other than a single lens reflex camera, a video camera, a film camera, and the like.

  In the camera 1 according to the present embodiment, a photographing optical system 3 is mounted in front of the camera body 2. On the optical axis of the photographing optical system 3, a main mirror 4 and a sub mirror 5 are sequentially arranged. A mat surface 6 and a pentaprism 7 are arranged along the reflection direction of the main mirror 4. On the rear surface side of the pentaprism 7, an eyepiece 8 and a photometry unit 9 as an AE detection unit are arranged. A focus detection optical system 11 and an AF sensor chip 12 are arranged in the reflection direction of the sub mirror 5. On the rear side in the camera body 2, an image sensor 10 is provided that captures a subject image formed by the photographing optical system 3 when the mirrors 4 and 5 are retracted.

  An operation unit 15 (not shown in FIG. 1; see FIGS. 2 and 3 described later), a photometry unit 9 and an AF sensor chip 12 provided in the camera body 2 are connected to a CPU 13 disposed in the camera body 2. Has been. The CPU 13 is connected to a motor 14 that extends the photographing optical system 3 back and forth.

  FIG. 2 is a schematic configuration diagram showing the focus detection optical system 11, the AF sensor chip 12, the CPU 12, and the like in FIG. In FIG. 2, only some elements of the AF sensor chip 12 are shown. For other elements of the AF sensor chip 12, refer to FIG. 3 to be described later.

  The focus detection optical system 11 is configured to realize a phase difference detection method, and includes a field mask 21, a field lens 22, a diaphragm mask 23, and a pair of re-imaging lenses 24A and 24B. . A part of the light beam passing through the photographing optical system 3 reaches the field mask 21 via the sub mirror 5 (not shown in FIG. 2, refer to FIG. 1). The field mask 21 is disposed in the vicinity of the imaging plane of the photographing optical system 3 and determines a focus detection area. A diaphragm mask 23 is arranged behind the field mask 21 via a field lens 22. The aperture mask 23 is provided with a pair of openings 23A and 23B, and divides the light beam passing through the photographing optical system 3 into pupils.

  The pair of split light beams divided in this way is tilted through the pair of re-imaging lenses 24A and 24B to form a pair of optical images. A pair of photoelectric conversion element array portions 31A and 31B of the AF sensor chip 12 are disposed on the image planes of the pair of optical images. The photoelectric conversion element array part 31A has a plurality of photoelectric conversion elements 31a arranged in a line, and the photoelectric conversion element array part 31B has a plurality of photoelectric conversion elements 31b arranged in a line.

  The pair of photoelectric conversion element array units 31A and 31B photoelectrically convert the pair of optical images. Based on the output signals of the photoelectric conversion elements 31a and 31b of the pair of photoelectric conversion element arrays 31A and 31B, the focus adjustment state (for example, defocus amount) of the photographing optical system 3 can be calculated according to the phase difference detection method. it can.

  FIG. 3 is a schematic block diagram showing the AF sensor chip 12 and CPU 13 in FIGS. 1 and 2.

  The AF sensor chip 12 can be configured similarly to a CMOS image sensor, for example. For example, the AF sensor chip 12 may be configured similarly to a CCD image sensor.

  In the present embodiment, the AF sensor chip 12 includes a drive readout circuit 32A, variable gain amplifiers 33A and 33B, AD converters 34A and 34B, in addition to the pair of photoelectric conversion element array units 31A and 31B. Memories 35A and 35B, a reference level generation unit 36, a digital comparator 37, a counter 38, a saturation detection unit 39, an output unit 43, and a timing control unit that supplies a required timing control signal to each unit 46.

  The timing control unit 46 receives the control signal from the CPU 13 indicating that the photoelectric conversion element array units 31A and 31B accumulate charges in the set charge accumulation time and reads out the output signal, and receives the charge accumulation and output signal. Timing control signals for realizing the reading are supplied to the drive reading circuits 32A and 32B, respectively.

  In response to the timing control signal, the drive readout circuit 32A accumulates charges in the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A in the charge accumulation time, and sequentially outputs output signals from the photoelectric conversion elements 31a. In response to the timing control signal, the drive read circuit 32B accumulates charges in the photoelectric conversion elements 31b of the photoelectric conversion element array unit 31B in the charge accumulation time, and sequentially outputs output signals from the photoelectric conversion elements 31a.

  The amplifiers 33A and 33B amplify the output signals from the drive readout circuits 32A and 32B, respectively, with the gain indicated by the gain setting signal from the CPU 13. The AD converters 34A and 34B AD convert the signals amplified by the amplifiers 33A and 33B, respectively. Output values AD-converted by the AD converters 34A and 34B (data values obtained by digitizing output signals of the photoelectric conversion elements 31a and 31b of the photoelectric conversion element array units 31A and 31B respectively amplified by the amplifiers 33A and 33B) And hereinafter referred to as “data values”) are stored in the memories 35A and 35B, respectively. In the present embodiment, the output values of all the photoelectric conversion elements 31a of the photoelectric conversion element array section 31A are stored in the memory 35A, and the output values of all the photoelectric conversion elements 31b of the photoelectric conversion element array section 31B are stored in the memory 35B. Is done. In the present embodiment, the memory 35A, 35B is overwritten with the data value by the latest charge accumulation operation. The data value is, for example, a value of 10 to 12 bits.

  The reference level generation unit 36 generates and outputs the reference level L as a digital value. The reference level L is set to a value lower than the saturation level Ls. The saturation level Ls is an output value from the AD converters 34A and 34B when the signal level is saturated.

  The digital comparator 37 compares the data value from the AD converter 34A with the reference level L, and indicates that if the data value is equal to or higher than the reference level L (inversely, may be equal to or lower than the reference level L). A comparison result signal is output.

  The counter 38 receives from the timing control unit 46 a reset signal that resets the count value to zero before the output signal of the photoelectric conversion element 31a of the photoelectric conversion element array unit 31A is output from the drive readout circuit 32A. Further, the counter 38 receives a pulse signal synchronized with the output signal of each photoelectric conversion element 31a of the photoelectric conversion element array unit 31A from the timing control unit 46. The counter 38 counts the pulse signal only when the comparison result indicating that the data value from the AD converter 34A is equal to or higher than the reference level L is obtained from the digital comparator 37. Therefore, the counter 38 counts the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L among all the photoelectric conversion elements 31a of the photoelectric conversion element array section 31A with respect to one reference level L. The count value of the counter 38 indicates the number.

  In the present embodiment, the output unit 43 includes an output selection unit 44 and an output circuit 45. The output selection unit 44 selects one of the data value stored in the memories 35A and 35B and the count value of the counter 38 in accordance with the output selection signal from the CPU 13, and uses the selected count value or data value as a digital signal. The output circuit 45 is supplied. The output circuit 45 converts the digital signal that is the count value or data value selected by the output selection unit 44 into a signal of a predetermined signal format, outputs the signal to the outside of the AF sensor chip 12, and supplies it to the CPU 13. As will be understood from the following description, in the present embodiment, the output unit 43 outputs the data value stored in the memories 35A and 35B only when the determination unit 51 described later determines that the level is appropriate. To do.

  The saturation detection unit 39 detects that the output after amplification by the amplifier 33A of any one of the photoelectric conversion elements 31a of all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A is saturated. In the present embodiment, the saturation detection unit 39 includes a saturation level generation unit 40, a digital comparator 41, and a counter 42. The saturation level generation unit 40 generates and outputs the saturation level Ls as a digital value.

  The digital comparator 41 compares the data value from the AD converter 34A with the saturation level Ls, and when the data value is equal to or higher than the saturation level Ls, outputs a comparison result signal indicating that.

  The counter 42 receives from the timing control unit 46 a reset signal for resetting its count value to zero before the output signal of the photoelectric conversion element 31a of the photoelectric conversion element array unit 31A is output from the drive readout circuit 32A. The counter 42 receives a pulse signal synchronized with the output signal of each photoelectric conversion element 31a of the photoelectric conversion element array section 31A from the timing control section 46. The counter 42 counts the pulse signal only when a comparison result indicating that the data value from the AD converter 34A is equal to or higher than the saturation level Ls is obtained from the digital comparator 41. Therefore, one or more count values of the counter 42 become a saturation detection signal indicating that the output after amplification by the amplifier 33A of any one of the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A is saturated. This saturation detection signal is supplied to the CPU 13. Needless to say, the configuration of the saturation detection unit 39 is not limited to the configuration described above.

  Although not shown in the drawing, the CPU 13 is connected to a ROM, a RAM, and the like. According to the program stored in the ROM, the CPU 13 (i) based on the count value counted by the counter 38, the output of the photoelectric conversion element 31a of the photoelectric conversion element array unit 31A amplified by the amplifier 33A is at an appropriate level. A function as a determination unit 51 that determines whether or not there is, and (ii) a function as a setting unit 52 that sets the next charge accumulation time and the gain of the amplifier 33A based on the count value counted by the counter 38. (Iii) When the determination unit 51 determines that the level is not appropriate, the control unit 53 controls the photoelectric conversion element array unit 31A to perform the next charge storage operation with the charge storage time set by the setting unit 52. And (iv) focus calculation based on the data value determined by the determination unit 51 to be at an appropriate level It calculates a focusing state according to a phase difference detection method) and a function as a focus operation unit 54, responsible. In addition, the CPU 13 performs not only processing that realizes these functions but also various other processing such as processing according to the operation of the operation unit 15 and processing related to control of the entire camera.

  FIG. 4 is a schematic flowchart showing an AF (autofocus) operation of the camera 1 according to this embodiment.

  When the AF operation is started, first, the CPU 13 initializes the charge accumulation times of the photoelectric conversion element array units 31A and 31B and the gains of the amplifiers 33A and 33B to predetermined values (step S1). At this time, the CPU 13 supplies gain setting signals indicating the set gains to the amplifiers 33A and 33B, thereby setting the gains of the amplifiers 33A and 33B to initial setting values. The gains of the amplifiers 33A and 33B maintain the current set values until they are reset.

  Next, the CPU 13 supplies a control signal to the timing control unit 46 and performs photoelectric conversion so as to perform a charge accumulation operation with the currently set charge accumulation time via the timing control unit 46 and the drive readout circuits 32A and 32B. The element array units 31A and 31B are controlled, and the output signals of the photoelectric conversion elements 31a and 31b of the photoelectric conversion element array units 31A and 31B are sequentially output from the drive readout circuits 32A and 32B, respectively (step S2).

  The output signals output from the drive readout circuits 32A and 32B are respectively amplified by the amplifiers 33A and 33B with the currently set gain, and then AD converted by the AD converters 34A and 34B, respectively, to become data values. . The data values AD-converted by the AD converters 34A and 34B are written in the memories 35A and 35B. At the same time, the data values AD-converted by the AD converter 34A are output from the reference level generator 36 by the digital comparator 37. And the counter 38 counts the number of data equal to or higher than the reference level L according to the comparison result, and the data value AD-converted by the AD converter 34A is saturated by the digital comparator 41. Compared with the saturation level Ls from 40, the number of data equal to or higher than the saturation level Ls is counted by the counter 42 according to the comparison result (step S3). The count value of the counter 38 indicates the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L among all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A. The count value of the counter 42 indicates the number of photoelectric conversion elements 31a whose data value is the saturation level Ls, and one or more count values of the counter 42 are data values of any one of the photoelectric conversion elements 31a in the photoelectric conversion element array unit 31A. Becomes a saturation detection signal indicating that is saturated. The CPU 13 takes this saturation detection signal (count value of the counter 42) into the RAM.

  Next, the CPU 13 supplies an output selection signal for selecting and outputting the count value of the counter 38 to the output selection unit 44, reads the count value of the counter 38 through the output circuit 45, and takes it into the RAM (step) S4). At this time, the data values in the memories 35A and 35B are not output to the outside of the AF sensor chip 12.

  Next, based on the count value (saturation detection signal) of the counter 42 fetched in the RAM in step S3 and the count value of the counter 38 fetched in the RAM in step S4, the CPU 13 stores in the memory 35A by the current charge accumulation operation. It is determined whether or not the stored data value is at an appropriate level (step S5).

  If it is determined in step S5 that the level is not appropriate, the CPU 13 performs the next charge accumulation operation based on the count value of the counter 38 fetched into the RAM in step S4 and the currently set charge accumulation time and gain. The next charge accumulation time and the gain of the amplifier 33A are set to values at which the obtained data value approaches or becomes an appropriate level (step S6), and the process returns to step S2. The operations in steps S6 and S2 to S5 are repeated until it is determined in step S5 that the level is appropriate.

  If it is determined in step S5 that the level is appropriate, the CPU 13 supplies an output selection signal for selecting and outputting the data values in the memories 35A and 35B to the output selection unit 44, and the data values in the memories 35A and 35B. Is read out via the output circuit 45 and taken into the RAM (step S7).

  Next, the CPU 13 performs a focus calculation (calculation of a defocus amount as a focus adjustment state according to a phase difference detection method) based on the data values of the memories 35A and 35B read in step S7 (step S8). .

  Thereafter, the CPU 13 supplies a focus adjustment signal to the motor 14, operates the motor 14 so as to be in focus according to the defocus amount obtained in step S8, and performs automatic focus adjustment (step S9). Thereby, the AF operation ends.

  The determination unit 51 corresponds to step S5, the setting unit 52 corresponds to step S6, the control unit 53 corresponds to step S2, and the focus calculation unit 54 corresponds to step S8. The functions of the determination unit 51, the setting unit 52, and the control unit 53 of the CPU 13 and the AF sensor chip 12 constitute a sensor device according to an embodiment of the present invention. A focus detection apparatus according to an embodiment of the present invention is configured by adding the function as the focus calculation unit 54 of the CPU 13 to this.

  Here, a specific example of appropriateness determination in step S5 and resetting in step S6 will be described with reference to FIG. FIG. 5A is a diagram showing an example of the signal level of the output signal after amplification of each photoelectric conversion element 31a of the photoelectric conversion element array unit 31A, and also shows examples of the saturation level Ls and the reference level L. Yes. In the example shown in FIG. 5A, the output signals after amplification of some of the photoelectric conversion elements 31a are saturated. Since the signal level is limited to the saturation level Ls at the maximum, the signal level does not actually become larger than the saturation level Ls. However, in order to facilitate understanding, in FIG. The signal level can be higher than the saturation level Ls. This also applies to FIG. 9A described later. FIG. 5B is a diagram illustrating an example of the frequency (%) of the photoelectric conversion element 31a of the signal level with respect to each signal level of the output signal after amplification of each photoelectric conversion element 31a of the photoelectric conversion element array unit 31A. Yes, examples of the saturation level Ls and the reference level L are also shown.

  In the present embodiment, in step S5, the CPU 13 determines that when the count value of the counter 42 is 1 or more (that is, when saturation is detected. For example, in the case of the line 101 in FIG. 5B), It determines with the data value memorize | stored in the memory 35A not being an appropriate level, and transfers to step S6. This is because if the output signals after amplification of some of the photoelectric conversion elements 31a are saturated, the photometric information is lost there, so that such data values are not used in order to perform photometry with high accuracy. This is because it is preferable.

  In this case, in step S6, the CPU 13 assumes that the gain of the amplifier 33A is not changed as it is next time, and the count value of the counter 38 (that is, the photoelectrical value for the total number of photoelectric conversion elements 31a in the photoelectric conversion element array unit 31A). The next charge accumulation time is calculated and set from the ratio of the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L among all the photoelectric conversion elements 31a of the conversion element array unit 31A. Specifically, for example, when the reference level L is 1/2 of the saturation level Ls, if the ratio is 50% or more, the next charge accumulation time is set to 1/4 of the current charge accumulation time, If the ratio is less than 50%, the next charge accumulation time is set to the current half. In this way, by setting the next charge accumulation time according to the ratio, it is possible to drive the signal level of the output signal to a desired appropriate level with a small number of charge accumulation operations. Here, the description has been made on the assumption that the gain of the amplifier 33A is not changed at the next time but only the next charge accumulation time is changed, but the next amplifier 33A is obtained so as to obtain an equivalent signal level adjustment effect. It is also possible to change only the first gain, or to change both the gain of the next amplifier 33A and the next charge accumulation time. However, in order to shorten the time required to finally obtain a data value of an appropriate level, the charge accumulation time and gain are set so that the charge accumulation time is as short as possible as long as an equivalent signal level adjustment effect is obtained. It is preferable.

  In the present embodiment, in step S5, the CPU 13 determines that the count value of the counter 42 is zero (that is, there is no saturation) and the count value of the counter 38 is 1 or more (that is, a photoelectric conversion element). In the case where there is one or more photoelectric conversion elements 31a in which the signal level of the amplified output signal is equal to or higher than the reference level L among the photoelectric conversion elements 31a of the array unit 31A (for example, the line 102 in FIG. 5B) In this case, it is determined that the data value stored in the memory 35A is at an appropriate level, and the process proceeds to step S7.

  Further, in the present embodiment, in step S5, the CPU 13 determines that the count value of the counter 42 is zero (that is, there is no saturation) and the count value of the counter 38 is zero (that is, the photoelectric conversion element array). In the case where there is no photoelectric conversion element 31a in which the signal level of the amplified output signal is equal to or higher than the reference level L among the photoelectric conversion elements 31a of the unit 31A (for example, the case of the line 103 in FIG. 5B) ), It is determined that the data value stored in the memory 35A is not at an appropriate level, and the process proceeds to step S6.

  In this case, in step S6, assuming that the gain of the amplifier 33A remains unchanged at the next time, the CPU 13 sets the next charge accumulation time by a predetermined amount longer than the current charge accumulation time. For example, the next charge accumulation time is set to twice the current charge accumulation time. Here, the description has been made on the assumption that the gain of the amplifier 33A is not changed at the next time but only the next charge accumulation time is changed, but the next amplifier 33A is obtained so as to obtain an equivalent signal level adjustment effect. It is also possible to change only the first gain, or to change both the gain of the next amplifier 33A and the next charge accumulation time.

  According to the present embodiment, the count value of the counter 38 (that is, the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L among all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A). Based on this, it is determined whether or not the data value is appropriate (step S5). If the data value is not appropriate, the charge accumulation time and gain of the next charge accumulation operation are set based on the count value (step S5). S6). Therefore, in the present embodiment, the monitor sensor signal (that is, a signal corresponding to the average of the output signals of the photoelectric conversion elements in the photoelectric conversion element array section) as in the first conventional sensor device. Based on whether the data value is appropriate, or when the data value is not appropriate, it is more appropriate than when setting the charge accumulation time and gain of the next charge accumulation operation based on the monitor sensor signal A level output signal can be obtained.

  Here, the camera by the comparative example compared with the camera 1 by this Embodiment is demonstrated. This comparative example is different from the present embodiment in that the reference level generation unit 36, the digital comparator 37, the counter 38, and the saturation detection unit 39 are removed from the AF sensor chip 12, as shown in FIG. The AF operation shown in FIG. 6 is performed instead of the AF operation, and the functions of the determination unit 51 and the setting unit 52 that the CPU 13 serves are different.

  FIG. 6 is a schematic flowchart showing the AF operation of the camera according to this comparative example. In this comparative example, when the AF operation is started, the same operations of steps S11 and S12 as steps S1 and S2 in FIG. 4 are performed, respectively, and the process proceeds to step S13.

  In step S13, as in step S3 in FIG. 4, the data values AD-converted by the AD converters 34A and 34B are written in the memories 35A and 35B, respectively. In this comparative example, since the reference level generator 36, the digital comparator 37, and the counter 38 are removed, the comparison with the reference level L and the counting operation based on the comparison result are not performed. In this comparative example, since the saturation detection unit 39 is removed, the saturation detection operation by the saturation detection unit 39 is not performed in step S13.

  Thereafter, instead of step S4 in FIG. 4, the CPU 13 supplies an output selection signal for selecting and outputting the data values of the memories 35A and 35B to the output selection unit 44, and the data values of the memories 35A and 35B are supplied. The data is read out via the output circuit 45 and taken into the RAM (step S14).

  Next, the CPU 13 compares the data values fetched into the RAM in step S14 with each other and detects the highest value (peak value) among them (step S15). This peak value is the highest signal level value among the signal levels of the amplified output signals of all the photoelectric conversion elements 31a of the photoelectric conversion element array section 31A.

  Next, based on the peak value detected in step S15, the CPU 13 determines whether or not the data value stored in the memory 35A by the current charge accumulation operation and read in step S14 is at an appropriate level ( Step S16). At this time, the CPU 13 detects saturation based on the peak value detected in step S15 (here, when the peak value is the saturation level Ls, the output after amplification by the amplifier 33A is saturated). ).

  If it is determined in step S16 that the level is not appropriate, the CPU 13 determines the data value obtained by the next charge accumulation operation based on the peak value detected in step S15 and the currently set charge accumulation time and gain. The next charge accumulation time and the gain of the amplifier 33A are set to values close to or at an appropriate level (step S17), and the process returns to step S12. The operations in steps S17 and S12 to S15 are repeated until it is determined in step S16 that the level is appropriate.

  If it is determined in step S16 that the level is appropriate, the CPU 13 performs focus calculation (focus adjustment state according to the phase difference detection method) based on the data values of the memories 35A and 35B that are most recently fetched in the RAM in step S14. Is calculated) (step S18).

  Thereafter, the CPU 13 supplies a focus adjustment signal to the motor 14, operates the motor 14 so as to be in focus according to the defocus amount obtained in step S18, and performs automatic focus adjustment (step S19). Thereby, the AF operation ends.

  Here, a specific example of the appropriateness determination in step S16 and the resetting in step S17 will be described. In this comparative example, in step S16, when the peak value detected in step S15 is the saturation level Ls (in the saturated state), the CPU 13 stores the current value in the memory 35A by the current charge accumulation operation, and in step S14. It is determined that the read data value is not at an appropriate level, and the process proceeds to step S17.

  In this case, in step S17, assuming that the gain of the amplifier 33A remains unchanged at the next time, the CPU 13 sets the next charge accumulation time by a predetermined amount shorter than the current charge accumulation time. For example, it is set to 1/2 of the current charge accumulation time. Here, the description has been made on the assumption that the gain of the amplifier 33A is not changed at the next time but only the next charge accumulation time is changed, but the next amplifier 33A is obtained so as to obtain an equivalent signal level adjustment effect. It is also possible to change only the first gain, or to change both the gain of the next amplifier 33A and the next charge accumulation time.

  In this comparative example, in step S16, the CPU 13 determines that the peak value detected in step S15 is not the saturation level Ls (that is, there is no saturation), and the peak value detected in step S15 is greater than or equal to a predetermined value. In this case, it is determined that the data value stored in the memory 35A by the current charge accumulation operation and read in step S14 is an appropriate level, and the process proceeds to step S18.

  Further, in this comparative example, in step S16, when the peak value detected in step S15 is smaller than the predetermined value, the CPU 13 stores the current value in the memory 35A by the current charge accumulation operation and reads it in step S14. The determined data value is not at an appropriate level, and the process proceeds to step S17.

  In this case, in step S17, the CPU 13 sets the next charge accumulation time longer than the current charge accumulation time according to the ratio between the peak value detected in step S15 and the target signal amount. For example, the next charge accumulation time is set to a value obtained by multiplying the current charge accumulation time by [target peak value] × [reciprocal of the ratio of the peak value detected in step S15 to the saturation level Ls]. Here, the description has been made on the assumption that the gain of the amplifier 33A is not changed at the next time but only the next charge accumulation time is changed, but the next amplifier 33A is obtained so as to obtain an equivalent signal level adjustment effect. It is also possible to change only the first gain, or to change both the gain of the next amplifier 33A and the next charge accumulation time.

  In this comparative example, every time the charge accumulation operation is performed, the data value is read in step S14 and the peak value is detected in step S15.

  A large amount of processing is required to detect the peak value in step S15. This is because in order to detect the peak value in step S15, it is necessary to compare all data values with each other, and the data values are, for example, 10 to 12 bits, and the amount of data to be compared is large. Therefore, in this comparative example, every time the charge accumulation operation is performed, the detection of the peak value in step S15 is always performed. Therefore, the CPU 13 is occupied to perform the processing, and the CPU 13 should perform it. Other processing (control of the entire camera and other processing) may be hindered.

  Further, when all the data values in the memory 35A are transferred to the CPU 13 via the output circuit 45 in step S14, since each data value is, for example, 10 to 12 bits, the amount of data to be transferred is large. Takes time. Accordingly, in this comparative example, the data value is always read out (data transfer) in step S14 every time the charge accumulation operation is performed, so that the time until finally obtaining a data value of an appropriate level is obtained. It will be long.

  On the other hand, in this embodiment, instead of detecting the peak value, every time the charge accumulation operation is performed, the count value of the counter 38 (that is, all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A). Among them, the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L) is obtained, and the count value is used for appropriate determination of the data value and the next charge accumulation time and gain setting. In obtaining the count value, the data value is compared with the reference level L, and not all data values are compared with each other, so the amount of processing is very small. In addition, in the present embodiment, the count value of the counter 38 is acquired in the AF sensor chip 12 and not in the CPU 13. Therefore, according to the present embodiment, there is no possibility that other processing (control of the entire camera and other processing) to be performed by the CPU 13 will be hindered. In addition, since the comparison by the digital comparator 37 and the count of the counter 38 are performed in the AF sensor chip 12, it goes without saying that the CPU 13 can perform another process during this time.

  Further, in the present embodiment, even when the charge accumulation operation is repeated (when determined to be “inappropriate” at least once in step S16), the count value of the counter 38 is passed through the output circuit 45 every time. It is only transferred to the CPU 13 (see step S4), and all data values in the memory 35A are only transferred to the CPU 13 via the output circuit 45 only once at the end. Therefore, according to the present embodiment, the data amount of the count value of the counter 38 (the maximum is the total number of photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A) is the data amount of all the data values in the memory 35A. Therefore, the total time required for data transfer through the output circuit 45 is shortened. Therefore, according to the present embodiment, the time until the data value of the appropriate level is finally obtained is shorter than in the comparative example.

  In the present embodiment, fixed gain amplifiers may be used in place of the variable gain amplifiers 33A and 33B, respectively, or the output signals from the drive readout circuits 32A and 32B are AD converted by removing the variable gain amplifiers 33A and 33B. Each of the devices 34A and 34B may be directly input. These points are the same for each embodiment described later.

[Second Embodiment]
FIG. 7 is a schematic flowchart showing the AF operation of the camera according to the second embodiment of the present invention. In FIG. 7, steps that are the same as or correspond to steps in FIGS. 4 and 6 are given the same reference numerals, and redundant descriptions thereof are omitted.

  The difference between the present embodiment and the first embodiment is that after step S3, the CPU 13 determines whether or not the CPU 13 has a surplus of a predetermined level or more (step S21), and determines that there is no surplus. If it is determined, the process proceeds to step S4, whereas if it is determined that there is a surplus capacity, the process proceeds to step S14. After step S17, the process returns to step S2.

  Whether or not the CPU 13 has a predetermined capacity or more is determined depending on, for example, whether or not the CPU 13 is in a command waiting state and whether or not the usage rate of the CPU 13 is a predetermined value or less. it can.

  According to the present embodiment, when the CPU 13 does not have a surplus capacity of a predetermined level or more, as in the first embodiment, based on the count value of the counter 38, the appropriate determination of the data value and the charge accumulation time When the CPU 13 has a remaining capacity of a predetermined level or more while the gain is reset, as in the comparative example, on the basis of the peak value, the appropriate determination of the data value, the charge accumulation time, and the gain Reconfiguration is performed.

  Therefore, according to the present embodiment, when the CPU 13 does not have a predetermined margin or more, the same advantage as the first embodiment can be obtained, while the CPU 13 has a predetermined margin or more. Therefore, it is possible to obtain data of an appropriate level with higher accuracy than in the first embodiment. In the present embodiment, the proper determination of the data value and the resetting of the charge accumulation time and the gain are performed based on the peak value when the CPU 13 has a predetermined capacity or more, which is a photoelectric conversion. This is a case where a relatively large amount of processing is allowed as the amount of processing related to determining whether or not the output signals after amplification of the plurality of photoelectric conversion elements in the element array section are at an appropriate level. Therefore, according to the present embodiment, unlike the comparative example, there is no possibility that other processing (control of the entire camera or other processing) to be performed by the CPU 13 will be hindered.

[Third Embodiment]
FIG. 8 is a schematic block diagram showing the AF sensor chip 12 and CPU 13 of the camera according to the third embodiment of the present invention, and corresponds to FIG. 8, elements that are the same as or correspond to those in FIG. 3 are given the same reference numerals, and redundant descriptions thereof are omitted.

  The difference between the present embodiment and the first embodiment is that the first embodiment is configured to use one reference level L, whereas in the present embodiment, there are two The reference level L1, L2 (L2 <L1 <Ls) is used. That is, in the present embodiment, in the AF sensor chip 12, two sets (reference level generation unit 136, reference level generation unit 136, equivalent to the reference level generation unit 36, digital comparator 37, and counter 38 in FIG. A set of a digital comparator 137 and a counter 138 and a set of a reference level generator 236, a digital comparator 237 and a counter 238).

  The reference level generation unit 136 generates a reference level L1, and the reference level generation unit 236 generates a reference level L2. The counters 138 and 238 count the two reference levels L1 and L2 by counting the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level among all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A. Part. The count value of the counter 138 is the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L1 (inversely, may be equal to or lower than the reference level L1) among all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A. Indicates. The count value of the counter 238 is the number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L2 (inversely, may be equal to or lower than the reference level L2) among all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A. Indicates.

  In the present embodiment, the count values of the counters 138 and 238 are obtained instead of the count value of the counter 38 in step S3 in FIG. In step S4 in FIG. 4, instead of the count value of the counter 38, the count values of the counters 138 and 238 are read.

  Further, in the present embodiment, the data stored in the memory 35A by the current charge accumulation operation based on the count values of the counters 138 and 238 instead of the count value of the counter 38 in step S5 in FIG. It is determined whether or not the value is at an appropriate level. In step S6 in FIG. 4, instead of the count value of the counter 38, based on the count values of the counters 138 and 238, the data value obtained by the next charge accumulation operation approaches the appropriate level or becomes the appropriate level. The next charge accumulation time and the gain of the amplifier 33A are set.

  FIG. 9A is a diagram illustrating an example of the signal level of the output signal after amplification of each photoelectric conversion element 31a of the photoelectric conversion element array unit 31A, and also includes examples of the saturation level Ls and the reference levels L1 and L2. Show. FIG. 9B is a diagram illustrating an example of the frequency (%) of the photoelectric conversion element 31a of the signal level with respect to each signal level of the output signal after amplification of each photoelectric conversion element 31a of the photoelectric conversion element array unit 31A. Yes, examples of the saturation level Ls and the reference levels L1 and L2 are also shown.

  According to the present embodiment, the same advantages as those of the first embodiment can be obtained, and two reference levels L1 and L2 are used. Therefore, compared with the first embodiment, FIG. The accuracy of determining the appropriate level of the data value in step S5 can be improved, and the next charge storage time and gain determination accuracy in step S6 in FIG. 4 can be improved.

  Note that the next charge accumulation time and gain determination in step S6 in FIG. 4 is performed by, for example, a count value above the reference level L1 (count value of the counter 138) and a count value above the reference level L2 (count value of the counter 238). ) Or a count value above the reference level L1 (count value of the counter 138) and a count value above the reference level L2 (the count value of the counter 238) without using such a difference. ).

  In the present invention, instead of using two reference levels, three or more reference levels may be used.

  In addition, the second embodiment may be modified to use two or more reference levels L in the same manner as the first embodiment is obtained by modifying the first embodiment.

[Fourth Embodiment]
FIG. 10 is a schematic block diagram showing the AF sensor chip 12 and CPU 13 of the camera according to the fourth embodiment of the present invention, and corresponds to FIG. 10, elements that are the same as or correspond to those in FIG. 8 are given the same reference numerals, and redundant descriptions thereof are omitted.

  This embodiment differs from the third embodiment in that two reference levels L1 and L2 are used as in the third embodiment while reducing the number of digital comparators and counters. It is a point that is configured.

  In the present embodiment, instead of the reference level generation units 136 and 236, a variable reference level generation unit 336 that variably outputs one of the two reference levels L1 and L2 according to a reference level setting signal from the CPU 13, Is provided. In this embodiment, one digital comparator 337 is provided instead of the two digital comparators 137 and 237. In the present embodiment, one counter 338 is provided instead of the two counters 138 and 238. Furthermore, in this embodiment, a switch 301 and a memory 302 are added.

  The switch 301 switches between the output of the AD converter 34 </ b> A and the output of the memory 35 </ b> A according to the timing control signal from the timing control unit 46, and connects to one input terminal of the digital comparator 37.

  When the data values are sequentially output from the AD converter 34A and stored in the memory 35A, the variable reference level generation unit 336 supplies the reference level L1 to the digital comparator 337, and the switch 301 is AD. The output of the converter 34A is connected to the input terminal of the digital comparator 337. At this time, the counter 338 performs a counting operation according to the comparison result between the reference level L1 by the digital comparator 337 and the output (data value) of the AD converter 34A, and all the photoelectric conversion elements of the photoelectric conversion element array unit 31A. The number of photoelectric conversion elements 31a whose data value is equal to or higher than the reference level L1 among 31a is counted, and this count value indicating the number (same as the count value of the counter 138 in FIG. 8) is stored in the memory 302. .

  Next, the variable reference level generation unit 336 supplies the reference level L2 to the digital comparator 337, and the switch 301 connects the output of the memory 35A to the input terminal of the digital comparator 337. At this time, the data value in the memory 35A is sequentially supplied to the input terminal of the digital comparator 337 via the switch 301, and the counter 338 compares the reference level L2 with the data value in the memory 35A by the digital comparator 337. This count value indicating the number of the photoelectric conversion elements 31a having a data value equal to or higher than the reference level L2 among all the photoelectric conversion elements 31a of the photoelectric conversion element array section 31A is counted. (Same as the count value of the counter 238 in FIG. 8) is stored in the memory 302.

  In step S14 in FIG. 4, the two count values stored in the memory 302 are selected by the output selection unit 44 and supplied to the CPU 13 via the output circuit 45.

  This embodiment can provide the same advantages as those of the third embodiment. Further, according to the present embodiment, the number of digital comparators and counters can be reduced as compared with the third embodiment.

  Note that the switch 301 may be removed, and the output of the memory 302 may always be connected to the input terminal of the digital comparator 337. In this case, the comparison with the reference level L2 and the counting based on the comparison result may be performed after the output value of the AD converter 34A is stored in the memory 302.

  In addition, the variable reference level generation unit 336 is configured to variably output one of the three or more reference levels, and the digital comparator 337 and the counter 338 compare each of the three or more reference levels. If counting is performed, three or more reference levels can be used.

[Other variations]
As mentioned above, although each embodiment of this invention and its modification were demonstrated, this invention is not limited to them.

  For example, in each of the embodiments described above, the AF sensor chip 12 is provided with a pair of photoelectric conversion element array portions 31A and 31B. However, a plurality of pairs of photoelectric conversion element array portions may be provided. An example is shown in FIG. FIG. 11A is a diagram schematically illustrating another example of the field mask pattern (ranging fields VIW1 to VIW4), and FIG. 11B illustrates four pairs of photoelectric conversion element arrays corresponding to the field mask pattern. It is a figure which shows the example of a part typically. The pair of photoelectric conversion element array portions 71A and 71B corresponds to the distance measuring field VIW1, and the pair of photoelectric conversion element array portions 72A and 72B corresponds to the distance measurement field VIW2, and the pair of photoelectric conversion element array portions 73A, 73A, 73B corresponds to the distance measuring field VIW3, and the pair of photoelectric conversion element array parts 74A and 74B corresponds to the distance measuring field VIW4. The present invention can also be applied to those having a plurality of pairs of photoelectric conversion element arrays.

  In each of the above embodiments, the output signals of all the photoelectric conversion elements 31a of the photoelectric conversion element array unit 31A are converted into the focus calculation of the focus calculation unit 54, the appropriate determination of the determination unit 51, and the charge accumulation time of the setting unit 52. Used to set the gain. However, in the present invention, depending on the focus detection mode or the like, the CPU 13 selects a part of the two or more photoelectric conversion elements 31a in the photoelectric conversion element array unit 31A, and the selected part of the two or more photoelectric conversion elements. The output signal of the conversion element 31a may be used for the focus calculation of the focus calculation unit 54, the appropriateness determination of the determination unit 51, and the charge accumulation time and gain setting of the setting unit 52.

  For example, in the predetermined focus detection mode, the upper half photoelectric conversion element 31a in FIG. 3 of the photoelectric conversion element array section 31A and the upper half photoelectric conversion element 31b in FIG. 3 of the photoelectric conversion element array section 31B are selected. The output signal of the upper half photoelectric conversion element 31a and the output signal of the upper half photoelectric conversion element 31b are used for the focus calculation of the focus calculation unit 54, and the output signal of the upper half photoelectric conversion element 31a is used by the determination unit 51 as appropriate. In other predetermined focus detection modes, the photoelectric conversion element 31a and the photoelectric conversion element array in the lower half of the photoelectric conversion element array part 31A in FIG. 3 are used for determination and setting of the charge accumulation time and gain of the setting unit 52. The lower half photoelectric conversion element 31b in FIG. 3 of the unit 31B is selected, and the output signal of the lower half photoelectric conversion element 31a and the output of the lower half photoelectric conversion element 31b Is used for the focus calculation of the focus calculation unit 54, and the output signal of the photoelectric conversion element 31a in the lower half is used for proper determination of the determination unit 51 and charge setting time and gain setting of the setting unit 52. Good. In this case, for example, in the predetermined focus detection mode, timing control such that the drive readout circuits 32A and 32B sequentially read out only the output signal of the upper half photoelectric conversion element 31a and the output signal of the upper half photoelectric conversion element 31b, respectively. The CPU 13 supplies a control signal to the timing control unit 46 so that the signal is generated by the timing control unit 46. In the other predetermined focus detection mode, the drive readout circuits 32A and 32B are the lower half photoelectric conversion elements 31a. The CPU 13 only needs to supply the control signal to the timing control unit 46 so that the timing control unit 46 generates a timing control signal that sequentially reads only the output signal and the output signal of the lower half photoelectric conversion element 31b. .

  In each of the above embodiments, the output signal of the photoelectric conversion element 31a of the photoelectric conversion element array unit 31A is used for proper determination of the determination unit 51 and setting of the charge accumulation time and gain of the setting unit 52. The output signal of the photoelectric conversion element 31b of the conversion element array unit 31B is not used for the proper determination of the determination unit 51 and the charge accumulation time and gain setting of the setting unit 52. However, in the present invention, not only the output signal of the photoelectric conversion element 31a of the photoelectric conversion element array unit 31A but also the output signal of the photoelectric conversion element 31b of the photoelectric conversion element array unit 31B is used for the appropriate determination and setting unit 52 of the determination unit 51. It may be used to set the charge accumulation time and gain. In this case, for example, in FIG. 1, elements corresponding to the elements 36 to 42 provided for the output of the AD converter 34A are provided for the output of the AD converter 34B, and the first embodiment is performed. Instead of the count value of the counter 38 in the embodiment, the total value of the count value of the counter 38 and the count value of the counter provided on the AD converter 34B side corresponding to the counter 38 is used, and in the first embodiment, Instead of the saturation detection signal of the saturation detection unit 39, an OR signal between the saturation detection signal of the saturation detection unit 39 and the saturation detection signal of the saturation detection unit provided on the AD converter 34B side corresponding to the saturation detection unit 39 is used. That's fine.

  Further, in each of the above embodiments, the elements after the AD converters 34A, 34B (for example, the elements 34A, 34B, 35A, 35B, 36 to 46 in FIG. 1) are provided in the AF sensor chip 12. These elements may be arranged outside the AF sensor chip 12.

  Furthermore, each of the above embodiments is an example in which the sensor device according to the present invention is used for a focus detection device. However, the sensor device according to the present invention is not limited to the focus detection device, and can be applied to various sensor devices including a photoelectric conversion element array section having a plurality of photoelectric conversion elements.

  For example, the sensor device according to the present invention can also be applied to an AE (automatic exposure) detection device including a photoelectric conversion element array unit having a plurality of photoelectric conversion elements, and a camera including the AE detection device is also applicable. It is within the scope of the present invention. Hereinafter, a camera according to the fifth embodiment of the present invention will be described as an example of the camera.

[Fifth Embodiment]
FIG. 12 is a schematic block diagram showing the AE sensor chip 412 and CPU 13 of the camera according to the fifth embodiment of the present invention.

  In the camera according to the present embodiment, the AE sensor chip 412 is used as the photometry unit 9 forming the AE detection unit in the camera according to the first embodiment, and the determination unit 451 and setting unit 452 described later by the CPU 13 are used. And it is comprised so that the function as a control part 453 may also be borne. The functions of the determination unit 451, the setting unit 452, and the control unit 453 of the CPU 13 and the AE sensor chip 412 constitute an AE detection device as a sensor device according to an embodiment of the present invention.

  The AE sensor chip 412 includes a photoelectric conversion element array unit 431, a drive readout circuit 432, a variable gain amplifier 433, and AD conversion corresponding to the elements 31A, 32A, 33A, 34A, 35A, and 36 to 45 in FIG. 434, memory 435, reference level generation unit 436, digital comparator 437, counter 438, saturation detection unit 439, saturation level generation unit 440, digital comparator 441, counter 442, output unit 443, output selection unit 444, output circuit 445 and timing control unit 446. Since these perform the same operations as the corresponding elements in FIG. 3, the description thereof is omitted. The photoelectric conversion element array unit 431 includes a plurality of photoelectric conversion elements 431a corresponding to the plurality of photoelectric conversion elements 31a of the photoelectric conversion element array unit 31 in FIG. The image sensor 10 is two-dimensionally arranged in a region corresponding to the whole or a part of the field of view.

  In the present embodiment, the CPU 13 also functions as a determination unit 451, a setting unit 452, and a control unit 453 corresponding to the determination unit 51, the setting unit 52, and the control unit 53 in FIG. Since these units 451 to 453 perform the same operations as the corresponding units 51 to 53 in FIG. Note that the data value read from the memory 435 as being at an appropriate level in a step (not shown) corresponding to step S7 in FIG. 4 is used for well-known automatic exposure control as AE photometric data.

  In the present invention, the AE sensor in the present embodiment is modified in the same manner as the first to third embodiments and their modifications obtained by modifying the first embodiment. The chip 412 may be applied as appropriate. In the present embodiment, a known AF sensor may be used in this embodiment instead of using the AF sensor chip 12.

DESCRIPTION OF SYMBOLS 1 Camera 12 AF sensor chip 32A, 32B Photoelectric conversion element array part 32a, 32b Photoelectric conversion element 33A, 33B Variable gain amplifier 34A, 34B AD converter 35A, 35B Memory 38 Counter 39 Saturation detection part 43 Output part 51 Determination part 52 Setting unit 53 Control unit 412 Sensor chip for AE

Claims (15)

A photoelectric conversion element array section having a plurality of photoelectric conversion elements;
For each of the one or more reference levels, among two or more photoelectric conversion elements of the plurality of photoelectric conversion elements, the number of photoelectric conversion elements whose output is equal to or higher than the reference level or lower than the reference level A counting unit for counting
A determination unit that determines whether the output is at an appropriate level based on the count value counted by the count unit;
A sensor device comprising: An amplifying unit for amplifying the outputs of the plurality of photoelectric conversion elements by the current charge accumulation operation,
For each of the one or more reference levels, the count unit has an output amplified by the amplification unit of the two or more photoelectric conversion elements of the plurality of photoelectric conversion elements that is greater than or equal to the reference level. Count the number of photoelectric conversion elements that are or below the reference level,
The determination unit determines whether the output amplified by the amplification unit is at an appropriate level based on the count value counted by the counting unit.
The sensor device according to claim 1. Based on the count value, a setting unit for setting the next charge accumulation time, or the next charge accumulation time and the gain of the amplification unit,
A control unit that controls the photoelectric conversion element array unit to perform a next charge accumulation operation with the charge accumulation time set by the setting unit when the determination unit determines that the level is not appropriate;
The sensor device according to claim 1, further comprising: An AD converter that AD converts the outputs of the two or more photoelectric conversion elements or the outputs of the two or more photoelectric conversion elements amplified by the amplifier;
A storage unit for storing an output value AD-converted by the AD conversion unit;
With
The determination unit determines whether or not the output value currently stored in the storage unit is an appropriate level based on the count value.
The sensor device according to claim 3.   5. The sensor device according to claim 4, further comprising an output unit that outputs an output value stored in the storage unit at this time only when the determination unit determines that the level is appropriate. A photoelectric conversion element array section having a plurality of photoelectric conversion elements;
An AD conversion unit for AD converting the outputs of the two or more photoelectric conversion elements;
A storage unit for storing an output value AD-converted by the AD conversion unit;
With respect to each of the one or more reference levels, of the two or more photoelectric conversion elements of the plurality of photoelectric conversion elements, the output of the photoelectric conversion element whose output is equal to or higher than the reference level or lower than the reference level A counting unit for counting the number;
Whether the output value stored this time in the storage unit is an appropriate level based on the count value when the CPU does not have a surplus capacity of a predetermined level or more. And determining that the output value currently stored in the storage unit is at an appropriate level based on the peak value of the output values stored in the storage unit at this time when the CPU has a remaining capacity equal to or greater than the predetermined level. A determination unit for determining whether or not
When the CPU does not have a surplus more than the predetermined level, the next charge accumulation time is set based on the count value counted by the counting unit, and the CPU has a surplus power greater than the predetermined level. A setting unit for setting a next charge accumulation time based on a peak value of the output values stored in the storage unit this time;
A control unit that controls the photoelectric conversion element array unit to perform a next charge accumulation operation with the charge accumulation time set by the setting unit when the determination unit determines that the level is not appropriate;
An output unit that outputs the output value currently stored in the storage unit only when it is determined by the determination unit that it is at an appropriate level when the CPU does not have a surplus capacity greater than the predetermined level; and
With
The CPU performs a predetermined process other than the process as the determination unit. A photoelectric conversion element array section having a plurality of photoelectric conversion elements;
An amplifying unit for amplifying the outputs of the plurality of photoelectric conversion elements by the current charge accumulation operation;
An AD converter that AD converts the outputs of the two or more photoelectric conversion elements amplified by the amplifier;
A storage unit for storing an output value AD-converted by the AD conversion unit;
Regarding each of the one or more reference levels, the output amplified by the amplifying unit among the two or more photoelectric conversion elements of the plurality of photoelectric conversion elements is equal to or higher than the reference level or lower than the reference level. A counting unit that counts the number of photoelectric conversion elements,
Whether the output value stored this time in the storage unit is an appropriate level based on the count value when the CPU does not have a surplus capacity of a predetermined level or more. And determining that the output value currently stored in the storage unit is at an appropriate level based on the peak value of the output values stored in the storage unit at this time when the CPU has a remaining capacity equal to or greater than the predetermined level. A determination unit for determining whether or not
When the CPU does not have a surplus capacity equal to or greater than the predetermined level, the CPU sets a next charge accumulation time and a gain of the amplifying unit based on the count value counted by the count unit. A setting unit for setting the next charge accumulation time and the gain of the amplifying unit, based on the peak value of the output values stored in the storage unit this time,
A control unit that controls the photoelectric conversion element array unit to perform a next charge accumulation operation with the charge accumulation time set by the setting unit when the determination unit determines that the level is not appropriate;
An output unit that outputs the output value currently stored in the storage unit only when it is determined by the determination unit that it is at an appropriate level when the CPU does not have a surplus capacity greater than the predetermined level; and
With
The CPU performs a predetermined process other than the process as the determination unit. The photoelectric conversion element array unit, the count unit, the AD conversion unit, the storage unit, and the output unit are provided on the same chip, or the photoelectric conversion element array unit, the amplification unit, the count unit, The AD conversion unit, the storage unit, and the output unit are provided on the same chip,
The sensor device according to claim 5, wherein the determination unit and the setting unit are provided outside the chip. The one or more reference levels are two or more reference levels;
A comparison unit that sequentially compares the output values stored in the storage unit with the two or more reference levels that are sequentially supplied;
The sensor device according to claim 4, wherein the count unit counts the number according to a comparison result by the comparison unit. A comparison unit that compares the output value AD-converted by the AD conversion unit with the reference level before being stored in the storage unit;
The sensor device according to claim 4, wherein the count unit counts the number according to a comparison result by the comparison unit. An output of any one of the two or more photoelectric conversion elements, or an output after amplification by the amplification unit of any one of the two or more photoelectric conversion elements, It has a saturation detector that detects that it is saturated,
The determination unit determines that the output value stored this time in the storage unit is not an appropriate level when the saturation is detected by the saturation detection unit,
The sensor device according to claim 4, wherein the sensor device is a sensor device.   12. The sensor device according to claim 1, further comprising means for variably selecting the two or more photoelectric conversion elements from the plurality of photoelectric conversion elements.   A focus detection apparatus comprising the sensor apparatus according to claim 1.   An AE detection device comprising the sensor device according to claim 1.   A camera comprising at least one of the focus detection device according to claim 13 and the detection device for AE according to claim 14.

Images