JP2012235265A - Image sensor and driving method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To count incident photons with low power consumption.SOLUTION: An image sensor comprises plural pixels. Each of the pixels comprises: a photoelectric conversion part which performs photoelectric conversion; a reference voltage holding capacitor; a differential amplifier in which two respective input nodes receive an output voltage from the photoelectric conversion part and a voltage of the reference voltage holding capacitor and which amplifies and outputs a voltage difference between the two input nodes; a reset circuit which resets the output voltage from the photoelectric conversion part to be a predetermined voltage; and a switch which is provided between the two input nodes of the differential amplifier and turns the voltage of the reference voltage holding capacitor to the output voltage from the photoelectric conversion part by conduction.

Description

  The present disclosure relates to an image sensor, and more particularly, to an image sensor that detects weak light.

  In CCD (charge-coupled device) and CMOS (complementary metal oxide semiconductor) image sensors, which are most widely used as image sensors, light is converted into electric charge by a photodiode for a certain period of time and then accumulated. Is transferred to the detection capacitor, and the voltage of this capacitor is generally transmitted outside the pixel as an analog signal. On the other hand, a photon count type image sensor that counts photons incident on a photodiode and transmits a signal as a digital value to the outside of the pixel has been proposed.

  For example, as described in Patent Document 1, in a photon-count type image sensor, when one photon is incident on a photodiode connected to a load resistor, a pulse signal is generated. The value increases by 1. Patent Document 2 describes an example in which a pulse signal is counted via an amplifier, or the pulse signal is further counted via a waveform shaper. Although the counter is preferably in the pixel, Patent Document 1 also describes an example in which the counter is arranged outside the pixel to reduce the pixel area.

  In such a photon count type image sensor, each pixel counts a signal from each photon and outputs a digitized signal. For this reason, unlike a CCD or CMOS image sensor, it is not affected by various noises until a signal from a pixel is transmitted outside the imaging apparatus. As a result, an image with a high signal-to-noise (SN) ratio can be taken.

JP-A-61-152176 (FIGS. 1 and 3) Japanese Patent Laying-Open No. 2004-193675 (FIG. 11)

  In the image sensors of Patent Documents 1 and 2, the voltage change e / C (e is a charge element) in which the charge generated by one photon incident on the photodiode is represented by a combined capacitance C of the capacitance of the photodiode and its parasitic capacitance. The amount is detected and the counter is operated. However, even if a photodiode with a small capacitance C is created by making full use of the microfabrication technology, the voltage change e / C is at most about 100 μV to 1 mV.

  Since the electric charge generated by the photon is immediately discharged to the power source through the resistor, the voltage fluctuation occurs transiently, but immediately returns to the steady state. It is difficult to directly drive the counter with such a weak and extremely short time transient signal. Although it is possible to operate the counter by amplifying such a weak signal by an amplifier circuit as in the above-described conventional example, it is expensive to amplify such a signal until the counter is operated. An amplifier circuit having an amplification factor and low output impedance is required. From the viewpoint of increasing power consumption and pixel area, it is extremely difficult to use such an amplifier circuit for a general image sensor.

  In addition, it is necessary to match the input range of each amplifier circuit to the output voltage range of the photodiode, but this is extremely difficult in consideration of variations in semiconductor elements. There is also a method of multiplying the signal from the photodiode by using an avalanche multiplication type photodiode as the photodiode, but generally the incident photons are not 100% avalanche multiplied, so the incident photons are accurately counted. I can't. There is also a problem that dark current increases because a high electric field is applied to the photodiode.

  An object of the present invention is to provide an image sensor that counts incident photons with low power consumption even if the characteristics of semiconductor elements vary.

  An image sensor according to the present disclosure is an image sensor having a plurality of pixels, and each of the plurality of pixels includes a photoelectric conversion unit that performs photoelectric conversion, a reference voltage holding capacitor, an output voltage of the photoelectric conversion unit, and the A voltage of a reference voltage holding capacitor is input to each of two input nodes, a differential amplifier that amplifies and outputs a voltage difference between the two input nodes, and an output voltage of the photoelectric conversion unit is reset to a predetermined voltage And a switch that is provided between the two input nodes of the differential amplifier and is turned on to set the voltage of the reference voltage holding capacitor to the output voltage of the photoelectric conversion unit.

  According to this, since the difference between the voltage of the photoelectric conversion unit before the photon is incident and the voltage of the photoelectric conversion unit after the photon incidence is differentially amplified, the period during which the output signal of the differential amplifier indicates the photon incidence is relatively long. long. For this reason, even if the output impedance of the differential amplifier is high, the differential amplifier can drive the counter in the subsequent stage. Therefore, the power consumption of the differential amplifier can be reduced.

  In the image sensor driving method according to the present disclosure, the photoelectric conversion unit, the reference voltage holding capacitor, the output voltage of the photoelectric conversion unit, and the voltage of the reference voltage holding capacitor are respectively input to two input nodes. A method of driving an image sensor having a plurality of pixels having a differential amplifier and a reset circuit, the step of resetting an output voltage of the photoelectric conversion unit to a predetermined voltage, and the two of the differential amplifiers A step of conducting between the input nodes by a switch to set the voltage of the reference voltage holding capacitor to an output voltage of the photoelectric conversion unit; a step of opening the switch; a step of the photoelectric conversion unit performing photoelectric conversion; A differential amplifier amplifying and outputting a voltage difference between the two input nodes.

  According to the present disclosure, it is possible to obtain a photon count type image sensor that counts incident photons with low power consumption even if the characteristics of semiconductor elements vary.

It is a block diagram which shows the structural example of the photon detection circuit of the image sensor which concerns on embodiment of this invention. 2 is a graph showing an example of input / output characteristics of the differential amplifier of FIG. 1. 2 is a timing chart showing an example of signals in the photon detection circuit of FIG. 1. It is a block diagram which shows the structural example of the photon detection part which concerns on embodiment of this invention. FIG. 5 is a block diagram illustrating a configuration example of a self-reset circuit in FIG. 4. It is a timing chart which shows the example of the signal in the photon detection part of FIG. It is a block diagram which shows the structural example of the pixel which concerns on embodiment of this invention. 8 is a timing chart showing an example of signals in the pixel of FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Components shown with the same reference numbers in the drawings are identical or similar components. As used herein, a connection represents a direct or indirect electrical connection.

  FIG. 1 is a block diagram illustrating a configuration example of a photon detection circuit 10 of an image sensor according to an embodiment of the present invention. This image sensor has, for example, a plurality of pixels arranged in a matrix, and each pixel has the photon detection circuit 10 of FIG. The output voltage of the photon detection circuit 10 is input to a counter, and the counter counts pulses of this output voltage. The count value of the counter is output as the value of this pixel.

  The photon detection circuit 10 in FIG. 1 includes a photodiode 12 as a photoelectric conversion unit, a reset transistor 14 as a reset circuit, and an amplification unit 30. The amplifying unit 30 includes a differential amplifier 20, a reset transistor 32, a reference voltage holding capacitor 34, and a switch transistor 36. The reset transistors 14 and 32 and the switch transistor 36 are NMOS (n-channel metal oxide semiconductor) transistors.

  The photodiode 12 is connected between the input node N1 of the differential amplifier 20 and the ground, and performs photoelectric conversion. Specifically, the photodiode 12 converts the input photons into fluctuations in the voltage (output voltage of the photodiode 12) at the high potential side terminal (input node N1). The reset transistor 14 is connected between the reset power supply PR and the input node N1. The reset transistor 14 is turned on by the pulse of the reset signal φVMR to reset the photodiode 12 to substantially the voltage of the reset power supply PR. The output voltage of the photodiode 12 is applied to the input node N1 of the differential amplifier 20. The reference voltage holding capacitor 34 is connected between the input node N2 of the differential amplifier 20 and the ground.

  Differential amplifier 20 amplifies and outputs a voltage difference between input node N1 and input node N2. The differential amplifier 20 includes load transistors 21 and 22, dual gate transistors 23 and 24, and a current source transistor 26. These transistors are all NMOS transistors. Each of the dual gate transistors 23 and 24 has a gate on the source side and a gate on the drain side. The gate on the source side of the dual gate transistor 23 is the input node N1, and the gate on the source side of the dual gate transistor 24 is the input node N2. The gate on the drain side of the dual gate transistor 23 is connected to the drain of the dual gate transistor 24. The gate on the drain side of the dual gate transistor 24 is connected to the drain of the dual gate transistor 23 and serves as an output node NO of the differential amplifier 20. In other words, positive feedback is applied.

  The source of the dual gate transistor 23 is connected to the source of the dual gate transistor 24. The two gates of the dual gate transistor 23 may be interchanged, and the two gates of the dual gate transistor 24 may be interchanged. The load transistor 21 is connected between the power source PDA and the drain of the dual gate transistor 23, and the load transistor 22 is connected between the power source PDA and the drain of the dual gate transistor 24. The current source transistor 26 is connected between the source of the dual gate transistor 23 and the ground.

  The switch transistor 36 is connected between the input node N1 and the input node N2, and is turned on by the pulse of the signal φVMC to reset the voltage of the reference voltage holding capacitor 34. That is, the switch transistor 36 causes the voltage at the input node N1 and the voltage at the input node N2 to be substantially equal. The reset transistor 32 is connected between the reset power supply PDR and the output node NO. Reset transistor 32 is turned on by a pulse of reset signal φVDR to reset the voltage at output node NO of differential amplifier 20.

  The reference voltage holding capacitor 34 holds the voltage of the photoelectric converter 12 before photon incidence, and the differential amplifier 20 differentially amplifies the difference between this voltage and the voltage of the photoelectric converter 12 after photon incidence. A slight change in the voltage of the photoelectric conversion unit 12 due to incidence can be detected. Since it is not affected by the variation of the elements constituting the differential amplifier 20, malfunction during photon detection can be prevented. Further, even when the output signal VO of the differential amplifier 20 shows a photon incidence becomes relatively long and the output impedance of the differential amplifier 20 is high, the differential amplifier 20 can drive the counter in the subsequent stage. Therefore, the power consumption of the differential amplifier 20 can be reduced.

  FIG. 2 is a graph showing an example of input / output characteristics of the differential amplifier 20 of FIG. 2 is the difference (input voltage difference) between the reference voltage (voltage of the node N2) VR and the input voltage VI (voltage of the node N1), and the vertical axis is the voltage of the output signal VO (output node NO). Voltage). As shown in FIG. 2, when the input voltage difference increases and reaches a predetermined threshold value VTH, the output signal VO changes from a low level to a high level. Further, when the input voltage difference decreases from this state and reaches a predetermined threshold value VTL, it changes from a high level to a low level. Thus, since the differential amplifier 20 has steep input / output characteristics having hysteresis, malfunction can be prevented. Also, the offset in FIG. 2 represents a threshold voltage shift due to asymmetry of the circuit due to variations in threshold values of transistors constituting the differential amplifier 20.

  Thus, the differential amplifier 20 has a waveform shaping function. For this reason, when the output signal VO of the differential amplifier 20 is used, it is possible to detect photons with few malfunctions. One of the gates of the dual gate transistor 23 is connected to the drain of the dual gate transistor 24, and one of the gates of the dual gate transistor 24 is connected to the drain of the dual gate transistor 23. Thereby, the waveform shaping function can be incorporated in the differential amplifier 20 without particularly increasing the number of elements, and the characteristics shown in FIG. 2 can be obtained.

  FIG. 3 is a timing chart showing an example of signals in the photon detection circuit 10 of FIG. When the reset signal φVMR becomes high level at time T1, the reset transistor 14 becomes conductive, and the voltage of the photodiode 12 is almost reset to the voltage of the reset power supply PR.

  When the reset signal φVDR becomes high level at time T2, the reset transistor 32 is turned on, and the differential amplifier 20 is reset. This operation is performed to force the differential amplifier 20 to the initial state (the output signal VO is at a high level). As described with reference to FIG. 2, the differential amplifier 20 is a circuit having hysteresis. Therefore, even if the reset operation of the photodiode 12 is performed and the input voltage difference (VR-VI) becomes 0, the output is output. This is because the signal VO remains as before.

  At time T3, when the reset transistor 14 is resetting, the signal φVMC becomes high level. Then, the switch transistor 36 becomes conductive, and the input node N1 and the input node N2 are short-circuited. As a result, the voltage of the reference voltage holding capacitor 34 (the voltage of the node N2) is reset to substantially the same voltage as the output voltage of the photodiode 12 (the voltage of the node N1 and the voltage of the reset power supply PR). Thereafter, the reset signals φVMR and φVDR are set to low level. At time T4, when the signal φVMC is set to a low level, the switch transistor 36 is turned off. Wait for the arrival of photons in this state.

  At time T5, photons fly to the photodiode (PH), and electrons generated by the photons are accumulated in the photodiode 12. As a result, the voltage VI of the photodiode 12 varies. Since the input voltage difference (VR-VI) of the differential amplifier 20 exceeds the predetermined threshold value VTH, the output signal VO is inverted.

Thus, in order to detect one photon with the circuit of FIG. 1, the voltage difference input to the differential amplifier 20 needs to exceed VTH. Therefore, when the combined capacitance of the intrinsic capacitance and the parasitic capacitance of the photodiode 12 is C and the elementary charge is e, the input voltage difference ΔV is
ΔV = e / C> VTH
It is necessary to satisfy the condition. In order to forcibly reset the differential amplifier 20 with the input voltage difference (VR-VI) being 0,
VTL <0
It is also necessary to satisfy this condition.

  When the capacitance C of the photodiode 12 is reduced as much as possible by using the semiconductor microfabrication technique, the voltage generated by one electron generated by one photon can be increased to several hundred μV to several mV. In addition, the above condition can be satisfied if variations in characteristics of transistors and the like are minimized by precise impurity concentration control technology or atomic level film thickness control technology. This is an effect obtained by using the differential amplifier 20. This is because there is very little variation between adjacent semiconductor elements in the differential amplifier 20 and the differential amplifier 20 has a differential type. In the case of using a normal amplifier, it can be said that it is advantageous for the device variation to be low throughout the entire chip or the entire wafer. In addition, it is possible to detect voltage fluctuations caused by electrons accumulated in the photodiode, instead of capturing a transient phenomenon that occurs with the arrival of photons as in the prior art.

  As a result, it is possible to suppress the driving capability of the amplifier for driving the counter, and it is possible to use an amplifier with low power consumption. Specifically, the current flowing through the differential amplifier 20 may be determined by the parameter of the current source transistor 26 so that an output current sufficient to drive the counter can be obtained in accordance with the shortest period necessary for the photon count. It will be. In the circuit of FIG. 1, the number of saturated electrons in the photodiode 12 may be one photon, so that the photodiode can be reduced in size. The reset voltage of the photodiode 12 is sufficient if it has an amplitude for resetting one photon, and 100 mV is sufficient. Since the input voltage difference to the differential amplifier 20 is several mV at most, the power supply voltage can be extremely low, and further power consumption can be reduced.

  If the pixels constituted by the photon detection circuit 10 and the output selection circuit in FIG. 1 are arranged in a matrix, scanned at a predetermined cycle, and the output pulse of each pixel is counted, the photons with low power consumption and few malfunctions A count type image sensor can be realized.

  Although the dual gate transistors 23 and 24 are used in FIG. 1, instead of this, two normal transistors may be connected in series. In this case, the gate of one transistor is used as an input node, and the gate of the other transistor is used for positive feedback. By doing so, although the number of components increases, a general-purpose transistor can be used, and design and processing can be facilitated.

  In FIG. 1, the output of the photodiode 12 is directly input to the differential amplifier 20, but the first stage may be a normal differential amplifier without a positive feedback function and the next stage may be a differential amplifier 20. Good. By doing so, the degree of amplification increases, so that photon counting can be performed even if the output signal of the photodiode 12 is weak.

  In FIG. 1, a field effect transistor is used as the differential amplifier 20, but a bipolar transistor may be used. By doing so, variations in threshold voltage are reduced, and photon counting with fewer malfunctions becomes possible.

  FIG. 4 is a block diagram illustrating a configuration example of the photon detection unit 60 according to the embodiment of the present invention. 4 includes the photon detection circuit 10 of FIG. 1 and a self-reset circuit 40. The output signal VO of the photon detection circuit 10 is input to the self-reset circuit 40 as the input signal VDI. The output signal VD1 of the self-reset circuit 40 is input to the photon detection circuit 10 as reset signals φVMR and φVDR. The output signal VD2 of the self-reset circuit 40 is input to the photon detection circuit 10 as a signal φVMC. As described above, the photon detection circuit 10 of FIG. 1 may be used in combination with the self-reset circuit 40.

  FIG. 5 is a block diagram showing a configuration example of the self-reset circuit 40 of FIG. The self-reset circuit 40 includes a differentiation circuit 42 and inverters 44, 46 and 48. The differentiating circuit 42 includes a capacitor 51 and a resistor 52. The inverter 44 includes a PMOS (p-channel metal oxide semiconductor) transistor 53 and an NMOS transistor 54 connected in series between the power supply PIV and the ground. Similarly, the inverter 46 includes a PMOS transistor 55 and an NMOS transistor 56, and the inverter 48 includes a PMOS transistor 57 and an NMOS transistor 58.

  The differentiation circuit 42 outputs a differentiation signal V1 of the input signal VDI. The inverter 44 inverts the differential signal V1 and shapes the waveform, and outputs the obtained output signal VD1. The inverter 46 inverts and outputs the output signal VD1, and the inverter 48 inverts the output of the inverter 46 and outputs it as the output signal VD2.

  FIG. 6 is a timing chart showing an example of signals in the photon detector 60 of FIG. A description will be given with reference to FIGS. 1, 4, and 5. At time T21, an initial reset is performed by reset signals φVMR and φVDR (output signal VD1). At this time, the differential amplifier 20 is forcibly reset simultaneously with the reset of the photodiode 12, and the output signal VO becomes high level. After a predetermined time, the switch transistor 36 is turned on by φVMC (output signal VD2) and enters a photon standby state.

  When photons come in at time TP22, the output signal VO is inverted. The self-reset circuit 40 that has received the output signal VO outputs a pulse as the output signal VD1 at time T23, and resets the photodiode 12 and the differential amplifier 20. Thereafter, the self-reset circuit 40 outputs a pulse as the output signal VD2, turns on the switch transistor 36, and again enters the photon standby state. Such an operation in which the photon detection circuit 10 itself is reset by the output signal VO of the photon detection circuit 10 is referred to as a self-reset operation.

  When photons come in at time TP24, the output signal VO is inverted, the self-reset operation is performed in the same manner, and the photon standby state is entered again. As described above, the photon detection unit 60 outputs a pulse as the output signal VO every time a photon arrives. If this is counted by a counter, photon counting can be easily performed.

  FIG. 7 is a block diagram illustrating a configuration example of the pixel 70 according to the embodiment of the present invention. The pixel 70 in FIG. 7 includes the photon detector 60, the asynchronous counter 72, and the memory 74 in FIG. The image sensor according to the embodiment of the present invention includes a plurality of pixels 70, and the plurality of pixels 70 are formed in a matrix, for example, on a semiconductor substrate.

  The photon detection unit 60 outputs the output signal VO to the asynchronous counter 72. The asynchronous counter 72 counts pulses of the output signal VO and outputs a count value CV to the memory 74. The memory 74 stores the count value CV when the read / write switching signal (R / W signal) RWS indicates writing. The selection line 82 is arranged in each row of the pixels 70, and the data line 84 is arranged in each column of the pixels 70. The memory 74 outputs the stored value to the data line 84 when the selection line 82 is selected and the R / W signal RWS indicates reading. A frame reset signal φVR is input to the photon detector 60 and the asynchronous counter 72 for each frame, and this signal resets the photon detector 60 and the asynchronous counter 72.

  At the time of frame reset, the frame reset signal φVR is input to the photon detection circuit 10 as the reset signal φVMR. After the photon detection circuit 10 is forcibly reset, the frame reset signal φVR is not input to the photon detection circuit 10, and the output signal VD1 of the self-reset circuit 40 is input to the photon detection circuit 10 as the reset signal φVMR. As described above, the frame reset signal φVR is input to the photon detection circuit 10 only in the vicinity of the period when the frame reset signal φVR becomes high level for the frame reset operation.

  FIG. 8 is a timing chart showing an example of signals in the pixel 70 of FIG. Here, the signal of the pixel in the Nth row and Mth column (N and M are integers of 2 or more) is shown as an example. The period from time TF1 to time TF2 is a period of one frame.

  At time TF1, the frame reset signal φVR rises, and the photon detectors 60 and the asynchronous counters 72 of all the pixels 70 of the image sensor are reset. This operation is called frame reset. After the frame reset is completed, the photon standby state is entered and accumulation starts. Photons fly at each of the times TP1, TP2, TP3, TP4, TP5, and TP6, and the photon detector 60 sends a pulse to the asynchronous counter 72. Therefore, the count value of the asynchronous counter 72 is incremented every time a photon comes. The In the case of FIG. 8, the count value CV = 6. Next, at time TW, the R / W signal RWS indicates writing (W). The memory 74 stores the count value CV. Thereafter, at time TF2, the frame reset signal φVR rises again, and the frame is reset.

  In the accumulation period AT of the f-th frame, the data DT = 3 of the previous f−1-th frame is stored in the memory 74. This data is transmitted via the Mth column data line at the timing when the Nth row data write pulse comes from the Nth row selection line, as shown in FIG. Data DT = 6, which is the number of photons counted during the accumulation period of the f-th frame, is similarly transmitted during the next f + 1-th frame period.

  In this way, a photon count type image sensor is realized by counting the number of photons incident during a predetermined accumulation time of a frame, repeating the operation of storing the data in a memory and writing it out in the next frame. it can. In this embodiment, since the accumulation time of all the pixels can be started from the same time and can be ended at the same time, a so-called global shutter operation can be performed.

  When the image sensor according to the present embodiment is formed on a semiconductor substrate, all elements may be formed on the same surface of the substrate by a normal CMOS sensor process, or by a back-illuminated CMOS sensor process. The element may be formed on the surface of the substrate, and the photodiode may be formed on the back surface of the substrate. In addition, since the number of transistors in one pixel is relatively large, when the image sensor of this embodiment is formed, a laminated structure may be formed by a method such as three-dimensional mounting, thereby reducing the area of one pixel. be able to. In addition, when a memory having a multi-level cell is used as the counter and the memory of this embodiment, the pixel can be reduced.

  As described above, according to the present embodiment, the photoelectric conversion unit and the reference voltage holding capacitor are reset at the same time, and the potential difference between the photoelectric conversion unit and the reference voltage holding capacitor is amplified by the differential amplifier having a waveform shaping function. Since it counts one, it can realize a photon count type image sensor with lower power consumption and fewer malfunctions than conventional ones.

  In addition, in the present invention, a photon count unit including a self-reset circuit having a function of resetting the photoelectric conversion unit simultaneously with the detection of photons, a counter, and pixels configured by a memory are arranged in a two-dimensional matrix, thereby obtaining a predetermined value. It is possible to realize a photon count type image sensor capable of capturing a moving image with a global shutter method at a time frame rate.

  The many features and advantages of the present invention are apparent from the written description, and thus, it is intended by the appended claims to cover all such features and advantages of the invention. Further, since many changes and modifications will readily occur to those skilled in the art, the present invention should not be limited to the exact construction and operation as illustrated and described. Accordingly, all suitable modifications and equivalents are intended to be within the scope of the present invention.

  As described above, according to the present disclosure, the present invention is useful for image sensors and the like because incident photons can be counted with low power consumption even if the characteristics of semiconductor elements vary.

12 Photodiode (photoelectric converter)
14 Reset transistor (reset circuit)
20 Differential amplifiers 23 and 24 Dual gate transistor 34 Reference voltage holding capacitor 36 Switch transistor (switch)
40 Self-reset circuit 72 Asynchronous counter 74 Memory

Claims (6)

An image sensor having a plurality of pixels,
Each of the plurality of pixels is
A photoelectric conversion unit that performs photoelectric conversion;
A reference voltage holding capacity;
A differential amplifier that outputs an output voltage of the photoelectric conversion unit and a voltage of the reference voltage holding capacitor to two input nodes, amplifies a voltage difference between the two input nodes, and outputs the amplified voltage difference;
A reset circuit for resetting the output voltage of the photoelectric conversion unit to a predetermined voltage;
An image sensor provided between the two input nodes of the differential amplifier and provided with a switch that makes the voltage of the reference voltage holding capacitor an output voltage of the photoelectric conversion unit by conducting. The image sensor according to claim 1,
The differential amplifier is an image sensor having a waveform shaping function. The image sensor according to claim 1,
The differential amplifier is
A first dual gate transistor;
A second dual gate transistor;
One of the gates of the first dual gate transistor is connected to the drain of the second dual gate transistor, and one of the gates of the second dual gate transistor is connected to the drain of the first dual gate transistor. Image sensor. The image sensor according to claim 1,
Each of the plurality of pixels is
A self-reset circuit that resets the photoelectric conversion unit upon detecting that the output of the differential amplifier has reached a predetermined value;
A counter for counting the number of pulses of the output of the differential amplifier;
An image sensor further comprising a memory for storing and outputting the count value of the counter. Each includes a photoelectric conversion unit, a reference voltage holding capacitor, a differential amplifier in which the output voltage of the photoelectric conversion unit and the voltage of the reference voltage holding capacitor are respectively input to two input nodes, and a reset circuit An image sensor driving method having a plurality of pixels,
Resetting the output voltage of the photoelectric converter to a predetermined voltage;
Conducting between the two input nodes of the differential amplifier by a switch to set the voltage of the reference voltage holding capacitor to the output voltage of the photoelectric conversion unit;
Opening the switch;
The photoelectric conversion unit performing photoelectric conversion;
And a step of amplifying the voltage difference between the two input nodes and outputting the voltage difference between the two input nodes. The image sensor driving method according to claim 5,
Counting photons flying to the photoelectric converter by a counter, and resetting the counter every predetermined time;
Storing the count value of the counter at a predetermined time in a memory;
And a step of outputting data of the memory.

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