JP2012227189A - Method of manufacturing semiconductor device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a gate insulating film that allows reduction in leakage current and threshold value.SOLUTION: A method of manufacturing a semiconductor device comprises: a gate insulating film formation step of forming a gate insulating film 3 on a semiconductor substrate 1; and a gate electrode formation step of forming a gate electrode 4 on the gate insulating film 3. The gate insulating film formation step includes three steps: a first deposition step of depositing an oxide film of a first metal or an oxynitride film; a second deposition step of depositing a second metal or an oxide thereof on the oxide film of the first metal or the oxynitride film; and a heat-treatment step of performing a heat treatment to diffuse the second metal into the oxide film of the first metal.

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor device.

  As the gate insulating film of a metal-oxide-semiconductor field-effect transistor (MOSFET) is thinned, there is a problem that leakage current increases. One technique for solving this problem is to increase the actual film thickness as compared to the silicon oxide film. One such technique is a gate insulating film formed of a compound having a lower dielectric constant than that of a silicon oxide film in order to reduce leakage current.

Patent Documents 1 to 3 disclose a semiconductor device having a gate insulating film formed of a high dielectric material. Patent Document 1 discloses a semiconductor device with low power consumption that suppresses an increase in leakage current. Patent Document 2 discloses a semiconductor device having a plurality of semiconductor elements having channel regions of the same conductivity type and different threshold voltages. Patent Document 3 discloses a semiconductor device having an insulating material having a dielectric constant higher than that of SiO ₂ and having a thick gate insulating film while maintaining dielectric characteristics.

Non-Patent Documents 1 to 4 report improvements on high dielectric films. Non-Patent Document 1 discloses that when thin HfO ₂ is used for the gate oxide film, heat treatment is performed and crystallization into tetragonal HfO ₂ results in a higher dielectric constant than an amorphous film that is not subjected to heat treatment. It is reported that the films shown are obtained. Non-Patent Document 2 reports that the film contains a metal element such as Mg or La in order to reduce the threshold voltage. Non-Patent Document 3 discloses a technique of performing a heat treatment after forming a metal film or a metal oxide film as a method for containing a metal element in a dielectric film. Non-Patent Document 4 reports that HfO ₂ containing La at the time of film formation does not crystallize even when heat treatment is performed at the crystallization temperature of HfO ₂ .

JP 2010-192520 A JP 2009-200191 A JP 2003-324193 A

D. Ishikawa, “Extended Scalability of HfON / SiON Gate Stack Down Down to 0.57 nm Equivalent Oxide Thickness with High Carriage Mobility A J4” V. Narayan "Band-Edge High-Performance High-k / Metal Gate n-MOSFETs used in the Quantities of Semiconductors, IIA and IIIB Elements with Gates of Semiconductors. H. N. Alsharef "Thermally Stable N-Metal Gate MOSFETs Using La-Incorporated HfSiO Dielectric" VLSI Technology Symposium 2006, Session 2.1 Y. Yamamoto "Structural and electrical properties of HfLaOx films for an amorphous high-k gate insulator" Appl. Phys. Lett. 89, 2005, 032903

  In order to reduce the threshold voltage Vt of the transistor (depending on the required performance, | Vt | is 0.4 to 0.2 volts or less) and reduce the leakage current, the crystallized Hf base (or Zr base) In this oxide film, it is necessary to contain a metal element (for example, La or Mg) for lowering the threshold.

Non-Patent Document 2 discloses a flow of forming a metal film for threshold control after forming an HfO ₂ film, subsequently forming a TiN film, further forming a Poly-Si film, and performing a heat treatment after patterning. . When formed by such a flow, the inventors have found that the high dielectric constant film cannot be sufficiently crystallized and the relative dielectric constant cannot be sufficiently increased.

Non-Patent Document 3 discloses a method in which an HfSiO film is formed, LaO _x is formed, and then heat treatment is performed to mix HfSiO and LaOx. When this method is used, an amorphous high dielectric constant film is obtained. As a result, HfSiO has a higher crystallization temperature than HfO ₂ , so that it is not sufficiently crystallized by heat treatment.

  In a standard method for forming a high dielectric constant film, a method of performing a heat treatment immediately after the formation of the high dielectric constant film is used in order to remove impurities in the film and stabilize the film. After such a method is adopted, if a metal film (second metal) for threshold control is formed and a heat treatment for diffusion is performed, the crystalline state becomes unstable. The present inventor has found that the high dielectric constant film becomes amorphous after the heat treatment or by the heat treatment in the subsequent transistor forming process, and the relative dielectric constant is reduced.

  Therefore, in order to reduce the threshold voltage Vt of the transistor and reduce the leakage current, the high dielectric constant film is sufficiently crystallized (in addition, the crystal state is kept stable in the subsequent transistor formation process) It has not been realized.

According to the present invention, a gate insulating film forming step of forming a gate insulating film on a semiconductor substrate;
Forming a gate electrode on the gate insulating film; and
With
The gate insulating film forming step includes a first film forming step of forming a first metal oxide film or oxynitride film,
A second film forming step of forming a second metal or an oxide thereof on the oxide film or oxynitride film of the first metal;
A heat treatment step of heat treating the second metal to diffuse into the oxide film of the first metal;
A method for manufacturing a semiconductor device is provided.

Furthermore, according to the present invention, a semiconductor substrate;
A gate insulating film provided on the semiconductor substrate;
A gate electrode provided on the gate insulating film;
With
The gate insulating film is provided with a semiconductor device having a dielectric film that is a film obtained by crystallizing an oxide of a first metal containing a second metal.

  According to the present invention, after the first metal oxide film is formed, the second metal or its oxide is formed on the first metal oxide film, and heat treatment is performed. Thereby, a crystallized film of the oxide of the first metal in which the second metal is diffused can be obtained as a crystallized gate insulating film having a higher dielectric constant than that of the amorphous film.

  According to the present invention, a semiconductor device having a high dielectric film with reduced leakage current and threshold by manufacturing a crystallized gate insulating film in which two kinds of metal elements are diffused and has a high dielectric constant, A method for manufacturing a semiconductor device is also provided.

(A) is sectional drawing of the gate insulating film formation process in the manufacturing process of a semiconductor device, (b)-(d) is sectional drawing for demonstrating a gate electrode formation process. 5 is a flowchart for explaining a gate insulating film forming step according to the present embodiment. It is an in-plane X-ray diffraction spectrum of the dielectric film according to the present embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate.

1A and 1B are views for explaining the method of manufacturing a semiconductor device according to the present embodiment. FIG. 1A is a cross-sectional view of a gate insulating film forming process in the process of manufacturing a semiconductor device, and FIGS. FIG. 10 is a cross-sectional view for explaining a gate electrode formation step.
As shown in FIG. 1, a gate insulating film forming step for forming a gate insulating film 3 on a semiconductor substrate 1 and a gate electrode forming step for forming a gate electrode 4 on the gate insulating film 3 are provided. The insulating film forming step includes a first film forming step of forming a first metal oxide film or oxynitride film 30, and a second metal or oxide thereof on the first metal oxide film or oxynitride film 30. 3 includes a second film forming process for forming the film 32 and a heat treatment process for performing heat treatment to diffuse the second metal into the oxide film of the first metal.

  First, the gate insulating film 3 shown in FIG. 1A is formed on the semiconductor substrate 1 (gate insulating film forming step). Details of this step will be described later.

  Next, as shown in FIGS. 1B and 1C, the gate electrode 4 is formed (gate electrode forming step).

First, as shown in FIG. 1B, a gate electrode film 4 is formed on the gate insulating film 3.
For example, the gate electrode film is a metal film made of TiN or a laminated film of a metal film and polysilicon.

  Next, the gate insulating film 3 and the gate electrode film 4 formed as shown in FIG. 1C are etched to form a gate structure.

  Next, as shown in FIG. 1D, an extension region 5, a source / drain region 8, and a sidewall 9 are provided.

  Through the above steps, the semiconductor device of the present embodiment shown in FIG. 1D is obtained.

FIG. 2 is a flowchart for explaining the gate insulating film forming step according to the present embodiment.
As shown in FIG. 2, in the gate insulating film formation step, first, a first metal oxide film or oxynitride film 30 is formed (first film formation step). Specifically, in the first film formation step, an amorphous first metal oxide film or oxynitride film 30 is formed on the semiconductor substrate 1 provided with the element isolation region 2. Further, when forming the film, it is preferable that the thickness of the oxide film 30 of the first metal is 3 nm or less. Furthermore, the thickness of the first metal oxide film 30 is preferably in the range of 1 nm to 3 nm. The reason for this is that an electrically thin film is required to improve the performance of a semiconductor device, that an electrically thick film cannot achieve high performance, and a film that is too thick is In order to diffuse the metal, the necessary temperature may be too high.

  In the first film formation step, a film formation method such as an ALD (Atomic Layer Deposition) method or MOCVD (Molecular Organic Chemical Vapor Deposition) is employed. A silicon oxide film or silicon oxynitride film having a thickness of less than 1 nm (about 0.5 to 0.7 nm) may be formed on the semiconductor substrate 1.

  Next, a second metal or its oxide 32 is formed on the first metal oxide film or oxynitride film 30 (second film formation step). Specifically, when the second metal or its oxide 32 is formed, the film thickness is in the range of about 20% to about 35% as compared with the oxide film or oxynitride film 30 of the first metal. A film is formed. At this time, the upper limit is a range in which the properties of the first metal oxide or oxynitride can be maintained. The first metal oxide film or oxynitride film 30 is preferably amorphous, and is preferably the first metal oxide film or oxynitride film 30. This is because, since the film thickness is as thin as 1 to 3 nm, it is difficult to control the film thickness at a temperature at which the film is formed as a polycrystal because the film formation speed is high. Further, when a film is formed as a crystalline material, anisotropy occurs in the growth rate of crystal grains, and unevenness occurs on the film formation surface. When this unevenness is used as a gate insulating film, electric field concentration occurs, so the electric field strength varies depending on the location. For this reason, the problem that the uniformity of a characteristic is impaired arises.

  In the second film forming step, since the film thickness is thin, a film forming method such as an ALD (Atomic Layer Deposition) method or a PVD (Physical Vapor Deposition) method is employed.

  Next, heat treatment is performed to diffuse the second metal into the oxide film 30 of the first metal (heat treatment step). Specifically, the heat treatment temperature is set to a temperature that is lower than the melting point of the semiconductor substrate 1, the second metal or its oxide diffuses to the semiconductor substrate 1 surface side of the oxide film of the first metal, and no external diffusion occurs. . For example, when Hf is used as the first metal and La is used as the second metal, the heat treatment temperature is in the range of 850 ° C. or higher and 1050 ° C. or lower.

  Note that the crystal structure of the gate insulating film 3 is tetragonal or cubic, and the first metal includes at least one of Hf and Zr. Further, the second metal includes at least one of La, Mg, Y, Al, and Lu. As a combination of the first metal and the second metal, for the NFET, Hf (or Zr) is used as the first metal, and La, Y, and Lu are used as the second metal. For the PFET, the first metal may be HfHf (or Zr) as in the NFET, and the second metal may be Mg or Al. Since a relatively high temperature heat treatment is required to diffuse the second metal, Hf having heat resistance is preferable as the first metal. Among these, La (NFET) and Mg (PFET) are preferable as the second metal.

Further, the number of atoms of the second metal element is 1 × 10 ¹⁵ (atoms / cm ² ) or more, or the number of atoms of the second metal element / (the sum of the number of atoms of the first metal element and the number of atoms of the second metal element) )> 20%. If the number of atoms of the first and second metals contained in the crystallized gate oxide film 3 is lower than the above range, the object of changing the threshold cannot be sufficiently achieved.

Next, the effect of this embodiment will be described.
The gate insulating film 3 in the semiconductor device of the present embodiment is a dielectric film that is a film obtained by crystallizing an oxide of the first metal diffused by the second metal. A crystallized film exhibits a higher dielectric constant than an amorphous film that is not subjected to heat treatment. Therefore, the dielectric constant of the gate insulating film 3 can be increased.

(Example)
A gate insulating film 3 was formed according to the flowchart shown in FIG.

FIG. 3 is an in-plane X-ray diffraction spectrum of the dielectric film according to the present embodiment.
As shown in FIG. 3, in-plane X-ray diffraction spectra of a 1.9 nm thick HfO ₂ film and a film containing 2 × 10 ¹⁵ (atoms / cm ² ) La in the HfO ₂ film, respectively. It can be seen that when La is contained in an amorphous HfO ₂ film, a HfO ₂ film showing crystals in a tetragonal crystal is obtained.

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Element isolation region 3 Gate insulating film 4 Gate electrode 5 Extension region 8 Source / drain region 9 Side wall
30 Oxide film or oxynitride film of first metal 32 Second metal or oxide thereof

Claims (11)

A gate insulating film forming step of forming a gate insulating film on the semiconductor substrate;
Forming a gate electrode on the gate insulating film; and
With
The gate insulating film forming step includes a first film forming step of forming a first metal oxide film or oxynitride film,
A second film forming step of forming a second metal or an oxide thereof on the oxide film or oxynitride film of the first metal;
A heat treatment step of performing heat treatment to diffuse the second metal into the oxide film of the first metal;
including,
A method for manufacturing a semiconductor device.   The method for manufacturing a semiconductor device according to claim 1, wherein a crystal structure of the gate insulating film is a tetragonal crystal or a cubic crystal.   The method for manufacturing a semiconductor device according to claim 1, wherein the first metal includes at least one of Hf and Zr.   The method for manufacturing a semiconductor device according to claim 1, wherein the second metal includes at least one of La, Mg, Y, Al, and Lu.   5. The method of manufacturing a semiconductor device according to claim 1, wherein in the first film formation step, the thickness of the oxide film of the first metal is 3 nm or less. The number of atoms of the second metal element is 1 × 10 ¹⁵ (atoms / cm ² ) or more, or the number of atoms of the second metal element / (the sum of the number of atoms of the first metal element and the number of atoms of the second metal element). The method for manufacturing a semiconductor device according to claim 1, wherein> 20%. A semiconductor substrate;
A gate insulating film provided on the semiconductor substrate;
A gate electrode provided on the gate insulating film;
With
The semiconductor device having a dielectric film, wherein the gate insulating film is a film obtained by crystallizing an oxide of a first metal containing a second metal.   The semiconductor device according to claim 7, wherein a crystal structure of the gate electrode film is a tetragonal crystal or a cubic crystal.   The semiconductor device according to claim 7, wherein the first metal includes at least one of Hf and Zr.   The semiconductor device according to claim 7, wherein the second metal includes at least one of La, Mg, Y, Al, and Lu. The number of atoms of the second metal element is 1 × 10 ¹⁵ (atoms / cm ² ) or more, or the number of atoms of the second metal element / (the sum of the number of atoms of the first metal element and the number of atoms of the second metal element). The semiconductor device according to claim 7, wherein> 20%.

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