JP2012220958A - Three-dimensional image display apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for displaying a three-dimensional image and a display apparatus for performing the same.SOLUTION: The method of displaying a three-dimensional image includes: sequentially providing light to display blocks of a display panel in a scan direction of an image; providing light at a maximum luminance to one of the display blocks during a first period in which a left-eye or right-eye image is displayed on the display block; providing the light at a luminance gradually decreasing from the maximum luminance to a preset luminance to the display block during a second period in which a transition image between the left-eye or the right-eye image and a black image is displayed on the display block; and blocking the light from the display block during a third period including a period in which the black image is displayed on the display block and prior to a period in which a left-eye or a right-eye image of a following frame is displayed on the display block. Consequently, luminance of the light is adjusted based on liquid crystal response characteristics of the transition image between the left-eye or the right-eye image and the black image in a three-dimensional image mode, whereby a three-dimensional image can be displayed with high luminance and low power consumption.

Description

  The present invention relates to a three-dimensional image display device, and more particularly to a display device that performs a three-dimensional image display method for improving the display quality of a three-dimensional image.

  In general, a liquid crystal display device displays a two-dimensional planar image. Recently, with an increase in demand for 3D stereoscopic images in the fields of games, movies, etc., liquid crystal display devices that display 3D stereoscopic images have been developed.

  Usually, a three-dimensional stereoscopic image displays a stereoscopic image using the principle of binocular parallax through human eyes. For example, since both eyes of a person are separated by a certain distance, images observed at different angles with each eye are input into the brain. The stereoscopic image display apparatus uses such binocular parallax.

  As a method of a stereoscopic image display device using binocular parallax, there are a stereoscopic glasses method (stereoscopic) and a non-stereoscopic glasses method (autostereoscopic). The stereoscopic glasses method is a passive polarized glasses method using a polarizing filter having different polarization axes for both eyes, and a left eye image and a right eye image are periodically displayed by time division. In addition, there is an active shutter glasses system that puts on eyeglasses that open and close the left eye shutter and the right eye shutter in synchronization with this cycle.

  The polarized glasses method has a disadvantage that the luminance of the three-dimensional image is lowered by a polarizing filter used to separate the left eye image and the right eye image. In the shutter glasses method, the higher the response speed of the liquid crystal, the better the crosstalk between the left eye image and the right eye image. Therefore, it can be said that the response speed of the liquid crystal is the most important. The response speed characteristic of the liquid crystal has a physical limit, and in order to overcome this, a method of improving the crosstalk between the left eye image and the right eye image by scanning the backlight is applied. However, the backlight scanning drive has a disadvantage that the luminance of the three-dimensional image is lowered.

Korean Patent Application Publication No. 2010-0012599 Specification JP 2005-049822 A Korean Patent Application Publication No. 2007-0069707

  The present invention has been made in view of the above-described conventional problems related to the shutter glasses method, and an object of the present invention is to provide a method for displaying a three-dimensional image with improved luminance.

  Another object of the present invention is to provide a display device that performs a method of displaying a three-dimensional image with improved luminance.

  A display device according to an embodiment for realizing the object of the present invention includes a display panel for displaying an image, and a plurality of light emitting blocks arranged in a direction in which the image is scanned, and the light emitting block includes: A light source unit that provides light to the corresponding display block of the display panel; and the display block generates light of maximum brightness in a first section in which a left-eye image or a right-eye image is completed; A section in which the black image is completed by generating light that gradually decreases from the maximum brightness to the set brightness in the second section in which a transient image that changes from the left-eye or right-eye image to a black image is displayed. And a light source driving unit that drives the light source unit so as to block light in a third section including a section for which the next left-eye image or the right-eye image is not completed.

  In the present embodiment, the light source driving unit includes: a current generating unit that generates a current signal in response to a three-dimensional enable signal; and a signal generating unit that provides a driving signal to the light emitting block based on the current signal. Can be included.

  In the present embodiment, the signal generation unit may include a plurality of light emission drive units that provide a drive signal to each of the light emission blocks.

  In the present embodiment, an analog drive control signal having a high level in the first interval and the second interval and having a low level in the third interval, and a maximum level in the first interval, the second interval A timing controller that generates an analog luminance control signal having a level that gradually decreases from the maximum level to a set level in a section and has a minimum level in the third section, and provides the analog brightness control signal to the signal generator; Can be included.

  In this embodiment, the analog light source control has a maximum level in the first section, a level gradually decreasing from the maximum level to a set level in the second section, and a minimum level in the third section. A timing controller that generates a signal and provides the signal to the signal generator may be further included.

  In the present embodiment, the light source driving unit includes a current generation unit that generates a current signal in response to a three-dimensional enable signal, a signal conversion unit that converts a digital control signal into an analog control signal, and the current signal. And a signal generation unit for providing a driving signal to the light emitting block.

  In the present embodiment, an analog drive control signal having a high level in the first interval and the second interval and having a low level in the third interval, and a maximum level in the first interval, the second interval A timing controller for providing a digital luminance control signal having a level gradually decreasing from the maximum level to a set level in the section and having a minimum level in the third section to the light source driver, The analog drive control signal may be provided to the signal generation unit, and the digital luminance control signal may be converted to an analog luminance control signal by the signal conversion unit and provided to the signal generation unit.

  In the present embodiment, a digital drive control signal having a high level in the first interval and the second interval and having a low level in the third interval, a maximum level in the first interval, and the second interval A timing controller for providing a digital luminance control signal having a level gradually decreasing from the maximum level to a set level in the section and having a minimum level in the third section to the light source driver, The digital drive control signal and the brightness control signal may be converted into an analog drive control signal and a brightness control signal by the signal conversion unit and provided to the signal generation unit.

  In this embodiment, the digital light source control has a maximum level in the first section, a level gradually decreasing from the maximum level to a set level in the second section, and a minimum level in the third section. The digital light source control signal may be further converted into an analog light source control signal by the signal conversion unit and provided to the signal generation unit.

  In this embodiment, a panel driver that sequentially provides the display panel with the left eye data signal, the black image data signal, the right eye data signal, and the black image data signal in units of frames. Can further be included.

  In the present embodiment, the light source unit displays the light having the maximum luminance from a first time point to a second time point delayed from a time point when the left eye or right eye data signal is provided to the display block. The first time point is a time point when a liquid crystal response rate of the display block with respect to the data signal of the left-eye or right-eye image reaches a high critical value, and the second time point is the black image. Of the data signal is provided.

  In the present embodiment, the light source unit provides the display block with the gradually decreasing light from the second time point to the third time point, and the third time point is a data signal for the left-eye or right-eye image. The liquid crystal response rate with respect to can reach a low critical value.

  According to the embodiment of the present invention, a low-power and high-brightness three-dimensional image can be obtained by adjusting the luminance of light according to the liquid crystal response characteristics of the transient image when the left-eye or right-eye image changes to a black image. Can be displayed.

  Further, the crosstalk of the three-dimensional image visually recognized by the observer can be reduced by reducing the luminance in a section where the image for the left eye or the right eye is changed to the black image. Therefore, the display quality of the three-dimensional image can be improved.

It is a block diagram of a display device concerning one embodiment of the present invention. It is a block diagram of the light source drive part shown in FIG. It is a wave form diagram for demonstrating the method to display a three-dimensional image by the light source drive part of FIG. It is a conceptual diagram for demonstrating the three-dimensional image display method which concerns on the display apparatus of FIG. It is a block diagram of the display apparatus which concerns on other embodiment of this invention. FIG. 6 is a waveform diagram for explaining a method of displaying a three-dimensional image according to the display device of FIG. 5. It is a block diagram of the display apparatus which concerns on other embodiment of this invention. It is a block diagram of the display apparatus which concerns on other embodiment of this invention. It is a block diagram of the display apparatus which concerns on other embodiment of this invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a block diagram of a display device according to an embodiment of the present invention.
Referring to FIG. 1, the display device includes a timing controller 100a, a display panel 200, a panel driver 300, a light source 400, and a light source driver 500a. The display device further includes a glasses unit 600.

  The timing controller 100a receives an original control signal (source_control_signal) and an image signal from the outside. The timing control unit 100a generates a timing control signal based on the original control signal, and generates a light source control signal based on the image signal.

  The image signal includes a two-dimensional image signal and a three-dimensional image signal. The three-dimensional image signal includes a left-eye image frame, a right-eye image frame, and a black image frame positioned between the left-eye image frame and the right-eye image frame. The image frame is a frame-based image signal.

  The light source control signal includes a drive control signal (PWM1 to PWMn) for turning on or off the light source unit 400 and a luminance control signal (ADIM1 to ADIMn) for controlling the luminance of the light source unit 400, and includes a light source driver 500a. Is input to the light source unit 400. The timing controller 100a generates a drive control signal (PWM1 to PWMn) and a luminance control signal (ADIM1 to ADIMn) in consideration of the liquid crystal response speed of the display panel 200. Details of the drive control signals (PWM1 to PWMn) and the luminance control signals (ADIM1 to ADIMn) will be described with reference to the drawings described later.

  The display panel 200 includes a plurality of data lines DL, a plurality of gate lines GL, and a plurality of pixels P. The gate lines GL extend in the first direction D1 and are arranged in the second direction D2. Each pixel P includes a switching element TR connected to the data line DL and the gate line GL, and a liquid crystal capacitor CLC connected to the switching element TR. When the switching element TR connected to one specific selected gate line DL is turned on, the liquid crystal molecules of the liquid crystal capacitor CLC are arranged by the data signal applied to the data line DL, and the pixel P is arranged in the arrangement. The gradation is displayed according to the transmittance of the liquid crystal molecules. The display panel 200 displays an image in the scan direction, that is, the second direction D2 by a progressive method, that is, by sequentially selecting the gate lines DL.

  The panel driver 300 includes a data driver 310 and a gate driver 320. The data driver 310 outputs an analog data signal to the data line DL based on the image signal and the data timing signal provided from the timing controller 100a. The gate driver 320 outputs a gate signal to the gate line GL based on the gate timing signal provided from the timing controller 100a.

  The light source unit 400 sequentially provides light to the display panel 200 in the scanning direction D2. The light source unit 400 includes a plurality of light emitting blocks (LB1, LB2,..., LBn) arranged in the second direction D2. Each light emitting block LBi includes a light emitting diode LED. The display panel 200 is defined as a plurality of display blocks (DB1, DB2,..., DBn) by the light emission blocks (LB1, LB2,..., LBn), and each light emission block LBi provides light to the corresponding display block DBi. Here, i is a natural number of n or less.

  In the present embodiment, the light source unit 400 includes two light emitting modules disposed on both sides (left and right sides in FIG. 1) of the display panel 200, the first light emitting module 410 and the second light emitting module 420, and the back of the display panel 200. And a light guide plate 430 that is disposed and guides light generated from the first light emitting module 410 and the second light emitting module 420 toward the display panel 200. Each of the first light emitting module 410 and the second light emitting module 420 includes light emitting blocks (LB1, LB2,..., LBn). Here, a pair of light emitting modules arranged on both sides of the display panel 200 is taken as an example, but a single light emitting module may be arranged only on one side of the display panel 200 in some cases.

  The light source driver 500a generates a drive signal based on the three-dimensional enable signal, the drive control signal (PWM1 to PWMn), and the luminance control signal (ADIM1 to ADIMn) provided from the timing controller 100a, and drives the light source unit 400. . When the light source unit 400 includes n light emission blocks (LB1, LB2,..., LBn), the timing control unit 100a sends n drive control signals (PWM1 to PWMn) and n luminance control signals to the light source drive unit 500a. (ADIM1 to ADIMn) are provided, and the light source drive unit 500a generates drive signals (S1, S2,..., Sn) based on these light source control signals and provides them to the light source unit 400.

  For example, the light source driver 500a controls a high time period (period, hereinafter simply referred to as “section”) in which the first light emitting block LB1 generates light based on the first drive control signal PWM1, and the first luminance control signal. Based on ADIM1, the level of the drive signal S1 applied to the first light emitting block LB1 is controlled within the high period.

  The glasses unit 600 includes a left eye shutter 610 and a right eye shutter 620, and selectively opens and closes the left eye shutter 610 and the right eye shutter 620 under the control of the timing control unit 100a.

  FIG. 2 is a block diagram of the light source driving unit shown in FIG. FIG. 3 is a waveform diagram for explaining a method of displaying a three-dimensional image by the light source driving unit of FIG.

  Referring to FIG. 2, the light source driver 500 a includes a current generator 510 and a signal generator 530.

  The current generator 510 receives a three-dimensional enable signal (3D_EN) for identifying an image mode from the timing controller 100a, and receives a current signal (3D_EN) that is set to the three-dimensional image mode in response to the three-dimensional enable signal (3D_EN). I_3D). For example, the first current signal (I_2D) is generated in the two-dimensional image mode, and the second current signal (I_3D) higher than the first current signal is generated in the three-dimensional image mode.

  The signal generation unit 530 includes a plurality of light emission drive units (531, 532,..., 538). The light emission drive units (531, 532,..., 538) generate a plurality of drive signals (S1, S2,..., Sn) based on the drive control signals (PWM1 to PWMn) and the luminance control signals (ADIM1 to ADIMn), Drive signals (S1, S2,..., Sn) are provided to the light emitting blocks (LB1, LB2,..., LBn). The signal generator 530 can be implemented with a single chip.

  Referring to FIG. 3, the timing controller 100a takes into account a liquid crystal response rate LR based on a data signal output to the display block, and controls a driving control signal PWM for controlling a light emitting block that provides light to the display block. A luminance control signal ADIM is generated.

  For example, as shown as the data signal DATA_OUT in FIG. 3, the left eye data signal L is output in the Nth frame (F_N) corresponding to each display block LBi of the display panel 200, and the (N + 1) th frame (F_N + 1). The first black data signal B is output, the right eye data signal R is output in the (N + 2) th frame (F_N + 2), and the second black data signal B is output in the (N + 3) th frame (F_N + 3). Here, a case where the left eye data signal L is a white data signal corresponding to a white image and the right eye data signal R is a black data signal corresponding to a black image will be described as an example.

  When the left-eye data signal L is applied to the display panel 200 in the Nth frame (F_N), the time corresponding to the liquid crystal response time LRT is T1, and the initial first time is shown as the liquid crystal response rate LR in FIG. In a section T1, a transition image that changes from a black image in the immediately preceding frame to an image corresponding to the left eye data signal L is displayed, and the left eye image is not completed. On the other hand, the image for the left eye corresponding to the data signal L for the left eye is completed in the second period T2 in the latter period.

  In the (N + 1) th frame (F_N + 1), when the first black data signal B is applied to the display panel 200 on which the left-eye image of the immediately preceding frame is displayed, a time corresponding to the liquid crystal response time LRT is defined as T1. As shown in FIG. 3 as the liquid crystal response rate LR, in the initial first section T1, a transient image that changes from the left-eye image to the black image is displayed, and the black image is not completed. On the other hand, the first black image corresponding to the black data signal B is completed in the second interval T2 in the latter period.

  In the (N + 2) th frame (F_N + 2), when the right-eye data signal R is applied to the display panel 200 on which the black image of the immediately preceding frame is displayed, the time corresponding to the liquid crystal response time LRT is set as T1. As shown by the liquid crystal response rate LR, in the initial first section T1, a transient image that changes from the first black image to the right eye image is displayed, and the right eye image is not completed. On the other hand, the right-eye image corresponding to the right-eye data signal R is completed in the second period T2 in the latter period.

  In the (N + 3) th frame (F_N + 3), when the second black data signal B is applied to the display panel 200 on which the right eye image of the immediately preceding frame is displayed, a time corresponding to the liquid crystal response time LRT is defined as T1. As shown in FIG. 3 as the liquid crystal response rate LR, in the initial first section T1, a transient image that changes from the right-eye image to the second black image is displayed, and the second black image is not completed. On the other hand, the second black image corresponding to the second black data signal B is displayed in the second period T2 in the latter period.

  In this way, the timing control unit 100a considers the section in which the left-eye or right-eye image and the black image incomplete image or completed image are displayed on the display block DBi in accordance with the liquid crystal response rate LR. A drive control signal PWMi and a brightness control signal ADIMi for the light emitting block LBi that provides light are generated. (I = 1 to n, but “i” is omitted in FIG. 3 and the following description)

  The drive control signal PWM has a high section HP having a high level VD for turning on the light emitting block and a low section LP having a low level GND for turning off the light emitting block. The high section HP is the second section T2 of the Nth frame (F_N) in which the left eye image is completed in the display block, and the (N + 1) th frame (F_N + 1) of the (N + 1) th frame (F_N + 1) changing from the left eye image to the black image. A partial section of one section T1 is included. The low section LP includes the remaining section of the first section T1 of the (N + 1) th frame (F_N + 1), the second section T2 of the (N + 1) th frame (F_N + 1) in which the black image is completed, and the right image from the black image. This includes the first section T1 of the (N + 2) th frame (F_N + 2) that changes to a work image.

  For example, the drive control signal PWM may be used for the left eye or the right eye according to the black data signal from a first timing t1 when the liquid crystal response rate LR for the left eye or right eye data signal becomes a high critical value TH_H. The liquid crystal response rate LR for the left-eye data signal or the right-eye data signal by the black data signal is the high period until the third time point t3 when the liquid crystal response rate LR for the data signal becomes the low critical value TH_L. From the time interval smaller than the low critical value, the liquid crystal response rate LR for the next left-eye data signal or right-eye data signal has a low interval having a low level GND until reaching a high critical value. Hereinafter, the case where the high critical value of the liquid crystal response rate LR is 90% of the final value and the low critical value is 30% of the final value will be described as an example. The high critical value and the low critical value can be variously set.

  The luminance control signal ADIM is modulated according to the liquid crystal response rate LR within the high section HP of the drive control signal PWM. The luminance control signal ADIM has a maximum level VD in the first section I1, has a level that gradually decreases from the maximum level VD to the set level VS in the second section I2, and has a minimum level GND in the third section I3.

The first section I1 is a section in which the liquid crystal response rate LR with respect to the data signal of the left-eye or right-eye image is 90% to 100%, that is, the left-eye or right-eye image is displayed on the display block. The second time when the data signal of the black image is provided from the first time t1 that is delayed by the time T1 corresponding to the liquid crystal response time LRT from the time when the data signal is provided, and the left-eye or right-eye image is completed. Until time t2.
The second section I2 is from the second time point t2 to the third time point t3 when the liquid crystal response rate LR with respect to the data signal for the left-eye or right-eye image falls from 100% to 30% due to the data signal of the black image. is there. In the second section I2, the luminance control signal ADIM has a level that gradually decreases from the maximum level VD to the set level VS in accordance with the liquid crystal response rate LR.
The third interval I3 is for the left eye corresponding to the time interval and the next frame in which the liquid crystal response rate LR for the left eye or right eye image data signal falls below 30% due to the black image data signal. And the time interval from the third time point t3 to the fourth time point t4, which is the sum of the time interval from the fourth time point t4 when the liquid crystal response rate LR to the right eye data signal reaches 90%.

  The signal generation unit 530 of the light source driving unit 500a generates a driving signal Si based on the driving control signal PWMi and the luminance control signal ADIMi and provides it to the light emitting block. The waveform of the drive signal Si is similar or substantially the same as the waveform of the luminance control signal ADIMi, and the generation timing of the drive signal Si is determined by the drive control signal PWMi.

  As a result, the light emitting block provides light to a display block corresponding to the light emitting block in response to the driving signal. The light emitting block provides the display block with light of maximum luminance in a first section I1 in which a left-eye or right-eye image is completed, and the display block changes from a left-eye or right-eye image to a black image. In the second section I2 in which the transient image is displayed, light gradually decreasing from the maximum brightness to the set brightness is provided, and the section in which the black image is completed in the display block and the next left eye or right eye Light is blocked in the third section I3 including the section in which the image for use is not completed.

  In the three-dimensional image mode, a high-luminance three-dimensional image is displayed with low power consumption by adjusting the light luminance in consideration of the liquid crystal response time of the transient image that changes from the left-eye or right-eye image to the black image. it can. That is, as indicated by POWER_SAVING (hatched portion) in FIG. 3, the luminance can be gradually decreased in the second section I2 to save power consumption. At this time, the 3D image can be displayed with high luminance by using the saved power consumption for boosting of the current signal (I_3D) applied to the 3D image mode.

  Further, the crosstalk of the three-dimensional image visually recognized by the observer can be reduced by gradually decreasing the luminance in the second section where the image for the left eye or the image for the right eye changes to the black image. Therefore, the display quality of the three-dimensional image can be improved.

FIG. 4 is a conceptual diagram for explaining a three-dimensional image display method according to the display device of FIG.
1, 2, and 4, the light source unit 400 includes first to eighth light emission blocks (LB1, LB2,..., LB8). The first to eighth light emitting blocks (LB1, LB2,..., LB8) provide light to the first to eighth display blocks (DB1, DB2,..., DB8) of the display panel 200.

The timing control unit 100 a provides the panel drive unit 300 with a 240 Hz left-eye image frame L, a black image frame B, a right-eye image frame R, and a black image frame B. Here, a case where the left eye image frame L is a white image frame and the right eye image frame R is a black image frame will be described as an example.
In FIGS. 3 and 4, the left-eye image frame L and the right-eye image frame R are both general cases, that is, in the case of a frame other than black, the left-eye image frame (white) in FIGS. The same light source control signal (drive control signal PWMi and luminance control signal ADIMi) as the image frame), and therefore the same drive signal Si is applied.

  The panel driving unit 300 provides the data signal of the left eye image frame L to the display panel 200 in the Nth frame (F_N), as shown as the data signal DBi_DATA (i = 1 to 8) in FIG. The data signal of the first black image frame B is provided to the display panel 200 in the (N + 1) frame (F_N + 1), and the data signal of the image frame R for the right eye is provided to the display panel 200 in the (N + 2) frame (F_N + 2). The data signal of the second black image frame B is provided to the display panel 200 in the (N + 3) th frame (F_N + 3). The display panel 200 completes an image corresponding to the data signal by delaying the liquid crystal response time LRT corresponding to the liquid crystal response speed from the time when the data signal is applied.

The timing controller 100a provides the light source driver 500a with first to eighth drive control signals (PWM1, PWM2,..., PWM8) and first to eighth luminance control signals (ADIM1, ADIM2,..., ADIM8).
As shown in FIG. 4, the data signals (DB1_DATA, DB2_DATA,..., DB8_DATA) are sequentially staggered in each frame, and the first to eighth drive control signals (PWM1, PWM2,..., PWM8) and the first to first drive signals. The eight luminance control signals (ADIM1, ADIM2,..., ADIM8) are staggered in synchronization with the data signal.

  First, a driving method of the first light-emitting block LB1 corresponding to the first display block DB1 and the first display block DB1 will be described.

  The first display block DB1 is provided with the data signal of the image frame L for the left eye from the beginning of the Nth frame (F_N), and the data signal of the black image frame B from the beginning of the (N + 1) th frame (F_N + 1). The data signal of the right eye image frame R is provided from the beginning of the (N + 2) th frame (F_N + 2), and the data signal of the black image frame B is provided from the beginning of the (N + 3) th frame (F_N + 3) (DB1_DATA). .

  The first drive control signal PWM1 and the first luminance control signal ADIM1 are provided to the first light emission drive unit 531 of the light source drive unit 500a. The first drive control signal PWM1 includes a high period having a high level and a low period having a low level. In the high period, the liquid crystal response to the black data signal B from the time when the liquid crystal response rate becomes 100% with respect to the left eye data signal L or the right eye data signal R provided to the first display block DB1. From the time when the liquid crystal response rate with respect to the black data signal B drops to 30% from the time when the rate drops from 100% to 30%, the low period is the data signal L for the left eye or the right eye of the next frame. Up to the point when the liquid crystal response rate becomes 100% with respect to the data signal R for use.

  The first luminance control signal ADIM1 has a period synchronized with the period of the first drive control signal PWM1, and is modulated in synchronization with the liquid crystal response rate within the high period of the first drive control signal PWM1. The first luminance control signal ADIM1 has a maximum level in the first interval where the liquid crystal response rate is 100%, and from the maximum level in proportion to the liquid crystal response rate in the second interval where the liquid crystal response rate falls from 100% to 30%. The level gradually decreases to a set level corresponding to 30% of the maximum level.

  The first light emission driver 531 generates the first drive signal S1 based on the first drive control signal PWM1 and the first luminance control signal ADIM1, and provides the first drive signal S1 to the plurality of light emitting diodes included in the first light emission block LB1. Accordingly, the first light-emitting block LB1 provides light of maximum luminance in the section where the left-eye or right-eye image of the first display block DB1 is completed, and the left-eye or right-eye image of the first display block DB1. In the section where the black image is changed, light that gradually decreases from the maximum brightness to the set brightness is provided, and the section for the black image of the first display block DB1 is completed and the left image or the Light is blocked in the section that changes to the right-eye image.

  Next, a driving method of the fifth display block DB5 and the fifth light emission block LB5 that provides light to the fifth display block DB5 will be described.

  The fifth display block DB5 is provided with the left eye data signal of the left eye image frame L from the middle of the Nth frame (F_N), and the black data of the black image frame B from the middle of the (N + 1) th frame (F_N + 1). And a right eye data signal of the right eye image frame R is provided from the middle of the (N + 2) frame (F_N + 2), and black data of the black image frame B from the middle of the (N + 3) frame (F_N + 3). A signal is provided (DB5_DATA).

  The fifth drive control signal PWM5 and the fifth luminance control signal ADIM5 are provided to the fifth light emission drive unit 535 of the light source drive unit 500a. The fifth drive control signal PWM5 is supplied to the black data signal when the liquid crystal response rate becomes 100% with respect to the left-eye data signal L or the right-eye data signal R provided to the fifth display block DB5. When the liquid crystal response rate falls from 100% to 30% and remains at a high level, the liquid crystal response rate becomes 100% with respect to the left eye data signal L or the right eye data signal R of the next frame. Has a low level.

  The fifth luminance control signal ADIM5 has a period synchronized with the period of the fifth drive control signal PWM5, and is modulated in synchronization with the liquid crystal response rate within the high period of the fifth drive control signal PWM5. The fifth luminance control signal ADIM5 has a maximum level in the first interval where the liquid crystal response rate is 100%, and is proportional to the liquid crystal response rate in the second interval where the liquid crystal response rate falls from 100% to 30%. The level gradually decreases from the maximum level to a set level corresponding to 30% of the maximum level.

  The fifth light emission driver 535 generates a fifth drive signal S5 based on the fifth drive control signal PWM5 and the fifth luminance control signal ADIM5 and provides the fifth drive signal S5 to the plurality of light emitting diodes included in the fifth light emission block LB5. Accordingly, the fifth light-emitting block LB5 provides the fifth display block DB5 with light having the maximum luminance in the section where the left-eye or right-eye image is completed, and the fifth-display block DB5 left-eye or right-eye image. In the section where the black image is changed, the light gradually decreasing from the maximum brightness to the set brightness is provided, and the black image of the fifth display block DB5 is completed for the left eye or from the black image. Light is blocked in the section that changes to the right-eye image.

  Next, a driving method of the eighth display block DB8 that supplies light to the eighth display block DB8 and the eighth display block DB8 that are the last display blocks will be described.

  The eighth display block DB8 is provided with the left eye data signal of the left eye image frame L from the latter stage of the Nth frame (F_N), and from the latter stage of the (N + 1) th frame (F_N + 1) to the first black image frame B. The black data signal is provided, the right eye data signal of the right eye image frame R is provided from the latter stage of the (N + 2) frame (F_N + 2), and the second black image frame from the latter stage of the (N + 3) frame (F_N + 3). B black data signal is provided (DB8_DATA).

  The eighth drive control signal PWM8 and the eighth luminance control signal ADIM8 are provided to the eighth light emission drive unit 538 of the light source drive unit 500a. The eighth luminance control signal ADIM8 has a period synchronized with the period of the eighth drive control signal PWM8, and is modulated in synchronization with the liquid crystal response characteristic within the high period of the eighth drive control signal PWM8. The eighth luminance control signal ADIM8 has a maximum level when the liquid crystal response rate is 100%, and from the maximum level in proportion to the liquid crystal response rate when the liquid crystal response rate falls from 100% to 30%. It gradually changes to a set level corresponding to 30% of the maximum level.

  The eighth light emission driver 538 of the light source driver 500a generates an eighth drive signal S8 based on the eighth drive control signal PWM8 and the eighth luminance control signal ADIM8, and includes a plurality of light emitting diodes included in the eighth light emission block LB8. To provide. Accordingly, the eighth light-emitting block LB8 provides the eighth display block DB8 with light of maximum luminance in the section where the left-eye or right-eye image is completed, and the eighth display block DB8 has the left-eye or right-eye image. In the section that changes to the black image, light that gradually decreases from the maximum brightness to the set brightness is provided, and the section for completing the black image in the eighth display block DB8 and the left image or the Light is blocked in the section that changes to the right-eye image.

  Thus, the display device displays a three-dimensional image according to the operation of the display panel 200 and the light source unit 400.

  Meanwhile, the three-dimensional image displayed on the display device is visually recognized by an observer through the glasses unit 600.

  As shown in FIG. 4, the left-eye shutter signal LSS has a high level in a section where the left-eye image is displayed in all of the first to eighth display blocks (DB1, DB2,..., DB8). On the other hand, the right eye shutter signal RSS has a low level. Further, the right-eye shutter signal RSS has a high level in the section in which the right-eye image is displayed in all of the first to eighth display blocks (DB1, DB2,..., DB8), while the left-eye shutter signal LSS is Has a low level. The left eye shutter 610 and the right eye shutter 620 of the glasses unit 600 respond to the left eye shutter signal LSS and the right eye shutter signal RSS synchronized with the left eye image and the right eye image displayed on the display panel 200. Thus, the viewer visually recognizes the three-dimensional image.

  FIG. 5 is a block diagram of a display device according to another embodiment of the present invention. FIG. 6 is a waveform diagram for explaining a method of displaying a three-dimensional image according to the display device of FIG.

  The display device according to this embodiment is substantially the same as the display device described in FIG. 1 except for the timing control unit 100b and the light source driving unit 500b. In the following, the same components are given the same reference numerals, and detailed description thereof will not be repeated.

  Referring to FIGS. 5 and 6, the timing controller 100b provides a plurality of light source control signals (PWM_DIM1, PWM_DIM2,..., PWM_DIMn) to the light source driver 500b. Each light source control signal is a signal obtained by processing the drive control signal PWM and the luminance control signal ADIM shown in FIG. 3 as one.

The light source driver 500 b includes a current generator 510 and a signal generator 530.
The current generator 510 receives a three-dimensional enable signal (3D_EN) for identifying an image mode from the timing controller 100a, and receives a current signal (3D_EN) that is set to the three-dimensional image mode in response to the three-dimensional enable signal (3D_EN). I_3D).

  The signal generation unit 530 includes a plurality of light emission drive units (531, 532,..., 538). The light emission driving units (531, 532,..., 538) generate a plurality of time-modulated drive signals (S1, S2,..., Sn) based on the light source control signals (PWM_DIM1 to PWM_DIMn) to generate light emission blocks (LB1, LB2). ,..., LBn).

  For example, for the display block, the left eye data signal L is output in the Nth frame (F_N), the first black data signal B is output in the (N + 1) th frame (F_N + 1), and the (N + 2) th frame. The right-eye data signal R is output at (F_N + 2), and the second black data signal B is output at the (N + 3) th frame (F_N + 3). The display block displays a completed image corresponding to the data signal in accordance with the application timing of the data signal based on the liquid crystal response time LRT.

  As described above, the timing controller 100b generates the light source control signal (PWM_DIM) in consideration of the section in which the left-eye or right-eye image and the black image are displayed on the display panel 200 according to the liquid crystal response time LRT.

  The light source control signal (PWM_DIM) has a maximum level VD in the first section I1 in which the liquid crystal response rate LR with respect to the left-eye or right-eye data signal is 100%, and the liquid crystal response rate LR is 100 by the black data signal. The second section I2 falling from 30% to 30% has a level that gradually decreases from the maximum level VD to the set level VS corresponding to 30% of the maximum level according to the liquid crystal response rate. The light source control signal (PWM_DIM) has a liquid crystal response rate LR with respect to the left-eye or right-eye data signal to be provided next from 30% with respect to the left-eye or right-eye data signal. The third section I3 has a minimum level GND until it reaches 100%.

  The signal generator 530 generates a plurality of drive signals (S1, S2,..., Sn) based on the light source control signals (PWM_DIM1 to PWM_DIMn), and supplies the drive signals (S1, S2,..., LBn) to the light emission blocks (LB1, LB2,. S2, ..., Sn).

  As a result, by providing the display panel with light that gradually decreases from the maximum luminance to the set luminance in the second section I2 that changes to a black image in the left-eye or right-eye image, high luminance with low power consumption is achieved. 3D images can be displayed.

  Further, the crosstalk of the three-dimensional image visually recognized by the observer can be reduced by reducing the luminance of the section where the image for the left eye or the image for the right eye changes to the black image. Therefore, the display quality of the three-dimensional image can be improved.

FIG. 7 is a block diagram of a display device according to another embodiment of the present invention.
Referring to FIG. 7, the display apparatus according to the present embodiment includes a timing controller 100c and a light source driver 500c.

  The timing controller 100c provides a plurality of drive control signals (PWM1 to PWMn) and a plurality of digital first luminance control signals (DDIM1, DDIM2 to DDIMn) to the light source driver 500c. Each of the first luminance control signals (DDIM1 to DDIMn) is a luminance control signal in which the response speed of the display panel is taken into consideration.

  The light source driver 500 c includes a current generator 510, a signal converter 520, and a signal generator 530.

  The current generator 510 is substantially the same as the embodiment described above, and generates a current signal (3D_En) in response to the three-dimensional enable signal.

  The signal converter 520 converts the digital first luminance control signals (DDIM1 to DDIMn) provided from the timing controller 100c into analog second luminance control signals (ADIM1 to ADIMn). It consists of a digital data communication system (for example, I2C, SPI, etc.) between the timing controller 100c and the signal converter 520.

  The signal generation unit 530 includes a plurality of light emission drive units (531, 532,..., 538). Drive control signals (PWM1 to PWMn) and second luminance control signals (ADIM1 to ADIMn) are provided to the light emission driving units (531, 532,..., 538). The light emission drive units (531, 532,..., 538) are a plurality of time-modulated drive signals (S1, S2,..., Sn) based on the drive control signals (PWM1 to PWMn) and the second luminance control signals (ADIM1 to ADIMn). ) Is generated and provided to the light emitting blocks (LB1, LB2,..., LBn).

FIG. 8 is a block diagram of a display device according to another embodiment of the present invention.
Referring to FIG. 8, the display apparatus according to the present embodiment includes a timing controller 100d and a light source driver 500d.

  The timing controller 100d provides a plurality of digital first drive control signals (DPWM1 to DPWMn) and a plurality of first luminance control signals (DDIM1 to DDIMn) to the light source driver 500d.

  The light source driver 500d includes a current generator 510, a signal converter 520, and a signal generator 530.

  The current generator 510 is substantially the same as the embodiment described above, and generates a current signal (3D_En) in response to the three-dimensional enable signal.

  The signal converter 520 converts the digital first drive control signals (DPWM1 to DPWMn) provided from the timing controller 100d into analog second drive control signals (PWM1 to PWMn). The signal converter 520 converts the digital first luminance control signals (DDIM1 to DDIMn) provided from the timing controller 100d into analog second luminance control signals (ADIM1 to ADIMn). The digital data communication method between the timing control unit 100d and the signal conversion unit 520 is, for example, I2C or SPI.

  The signal generation unit 530 includes a plurality of light emission drive units (531, 532,..., 538). A second drive control signal (PWM1 to PWMn) and a second luminance control signal (ADIM1 to ADIMn) are provided to the light emission drive units (531, 532,..., 538). The light emission drive units (531, 532,..., 538) are a plurality of time-modulated drive signals (S1, S2,...) Based on the second drive control signals (PWM1 to PWMn) and the second luminance control signals (ADIM1 to ADIMn). , Sn) is generated and provided to the light-emitting blocks (LB1, LB2,..., LBn).

FIG. 9 is a block diagram of a display device according to another embodiment of the present invention.
Referring to FIG. 9, the display apparatus according to the present embodiment includes a timing control unit 100e and a light source driving unit 500e.

  The timing controller 100e provides the light source driver 500e with a plurality of digital first light source control signals (DPWM_DIM1 to DPWM_DIMn).

  The light source driver 500e includes a current generator 510, a signal converter 520, and a signal generator 530.

  The current generator 510 is substantially the same as the embodiment described above, and generates a current signal (3D_En) in response to the three-dimensional enable signal.

  The signal converter 520 converts the digital first light source control signals (DPWM_DIM1 to DPWM_DIMn) provided from the timing controller 100e into analog second light source control signals (PWM_DIM1 to PWM_DIMn). The second light source control signals (PWM_DIM1 to PWM_DIMn) are substantially the same as the light source control signals (PWM_DIM1 to PWM_DIMn) according to the embodiment described above. The digital data communication method between the timing control unit 100e and the signal conversion unit 520 is, for example, I2C or SPI.

  The signal generation unit 530 includes a plurality of light emission drive units (531, 532,..., 538). Second light source control signals (PWM_DIM1 to PWM_DIMn) are provided to the light emission driving units (531, 532,..., 538). The light emission drive units (531, 532,..., 538) generate a plurality of time-modulated drive signals (S1, S2,..., Sn) based on the second light source control signals (PWM_DIM1 to PWM_DIMn) and LB1, LB2,..., LBn).

  The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to such examples. It is obvious that a person having ordinary knowledge in the technical field to which the present invention pertains can come up with various changes or modifications within the scope of the technical idea described in the claims. Of course, it is understood that these also belong to the technical scope of the present invention.

  According to the embodiments of the present invention described above, in the three-dimensional image mode, the light luminance is adjusted by taking into account the liquid crystal response characteristics of the transient image when changing from the left-eye or right-eye image to the black image. A three-dimensional image with high power consumption and high brightness can be displayed. Further, the crosstalk of the three-dimensional image visually recognized by the observer can be reduced by reducing the luminance in a section where the image for the left eye or the right eye is changed to the black image. Therefore, the display quality of the three-dimensional image can be improved.

100a, 100b, 100c, 100d, 100e Timing control unit 200 Display panel 300 Panel driving unit 310 Data driving unit 320 Gate driving unit 400 Light source unit 410 First light emitting module 420 Second light emitting module 430 Light guide plates 500a, 500b, 500c, 500d , 500e Light source drive unit 510 Current generation unit 520 Signal conversion unit 530 Signal generation units 531, 532, 533,..., 538 First, second, third,..., Nth light emission drive unit 600 Glasses unit 610 Left eye shutter 620 Right eye shutter

Claims (12)

A display panel for displaying images,
A plurality of light emitting blocks arranged in a direction in which the image is scanned;
A light source unit that provides light to the display blocks of the display panel to which the light emitting blocks respectively correspond;
For the display block, light having the maximum luminance is generated in the first section in which the left-eye or right-eye image is completed, and a transient image that changes from the left-eye or right-eye image to a black image is displayed. The light that gradually decreases from the maximum brightness to the set brightness is generated in the second section, and the section for which the black image is completed and the next image for the left eye or the right eye are not completed And a light source driving unit for driving the light source unit so as to block light in a third section including the section. The light source driving unit is
A current generator for generating a current signal in response to the three-dimensional enable signal;
The display device according to claim 1, further comprising: a signal generation unit that provides a drive signal to the light emitting block based on the current signal. The signal generator is
The display device according to claim 2, further comprising a plurality of light emission drive units that provide a drive signal to each of the light emission blocks. An analog drive control signal having a high level in the first interval and the second interval and having a low level in the third interval;
Generating an analog luminance control signal having a maximum level in the first interval, a level gradually decreasing from the maximum level to a set level in the second interval, and having a minimum level in the third interval; The display device according to claim 2, further comprising a timing controller provided to the signal generator.   Generating an analog light source control signal having a maximum level in the first interval, a level gradually decreasing from the maximum level to a set level in the second interval, and having a minimum level in the third interval; The display device according to claim 2, further comprising a timing controller provided to the signal generator. The light source driving unit is
A current generator for generating a current signal in response to the three-dimensional enable signal;
A signal converter for converting a digital control signal into an analog control signal;
The display device according to claim 1, further comprising: a signal generation unit that provides a drive signal to the light emitting block based on the current signal. An analog drive control signal having a high level in the first interval and the second interval and having a low level in the third interval;
A digital luminance control signal having a maximum level in the first section, a level gradually decreasing from the maximum level to a set level in the second section, and a minimum level in the third section is driven by the light source. A timing control unit provided to the unit,
The analog drive control signal is provided to the signal generation unit, and the digital luminance control signal is converted into an analog luminance control signal by the signal conversion unit and provided to the signal generation unit. The display device according to claim 6. A digital drive control signal having a high level in the first interval and the second interval and having a low level in the third interval;
A digital luminance control signal having a maximum level in the first section, a level gradually decreasing from the maximum level to a set level in the second section, and a minimum level in the third section is driven by the light source. A timing control unit provided to the unit,
The display according to claim 6, wherein the digital drive control signal and the luminance control signal are converted into an analog drive control signal and a luminance control signal by the signal conversion unit and provided to the signal generation unit. apparatus. A digital light source control signal having a maximum level in the first section, a level gradually decreasing from the maximum level to a set level in the second section, and a minimum level in the third section is driven by the light source. A timing control unit provided to the unit,
The display device according to claim 6, wherein the digital light source control signal is converted into an analog light source control signal by the signal conversion unit and provided to the signal generation unit.   The display panel further includes a panel driver that sequentially provides the left eye data signal, the black image data signal, the right eye data signal, and the black image data signal in units of frames. The display device according to claim 1. The light source unit is
Providing the display block with light of the maximum brightness from a first time point to a second time point delayed from a time point when the left eye or right eye data signal is provided to the display block;
The first time point is a time point when the liquid crystal response rate of the display block with respect to the left eye or right eye image data signal reaches a high critical value, and the second time point is provided by the black image data signal. The display device according to claim 1, wherein the display device is at a point in time. The light source unit provides the display block with the gradually decreasing light from the second time point to the third time point;
The display device according to claim 11, wherein the third time point is a time point when the liquid crystal response rate with respect to the data signal of the left-eye image or the right-eye image reaches a low critical value.

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