JP2012209667A - Frequency conversion device - Google Patents

Frequency conversion device Download PDF

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JP2012209667A
JP2012209667A JP2011072265A JP2011072265A JP2012209667A JP 2012209667 A JP2012209667 A JP 2012209667A JP 2011072265 A JP2011072265 A JP 2011072265A JP 2011072265 A JP2011072265 A JP 2011072265A JP 2012209667 A JP2012209667 A JP 2012209667A
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frequency conversion
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JP5303594B2 (en
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Tadaaki Fuse
匡章 布施
Hitoshi Sekiya
仁志 関谷
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Anritsu Corp
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Abstract

PROBLEM TO BE SOLVED: To reduce costs by flexibly meeting users' requests.SOLUTION: An input signal x(t) input into a signal division section 21 is divided into a plurality of adjacent band signals having a narrower signal bandwidth before being fed to a frequency conversion/combination processing section 25. The frequency conversion/combination processing section 25 includes: a plurality of modules 31 each integrally having a band signal input terminal 31a, a frequency conversion circuit 32, an A/D converter 33, a correction processing circuit 34, a combination signal input terminal 31d, a combination circuit 35 and a combination signal output terminal 31e; module holding means 40 for holding the plurality of modules 31 removable in a device; band signal connection means 41 for connecting the modules 31 thus held to the signal division section 21; and combination signal connection means 43 for connecting the combination signal output terminal 31e and the combination signal input terminal 31d sequentially between the different modules 31 thus held and outputting a full band combination signal from the final stage module 31.

Description

本発明は、例えば移動体通信で用いられる高周波で且つ広帯域なアナログ信号の波形解析やスペクトラム解析を、デジタル型解析装置で行う際に用いる周波数変換装置において、広帯域な信号の瞬時パワーによる歪を低減させ、広帯域で且つ高いダイナミックレンジを実現するための技術に関する。   The present invention reduces distortion due to instantaneous power of a wideband signal in a frequency converter used when performing waveform analysis and spectrum analysis of a high-frequency and wideband analog signal used in mobile communication, for example, with a digital analysis device. And a technique for realizing a wide dynamic range with a wide bandwidth.

例えば、移動体通信で用いられる無線信号は、数GHz以上の高周波帯でかつ数10MHz以上の広帯域な変調波である。このような高周波帯で且つ広帯域な信号の解析、例えばスペクトラム解析を行うための装置として従来からアナログ方式のスペクトラムアナライザが用いられている。   For example, a radio signal used in mobile communication is a modulated wave having a wide frequency band of several GHz or higher and several tens of MHz or higher. Conventionally, an analog spectrum analyzer has been used as an apparatus for performing such high-frequency and wideband signal analysis, for example, spectrum analysis.

アナログ方式のスペクトラムアナライザとしては、測定対象のアナログ信号をミキサに入力してローカル信号と混合し、その差周波数成分を狭帯域なフィルタにより抽出する構成をもち、ローカル信号の周波数を広帯域に掃引して、入力アナログ信号に含まれる各周波数成分のレベルを検出するのが一般的である。   An analog spectrum analyzer has a configuration in which an analog signal to be measured is input to a mixer and mixed with a local signal, and the difference frequency component is extracted by a narrow-band filter. The frequency of the local signal is swept over a wide band. In general, the level of each frequency component included in the input analog signal is detected.

しかし、測定対象のアナログ信号が前記したような広帯域な変調波の場合、その尖頭電力対平均電力比が非常に大きくなり、その全ての電力がミキサに入力されることになり、ミキサの適正な動作範囲を越え、混変調歪を発生させ、測定結果にエラーを生じさせる。   However, when the analog signal to be measured is a broadband modulated wave as described above, the peak power to average power ratio becomes very large, and all the power is input to the mixer. This results in cross-modulation distortion exceeding the normal operating range, and errors in the measurement results.

これを防ぐために、通常はミキサの前段に減衰器を設けて、入力信号の尖頭電力が適正範囲となるように減衰させているが、この減衰器によって平均電力レベルも低下し、結果的に信号のS/Nが低下して、測定ダイナミックレンジが狭くなるという問題がある。   In order to prevent this, an attenuator is usually provided in front of the mixer to attenuate the peak power of the input signal so that it falls within the proper range, but this attenuator also reduces the average power level. There is a problem that the S / N of the signal is lowered and the measurement dynamic range is narrowed.

また、上記問題を解決する方法として、ミキサの前段に、帯域が異なる複数のフィルタを選択可能に設け、ミキサへのローカル信号の周波数に応じて前段のフィルタを選択するフィルタ選択方式や、一つの周波数可変型のフィルタをミキサの前段に設け、そのフィルタの周波数をローカル信号の周波数に追従変化させるトラッキング方式がある。   In addition, as a method for solving the above problem, a filter selection method in which a plurality of filters having different bands can be selected at the front stage of the mixer and the front stage filter is selected according to the frequency of the local signal to the mixer, There is a tracking method in which a variable frequency type filter is provided at the front stage of the mixer, and the frequency of the filter changes following the frequency of the local signal.

しかし、いずれの方式でもローカル信号の掃引により入力信号のスペクトラム情報を得る方式であるため、原理的に実時間測定ができない。   However, in any method, since the spectrum information of the input signal is obtained by sweeping the local signal, in principle, real time measurement cannot be performed.

この問題を解決するための有効な技術として、高周波帯の広帯域な入力信号を複数の帯域の信号に分波し、それら各帯域の信号に対して中間周波数帯への周波数変換処理を行い、その中間周波数帯に変換された信号をそれぞれA/D変換してデジタルの信号列に変換し、さらに各帯域についての信号経路の僅かな差やA/D変換の僅かなサンプリングタイミングのずれ等によって生じる帯域間誤差を補正してから合波処理することで、高周波帯の広帯域な入力信号の実時間のスペクトラム情報を、デジタル処理しやすいより低い周波数帯へ高いダイナミックレンジで変換するものが提案されている(特許文献1)。   As an effective technique for solving this problem, a broadband input signal in a high frequency band is demultiplexed into a plurality of band signals, and the frequency conversion processing to the intermediate frequency band is performed on the signals in each band. Each signal converted to the intermediate frequency band is A / D converted into a digital signal sequence, and is further caused by a slight difference in signal path for each band, a slight sampling timing shift in A / D conversion, and the like. It has been proposed to convert real-time spectrum information of a wideband input signal in a high frequency band to a lower frequency band that is easy to digitally process with a high dynamic range by performing a multiplexing process after correcting the interband error. (Patent Document 1).

特開2009−246956号公報JP 2009-246958 A

上記構成の周波数変換装置を実際に構成する場合に、従来では、入力信号を複数の帯域信号に分波する信号分波ユニット、複数系列に分けられた帯域信号を中間周波数帯に変換してA/D変換する周波数変換ユニット、補正処理を行う補正処理ユニットおよび合波処理ユニットを設け、それらのユニット間を順に信号が通過していくように構築していた。   In the case of actually configuring the frequency conversion device having the above configuration, conventionally, a signal demultiplexing unit that demultiplexes an input signal into a plurality of band signals, a band signal divided into a plurality of series is converted into an intermediate frequency band, and A A frequency conversion unit that performs / D conversion, a correction processing unit that performs correction processing, and a multiplexing processing unit are provided, and the signals are sequentially passed between these units.

しかしながら、このように、処理の種類単位で回路をユニット化してその間を接続して装置を構成した場合、次のような問題が生じる。   However, when the apparatus is configured by unitizing the circuits in units of processing types and connecting them, the following problems occur.

対象信号の帯域幅が広くなると分波数も多くなり、信号分波ユニットだけでなく、それに続く、すべてのユニットを変更しなくてはならず、結局、解析される可能性のある信号のうちの最も広帯域な信号の帯域幅に合わせて、各ユニットを構成しておかなければならず、狭い帯域の信号のみを対象とするユーザーにとって無用な回路を含み、コスト高なものとなってしまう。   As the bandwidth of the target signal increases, the number of demultiplexes increases, and not only the signal demultiplexing unit, but all subsequent units must be changed, and eventually, of the signals that can be analyzed. Each unit must be configured in accordance with the bandwidth of the widest signal, and includes a circuit unnecessary for a user who targets only a narrow-band signal, resulting in high cost.

また、特定の帯域の信号処理に関して異常が発生している場合であっても、その異常箇所のユニット全体の交換で修理を行うことになり、分波数が多い場合、ユニット毎の部品代も高額となり、ユーザーに必要以上の損害を与えることになる。   In addition, even if there is an abnormality in signal processing in a specific band, it will be repaired by exchanging the entire unit at the abnormal part, and if the number of demultiplexing is large, the part fee for each unit is also expensive. This will cause more damage to the user than necessary.

本発明は、この問題を解決し、ユーザーの要求にフレキシブルに対応できて無駄なコストを省き、修理等のメンテナンスの際もユーザーに必要以上の損害を与えないで済む周波数変換装置を提供することを目的としている。   The present invention provides a frequency converter that solves this problem, can flexibly respond to user requests, saves unnecessary costs, and does not cause unnecessary damage to the user during maintenance such as repairs. It is an object.

前記目的を達成するために、本発明の請求項1の周波数変換装置は、
高周波帯の入力信号を、該入力信号の帯域より狭い幅の複数の隣接する帯域信号に分波し、該各帯域信号を複数の出力端子(24)からそれぞれ出力する信号分波部(21)と、
前記各帯域信号に対してそれぞれ中間周波数帯への周波数変換処理を行い、該中間周波数帯に変換された信号をそれぞれA/D変換し、さらに帯域分波したことによって生じる誤差の補正処理を行ってから合波する周波数変換・合波処理部(25)とを有し、前記入力信号をより低い周波数帯の信号に変換する周波数変換装置において、
前記周波数変換・合波処理部は、
前記帯域信号を入力するための帯域信号入力端子(31a)、該帯域信号入力端子に入力された帯域信号を所定中間周波数帯へ周波数変換する周波数変換回路(32)、該周波数変換回路の出力信号をサンプリングしてデジタル信号列に変換するA/D変換器(33)、該A/D変換器から出力されるデジタル信号列に対して、帯域分波に伴って生じる誤差の補正処理を行う補正処理回路(34)、合波信号を入力するための合波信号入力端子(31d)、前記補正処理回路で補正された信号と前記合波信号入力端子に入力された信号とを合波する合波回路(35)および該合波回路で合波された合波信号を出力するための合波信号出力端子(31e)とを備えて一体化された複数の周波数変換・合波処理モジュール(31)と、
前記複数の周波数変換・合波処理モジュールを、着脱可能な状態で装置内に保持するモジュール保持手段(40)と、
前記モジュール保持手段に保持された前記複数の周波数変換・合波処理モジュールの各帯域信号入力端子と前記信号分波部の各出力端子との間をコネクタ接続して、前記各帯域信号を前記各周波数変換・合波処理モジュールに与える帯域信号接続手段(41)と、
前記モジュール保持手段に保持された前記複数の周波数変換・合波処理モジュールについて、異なるモジュール間で前記合波信号出力端子と前記合波信号入力端子との間を順にコネクタ接続して、最終段の周波数変換・合波処理モジュールの前記合波回路の合波信号出力端子から、全帯域分の合波信号を出力させる合波信号接続手段(43)とを備えていることを特徴とする。
In order to achieve the above object, the frequency conversion device according to claim 1 of the present invention provides:
A signal demultiplexing unit (21) for demultiplexing an input signal in a high frequency band into a plurality of adjacent band signals having a narrower width than the band of the input signal, and outputting each band signal from a plurality of output terminals (24), respectively. When,
Each band signal is subjected to frequency conversion processing to an intermediate frequency band, each signal converted to the intermediate frequency band is subjected to A / D conversion, and error correction processing caused by band demultiplexing is performed. A frequency converting / combining processing unit (25) for combining the input signals, and converting the input signal into a signal of a lower frequency band,
The frequency conversion / combining processing unit
A band signal input terminal (31a) for inputting the band signal, a frequency conversion circuit (32) for frequency-converting the band signal input to the band signal input terminal to a predetermined intermediate frequency band, and an output signal of the frequency conversion circuit A / D converter (33) that samples the signal and converts it into a digital signal sequence, and a correction that performs a correction process for errors caused by band demultiplexing on the digital signal sequence output from the A / D converter A processing circuit (34), a combined signal input terminal (31d) for inputting a combined signal, and a signal for combining the signal corrected by the correction processing circuit and the signal input to the combined signal input terminal A plurality of frequency conversion / combination processing modules (31) integrated with a wave circuit (35) and a combined signal output terminal (31e) for outputting a combined signal combined by the combining circuit )When,
Module holding means (40) for holding the plurality of frequency conversion / multiplexing processing modules in the apparatus in a detachable state;
A connector is connected between each band signal input terminal of each of the plurality of frequency conversion / multiplexing processing modules held by the module holding means and each output terminal of the signal branching unit, and each band signal is sent to each Band signal connection means (41) to be given to the frequency conversion / multiplexing module;
For the plurality of frequency conversion / multiplexing processing modules held in the module holding means, the connectors between the combined signal output terminal and the combined signal input terminal are sequentially connected between different modules, and the final stage It is characterized by comprising combining signal connecting means (43) for outputting combined signals for all bands from the combined signal output terminal of the combining circuit of the frequency conversion / combining processing module.

また、本発明の請求項2の周波数変換装置は、請求項1記載の周波数変換装置において、
前記各周波数変換・合波処理モジュールの周波数変換回路が用いるローカル信号の周波数が等しく、それぞれの中間周波数帯の中心が前記信号分波部の複数の隣接する帯域の中心周波数の差分と等しい差を有していることを特徴とする。
Moreover, the frequency converter of Claim 2 of this invention is the frequency converter of Claim 1,
The frequency of the local signal used by the frequency conversion circuit of each of the frequency conversion / multiplexing processing modules is equal, and the center of each intermediate frequency band is equal to the difference between the center frequencies of a plurality of adjacent bands of the signal demultiplexing unit. It is characterized by having.

また、本発明の請求項3の周波数変換装置は、請求項1記載の周波数変換装置において、
前記各周波数変換・合波処理モジュールの前記周波数変換回路が用いるローカル信号の周波数が、前記信号分波部の複数の隣接する帯域の中心周波数の差分と等しい差を有しており、前記各帯域信号を共通の中間周波数帯に変換させるとともに、
前記各周波数変換・合波処理モジュールの前記合波回路に入力される信号に対して、それぞれ前記信号分波部の複数の隣接する帯域の中心周波数の差と等しい差を付与する周波数シフト回路(38)と、
前記各周波数変換・合波処理モジュールの前記周波数変換回路が用いるローカル信号の周波数が異なることによって生じる帯域間の位相誤差を前記周波数シフト回路のローカル信号の位相補正により補償する同期回路(39)を設けたことを特徴とする。
The frequency converter according to claim 3 of the present invention is the frequency converter according to claim 1,
The frequency of the local signal used by the frequency conversion circuit of each frequency conversion / multiplexing processing module has a difference equal to the difference between the center frequencies of a plurality of adjacent bands of the signal demultiplexing unit, While converting the signal to a common intermediate frequency band,
A frequency shift circuit that gives a difference equal to a difference between center frequencies of a plurality of adjacent bands of the signal demultiplexing unit to signals input to the multiplexing circuit of each of the frequency conversion / multiplexing processing modules ( 38)
A synchronization circuit (39) for compensating for a phase error between bands caused by a difference in frequency of a local signal used by the frequency conversion circuit of each frequency conversion / combination processing module by phase correction of the local signal of the frequency shift circuit; It is provided.

このように構成したため、本発明の周波数変換装置は、装置内にユーザが必要とする帯域幅分の周波数変換・合波処理モジュールを装着して信号分波部との間および各モジュール間をコネクタ接続することで、無駄なコストをかけずに装置の構築ができる。   With this configuration, the frequency conversion device of the present invention is equipped with a frequency conversion / combination processing module for the bandwidth required by the user in the device, and a connector between the signal branching unit and each module. By connecting, an apparatus can be constructed without incurring unnecessary costs.

また、各周波数変換・合波処理モジュールのハードウエア構成は同等でよいから、設計コストが抑えられ、しかも、周波数変換処理を行うモジュールが帯域毎に独立しているので、特定帯域に異常がある場合には、その帯域のモジュールのみを正常なものに交換すればよく、帯域が多い場合にその修理コストが小さくて済む。   In addition, since the hardware configuration of each frequency conversion / combining processing module may be the same, the design cost can be reduced, and the frequency conversion processing module is independent for each band, so there is an abnormality in a specific band. In such a case, it is sufficient to replace only the module of the band with a normal one, and the repair cost can be reduced when the band is large.

本発明の実施形態の全体構成図Overall configuration diagram of an embodiment of the present invention 実施形態の帯域分波と合波の動作を説明するためのスペクトラム図Spectrum diagram for explaining the operation of band demultiplexing and multiplexing of the embodiment 実施形態の周波数変換回路の構成例を示す図The figure which shows the structural example of the frequency converter circuit of embodiment. 合波前の遅延処理を説明するための図Diagram for explaining delay processing before multiplexing 装置の構造例を示す図Diagram showing an example of the structure of the device 本発明の別の実施形態の構成図Configuration diagram of another embodiment of the present invention 別の実施形態の帯域分波と合波の動作を説明するためのスペクトラム図Spectrum diagram for explaining the operation of band demultiplexing and multiplexing of another embodiment

以下、図面に基づいて本発明の実施の形態を説明する。
図1は、本発明を適用した周波数変換装置20の全体構成図である。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is an overall configuration diagram of a frequency conversion device 20 to which the present invention is applied.

この周波数変換装置20は、信号分波部21、周波数変換・合成処理部25および制御部50を有している。   The frequency conversion device 20 includes a signal demultiplexing unit 21, a frequency conversion / synthesis processing unit 25, and a control unit 50.

信号分波部21は、高周波帯の広帯域な入力信号x(t)を入力端子22で受け、その入力信号x(t)の帯域より狭い幅の複数Mの隣接する帯域幅のバンドパスフィルタ(BPF)23〜23に入力して帯域信号x(t)〜x(t)に分波し、複数の帯域信号出力端子24〜24からそれぞれ出力する。 The signal demultiplexing unit 21 receives a wide-band input signal x (t) in a high-frequency band at an input terminal 22 and a plurality of M adjacent band-pass filters having a narrower width than the band of the input signal x (t) ( BPF) 23 1 to 23 M are input, demultiplexed into band signals x 1 (t) to x M (t), and output from a plurality of band signal output terminals 24 1 to 24 M , respectively.

バンドパスフィルタ23〜23は、図2の(a)に示すように、変換対象の信号が存在する可能性のある所定周波数領域f〜f+fBW(例えばf=2GHz、fBW=100MHz)を、M個の等しい周波数幅f=fBW/M(例えばM=10の場合、100/10=10MHz)の帯域に分割し、分割した各帯域の信号x(t)〜x(t)をそれぞれ選択的に抽出して出力する。ここで複数Mは任意で、後述する周波数変換の処理能力やユーザーの要望などに応じて決定すればよい。 As shown in FIG. 2A, the bandpass filters 23 1 to 23 M have predetermined frequency regions f 0 to f 0 + f BW (for example, f 0 = 2 GHz, f) in which a signal to be converted may exist. BW = 100 MHz) is divided into M equal frequency widths f W = f BW / M (for example, 100/10 = 10 MHz when M = 10), and the divided signal x 1 (t) in each band ~ X M (t) are selectively extracted and output. Here, the plurality M is arbitrary, and may be determined according to the processing capability of frequency conversion, which will be described later, or the user's request.

ここで、バンドパスフィルタ23〜23の中心周波数をfc〜fcとすると、上記関係から各バンドパスフィルタ23〜23の通過帯域は、それぞれ、fc±f/2、fc±f/2、…、fc±f/2となる。 Here, when the center frequency of the bandpass filter 23 1 ~ 23 M and fc 1 ~fc M, the pass band of the band-pass filters 23 1 ~ 23 M from the relationship, respectively, fc 1 ± f W / 2 , fc 2 ± f W / 2,... fc M ± f W / 2.

この信号分波部21の構成は、図示のように通過帯域が異なる複数のバンドパスフィルタを単純に並列に接続した構造に限定されるものではなく、前記特許文献1(特開2009−246956号公報)の図7〜図12に示された種々の構成が採用できる。   The configuration of the signal demultiplexing unit 21 is not limited to a structure in which a plurality of bandpass filters having different passbands are simply connected in parallel as shown in the figure, and the above-mentioned Patent Document 1 (Japanese Patent Laid-Open No. 2009-246958). Various configurations shown in FIG. 7 to FIG.

周波数変換・合成処理部25は、信号発生部26、複数の周波数変換・合波処理モジュール(以下、単にモジュールと記す)31〜31、モジュール保持手段40、帯域信号接続手段41、変換用信号接続手段42および合波信号接続手段43により構成されている。 The frequency converting / synthesizing unit 25 includes a signal generating unit 26, a plurality of frequency converting / combining processing modules (hereinafter simply referred to as modules) 31 1 to 31 M , a module holding unit 40, a band signal connecting unit 41, and a conversion unit. The signal connecting means 42 and the combined signal connecting means 43 are configured.

信号発生部26は、所定周波数(例えば、10MHz、1MHz、100kHz等)の基準信号Rに位相同期したローカル信号Lを発生してローカル信号出力端子26aから出力するローカル信号発生器27と、基準信号Rに位相同期したサンプリング用のクロック信号Cを発生してクロック信号出力端子26bから出力するクロック信号発生器28とにより構成されている。   The signal generator 26 generates a local signal L phase-synchronized with a reference signal R having a predetermined frequency (for example, 10 MHz, 1 MHz, 100 kHz, etc.), and outputs the local signal L from the local signal output terminal 26a. The clock signal generator 28 generates a sampling clock signal C phase-synchronized with R and outputs it from a clock signal output terminal 26b.

また、各モジュール31は、帯域信号入力端子31a、ローカル信号入力端子31b、クロック信号入力端子31c、合波信号入力端子31d、合波信号出力端子31e、帯域信号入力端子31aに入力された帯域信号をローカル信号入力端子31bに入力されたローカル信号Lとの混合処理により所定の中間周波数帯へ周波数変換(ヘテロダイン変換)する周波数変換回路32、周波数変換回路32の出力信号yをクロック信号入力端子31cに入力されたクロック信号Cに同期してサンプリングしてデジタル信号列に変換するA/D変換器33、A/D変換器33から出力されるデジタル信号列Yに対して、帯域分波に伴って生じる誤差の補正処理を行う補正処理回路34、補正処理回路34で補正された信号Yhと合波信号入力端子31dに入力された信号とを合波して、合波信号出力端子31eから出力する合波回路35とを備えてそれぞれ一体化されている(添え字省略)。   Each module 31 includes a band signal input to a band signal input terminal 31a, a local signal input terminal 31b, a clock signal input terminal 31c, a combined signal input terminal 31d, a combined signal output terminal 31e, and a band signal input terminal 31a. Is converted to a predetermined intermediate frequency band (heterodyne conversion) by a mixing process with the local signal L input to the local signal input terminal 31b, and the output signal y of the frequency conversion circuit 32 is converted to the clock signal input terminal 31c. A / D converter 33 that samples and converts to a digital signal sequence in synchronization with clock signal C input to A, and a digital signal sequence Y output from A / D converter 33 in accordance with band demultiplexing. Correction processing circuit 34 for correcting the error generated by the signal, the signal Yh corrected by the correction processing circuit 34 and the combined signal input terminal 3 And multiplexes the signals input to the d, are integrated respectively and a combining circuit 35 to be output from the multiplexed signal output terminal 31e (suffixes omitted).

各周波数変換回路32〜32は、例えば図3に示すように、各帯域信号とローカル信号Lとを混合するミキサ32aと、その混合成分から差のヘテロダイン成分(中間周波数帯)を抽出するバンドパスフィルタ(BPF)32bとで構成されている。ここで、各周波数変換回路32〜32のバンドパスフィルタ32bの帯域は、図2の(b1)〜(bM)のように、ローカル信号Lの周波数をfとすれば、それぞれ、
|f−fc|±f/2
|f−fc|±f/2
………
|f−fc|±f/2
に設定され、分波された時の互いの周波数間隔を保持した状態で中心周波数がそれぞれ異なる中間周波数帯に変換されて、クロック信号Cに同期したタイミングでサンプリングされてデジタルの信号列に変換される。
For example, as shown in FIG. 3, each frequency conversion circuit 32 1 to 32 M extracts a mixer 32a that mixes each band signal and the local signal L, and extracts a heterodyne component (intermediate frequency band) as a difference from the mixed component. It is composed of a band pass filter (BPF) 32b. Here, the bands of the band-pass filters 32b of the frequency conversion circuits 32 1 to 32 M can be obtained by setting the frequency of the local signal L to f L as shown in (b1) to (bM) of FIG.
| F L −fc 1 | ± f W / 2
| F L −fc 2 | ± f W / 2
………
| F L −fc M | ± f W / 2
The center frequency is converted to a different intermediate frequency band while maintaining the mutual frequency interval when being demultiplexed, sampled at a timing synchronized with the clock signal C, and converted to a digital signal sequence The

補正処理回路34は、広帯域な入力信号を複数の帯域の信号に分波し、それぞれに対して周波数変換処理とA/D変換処理を行うことによって、帯域間に生じる信号の位相と振幅の誤差を補正するためのものであり、その補正処理は、例えば所定数の入力データに対する積和演算を行うFIR型のデジタルフィルタで行われる。   The correction processing circuit 34 demultiplexes a wideband input signal into signals of a plurality of bands, and performs frequency conversion processing and A / D conversion processing on each of the signals, thereby causing phase and amplitude errors of signals generated between the bands. The correction processing is performed by, for example, an FIR type digital filter that performs a product-sum operation on a predetermined number of input data.

このデジタルフィルタによる補正を行うために必要な補正係数(積の係数)は、予め無変調の基準信号を入力して、その周波数を掃引することで得られたデータに基づいて、帯域内の振幅・位相特性が所定の基準特性となるように決定したものであり、モジュール毎に予め記憶設定されているものとする。   The correction coefficient (product coefficient) necessary for performing correction by this digital filter is determined based on the data obtained by inputting a non-modulated reference signal in advance and sweeping the frequency thereof. It is assumed that the phase characteristic is determined to be a predetermined reference characteristic, and is stored and set in advance for each module.

このようにして、帯域分波による補正処理がなされた信号列Yhは、合波回路35に入力される。合波回路35では、合波信号入力端子31dから入力された合波信号と、補正処理された信号とが合波されるが、補正処理信号Yhについては、基本的に各モジュール間でタイミングずれは生じないが、合波処理の遅延(例えば1クロック分)が必ず生じるので、同一タイミングで各合波回路に入力される補正処理信号の総和が最終段から正しく出力されるためには、初段から最終段までの遅延量を見込んでおく必要がある。   In this way, the signal sequence Yh that has been subjected to correction processing by band demultiplexing is input to the multiplexing circuit 35. In the multiplexing circuit 35, the combined signal input from the combined signal input terminal 31d and the corrected signal are combined, but the correction processing signal Yh basically has a timing shift between the modules. However, there is always a delay in the multiplexing process (for example, one clock), so that the sum of the correction processing signals input to each multiplexing circuit at the same timing is correctly output from the last stage. It is necessary to anticipate the delay amount from the first stage to the last stage.

即ち、図4に示すように、仮に4つのモジュールを接続した場合で、各モジュールの合波回路35〜35に同一処理タイミングT1に入力された補正処理信号YhがそれぞれA1、B1、C1、D1とすると、初段の合波回路35は、次の処理タイミングT2にA1+0(入力無し)を合波信号として出力し、それに合わせるために、次段の合波回路35は、補正処理信号B1を内部で1処理タイミング分遅らせてから、次の処理タイミングT3に合波信号A1と補正処理信号B1とを合波して、信号A1+B1を出力する。 That is, as shown in FIG. 4, if four in case of connecting the modules, the correction processing signal Yh, respectively A1, B1, C1 input to the same processing timing T1 to the multiplexing circuit 35 1 to 35 4 of each module , when D1, multiplexing circuit 35 1 of the first stage, and outputs the next processing timing T2 to A1 + 0 (no input) as the wave signal, to match it, the next stage of the multiplexing circuit 35 2, correction processing After delaying the signal B1 by one processing timing internally, the combined signal A1 and the correction processing signal B1 are combined at the next processing timing T3 to output a signal A1 + B1.

以下同様に、3段目の合波回路35は、補正処理信号C1を内部で2処理タイミング分遅らせてから、次の処理タイミングT4に合波信号A1+B1と補正処理信号C1とを合波して信号A1+B1+C1を出力し、最終段の合波回路35は、補正処理信号D1を内部で3処理タイミング分遅らせてから、次の処理タイミングT5に合波信号A1+B1+C1と補正処理信号D1とを合波して信号A1+B1+C1+D1を出力する。 Similarly, the third stage of the multiplexing circuit 35 3, the correction signal C1 from the delayed second processing timing component internally, a and multiplexing signals A1 + B1 and correction signal C1 multiplexes the next processing timing T4 outputs a signal A1 + B1 + C1 Te, multiplexing circuit 35 4 of the final stage, if the correction process signal D1 from the delayed 3 processing timing component internally, a and multiplexing signals A1 + B1 + C1 to the next processing timing T5 and correction signals D1 And output signal A1 + B1 + C1 + D1.

つまり、各合波回路は、モジュールの接続順に応じた処理時間分だけ、入力する補正処理信号に対する遅延を行ってから合波信号と合波する機能を有している。合波回路のこの遅延処理段数は外部(後述する制御部50)から任意に設定できるようになっているものとする。   In other words, each multiplexing circuit has a function of delaying the input correction processing signal by the processing time corresponding to the connection order of the modules and then combining with the combined signal. It is assumed that the number of delay processing stages of the multiplexing circuit can be arbitrarily set from the outside (a control unit 50 described later).

これらの複数のモジュール31は、モジュール保持手段40により装置内に着脱可能な状態で保持される。   The plurality of modules 31 are held by the module holding means 40 in a detachable state in the apparatus.

ここで、モジュール保持手段40の形態はモジュールの構造に対応したものであれば任意である。例えばモジュールがプリント基板上に形成され、そのプリント基板にエッジコネクタが設けられている場合には、モジュール保持手段40としてマザーボードの一面側に、モジュールのエッジコネクタを受け入れるコネクタを並べて、複数のモジュールをマザーボード上に並べ立てた状態で保持する構造が考えられる。この場合、モジュール保持手段40は、機械的な保持機能だけでなく、電気的な接続機能も兼ねることになる。また、単純に機械的な保持機能だけであってもよい。   Here, the form of the module holding means 40 is arbitrary as long as it corresponds to the structure of the module. For example, when a module is formed on a printed circuit board and an edge connector is provided on the printed circuit board, a connector for receiving the edge connector of the module is arranged on one side of the motherboard as the module holding means 40, and a plurality of modules are arranged. A structure in which they are held side by side on the motherboard can be considered. In this case, the module holding means 40 serves not only as a mechanical holding function but also as an electrical connection function. Further, only a mechanical holding function may be used.

帯域信号接続手段41は、モジュール保持手段40に保持された各モジュール31の帯域信号入力端子31aと信号分波部21の各帯域信号出力端子24との間をコネクタ接続して、各帯域信号をモジュール31に与える。   The band signal connection means 41 connects the band signal input terminal 31a of each module 31 held in the module holding means 40 and each band signal output terminal 24 of the signal demultiplexing unit 21 with a connector, and sends each band signal. The module 31 is given.

この帯域信号接続手段41は、信号分波部24の帯域信号出力端子24とモジュール31の帯域信号入力端子31aの形態に応じて設けられる。   The band signal connection means 41 is provided according to the form of the band signal output terminal 24 of the signal branching unit 24 and the band signal input terminal 31 a of the module 31.

例えば、単純な構造として、帯域信号出力端子24が高周波用の同軸コネクタであれば、帯域信号入力端子31aも同様の同軸コネクタとしてその間を、両端に同軸コネクタが設けられた同軸ケーブルで接続する。   For example, as a simple structure, if the band signal output terminal 24 is a high-frequency coaxial connector, the band signal input terminal 31a is also connected as a similar coaxial connector with a coaxial cable having coaxial connectors provided at both ends.

また、帯域信号接続手段41を、前記したマザーボードの一面側にコネクタが固定された構造のモジュール保持手段40で兼用することもできる。その場合、マザーボード上に信号分波部21の回路を形成し、その各帯域信号出力端子24とマザーボード上の複数のコネクタの特定のピンとの間をそれぞれパターン接続し、各コネクタに装着されるモジュールのエッジコネクタの特定ピンに対応する接点を帯域信号入力端子31aとする。ただしこの場合には、高周波信号をロスなく伝達させる伝送線路(マイクロストリップ線路等)をパターン形成する必要がある。このようにモジュール保持手段40を兼用すれば、モジュールを装着することで接続も行われる。   The band signal connecting means 41 can also be used as the module holding means 40 having a structure in which the connector is fixed to the one surface side of the mother board. In that case, a circuit of the signal demultiplexing unit 21 is formed on the mother board, and each band signal output terminal 24 and a specific pin of a plurality of connectors on the mother board are connected in a pattern, respectively, and a module attached to each connector A contact corresponding to a specific pin of the edge connector is defined as a band signal input terminal 31a. In this case, however, it is necessary to pattern-form a transmission line (such as a microstrip line) that transmits a high-frequency signal without loss. If the module holding means 40 is also used in this way, connection is also made by mounting the module.

変換用信号接続手段42は、モジュール保持手段40に保持された各モジュール31のローカル信号入力端子31b、クロック信号入力端子31cと、信号発生部26のローカル信号出力端子26a、クロック信号出力端子26bの間を接続するものであり、前記帯域信号接続手段41と同様に同軸ケーブル接続やマザーボード上のコネクタに装着して接続する方法のいずれも採用可能である。この場合、信号発生部26も各モジュール31と同様に装置に着脱自在なモジュールとしてもよいし、マザーボード上に固定された状態で設けてもよい。   The conversion signal connection means 42 includes a local signal input terminal 31b and a clock signal input terminal 31c of each module 31 held by the module holding means 40, and a local signal output terminal 26a and a clock signal output terminal 26b of the signal generator 26. As in the case of the band signal connection means 41, any of a coaxial cable connection and a method of connecting to a connector on a motherboard can be adopted. In this case, the signal generator 26 may be a module that can be attached to and detached from the apparatus similarly to each module 31, or may be provided in a state of being fixed on the motherboard.

また、合波信号接続手段43は、モジュール保持手段40に保持された複数のモジュール31について、異なるモジュール31、31i+1間で合波信号出力端子31eと合波信号入力端子31di+1との間を順にコネクタ接続して、最終段のモジュールの合波信号出力端子31eから、全帯域分合波した信号Xを出力させる。 Further, the multiplexed signal connecting means 43 is configured to connect the multiplexed signal output terminal 31e i and the multiplexed signal input terminal 31d i + 1 between the different modules 31 i and 31 i + 1 for the plurality of modules 31 held by the module holding means 40. The connectors are connected in order, and the combined signal output terminal 31e M of the final stage module outputs the signal X combined for all the bands.

この合波信号接続手段43として、デジタルの複数ビットパラレルのデータ信号を扱う場合には前記したマザーボードの一面側にコネクタが固定された構造のモジュール保持手段40にエッジコネクタを装着する方式が有利であり、各モジュールのエッジコネクタに合波信号入力端子31dと合波信号出力端子31eとを設け、モジュール装着によりモジュール保持と同時に、隣り合うモジュール間での合波信号出力端子31eと合波信号入力端子31dとの間の接続が同時に行われるようにする。   As the combined signal connecting means 43, when handling a digital multi-bit parallel data signal, it is advantageous to attach an edge connector to the module holding means 40 having a structure in which the connector is fixed to one side of the mother board. Yes, a combined signal input terminal 31d and a combined signal output terminal 31e are provided at the edge connector of each module, and the combined signal output terminal 31e and the combined signal input between adjacent modules are provided simultaneously with module holding by mounting the module. Connection with the terminal 31d is performed simultaneously.

制御部50は、信号発生部26および各モジュール31の制御、例えば、ローカル信号の周波数設定処理や、クロック信号Cに同期して、各モジュール31のサンプリングを開始するようにしている。また、モジュール保持手段40に保持されたモジュールを検知して、前記した遅延量の設定等を含むパラメータの設定処理等を行う。その制御のための接続は任意であるが、前記したマザーボードのコネクタに装着されたエッジコネクタを介して行う方式が有利であり、また、各モジュール毎の合波信号に対する解析処理や信号発生部26への制御も行えるように、ここでは合波信号接続手段43を兼用して各モジュール31および信号発生部26に接続される構造となっている(制御部50の入出力用の端子は省略している)。なお、制御部50と、各モジュール31および信号発生部26との間は、それぞれ専用の接続手段により接続してもよい。   The control unit 50 starts sampling of each module 31 in synchronization with the control of the signal generation unit 26 and each module 31, for example, the local signal frequency setting process and the clock signal C. Further, the module held by the module holding means 40 is detected, and the parameter setting process including the delay amount setting described above is performed. The connection for the control is arbitrary, but the method performed through the edge connector attached to the connector of the mother board is advantageous, and the analysis processing for the combined signal and the signal generator 26 for each module. In this example, the combined signal connecting means 43 is also connected to each module 31 and the signal generator 26 (the input / output terminals of the controller 50 are omitted). ing). Note that the controller 50 may be connected to each module 31 and the signal generator 26 by dedicated connection means.

このように構成された周波数変換装置20では、変換対象の入力信号が複数の隣接する帯域の信号に分波され、着脱自在に保持される各モジュール31によって中間周波数帯に変換され、帯域分波によって生じる誤差が補正されて順次合波され、図2の(c)ように、元の入力信号の情報を保存したより低い中間周波数帯のデジタルの信号列に変換している。   In the frequency conversion device 20 configured as described above, an input signal to be converted is demultiplexed into a plurality of adjacent band signals, and is converted into an intermediate frequency band by each module 31 that is detachably held. 2 are corrected and sequentially combined, and converted into a digital signal sequence of a lower intermediate frequency band in which the information of the original input signal is stored, as shown in FIG.

このため、装置内にユーザが必要とする帯域幅分のモジュール31を装着して信号分波部21との間および各モジュール間をコネクタ接続することで、無駄なコストをかけずに装置の構築ができる。例えば図2の例のように変換対象信号が3つの帯域内に収まる場合には、3つのモジュールだけ装着すればよい。   For this reason, the module 31 for the bandwidth required by the user is installed in the apparatus, and the signal demultiplexing unit 21 and each module are connected by a connector, so that the apparatus can be constructed without wasting costs. Can do. For example, when the signal to be converted falls within three bands as in the example of FIG. 2, only three modules need be mounted.

また、各モジュール31のハードウエア構成は同等でよいから、設計コストが抑えられ、しかも、周波数変換処理を行うモジュールが帯域毎に独立しているので、特定帯域に異常がある場合には、その帯域のモジュールのみを正常なものに交換すればよく、帯域が多い場合にその修理コストが小さくて済む。   In addition, since the hardware configuration of each module 31 may be the same, the design cost can be reduced, and the modules for performing the frequency conversion processing are independent for each band. Only the band module needs to be replaced with a normal one, and the repair cost can be reduced when the band is large.

なお、装置の機械的な構造は任意であるが、例えば、図5のように、フレーム100の開口された前面側から信号分波部21、信号発生部26、各モジュール31を着脱自在に装着できるようにし、フレーム100の背面側のマザーボード(図示せず)にコネクタ接続する構造例を示す。   Although the mechanical structure of the apparatus is arbitrary, for example, as shown in FIG. 5, the signal demultiplexing unit 21, the signal generation unit 26, and each module 31 are detachably mounted from the front side where the frame 100 is opened. An example of a structure in which a connector is connected to a mother board (not shown) on the back side of the frame 100 is shown.

この場合、マザーボード上に制御部50を設けたり、制御部50をパーソナルコンピュータで構成し、フレーム100との間で通信できるようにしてもよい。なお、図5において、符号40aは、モジュール化された信号分波部21、信号発生部26および各モジュール31を固定するためのネジ、符号40bはそのネジ穴、符号40cは、各モジュールを内部に挿入する際のガイド用の切欠である。   In this case, the control unit 50 may be provided on the mother board, or the control unit 50 may be configured with a personal computer so as to be able to communicate with the frame 100. In FIG. 5, reference numeral 40 a denotes a screw for fixing the signal demultiplexing unit 21, the signal generation unit 26, and each module 31 that are modularized, reference numeral 40 b denotes a screw hole, and reference numeral 40 c denotes each module inside. It is a notch for a guide when inserting in.

前記実施形態では、各モジュール31の周波数変換回路32に共通のローカル信号Lを与えて、ぞれぞれ中心周波数が異なる中間周波数帯に変換しているので、補正処理後の信号をそのまま加算処理することで、元の信号の周波数関係を保持した信号Xを出力させていたが、図6に示すように、モジュール31毎にローカル信号発生器27をそれぞれ設け、入力する帯域信号の中心周波数にそれぞれ応じた周波数のローカル信号L〜Lを周波数変換回路32に与えることで、図7の(a)の各帯域信号を、同図(b1)〜(bM)のように、中心周波数(fi)および帯域幅fwが同一の中間周波帯に変換することもできる。 In the above-described embodiment, the common local signal L is given to the frequency conversion circuit 32 of each module 31 and converted into intermediate frequency bands each having a different center frequency. By doing so, the signal X retaining the frequency relationship of the original signal is output. However, as shown in FIG. 6, a local signal generator 27 is provided for each module 31, and the center frequency of the input band signal is set. by providing a local signal L 1 ~L M having a frequency corresponding respectively to the frequency converting circuit 32, the respective band signal (a) in FIG. 7, as shown in FIG. (b1) ~ (bM), center frequency ( fi) and the bandwidth fw can be converted to the same intermediate frequency band.

ただし、このまま合波すると、全帯域信号が幅fの中に重なった信号になってしまうため、図6に示しているように周波数シフト回路38を設けて、各補正処理後の信号Yhに対して、図7の(c1)〜(cM)のように、元の帯域信号の周波数間隔(fBW/M=Δf)と等しい周波数差が付与されるようにし、その周波数シフトされた信号Yhsをそれぞれ合波器35に入力する。この周波数シフト回路38は、周波波間隔Δfの差をもつ周波数fs1〜fsMのオフセットローカル信号Ls1〜LsMを出力するオフセットローカル信号発生器38aと周波数変換回路38b(これらはデジタル値に対する数値演算処理で実現できる)によって構成する。 However, if the signals are multiplexed as they are, the signals in the entire band are overlapped within the width f W , so that a frequency shift circuit 38 is provided as shown in FIG. On the other hand, as shown in (c1) to (cM) of FIG. 7, a frequency difference equal to the frequency interval (f BW / M = Δf) of the original band signal is given, and the frequency shifted signal Yhs. Are respectively input to the multiplexer 35. The frequency shift circuit 38 includes an offset local signal generator 38a that outputs offset local signals Ls1 to LsM having frequencies fs1 to fsM having a difference in frequency wave interval Δf, and a frequency conversion circuit 38b (these are numerical calculation processes for digital values). Can be realized).

なお、上記のように各ローカル信号L〜Lの周波数が異なるので、各A/D変換器33のサンプリングタイミングが共通であるとき、中間周波数帯に変換された信号に関して各帯域間に各ローカル信号の位相差に応じた位相誤差が生じる。この位相誤差は、周波数シフト回路38のオフセットローカル信号Ls1〜LsMの初期位相を同期回路39によって調整することで補償することができる。 Since as described above the frequency of the local signal L 1 ~L M different, when the sampling timing of the A / D converters 33 are common, with respect to the converted signal to an intermediate frequency band between the bands each A phase error corresponding to the phase difference of the local signal occurs. This phase error can be compensated by adjusting the initial phase of the offset local signals Ls1 to LsM of the frequency shift circuit 38 by the synchronization circuit 39.

このようにして周波数シフトおよび位相補償された信号Yhsを前記同等に合波することで、図7の(d)のように、元の信号をより低い周波数帯域に変換したデジタルの信号列を得ることができる。   By combining the frequency-shifted and phase-compensated signal Yhs in the same manner as described above, a digital signal sequence obtained by converting the original signal into a lower frequency band is obtained as shown in FIG. be able to.

なお、上記実施例では、各モジュール31にローカル信号発生器27をそれぞれ設けていたが、信号発生部26に各モジュール用のローカル信号発生器を設けてもよい。   In the above embodiment, each module 31 is provided with the local signal generator 27. However, the signal generator 26 may be provided with a local signal generator for each module.

20……周波数変換装置、21……信号分波部、22……入力端子、23……バンドパスフィルタ、24……帯域信号出力端子、25……周波数変換・合成処理部、26……信号発生部、27……ローカル信号発生器、28……クロック信号発生器、31……周波数変換・合波処理モジュール、31a……帯域信号入力端子、31b……ローカル信号入力端子、31c……クロック信号入力端子、31d……合波信号入力端子、31e……合波信号出力端子、32……周波数変換回路、33……A/D変換器、34……補正処理回路、35……合波回路、38……周波数シフト回路、39……同期回路、40……モジュール保持手段、41……帯域信号接続手段、42……変換用信号接続手段、43……合波信号接続手段、50……制御部   DESCRIPTION OF SYMBOLS 20 ... Frequency converter, 21 ... Signal demultiplexing part, 22 ... Input terminal, 23 ... Band-pass filter, 24 ... Band signal output terminal, 25 ... Frequency conversion / synthesis processing part, 26 ... Signal Generation unit 27... Local signal generator 28... Clock signal generator 31... Frequency conversion / combining processing module 31 a... Band signal input terminal 31 b. Signal input terminal, 31d: combined signal input terminal, 31e: combined signal output terminal, 32: frequency conversion circuit, 33: A / D converter, 34: correction processing circuit, 35: combining Circuits 38... Frequency shift circuit 39... Synchronous circuit 40. Module holding means 41... Band signal connecting means 42... Conversion signal connecting means 43 43 Combined signal connecting means 50. ... Control unit

Claims (3)

高周波帯の入力信号を、該入力信号の帯域より狭い幅の複数の隣接する帯域信号に分波し、該各帯域信号を複数の出力端子(24)からそれぞれ出力する信号分波部(21)と、
前記各帯域信号に対してそれぞれ中間周波数帯への周波数変換処理を行い、該中間周波数帯に変換された信号をそれぞれA/D変換し、さらに帯域分波したことによって生じる誤差の補正処理を行ってから合波する周波数変換・合波処理部(25)とを有し、前記入力信号をより低い周波数帯の信号に変換する周波数変換装置において、
前記周波数変換・合波処理部は、
前記帯域信号を入力するための帯域信号入力端子(31a)、該帯域信号入力端子に入力された帯域信号を所定中間周波数帯へ周波数変換する周波数変換回路(32)、該周波数変換回路の出力信号をサンプリングしてデジタル信号列に変換するA/D変換器(33)、該A/D変換器から出力されるデジタル信号列に対して、帯域分波に伴って生じる誤差の補正処理を行う補正処理回路(34)、合波信号を入力するための合波信号入力端子(31d)、前記補正処理回路で補正された信号と前記合波信号入力端子に入力された信号とを合波する合波回路(35)および該合波回路で合波された合波信号を出力するための合波信号出力端子(31e)とを備えて一体化された複数の周波数変換・合波処理モジュール(31)と、
前記複数の周波数変換・合波処理モジュールを、着脱可能な状態で装置内に保持するモジュール保持手段(40)と、
前記モジュール保持手段に保持された前記複数の周波数変換・合波処理モジュールの各帯域信号入力端子と前記信号分波部の各出力端子との間をコネクタ接続して、前記各帯域信号を前記各周波数変換・合波処理モジュールに与える帯域信号接続手段(41)と、
前記モジュール保持手段に保持された前記複数の周波数変換・合波処理モジュールについて、異なるモジュール間で前記合波信号出力端子と前記合波信号入力端子との間を順にコネクタ接続して、最終段の周波数変換・合波処理モジュールの前記合波回路の合波信号出力端子から、全帯域分の合波信号を出力させる合波信号接続手段(43)とを備えていることを特徴とする周波数変換装置。
A signal demultiplexing unit (21) for demultiplexing an input signal in a high frequency band into a plurality of adjacent band signals having a narrower width than the band of the input signal, and outputting each band signal from a plurality of output terminals (24), respectively. When,
Each band signal is subjected to frequency conversion processing to an intermediate frequency band, each signal converted to the intermediate frequency band is subjected to A / D conversion, and error correction processing caused by band demultiplexing is performed. A frequency converting / combining processing unit (25) for combining the input signals, and converting the input signal into a signal of a lower frequency band,
The frequency conversion / combining processing unit
A band signal input terminal (31a) for inputting the band signal, a frequency conversion circuit (32) for frequency-converting the band signal input to the band signal input terminal to a predetermined intermediate frequency band, and an output signal of the frequency conversion circuit A / D converter (33) that samples the signal and converts it into a digital signal sequence, and a correction that performs a correction process for errors caused by band demultiplexing on the digital signal sequence output from the A / D converter A processing circuit (34), a combined signal input terminal (31d) for inputting a combined signal, and a signal for combining the signal corrected by the correction processing circuit and the signal input to the combined signal input terminal A plurality of frequency conversion / combination processing modules (31) integrated with a wave circuit (35) and a combined signal output terminal (31e) for outputting a combined signal combined by the combining circuit )When,
Module holding means (40) for holding the plurality of frequency conversion / multiplexing processing modules in the apparatus in a detachable state;
A connector is connected between each band signal input terminal of each of the plurality of frequency conversion / multiplexing processing modules held by the module holding means and each output terminal of the signal branching unit, and each band signal is sent to each Band signal connection means (41) to be given to the frequency conversion / multiplexing module;
For the plurality of frequency conversion / multiplexing processing modules held in the module holding means, the connectors between the combined signal output terminal and the combined signal input terminal are sequentially connected between different modules, and the final stage A frequency conversion comprising: a combined signal connection means (43) for outputting a combined signal for all bands from a combined signal output terminal of the combining circuit of the frequency conversion / combining processing module. apparatus.
前記各周波数変換・合波処理モジュールの周波数変換回路が用いるローカル信号の周波数が等しく、それぞれの中間周波数帯の中心が前記信号分波部の複数の隣接する帯域の中心周波数の差分と等しい差を有していることを特徴とする請求項1記載の周波数変換装置。   The frequency of the local signal used by the frequency conversion circuit of each of the frequency conversion / multiplexing processing modules is equal, and the center of each intermediate frequency band is equal to the difference between the center frequencies of a plurality of adjacent bands of the signal demultiplexing unit. The frequency converter according to claim 1, wherein the frequency converter is provided. 前記各周波数変換・合波処理モジュールの前記周波数変換回路が用いるローカル信号の周波数が、前記信号分波部の複数の隣接する帯域の中心周波数の差分と等しい差を有しており、前記各帯域信号を共通の中間周波数帯に変換させるとともに、
前記各周波数変換・合波処理モジュールの前記合波回路に入力される信号に対して、それぞれ前記信号分波部の複数の隣接する帯域の中心周波数の差と等しい差を付与する周波数シフト回路(38)と、
前記各周波数変換・合波処理モジュールの前記周波数変換回路が用いるローカル信号の周波数が異なることによって生じる帯域間の位相誤差を前記周波数シフト回路のローカル信号の位相補正により補償する同期回路(39)を設けたことを特徴とする請求項1記載の周波数変換装置。
The frequency of the local signal used by the frequency conversion circuit of each frequency conversion / multiplexing processing module has a difference equal to the difference between the center frequencies of a plurality of adjacent bands of the signal demultiplexing unit, While converting the signal to a common intermediate frequency band,
A frequency shift circuit that gives a difference equal to a difference between center frequencies of a plurality of adjacent bands of the signal demultiplexing unit to signals input to the multiplexing circuit of each of the frequency conversion / multiplexing processing modules ( 38)
A synchronization circuit (39) for compensating for a phase error between bands caused by a difference in frequency of a local signal used by the frequency conversion circuit of each frequency conversion / combination processing module by phase correction of the local signal of the frequency shift circuit; The frequency converter according to claim 1, wherein the frequency converter is provided.
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