JP2012199404A - Pattern correction method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a pattern correction method that can reduce a correction resistance in correcting a wiring pattern.SOLUTION: The pattern correction method, which corrects a defective portion 21 of a conductive pattern 20, includes the steps of: applying a conductive ink to form a first ink layer 31; baking the first ink layer 31 to form a first correction layer 32; applying the conductive ink so as to at least partly overlap with the first correction layer 32 to form a second ink layer 33; and baking the second ink layer 33 to form a second correction layer 34. The first correction layer 32 and the second correction layer 34 ensure an electrical connection between regions of the conductive pattern 20 interposing the defective portion 21.

Description

  The present invention relates to a pattern correction method, and more particularly to a pattern correction method for correcting a wiring pattern by applying a conductive ink.

  In recent years, in the flat panel display field such as a liquid crystal display, a plasma display, and an EL (Electro Luminescence) display, an increase in the size of a substrate and a higher definition of a wiring pattern have been promoted. For example, a fine wiring pattern having a line width of 5 μm or less is often formed. Along with this, there is a high probability that a defect exists in the wiring pattern formed on the substrate. On the other hand, in order to improve the yield, the wiring pattern is corrected by various methods.

  A wiring pattern correction method using an ink jet or a dispenser has high utilization efficiency of conductive ink and enables fine drawing. Therefore, it is used in various fields recently. For example, regarding correction of a wiring pattern of a TFT (Thin Film Transistor) substrate used in a liquid crystal display, conductive ink is ejected from the tip of a nozzle of an inkjet or a dispenser and applied to a disconnected portion of the wiring pattern, and the applied conductive ink is applied. A method of firing has been proposed (see, for example, Patent Documents 1 and 2).

  Moreover, in order to correct a finer wiring pattern using an ink jet or a dispenser, it is necessary to make the tip hole of the nozzle small. However, if the tip end hole of the nozzle is made smaller, the conductive ink injected into the nozzle tends to be clogged in the nozzle hole. As a result, it may be difficult to discharge the conductive ink. In order to cope with this, a method has been proposed in which a conductive ink discarding base is disposed in the vicinity of the nozzle, and the conductive ink is discarded in advance on the discarding base and then applied to the substrate (for example, (See Patent Document 3).

JP 2004-134596 A JP 2006-202828 A JP 2009-182169 A

  In the wiring pattern correction method disclosed in Patent Document 1 and Patent Document 2, after applying conductive ink to a range including the disconnection portion, the applied conductive ink is baked to form a correction layer, and the disconnection The continuity of the part is secured. A conductive ink in which metal nanoparticles such as gold and silver are dispersed is used. When the applied conductive ink is baked, the film thickness of the baked conductive ink shrinks from 1/5 before baking to 1/10.

  For example, let us consider a case where conductive ink is applied with a width substantially the same as the wiring width to a disconnected portion of a wiring pattern having a wiring width of 5 μm and a wiring film thickness of 0.3 μm. The film thickness of the conductive ink after application varies depending on the characteristics (viscosity, wettability, etc.) of the conductive ink, but is approximately 1 μm. Therefore, assuming that the shrinkage ratio of the conductive ink is 1/10, the film thickness of the conductive ink after baking is 0.1 μm, which is thinner than the wiring film thickness. Therefore, the correction layer easily breaks at the stepped portion at the boundary between the normal wiring and the disconnection portion, and the resistance (correction resistance) at the corrected disconnection portion may be increased. In particular, in the correction of the wiring pattern of the TFT substrate, it is conceivable to shape the defect shape with a laser in order to facilitate the correction (for example, removal of foreign matter from the defective portion). At this time, it may be assumed that the insulating film existing below the wiring pattern is removed by laser irradiation, and it is also assumed that the broken portion is corrected with the surface of the glass substrate exposed. In this case, the step between the disconnection portion and the normal wiring portion is equal to or greater than the wiring film thickness, and the correction layer is broken at the step portion, and the correction resistance is likely to increase.

  The present invention has been made to address the above-described problems, and an object of the present invention is to provide a method capable of reducing a correction resistance in correcting a wiring pattern.

  The pattern correction method according to the present invention is a pattern correction method for correcting a defective portion of a conductive pattern. The pattern correction method includes a step of forming a first ink layer by applying a conductive ink, a step of forming a first correction layer by baking the first ink layer, and at least partly A step of forming a second ink layer by applying a conductive ink so as to overlap the first correction layer; and a step of forming a second correction layer by baking the second ink layer. Prepare. And the electrical connection between the conductive patterns arrange | positioned on both sides of a defect part is ensured by the 1st correction layer and the 2nd correction layer.

  In the pattern correction method of the present invention, after the first correction layer is formed, the second correction layer is formed so that at least a part thereof overlaps the first correction layer. Therefore, the breakage of the correction layer at the step portion at the boundary between the normal wiring and the defective portion is suppressed. As a result, according to the pattern correction method of the present invention, the correction resistance can be reduced in the correction of the wiring pattern.

  In the pattern correction method, the step of forming the first ink layer and the step of forming the first correction layer are repeatedly performed a plurality of times before the step of forming the second ink layer. Also good.

  In the pattern correction method, the step of forming the second ink layer and the step of forming the second correction layer may be repeated a plurality of times.

  Thereby, even when the level difference is high at the level difference between the normal wiring and the defect, breakage of the correction layer is suppressed.

  The pattern correction method further includes a step of forming a recess in the conductive pattern adjacent to the defective portion, and the first ink layer is formed in the recess even if the first ink layer is formed in the recess. Good.

  Thereby, electrical connection between the conductive pattern adjacent to the defective portion and the first and second correction layers can be ensured more reliably.

  In the pattern correction method, the conductive pattern is covered with an insulating film, and in the step of forming the recess, a recess that penetrates the insulating film and reaches the conductive pattern may be formed.

  As a result, the above pattern correction method can be applied even to a conductive pattern covered with an insulating film.

  In the pattern correction method, in the step of forming the recess, a recess that can be entirely covered with the second ink layer having a width smaller than the width of the conductive pattern in plan view may be formed. .

  As a result, the pattern correction method can be easily applied to pattern correction in a fine region.

  In the pattern correction method, in the step of forming the second ink layer, the second ink layer may be formed so as to bypass the defect portion.

  Thereby, even when it is difficult to apply the second ink layer to the defective portion, the above pattern correction method can be applied.

  In the pattern correction method, the conductive ink includes a solvent having a boiling point higher than that of toluene, and an additive that is made of an organometallic compound and improves the adhesion of the conductive ink to the substrate that holds the conductive pattern. You may go out. Thereby, drying of the conductive ink at the nozzle tip is suppressed.

  As is apparent from the above description, according to the pattern correction method of the present invention, it is possible to reduce the correction resistance in correcting the wiring pattern.

It is a schematic perspective view which shows the defective part of the wiring pattern formed on the board | substrate. It is a schematic perspective view of the wiring pattern which formed the correction layer in the defect part. FIG. 5 is a schematic cross-sectional view for explaining the pattern correction method in the first embodiment. FIG. 5 is a schematic cross-sectional view for explaining the pattern correction method in the first embodiment. FIG. 5 is a schematic cross-sectional view for explaining the pattern correction method in the first embodiment. FIG. 5 is a schematic cross-sectional view for explaining the pattern correction method in the first embodiment. FIG. 5 is a schematic cross-sectional view for explaining the pattern correction method in the first embodiment. FIG. 10 is a schematic cross-sectional view for explaining a pattern correction method in the second embodiment. FIG. 10 is a schematic cross-sectional view for explaining a pattern correction method in the second embodiment. 10 is a schematic plan view for explaining a pattern correction method according to Embodiment 3. FIG. FIG. 6 is a schematic cross-sectional view for explaining a pattern correction method in a fourth embodiment. FIG. 6 is a schematic cross-sectional view for explaining a pattern correction method in a fourth embodiment. FIG. 6 is a schematic cross-sectional view for explaining a pattern correction method in a fourth embodiment. FIG. 6 is a schematic cross-sectional view for explaining a pattern correction method in a fourth embodiment. FIG. 10 is a schematic plan view for illustrating a pattern correction method in the fourth embodiment. FIG. 10 is a schematic plan view for explaining a pattern correction method in a modification of the fourth embodiment. FIG. 10 is a schematic cross-sectional view for explaining a pattern correction method in a fifth embodiment. FIG. 10 is a schematic cross-sectional view for explaining a pattern correction method in a fifth embodiment. FIG. 10 is a schematic cross-sectional view for explaining a pattern correction method in a fifth embodiment. FIG. 10 is a schematic cross-sectional view for explaining a pattern correction method in a fifth embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the same or corresponding parts are denoted by the same reference numerals, and the description thereof will not be repeated.
(Embodiment 1)
Hereinafter, the pattern correction method in Embodiment 1 is demonstrated based on FIGS. 3 corresponds to a cross-sectional view taken along line III-III in FIG.

  Before the pattern correction method according to the present embodiment is performed, a step of detecting a defect in the wiring pattern is performed in advance. In this step, as shown in FIG. 1, in the conductive pattern 20 formed on the substrate 10 as an insulating substrate constituting the circuit substrate 1, a defective portion 21 which is a disconnected region is detected. As the substrate 10, for example, a glass substrate is used. The conductive pattern 20 is made of a conductive material, for example, a metal such as chromium or aluminum.

  As a method for forming the conductive pattern 20, in addition to a commonly used photolithography method, a direct circuit drawing method using an inkjet apparatus or a dispenser can be used. A photolithography method used as a general method for forming a wiring pattern includes steps of forming a metal film by sputtering, patterning a resist, and etching a metal film. In these processes, foreign matter mixing, plate-making failure, and the like occur, and as a result, a defective portion 21 that is a disconnected area in a part of the conductive pattern 20 is formed. In this case, as shown in FIG. 1, the conductive pattern 20 may be completely removed from the defect portion 21 or the conductive pattern 20 may be partially removed.

  In the conventional pattern correction method, as shown in FIG. 2, the correction layer 30 is formed by baking the conductive ink applied to the defect portion 21. The correction layer 30 ensures electrical connection between the conductive patterns 20 adjacent to the defect portion 21.

  However, in the conventional pattern correction method, a difference between the film thickness of the correction layer 30 and the film thickness of the conductive pattern 20 occurs, so that a step is generated at the boundary portion 4 between the correction layer 30 and the conductive pattern 20. There was a point. In particular, in the conventional pattern correction method, a conductive ink in which metal nanoparticles containing gold, silver or the like are dispersed is used. Since such a conductive ink has a high film thickness shrinkage rate when fired, the thickness of the correction layer 30 tends to be smaller than the thickness of the conductive pattern 20. Therefore, the correction layer 30 may be broken at the boundary portion 4 between the correction layer 30 and the conductive pattern 20.

  On the other hand, in the pattern correction method according to the present embodiment, the defect portion 21 is corrected by the following process, so that the level difference generated at the boundary portion 4 between the correction layer 30 and the conductive pattern 20 is reduced. Can be made. As a result, breakage of the correction layer 30 at the boundary portion 4 is suppressed, and the correction resistance can be reduced.

  Specifically, in the pattern correction method according to the present embodiment, a step of forming a first ink layer is first performed. In this step, referring to FIG. 3 and FIG. 4, coating device 5 moves to a position above defect portion 21 detected in advance. Then, the conductive ink is applied to the defective portion 21 by the coating device 5, and the first ink layer 31 is formed. The first ink layer 31 is formed so as to overlap a part of the conductive pattern 20 adjacent to the defect portion 21.

  As the coating device 5, for example, a dispenser or an ink jet device is used. Thereby, a fine wiring pattern can be corrected. Furthermore, when an ink jet device is used as the coating device 5, it is preferable to use a device having a small nozzle tip hole. As a result, a finer wiring pattern can be corrected. Specifically, it is possible to correct a wiring pattern having a wiring width of around 5 μm.

  As the conductive ink, for example, a solvent having a boiling point higher than that of toluene and a low volatility, and an additive made of an organometallic compound and improving the adhesion of the conductive ink to the substrate 10 holding the conductive pattern 20 And having a property of slow drying. For example, tetradecane, terpineol, decalin, cyclododecene, and the like are used as the solvent. As the additive, an organometallic compound containing bismuth or copper is used.

  In general, conductive ink in which metal nanoparticles used for inkjet applications are dispersed has a drying property that is dried when discharged from a nozzle and landed on a substrate. Therefore, when a nozzle having a small hole at the tip of the nozzle is used, the conductive ink is easily clogged at the tip of the nozzle due to the drying property of the conductive ink. Further, when the nozzle is intermittently used in the correction of the wiring pattern, the waiting time for the application operation is generated, and therefore, the clogging of the conductive ink is more likely to occur. In these cases, an operation of discarding the conductive ink at the tip of the nozzle in the vicinity of the defective portion immediately before applying the conductive ink is required.

  In the present embodiment, when conductive ink having a slow drying characteristic is used, the conductive ink is difficult to dry, and therefore, clogging of the conductive ink at the nozzle tip is suppressed. Therefore, it becomes possible to ensure the discharge stability of the conductive ink over a long period of time. Accordingly, it is possible to omit the operation of discarding the conductive ink, extend the maintenance interval of the nozzle, and save the cost of parts for the disposable nozzle.

  In addition, the conductive ink generally used for inkjet applications does not contain an additive that improves the adhesion between the conductive pattern 20, the substrate 10, and the insulating layer 11. In this case, depending on the type of process performed after the pattern correction is completed, the adhesion of the correction layer 30 obtained by baking the conductive ink to the substrate 10 may be insufficient. For example, when there is a step of rubbing the surface of the correction layer 30 or performing brush cleaning, the formed correction layer 30 may be peeled off. In this case, for the purpose of protecting the correction layer 30, it is preferable to perform a coating process on the surface of the correction layer 30. However, depending on the type of process performed after the pattern correction is completed, the coating process may not be performed. In addition, there is a problem that the number of processes increases due to the coating process, and the correction process becomes complicated.

  The conductive ink used in this embodiment contains an organic metal compound such as bismuth or copper as an additive. Thereby, the adhesiveness to the board | substrate 10, the conductive pattern 20, and the insulating layer 11 of the correction layer 30 obtained by baking conductive ink improves. This additive also contributes to slowing the drying of the conductive ink.

  Also, conductive inks having various viscosities are used. Specifically, those having a high viscosity of 4,000 to 10,000 mPa · s and those having a low viscosity of 5 mPa · s or less are used. In the case of using a conductive ink having a high viscosity, it can be used after the conductive ink is diluted and adjusted to a low viscosity.

  After the first ink layer 31 is formed, a step of forming the first correction layer 32 is subsequently performed. In this step, referring to FIG. 5, the baking device 6 moves to a position above the first ink layer 31. Then, the first ink layer 31 is baked by the baking device 6 to form the first correction layer 32.

  As the baking apparatus 6, it is preferable to use a laser capable of local baking. Specifically, a YAG (Yttrium Aluminum Garnet) second harmonic continuous wave laser or a carbon dioxide laser is used. By irradiation with these lasers, the first ink layer 31 is heated to evaporate the solvent contained in the conductive ink, and further, fusion and fusion between the metal nanoparticles occur to form the first correction layer 32. Is done.

  Subsequently, a step of forming the second ink layer 33 is performed. In this step, referring to FIG. 6, the coating device 5 moves to a position above the first correction layer 32. Then, a conductive ink is applied on the conductive pattern 20 adjacent to the first correction layer 32 and the defect portion 21 by the coating device 5, and the second ink layer 33 is formed. Here, the conductive ink is applied so as to overlap at least a part of the first correction layer 32. For the coating device 5 and the conductive ink, the same one used in the step of forming the first ink layer 31 is used.

  Finally, the step of forming the second correction layer 34 is performed. In this step, referring to FIG. 7, the baking device 6 moves to a position above the second ink layer 33. Then, the second ink layer 33 is baked by the baking device 6 to form the second correction layer 34. Here, the same apparatus as that used in the step of forming the first correction layer 32 is used for the baking apparatus 6. The first correction layer 32 and the second correction layer 34 are fused and integrated firmly at their contact surfaces.

Through the above process, the correction layer 30 including the first correction layer 32 and the second correction layer 34 is formed in the defect portion 21. The correction layer 30 ensures electrical connection between the conductive patterns 20 arranged with the defect portion 21 therebetween. The pattern correction method according to the present embodiment is characterized in that the step of forming the first correction layer 32 is performed prior to the step of forming the second correction layer 34. Therefore, when the second correction layer 34 is formed, the level difference at the boundary portion 4 is reduced as compared with the case where the first correction layer is not formed in advance. Therefore, the possibility that the second correction layer 34 breaks at the boundary portion 4 is reduced, and as a result, the second correction layer 34 at the boundary portion 4 is suppressed from becoming extremely thin, and the correction resistance can be reduced. It becomes possible.
(Embodiment 2)
Next, a pattern correction method according to the second embodiment will be described with reference to FIGS. The pattern correction method according to the second embodiment is basically performed in the same manner as the pattern correction method according to the first embodiment. However, the pattern correction method according to the second embodiment is different from that of the first embodiment in the structure of the circuit board and the structure of the correction layer that are the targets of pattern correction.

  Specifically, first, as in the case of the first embodiment, before the pattern correction method according to the present embodiment is performed, a step of detecting a defect in the wiring pattern in advance is performed. Here, in the present embodiment, as shown in FIG. 8, the insulating layer 11 exists between the substrate 10 constituting the circuit board 2 and the conductive pattern 20. In addition, in the defect portion 21, the insulating layer 11 is removed in advance by laser irradiation or the like, and the surface of the substrate 10 is exposed. Therefore, as compared with the case of the first embodiment, the step between the conductive pattern 20 and the defect portion 21 at the boundary portion 4 is higher corresponding to the thickness of the insulating layer 11.

  On the other hand, in the pattern correction method according to the present embodiment, since the defect portion 21 is corrected by the following process, after the correction at the boundary portion 4 that has become higher corresponding to the thickness of the insulating layer 11. Can be reduced.

  Specifically, after the step of forming the first ink layer 31 and the step of forming the first correction layer 32 are performed as in the case of the first embodiment, these steps are repeatedly performed. The Thereafter, similarly to the first embodiment, a step of forming the second ink layer 33 and a step of forming the second correction layer 34 are performed.

  That is, in the pattern correction method according to the second embodiment, the step of forming the first ink layer 31 and the step of forming the first correction layer 32 are prior to the step of forming the second ink layer 33. , Repeated several times. As a result, as shown in FIG. 9, a plurality of first correction layers 32 are formed below the second correction layer 34. Here, the same coating apparatus 5 and baking apparatus 6 used in the process of forming each ink layer and correction layer can be the same as those in the first embodiment. In FIG. 9, two first correction layers 32 are formed, but the number of layers is not limited to this.

  As described above, by forming a plurality of the first correction layers 32, the level difference after correction at the boundary portion 4 that becomes higher corresponding to the thickness of the insulating layer 11 is reduced. Therefore, in forming the second correction layer 34, the possibility that the second correction layer 34 breaks at the boundary portion 4 is reduced. As a result, the correction resistance can be reduced by suppressing the second correction layer 34 in the boundary portion 4 from becoming extremely thin.

In the pattern correction method according to the first embodiment and the present embodiment, the step of forming the second ink layer 33 and the step of forming the second correction layer 34 are repeatedly performed a plurality of times. Also good. Here, the number of layers on which the first correction layer 32 is formed in advance is not limited. Thereby, the film thickness of the 2nd correction layer 34 becomes thick, and the possibility that the 2nd correction layer 34 will fracture | rupture in the boundary part 4 becomes still smaller. As a result, the correction resistance at the boundary portion 4 can be reduced.
(Embodiment 3)
Next, a pattern correction method according to the third embodiment will be described with reference to FIG. The pattern correction method according to the third embodiment is adjacent to the defect portion 21 in the conductive pattern 20 as shown in FIG. 10 in addition to the correction process according to the pattern correction method according to the first and second embodiments. It includes a step of forming a recess 23 in the base point 22 which is a region. Furthermore, in the pattern correction method according to the third embodiment, a second correction layer 35 that bypasses the defect portion 21 is formed instead of the second correction layer 34 in the first and second embodiments. This is different from the first and second embodiments.

  First, as in the case of the first embodiment and the second embodiment, a step of detecting a defect in the wiring pattern is performed before the pattern correction method according to the present embodiment is performed.

  Next, in the pattern correction method according to the present embodiment, a step of forming the recess 23 in the base point portion 22 that is a region adjacent to the defect portion 21 in the conductive pattern 20 is performed. Specifically, the conductive pattern 20 is partially removed at the base point 22 by laser irradiation or the like, and the surface of the substrate 10 is exposed, or a hole-shaped recess 23 in which the surface of the conductive pattern 20 is exposed is formed. The As a method of forming the recess 23, for example, pulse irradiation of a YAG laser can be used. Further, the edge portion of the recess 23 may be roughened by laser irradiation, and a projection or the like may be generated. In this case, it is preferable to previously remove protrusions and the like generated at the edge portion by irradiating the YAG laser with pulses with the irradiation power lowered. In addition, the concave portion 23 may be formed so as to be entirely covered with a second ink layer 33 formed in a subsequent process and having a width smaller than the width of the conductive pattern 20 in plan view.

  Next, conductive ink is applied by the same method as in the first embodiment, and the first ink layer 31 is formed in the recess 23. Here, the conductive ink may be applied not only in the recess 23 but also on the conductive pattern 20 adjacent to the recess 23. Then, the first ink layer 31 formed by the same method as in the first embodiment is baked to form the first correction layer 32.

  Next, in the step of forming the second ink layer 33, in the pattern correction method according to the present embodiment, the second ink layer is connected so as to connect the first correction layers 32 formed in the recesses 23. 33 is formed. Then, the second ink layer 33 is baked and the second correction layer 35 is formed by the same method as in the first embodiment. Here, the second ink layer 33 and the second correction layer 35 may be formed so as to linearly connect the first correction layer 32, but as shown in FIG. It may be formed so as to detour.

  As described above, according to the pattern correction method according to the present embodiment, the first correction layer 32 is formed in the concave portion 23 formed in the base point portion 22 of the conductive pattern 20, and further, A second correction layer 35 is formed so as to connect the two. Therefore, the electrical connection between the conductive pattern 20 adjacent to the defect portion 21 and the first correction layer 32 and the second correction layer 35 can be more reliably ensured. Further, since the first correction layer 32 is formed so as to be in contact with the bottom surface of the recess 23, the contact area between the first correction layer 32 and the second correction layer 35 increases. Therefore, the electrical connection between the first correction layer 32 and the second correction layer 35 becomes more reliable. In addition, since the step of forming the first correction layer 32 in the recess 23 is performed before the step of forming the second correction layer 35, the post-correction at the boundary between the recess 23 and the conductive pattern 20 is performed. The step is reduced. As a result, the possibility that the second correction layer 35 is broken at the boundary portion is reduced. Further, the recess 23 may be formed so as to be entirely covered by the second ink layer 33 having a width smaller than the width of the conductive pattern 20 when viewed in a plan view. Thereby, the pattern correction method of the present invention can be easily applied to the correction of a pattern in a fine region.

In the pattern correction method according to the present embodiment, the second correction layer 35 may be formed so as to connect the first correction layers 32 linearly, but bypasses the defect portion 21. May be implemented. Thereby, for example, even when there is a protrusion or the like in the defect portion 21 and it is difficult to apply the conductive ink to the defect portion 21, the second correction layer 35 is formed so as to bypass the defect portion 21. Therefore, electrical connection of the conductive pattern 20 adjacent to the defective portion 21 can be ensured.
(Embodiment 4)
Next, a pattern correction method according to the fourth embodiment will be described with reference to FIGS. The pattern correction method according to the fourth embodiment is basically performed in the same manner as in the third embodiment. However, the pattern correction method according to the fourth embodiment is the same as that of the third embodiment in the structure of the circuit board 3 to be corrected and the structure of the recess 23 formed in the base point portion 22 of the conductive pattern 20. Is different.

  First, referring to FIG. 11, as in the third embodiment, before the pattern correction method according to the present embodiment is performed, a step of detecting a defect in the wiring pattern is performed. In the present embodiment, the circuit board 3 to be subjected to pattern correction includes a substrate 10, a conductive pattern 20, and an insulating film 25. As shown in FIG. 11, the conductive pattern 20 is an insulating film. 25.

  Next, referring to FIG. 12, conductive pattern 20 and insulating film 25 are partially removed by laser irradiation or the like, and hole-shaped recess 23 in which the surface of substrate 10 is exposed is formed. Thereby, a recess 23 that penetrates the insulating film 25 and reaches the conductive pattern 20 is formed. Here, referring to FIG. 15, the length (L1, L2) of each side of recess 23 is smaller than the width of conductive pattern 20 in plan view, and is formed in a later step. The second ink layer 33 can cover the entire surface. Further, the length (L1, L2) of each side of the hole-shaped recess 23 is, for example, 2 μm or more.

  Next, with reference to FIG. 13, the coating device 5 applies conductive ink in the recess 23 to form the first ink layer 31. Here, the conductive ink may be applied not only in the recess 23 but also on the insulating film 25 adjacent to the recess 23. Next, referring to FIG. 14, the first ink layer 31 formed by the baking apparatus 6 is baked, and the first correction layer 32 is formed.

  Next, referring to FIG. 15, conductive ink is applied so as to connect the first correction layers 32 formed in the recesses 23, thereby forming the second ink layer 33. Then, the second correction layer 35 is formed by baking the second ink layer 33. Here, as in the case of the third embodiment, the second correction layer 35 may be formed so as to linearly connect the first correction layers 32, but as shown in FIG. It may be formed so as to bypass the portion 21.

  Thus, according to the pattern correction method according to the present embodiment, the pattern correction method of the present invention can be applied to the circuit board 3 in which the conductive pattern 20 is covered with the insulating film 25. In addition, the length (L1, L2) of each side of the recess 23 is entirely covered by the second correction layer 35 having a width equal to or smaller than the width of the conductive pattern 20 in plan view. It is said to be a grade. As a result, the pattern correction method of the present invention can be applied to the correction of a pattern in a fine region. Furthermore, the length (L1, L2) of each side of the recess 23 is set to 2 μm or more, for example. Thereby, even when a highly viscous conductive ink is used, it is possible to easily fill the recess 23 with the conductive ink.

  Next, a modification of the pattern correction method in the present embodiment will be described. The pattern correction method of this modification is basically performed in the same manner as in the fourth embodiment. However, in this modification, referring to FIG. 16, the recess 24 is formed as a groove-shaped recess 24 extending in the direction intersecting the extending direction of the conductive pattern 20, more specifically, in the orthogonal direction. Is done.

In this case, the width W of the recess 24 is equal to or smaller than the width of the conductive pattern 20. For example, in the modification of the conductive pattern 20 having a line width of 5 μm and a film thickness of about 0.3 μm, the width W of the recess 24 is about 2 to 5 μm. Accordingly, the entire recess 24 can be covered with the second correction layer 35 having a width smaller than the width of the conductive pattern 20 in plan view. Further, the width W of the recess 24 is 1 μm or more. Thereby, even when a highly viscous conductive ink is used, it is possible to easily fill the recess 24 with the conductive ink.
(Embodiment 5)
Next, a pattern correction method according to the fifth embodiment will be described with reference to FIGS. The pattern correction method according to the present embodiment is basically performed in the same manner as the pattern correction method according to the fourth embodiment. However, the pattern correction method according to the fifth embodiment is different from the fifth embodiment in that it further includes a step of removing the insulating film 25 on the conductive pattern 20 adjacent to the recess 23 after the recess 23 is formed. This is different from the case of 4.

  First, referring to FIG. 17, similarly to the fourth embodiment, before the pattern correction method according to the present embodiment is performed, a step of detecting a defect in the wiring pattern is performed.

  Next, referring to FIG. 18, as in the case of the fourth embodiment, conductive pattern 20 and insulating film 25 are partially removed by laser irradiation or the like to form a recess 23 in which the surface of substrate 10 is exposed. Is done. Further, in the present embodiment, after the recess 23 is formed, a step of forming an exposed portion 26 that is a region where the insulating film 25 on the conductive pattern 20 adjacent to the recess 23 is removed is performed. Specifically, after forming the recess 23, the irradiation range is expanded and a weaker laser is irradiated than when the recess 23 is formed. Thereby, the insulating film 25 on the conductive pattern 20 adjacent to the concave portion 23 is removed, and the exposed portion 26 is formed.

  Next, referring to FIG. 19, conductive ink is applied to the inside of the recess 23 and the exposed portion 26 by the coating device 5, thereby forming the first ink layer 31. Next, referring to FIG. 20, the first ink layer 31 is baked by the baking device 6, and the first correction layer 32 is formed.

  Next, as in the fourth embodiment, the conductive ink is applied so as to connect the first correction layers 32 formed in the recesses 23, and the second ink layer 33 is formed. Then, the second correction layer 35 is formed by baking the second ink layer 33.

  As described above, in the pattern correction method according to the present embodiment, the step of forming the exposed portion 26 that is the region where the insulating film 25 on the conductive pattern 20 adjacent to the concave portion 23 is removed is performed. A first correction layer 32 is formed inside and at the exposed portion 26. Therefore, more contact areas between the first correction layer 32 and the conductive pattern 20 are ensured. As a result, the electrical connection between the first correction layer 32 and the conductive pattern 20 can be made more reliable.

  The embodiment disclosed this time is to be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The pattern correction method of the present invention can be applied particularly advantageously in the correction of wiring patterns that require a reduction in correction resistance.

  1 to 3 circuit board, 4 boundary portion, 5 coating device, 6 baking device, 10 substrate, 11 insulating layer, 20 conductive pattern, 21 defect portion, 22 base portion, 23, 24 recess, 25 insulating film, 30 correction layer 31 First ink layer, 32 First correction layer, 33 Second ink layer, 34, 35 Second correction layer.

Claims (8)

A pattern correction method for correcting a defective portion of a conductive pattern,
Forming a first ink layer by applying a conductive ink;
Forming a first correction layer by firing the first ink layer;
Forming a second ink layer by applying a conductive ink so that at least a portion thereof overlaps the first correction layer;
Forming a second correction layer by firing the second ink layer,
The pattern correction method, wherein the first correction layer and the second correction layer ensure electrical connection between the conductive patterns arranged with the defect portion interposed therebetween.   2. The method according to claim 1, wherein the step of forming the first ink layer and the step of forming the first correction layer are repeatedly performed a plurality of times before the step of forming the second ink layer. The pattern correction method described.   The pattern correction method according to claim 1, wherein the step of forming the second ink layer and the step of forming the second correction layer are repeatedly performed a plurality of times. Further comprising forming a recess in the conductive pattern adjacent to the defect portion,
The pattern correction method according to claim 1, wherein in the step of forming the first ink layer, the first ink layer is formed in the recess. The conductive pattern is covered with an insulating film,
The pattern correction method according to claim 4, wherein in the step of forming the recess, the recess that penetrates the insulating film and reaches the conductive pattern is formed.   In the step of forming the concave portion, the concave portion that can be entirely covered with the second ink layer having a width equal to or smaller than the width of the conductive pattern in plan view is formed. The pattern correction method according to claim 4 or 5.   The pattern correction method according to claim 1, wherein in the step of forming the second ink layer, the second ink layer is formed so as to bypass the defective portion.   The conductive ink contains a solvent having a boiling point higher than that of toluene and an additive made of an organometallic compound and improving the adhesion of the conductive ink to a substrate holding the conductive pattern. The pattern correction method according to any one of 1 to 7.

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