JP2012173884A - Data transfer control device and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently transfer data between different OSs even when a size of a shared memory is limited.SOLUTION: In the case that a data transfer instruction for transferring data from a first OS to a hardware device managed by a second OS is issued to the first OS, the data of a transfer object by the data transfer instruction is divided into two or more pieces of division data of a size smaller than a usable size of a shared memory to be shared and used by the first OS and the second OS and written to the shared memory. A division data transfer command specifying the data size of the division data as a transfer size is generated and issued to the second OS every time the division data is written to the shared memory so that the division data written to the shared memory is read in the second OS and transferred to the hardware device.

Description

  The present invention relates to a data transfer control device and a program.

  In Patent Document 1, inter-processor communication is performed using a shared memory and an interrupt, an operating system (OS) system call is issued by a processor interrupt means of a communication destination, and the processing result is communicated by another inter-processor communication. A technique to notify the origin is disclosed.

JP-A-3-42762

  An object of the present invention is to provide a data transfer control device and program capable of efficiently transferring data between different OSs even when the size of the shared memory is limited.

  According to a first aspect of the present invention, there is provided a data transfer instruction for transferring data from a first operating system to a hardware device managed by a second operating system different from the first operating system. When issued to the system, the data to be transferred by the data transfer instruction is larger than the usable size of the shared memory that is shared and used by the first operating system and the second operating system. Writing means for dividing into a plurality of divided data of a small size and writing to the shared memory; and the divided data written to the shared memory by the writing means is read by the second operating system and To be transferred to the hardware device Issuing means for generating a divided data transfer command specifying the data size of the divided data as a transfer size and issuing it to the second operating system each time the divided data is written into the shared memory by the loading means; , A data transfer control device.

  According to the invention of claim 2, a data acquisition instruction for acquiring data from a hardware device managed by a second operating system different from the first operating system is issued to the first operating system. The data to be acquired by the data acquisition instruction in the second operating system is larger than the usable size of the shared memory shared and used by the first operating system and the second operating system. Divided data in which the size of the divided data is specified as the transfer size so that the divided data is divided into a plurality of divided data and is read from the hardware device and written to the shared memory for each divided data. Generate a transfer command and write it Issuing means for issuing to the second operating system so that split data is read in the first operating system, and writing to the shared memory in response to the split data transfer command by the second operating system And a transfer means for reading the divided data from the shared memory and transferring it to the issuer of the data acquisition instruction.

  According to a third aspect of the present invention, in the data transfer control device according to the second aspect, when the transfer of the data to be acquired to the shared memory is completed, it has already been issued to the second operating system. Control means for controlling the execution of the unexecuted divided data transfer command to be stopped.

  According to a fourth aspect of the present invention, in the data transfer control device according to any one of the first to third aspects, the issuing means is configured to transfer data in accordance with the divided data transfer command on the second operating system. Generating a divided data transfer command having a size that is an integral multiple of the transfer processing unit size of the device driver that performs the operation and having a size smaller than the usable size of the shared memory as the transfer size;・ It is issued to the system.

  According to a fifth aspect of the present invention, in the data transfer control device according to any one of the first to fourth aspects, the divided data transfer command issued from the issuing means operates on the second operating system. In response to this, a device driver for performing a data transfer operation is further provided.

  According to a sixth aspect of the present invention, there is provided a data transfer instruction for transferring data from a first operating system to a hardware device managed by a second operating system different from the first operating system. When issued to the system, the data to be transferred by the data transfer instruction is larger than the usable size of the shared memory that is shared and used by the first operating system and the second operating system. The second operating system reads the first divided data written into the shared memory by the writing means by dividing the first divided data into a plurality of first divided data having a small size and the writing means reading the shared memory. To be transferred to the hardware device Each time the first divided data is written to the shared memory by the writing means, a first divided data transfer command specifying the data size of the first divided data as a transfer size is generated and the second operating data is generated. A first issuing means for issuing to the system; and a second operating system when a data acquisition command for acquiring data from the hardware device is issued to the first operating system. The data to be acquired by the data acquisition command is divided into a plurality of second divided data having a size smaller than the usable size of the shared memory, and the second divided data is separated from the hardware device for each second divided data. The size of the second divided data is transferred so that it can be read and written to the shared memory. A second issuing means for generating a second divided data transfer command designated as the second divided data and issuing the second divided data to the second operating system so that the written second divided data is read by the first operating system Transfer means for reading the second divided data written in the shared memory in response to the second divided data transfer command by the second operating system from the shared memory and transferring it to the issuer of the data acquisition instruction. , A data transfer control device.

  According to a seventh aspect of the present invention, in the data transfer control device according to the sixth aspect, the first issuing means performs a data transfer operation according to the first divided data transfer command on the second operating system. Generating a first divided data transfer command having a size that is an integral multiple of the transfer processing unit size of the driver and having a size smaller than the usable size of the shared memory as the transfer size; The second issuing means has a size that is an integral multiple of a transfer processing unit size of a device driver that performs a data transfer operation according to the second divided data transfer command on the second operating system. The second size in which a size smaller than the usable size of the shared memory is designated as the transfer size. And generates a data transfer command issued to the second operating system.

  According to an eighth aspect of the present invention, in the data transfer control device according to the sixth or seventh aspect, when the transfer of the acquisition target data to the shared memory is completed, the second operating system is provided. And a control means for controlling so that data transfer is not executed by the already issued unexecuted second divided data transfer command.

  A ninth aspect of the present invention is the data transfer control device according to any one of the sixth to eighth aspects, wherein the first division that operates on the second operating system and is issued from the first issuing means. A device driver is further provided for performing a data transfer operation in response to the data transfer command and the second divided data transfer command issued from the second issuing means.

  According to a tenth aspect of the present invention, there is provided a data transfer instruction for transferring data from a first operating system to a hardware device managed by a second operating system different from the first operating system. When it is issued to the first operating system, the shared memory used by the first operating system and the second operating system for sharing the data to be transferred by the data transfer instruction can be used. The second operating system reads out the divided data written into the shared memory by the writing means, and the divided data written into the shared memory by dividing into a plurality of pieces of divided data having a size smaller than the size. Transferred to the hardware device. As described above, every time the divided data is written into the shared memory by the writing means, a divided data transfer command is generated by designating the data size of the divided data as a transfer size, and is sent to the second operating system. This is a program for functioning as an issuing means for issuing to a computer.

  According to the eleventh aspect of the present invention, a data acquisition instruction for acquiring data from a hardware device that manages a computer with a second operating system different from the first operating system is provided to the first operating system. The data to be acquired by the data acquisition command in the second operating system can be used in a shared memory that is shared and used by the first operating system and the second operating system. The size of the divided data is designated as the transfer size so that the divided data is divided into a plurality of divided data smaller than the size, and the divided data is read from the hardware device and written to the shared memory. Generate split data transfer command , Issuing means for issuing to the second operating system so that the written divided data is read by the first operating system, and according to the divided data transfer command by the second operating system. It is a program for functioning as transfer means for reading the divided data written in the shared memory from the shared memory and transferring it to the issuer of the data acquisition instruction.

  The invention of claim 12 is directed to a data transfer instruction for transferring data from a first operating system to a hardware device managed by a second operating system different from the first operating system. When it is issued to the first operating system, the shared memory used by the first operating system and the second operating system for sharing the data to be transferred by the data transfer instruction can be used. Write means for dividing into a plurality of first divided data having a size smaller than the size, and writing to the shared memory, and the first divided data written to the shared memory by the writing means is the second operating system Read out in said hardware device Each time the first divided data is written into the shared memory by the writing means, a first divided data transfer command is generated that specifies the data size of the first divided data as the transfer size. First issue means for issuing to the second operating system, and when a data acquisition instruction for acquiring data from the hardware device is issued to the first operating system, the first In the two operating systems, the data to be acquired by the data acquisition command is divided into a plurality of second divided data having a size smaller than the usable size of the shared memory, and the hardware is divided for each second divided data. The second divided data so that it is read from the wear device and written to the shared memory. A second divided data transfer command that specifies the size as the transfer size is generated, and the second divided data is issued to the second operating system so that the written second divided data is read by the first operating system. 2 issuance means, and the second operating system reads out the second divided data written in the shared memory in response to the second divided data transfer command from the shared memory and transfers it to the issuer of the data acquisition instruction It is a program for functioning as a transfer means.

  According to the first aspect of the present invention, even if the size of the shared memory is limited, data can be efficiently transferred between different OSs.

  According to the second aspect of the present invention, even if the size of the shared memory is limited, data can be efficiently transferred between different OSs.

  According to the third aspect of the present invention, it is possible to prevent the data transfer device from causing a non-existent data read waiting state due to an issuance of an unnecessary command.

  According to the fourth aspect of the present invention, compared to a case where the transfer size of the divided data is not an integral multiple of the transfer processing unit size of the device driver, it can be transferred efficiently.

  According to the fifth aspect of the present invention, even if the size of the shared memory is limited, data can be efficiently transferred between different OSs.

  According to the sixth aspect of the present invention, even if the size of the shared memory is limited, data can be efficiently transferred between different OSs.

  According to the seventh aspect of the present invention, it is possible to transfer the first and second divided data more efficiently than when the transfer size of the first and second divided data is not an integral multiple of the transfer processing unit size of the device driver.

  According to the eighth aspect of the present invention, it is possible to prevent the data transfer device from causing a non-existent data read waiting state due to an issuance of an unnecessary command.

  According to the ninth aspect of the present invention, even if the size of the shared memory is limited, it is possible to transfer data more efficiently than in the case where this configuration is not provided between different OSs.

  According to the tenth aspect of the present invention, even if the size of the shared memory is limited, data can be efficiently transferred between different OSs.

  According to the invention described in claim 11, even if the size of the shared memory is limited, data can be efficiently transferred between different OSs.

  According to the twelfth aspect of the present invention, even if the size of the shared memory is limited, data can be efficiently transferred between different OSs.

1 is a configuration diagram of an image forming apparatus according to an embodiment. Operates on the first OS of the first control unit when focusing on the operation when data is transferred between the application of the first OS of the first control unit and the interface of the second control unit controlled by the second OS FIG. 2 is a software configuration diagram that operates on the second OS of the second control unit. 7 is a flowchart illustrating a processing routine performed by an HW-independent device driver when a write command is issued from an application to an HW-independent device driver operating on the first OS side of the first control unit. 7 is a flowchart illustrating a processing routine performed by the HW-independent device driver when a write command is issued from an application to the HW-independent device driver operating on the first OS side of the first control unit. It is a flowchart which shows the process routine of a command reception process when the communication module between OSs by the side of 2nd OS of a 2nd control part receives a command from the communication module between OSs by the side of 1st OS. It is an example of the usage form of the shared memory between OSs. (A) is a figure which shows an example of the format of the data transfer command (write command, read command) produced | generated by the communication module between OSs, (B) is the data transfer completion message produced | generated by the communication module between OSs. It is a figure which shows an example of a format of (write end, read end). It is a schematic diagram which shows a data transfer state in case the size of the data of the transfer object at the time of a write process is larger than the usable size of the shared memory between OS. It is a timing chart of a command and a message when the size of data to be transferred at the time of write processing is larger than the usable size of the shared memory between OSs. It is a schematic diagram which shows a data transfer state in case the size of the data of the transfer object at the time of a write process is below the usable size of the shared memory between OS. It is a timing chart of a command and a message when the size of data to be transferred at the time of write processing is equal to or smaller than the usable size of the shared memory between OSs. It is a flowchart which shows the process which can be replaced with the process shown in FIG. 7 is a flowchart illustrating a processing routine performed by an HW-independent device driver when a read command is issued from an application to an HW-independent device driver operating on the first OS side of the first control unit. 7 is a flowchart illustrating a processing routine performed by an HW-independent device driver when a read command is issued from an application to an HW-independent device driver operating on the first OS side of the first control unit. It is a schematic diagram showing a data transfer state when the size of the work area of the application at the time of read processing is larger than the usable size of the inter-OS shared memory. It is a schematic diagram showing a data transfer state when the size of the work area of the application at the time of read processing is equal to or smaller than the usable size of the inter-OS shared memory. It is a flowchart which shows the processing routine of the read command process performed with the communication module between OS of a 2nd control part. 12 is a timing chart of commands and messages when the size of the application work area during the read processing is larger than the usable size of the inter-OS shared memory. It is a flowchart which shows the process which can be replaced with the process shown in FIG.

  Hereinafter, an example of an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 shows an image forming apparatus 10 according to the present exemplary embodiment. The image forming apparatus 10 includes a first control unit 12 and a second control unit 14 that control the operation of each unit of the image forming apparatus 10, and an optically read document (paper document) that is set to be read. An image reading unit 20 that outputs data, an image forming unit 22 that forms an image represented by the input image data on a recording sheet, a display unit 18A composed of an LCD or the like, a numeric keypad, a touch panel, etc. Image information for transmitting / receiving image information (facsimile communication) to / from an operation panel 18 provided with an operation receiving unit 18B to be received and other devices having a function as a facsimile apparatus via a telephone line and a public communication network (not shown). A network for transmitting / receiving information via the transmission / reception unit 24 and an information processing apparatus such as a PC (Personal Computer) via a network cable and a computer network (not shown). And over click communication control unit 26, it is provided with, which are connected to one another via a bus 28.

  The first control unit 12 includes a microcomputer or the like, and is provided with a non-volatile storage unit 12C including a CPU 12A, a memory 12B, an HDD (Hard Disk Drive), a flash memory, and the like. The storage unit 12C performs, for example, processing for providing a user of the image forming apparatus 10 with some function of the image forming apparatus 10 (for example, a copying function or a function for performing facsimile transmission / reception) and provides the function. Program for controlling the screen to display the screen for display on the display unit 18A, an external interface program functioning as an API (Application Programming Interface) for the device driver, and a device driver program for controlling the hardware device And an operating system (hereinafter referred to as a first OS) program that functions as a platform for executing these programs.

  The second control unit 14 includes a microcomputer or the like, and is provided with a non-volatile storage unit 14C including a CPU 14A, a memory 14B, an HDD (Hard Disk Drive), a flash memory, and the like. For example, the storage unit 14C performs processing for providing a user of the image forming apparatus 10 with some function of the image forming apparatus 10 (for example, a function different from the function provided by the first control unit). In order to control an application program that performs screen control for displaying a screen for providing the function on the display unit 18A, an external interface program that functions as an API (Application Programming Interface) for a device driver, and a hardware device Device driver programs and an operating system (hereinafter referred to as second OS) program that functions as a platform for executing these programs are stored.

  Furthermore, the second control unit 14 is also provided with an interface 14D such as a USB (Universal Serial Bus) port that is not provided in the first control unit 12. In the present embodiment, description will be given focusing on data transfer through the interface 14D.

  Note that the device driver program stored in the storage unit 14C of the second control unit 14 depends on the hardware device (in this case, the interface 14D including the interface controller) and actually controls the interface 14D. Device driver (hereinafter referred to as HW-dependent device driver) program, and interface driver and logic layer device driver (hereinafter referred to as HW-independent device driver) program that perform processing independent of hardware and devices. It is. The device driver stored in the storage unit 12C of the first control unit 12 is a HW-independent device driver (when attention is paid to the interface 14D). If the first control unit 12 is equipped with any hardware device, the HW-dependent device driver program depending on the hardware device is naturally stored in the storage unit 12C. In the present embodiment, as described above, the description will be made focusing on the interface 14D, and thus the description thereof is omitted.

  FIG. 2 shows the first when attention is paid to the operation when data is transferred between the application 30 of the first OS of the first control unit 12 and the interface 14D of the second control unit 14 controlled by the second OS. 3 is a software configuration diagram that operates on the first OS of the control unit 12 and a software configuration diagram that operates on the second OS of the second control unit 14. FIG.

  As shown in the figure, the first control unit 12 side, in order from the upper layer, is a hierarchy of an application 30, an external interface 32, a device driver (HW-independent device driver) 34 independent of hardware and devices, and an inter-OS communication module 36. The second control unit 14 has a hierarchy of inter-OS communication module 40, external interface 42, HW-independent device driver 44, and hardware / device-dependent device driver (HW-dependent device driver) 46 in order from the upper layer. Consists of.

  Since the application 30, the external interface 32, the HW-independent device driver 34, the external interface 42, the HW-independent device driver 44, and the HW-dependent device driver 46 are as described above, the description thereof is omitted here. The module 36 and the inter-OS communication module 40 will be described.

  The inter-OS communication module 36 and the inter-OS communication module 40 are modules used when communicating between different OSs. The inter-OS communication module 36 is an inter-OS communication module 40 as a part of the function of the first OS. Are provided as part of the functions of the second OS. Various techniques that are generally known can be adopted as techniques for inter-OS communication. In this embodiment, a memory area (inter-OS shared memory) shared by the first OS and the second OS is used. The communication used shall be performed.

  Note that the OS shared memory may be provided in the memory 12B of the first control unit 12, or may be provided in the memory 14B of the second control unit 14, for example, and is not particularly limited.

  As shown in FIG. 6, a message or command from the first OS to the second OS is stored in a predetermined memory area, here, the inter-OS communication message area 50 of the inter-OS shared memory. The inter-OS communication module 36 of the first OS stores a message or command to be transmitted to the second OS in the inter-OS communication message area 50. The inter-OS communication module 40 of the second OS takes out the message or command stored in the inter-OS communication message area 50.

  On the other hand, a message or command from the second OS to the first OS is stored in a predetermined memory area, here, an inter-OS communication message area 54 of the inter-OS shared memory. The inter-OS communication module 40 stores a message or command to be transmitted to the first OS in the inter-OS communication message area 54. The inter-OS communication module 36 of the first OS takes out the message or command stored in the inter-OS communication message area 54.

  As described above, the interface 14D is provided on the second OS side and managed on the second OS side. However, the interface 14D is connected to a memory (FIFO or the like) in an interface controller (USB controller or the like) that controls the interface 14D on the second OS side. When data transfer is performed such that data is written from the first OS side or data is read from a memory (FIFO or the like) in an interface controller (USB controller or the like) that controls the interface 14D and the data is acquired on the first OS side. There is.

  Such data transfer is performed in response to a write command (hereinafter, write command) and an acquisition command (hereinafter, read command) output from the application 30 on the first OS side.

  More specifically, when a write command is issued from the application 30, data to be transferred is first written into the OS shared memory by the HW-independent device driver 34, and then from the first OS side to the second OS side. A write command is issued by inter-OS communication. The HW-independent device driver 44 on the second OS side that has received this write command reads the data written in the inter-OS shared memory, and the HW-dependent device driver 46 controls the interface 14D by DMA transfer. Transfer and write to memory (FIFO etc.) in the controller (USB controller etc.).

  When a read command is issued from the application 30, first, a read command is issued from the first OS side to the second OS side by inter-OS communication. The HW-dependent device driver 46 on the second OS side activates DMA to a memory (such as a FIFO) in an interface controller (such as a USB controller) that controls the interface 14D by DMA transfer in accordance with the read command and reads data. The read data is written to the inter-OS shared memory by the HW-independent device driver 44, and the HW-independent device driver 34 on the first OS side reads the data written to the shared memory between the OSs to the application 30. Forward.

  Here, the flow of commands and the like during the write process will be described with reference to FIG.

  The application 30 issues a write command to the HW-independent device driver 34 via the external interface 32. The HW-independent device driver 34 issues a write command to the second OS side according to the issued write command. A command generation instruction is issued to the communication module 36. The inter-OS communication module 36 generates a write command according to the generation instruction and issues it to the inter-OS communication module 40 on the second OS side.

  The inter-OS communication module 40 on the second OS side outputs a write command issued from the first OS side to the HW-independent device driver 44 via the external interface 42. The HW-independent device driver 44 reads data from the inter-OS shared memory according to the write command. Then, the HW-dependent device driver 46 sequentially writes the read data to the memory (FIFO or the like) in the interface controller (USB controller or the like) that controls the interface 14D by starting the DMA. When writing by the HW-dependent device driver 46 is completed, a write end message generation instruction is output from the HW-independent device driver 44 to the inter-OS communication module 40. The inter-OS communication module 40 generates a write end message and issues it to the inter-OS communication module 36 on the first OS side. The write end message received by the inter-OS communication module 36 is notified to the HW-independent device driver 34 and is notified to the application 30 via the external interface 32. The flow of commands and the like during read processing is the same.

  When the write command is issued from the application 30, if the transfer size of the transfer target data designated by the write command is equal to or smaller than the size of the usable area of the inter-OS shared memory, the inter-OS communication module 36 Can write data of the transfer size from the application 30 to the shared memory, and if one write command with the specified transfer size is issued from the first OS side to the second OS side, the second OS side as described above. Can be transferred to the interface 14D. However, when only an area smaller than the size of the data to be transferred can be secured in the shared memory between the OSs, if there is no contrivance as in the prior art, the shared memory between the OSs is used. The data to be transferred cannot be written and a memory error is returned to the application 30 side. It made. Here, the application 30 that has received the memory error can reduce the transfer size and issue the write command again. However, if the transfer size is still larger than the size that can be used in the shared memory between the OSs, the memory error also occurs. Will be returned. It is inefficient to repeat this, and the application 30 needs to issue a write command with a reduced transfer size a plurality of times. The same applies to the read command.

  Next, details of the data transfer operation in the present embodiment will be described. First, write processing for transferring data from the first OS side to the second OS side will be described with reference to FIGS. In the following, the OS shared memory may be simply referred to as a shared memory.

  When a write command is issued from the application 30 to the HW-independent device driver 34 via the external interface 32, the HW-independent device driver 34 executes the processing routine shown in FIG.

  In step 100, whether or not an area of the transfer size (data size N) of the transfer target data specified in the write command (see also FIG. 9 (1) and FIG. 11 (1)) can be acquired from the shared memory. Determine whether. If the size of the area usable in the shared memory is smaller than the data size N, the process proceeds to step 102. If the size of the area usable in the shared memory is equal to or larger than the data size N, the process proceeds to step 130 in FIG.

  As shown in FIG. 8, when the size of the shared memory is limited and the size of the work area of the application 30 in which the transfer target data is stored is larger than the size of the usable area of the shared memory, step 100 is performed. Is negatively determined. On the other hand, as shown in FIG. 10, when the size of the work area of the application 30 in which the transfer target data is stored is smaller than the size of the usable area of the shared memory, an affirmative determination is made in step 100. Here, the work area of the application 30 is an area secured by the application 30 in the memory 12B. In the case of writing, the work area has a size equal to the size of the data to be transferred. A timing chart corresponding to FIG. 8 is shown in FIG. 9, and a timing chart corresponding to FIG. 10 is shown in FIG.

  First, as shown in FIG. 8, a case will be described where the size of the shared memory is limited and the size of the usable area of the shared memory is smaller than the size of the data to be transferred.

  In step 102 in FIG. 3, a predetermined size α × m areas 52 are acquired (reserved) within the size of the usable area from the shared memory (see also FIG. 6). That is, if the size of the usable area of the shared memory is M, the area is acquired so that α × m <M. Here, α is a value smaller than the size of the usable area of the shared memory, and m is an integer of 1 or more. The size of the work area of the HW-independent device driver 44 and the HW-dependent device driver 46 of the second control unit 14 may be set.

  Here, at the time of the write process, on the second OS side, the HW-independent device driver 44 reads the data from the shared memory by the write command and transfers the data to a predetermined storage area (device driver work area) of the memory 14B. Furthermore, the HW-dependent device driver 46 starts DMA to transfer data sequentially from the work area of the device driver to a memory (such as a FIFO) in an interface controller (such as a USB controller) that controls the interface 14D by DMA transfer. I have to. The work area of the device driver is smaller than the usable size of the shared memory. Also, a plurality of device driver work areas are usually provided (for example, two to three). In the example shown in FIG. 8, two device driver work areas are provided. In this case, while the HW-independent device driver 44 writes data in one work area, the HW-dependent device driver 46 can read data from the other work area and transfer it to the interface 14D. The same applies when there are three work areas. If each size of the work area of the device driver is d, α = βd may be set. Here, β is an integer of 1 or more. Note that by setting β to an integer of 2 or more, writing and reading are efficiently performed as described above in data transfer through the work area of the device driver. In FIG. 8, the area acquired for use in data transfer from the shared memory is indicated by a thick broken line.

  In step 104, the division number n is calculated and 1 is set to the parameter k. Here, the division number n is a quotient obtained by dividing the data size N by α. When a remainder is obtained as a result of division, the value obtained by adding 1 to the quotient is set to n.

  In step 106, 1 is set to the parameter s, and the start address add0 of the area 52 acquired from the shared memory is set to the address add.

  In step 108, it is determined whether data can be written to the shared memory. In the present embodiment, when the area 52 acquired from the shared memory is smaller than the data size N to be transferred, the acquired area 52 is used as a ring buffer for data transfer. Then, the HW-independent device driver 34 writes each of the divided data obtained by dividing the data to be transferred existing in the work area of the application 30 for each data size α from the top in order from the top address add0 of the acquired area 52. Go. Here, in a state where no divided data is written in the shared memory, it can be determined in step 108 that writing is possible. However, after the divided data is written to the end address of the area 52 acquired from the shared memory, the subsequent divided data must be overwritten on the already written data. The next writing cannot be performed unless the data written in is read and transferred to the work area of the device driver. Accordingly, the HW-independent device driver 34 determines whether or not there is a size that allows the divided data α to be written in the shared memory based on a write end message (described later) issued from the second OS side. It waits until the area of is made.

  In this embodiment, as will be described later, one write command is issued to the second OS for writing one piece of divided data. When a write end message for this write command is issued from the second OS, the area where the divided data is written in the shared memory becomes an area where the next divided data can be written.

  After determining in step 108 that writing is possible, the process proceeds to step 110.

  In step 110, the divided data corresponding to the size α is read from the work area of the application 30, and the divided data is written in the area indicated by the address add of the shared memory.

  In step 112, the address add and the data so that the divided data of the data size α is read from the address add by the HW-independent device driver 44 of the second OS and transferred to the interface 14D by the HW-dependent device driver 46. A command for issuing a write command with the size α as an argument is issued to the inter-OS communication module 36. The inter-OS communication module 36 receives this issuance command and generates and issues one write command (see also (2) and (5) in FIG. 9).

  FIG. 7A shows an example of a format of a data transfer command (write command, read command) generated by the inter-OS communication module 36. As shown in the figure, the data transfer command is based on message communication header information indicating the source and destination of the message, a command (indicating read or write) to the device driver of the second OS, an argument (address), and an argument (data size). Composed.

  In the present embodiment, when one write command from the application 30 is received, the data to be transferred is divided, and a write command having a transfer size smaller than the data size N is issued by the number of divisions. This write command is referred to as a divided write command.

  When receiving the divided write command, the inter-OS communication module 40 of the second OS outputs the divided write command to the HW-independent device driver 44 via the external interface 42. Thereby, the HW-independent device driver 44 executes the processing routine shown in FIG. The timing at which the inter-OS communication module 40 outputs the divided write command to the HW-independent device driver 44 is a timing at which at least one of the work areas of the device driver of the second OS can be used.

  Specifically, when there is one device driver work area, when the inter-OS communication module 40 receives a split write command from the first OS side, it receives it from the first OS side one time before and receives HW independent. If the execution of the divided write command output to the device driver 44 (hereinafter referred to as the previous divided write command) has not yet been processed, data transfer using the device driver area on the second OS side will be performed, or data Since the transfer is being executed, the inter-OS communication module 40 received from the first OS side until the execution of the previous divided write command is completed (for example, there is an instruction to issue a read end command for the previous divided write command). The output of the divided write command to the HW-independent device driver 44 is waited for.

  In addition, when two work areas of a device driver of size d are provided and the divided data size α (data size specified as an argument in the divided write command) is 2d, the DMA transfer by the previous divided write command is performed. (To be described later) is performed once in each of the one work area and the other work area. When the DMA transfer in one work area is completed, the next divided write command is executed in the one work area. Therefore, the next divided write command may be output at this timing.

  If the divided write command received by the inter-OS communication module 40 is the first divided write command by the write command, it is output to the HW-independent device driver 44 without waiting for any processing.

  Here, the command reception process of the HW-independent device driver 44 on the second OS side will be described with reference to FIG.

  When a command is received from the first OS side in step 200, it is determined in step 202 whether the received command is a write or a read. If it is determined that the command is a write command, the process proceeds to step 204, and data of the data size specified by the argument (here, the divided data) is read from the address of the shared memory specified by the argument of the split write command. In step 206, an I / O request is issued to the HW-dependent device driver 46 (see also FIG. 9 (3)). Device processing is performed by this IO request. That is, the data written in the work area of the device driver is read by the HW dependent device driver 46 and transferred to the interface 14D (DMA (Direct Memory Access) transfer). When the DMA transfer ends, a DMA transfer end signal is output from the HW-dependent device driver 46 to the HW-independent device driver 44 (see also FIG. 9 (4)).

  If the data size specified by the divided write command is larger than the size d of each device driver area, the process of reading and transferring data corresponding to the size of the device driver area from the shared memory is repeated. As a result, the divided data of the specified size is transferred. If there are multiple work areas for the device driver, as described above, reading data from the work area where writing has been completed and writing to other work areas are performed in parallel, thereby improving efficiency. Perform transfer work. In the example shown in FIGS. 8 and 9, two device driver work areas are provided, the data size α is twice the device driver work area d, and the divided data of the data size α is transferred by two DMA transfers. To be.

  In step 208, it is determined whether or not the data transfer for the data size specified by the divided write command has been completed. If it is determined that the transfer has not ended, the process returns to step 204 and the above processing is repeated. If it is determined in step 208 that the transfer has been completed, the process proceeds to step 210.

  In step 210, a command to issue a write end message is output to the inter-OS communication module 40. Thereby, the inter-OS communication module 40 creates a write end message and issues it to the inter-OS communication module 36 of the first OS (see also FIGS. 9 (6), (8), and (9)).

  FIG. 7B is a diagram illustrating an example of a format of a data transfer end message (write end, read end) generated by the inter-OS communication module 40. As shown in the figure, the data transfer end message is composed of message communication header information indicating the source and destination of the message, and status information indicating the status of write end or read end. The status information may include information indicating the size of the transferred data.

  Even if the command issued to the second OS is not a divided write command but a write command, data transfer by the HW-independent device driver 44 and the HW-dependent device driver 46 in the second OS is performed in the same manner as described above.

  On the other hand, the HW-independent device driver 34 issues an issue command in step 112, and then adds 1 to s and 1 to k in step 114. Further, α is added to the address add.

  In step 116, it is determined whether k is equal to n. If a negative determination is made here, the process proceeds to step 118. In step 118, it is determined whether s is larger than m. If it is determined that s is greater than m, the process returns to step 106 to indicate that writing of m pieces of divided data to the area 52 secured in the shared memory is completed, and 1 is set in s. At the same time, the initial address add0 of the area 52 is set to the address add, and the above-described processing is repeated. On the other hand, if a negative determination is made in step 118, the process returns to step 108 and repeats the above-described processing to indicate that writing of m pieces of divided data to the area 52 secured in the shared memory has not been completed. .

  If it is determined in step 116 that k is equal to n, the next divided data to be written to the shared memory is the last divided data (that is, the nth divided data), so the process proceeds to step 120. In step 120, it is determined whether or not s is larger than m. If it is determined that s is larger, in step 122, the head address add0 of the area 52 is set in the address add and the process proceeds to step 124. If it is determined in step 120 that s is equal to or less than m, step 122 is skipped and the process proceeds to step 124.

  In step 124, it is determined whether or not the divided data can be written in the same manner as in step 108. If it is determined that the divided data can be written, the process proceeds to step 126 to read the nth divided data from the work area of the application 30. The divided data is written in the area indicated by the address add of the shared memory.

  In step 128, the OS issues a command to issue a divided write command with the address add and the data size of the n-th divided data (the data size of the n-th divided data is not necessarily α) as arguments. Deliver to module 36. The inter-OS communication module 36 receives this issuance command and generates and issues one divided write command (see also (7) in FIG. 9).

  In step 130, it is determined whether or not the write processing of the data to be transferred has been completed. Here, when the write end message for the nth divided write command is issued from the inter-OS communication module 40 on the second OS side (see also FIG. 9 (9)), it is determined that the write is ended. If an affirmative determination is made in step 130, the process proceeds to step 132, and a result indicating the end of writing is notified to the application 30 (see also FIG. 9 (10)).

  Next, as shown in FIG. 10, a process when a positive determination is made in step 100 because the size of the transfer target data is equal to or smaller than the usable size of the inter-OS shared memory will be described. In step 140 of FIG. 4, an area of the data size N specified in the write command (see also FIG. 11 (1)) is acquired from the shared memory.

  In step 142, the division number n is calculated and 1 is set to the parameter k. The calculation method of the division number n is the same as that in step 104.

  In step 144, the start address add0 of the area acquired from the shared memory is set to the address add.

  In step 146, the divided data of size α is read from the work area of the application 30, and the divided data is written in the area indicated by the address add of the shared memory.

  In step 148, the divided data having the data size α from the address add is read by the HW-independent device driver 44 of the second OS and transferred to the interface 14D by the HW-dependent device driver 46. A split write command issuance command with the size α as an argument is issued to the inter-OS communication module 36. The inter-OS communication module 36 receives this issue command and generates and issues one divided write command (see also (2) and (5) in FIG. 11).

  Note that the processing when the split write command is received on the second OS side is as described above, and thus the description thereof is omitted (also (3), (4), (6), and (8) in FIG. 11). reference.).

  Subsequently, in step 150, 1 is added to k, and α is added to address add.

  In step 152, it is determined whether k is equal to n. If a negative determination is made here, the process returns to step 146 and the above-described processing is repeated. If the determination in step 152 is affirmative, the divided data to be written next to the shared memory is the last divided data (that is, the nth divided data), and thus the process proceeds to step 154.

  In step 154, the nth divided data is read from the work area of the application 30, and the divided data is written in the area indicated by the address add of the shared memory.

  In step 156, the OS issues a divided write command issuance command with the address add and the data size of the nth divided data (the data size of the nth divided data is not necessarily α) as arguments. Deliver to module 36. The inter-OS communication module 36 receives this issuance command and generates and issues one divided write command (see also (7) in FIG. 11).

  In step 158, it is determined whether or not the write processing of the data to be transferred has been completed. Here, when the write end message for the nth divided write command is issued from the inter-OS communication module 40 on the second OS side (see also FIG. 11 (9)), it is determined that the write is ended. If the determination in step 158 is affirmative, the process proceeds to step 132 in FIG. 3 to notify the application 30 of the result indicating the end of writing (see also FIG. 11 (10)).

  In the above embodiment, the example in which the transfer target data is divided into a plurality of pieces and written to the shared memory and the divided write command is issued to the second OS even when an affirmative determination is made in step 100 has been described. It is not limited to. For example, if the determination in step 100 is affirmative, the transfer target data is written to the shared memory without being divided, and a write command using the data size N of the transfer target data as an argument is issued to the second OS. Good.

  In the case of processing in this way, the processing shown in step 160 to step 166 shown in FIG. 12 is performed instead of the processing shown in step 140 to step 158 shown in FIG.

  In step 160, the area 52 having a size corresponding to the data size N specified in the write command is acquired from the shared memory.

  In step 162, all the data to be transferred is read from the work area of the application 30, and written in the acquired area 52 of the shared memory.

  In step 148, data of data size N is read by the HW-independent device driver 44 of the second OS from the start address add0 of the acquired area 52, and sequentially transferred to the interface 14D by the HW-dependent device driver 46 by DMA. As described above, a command for issuing a write command with the address add0 and the data size N as arguments is issued to the inter-OS communication module 36. The inter-OS communication module 36 receives this issuance command and generates and issues one write command. Even if the command issued to the second OS is not a divided write command but a write command, the format is the same as the format described above. The processing on the second OS side by the write command is performed in the same manner as the processing by the divided write command.

  In step 166, it is determined whether or not the write processing of the data to be transferred has been completed. Here, the write end message for the write command is issued from the inter-OS communication module 40 on the second OS side, and the write end is determined. If the determination in step 166 is affirmative, the process proceeds to step 132 in FIG. 3 to notify the application 30 of the result indicating the end of writing.

  Next, a read process in which the first OS application 30 acquires data from a memory (such as a FIFO) in an interface controller (such as a USB controller) that controls the interface 14D on the second OS side will be described with reference to FIGS. Will be described. In the case of a read process, as in the write process, data to be transferred is divided into a plurality of divided data and written to a shared memory for transfer. A read command issued for each piece of divided data from the first OS side to the second OS side is referred to as a divided read command.

  When a read command is issued from the application 30 to the HW-independent device driver 34 via the external interface 32, the HW-independent device driver 34 executes a processing routine shown in FIG.

  In step 300, it is determined whether or not an area of the transfer size (data size N) of the transfer target data specified in the read command can be acquired from the shared memory. If the size of the area usable in the shared memory is smaller than the data size N, the process proceeds to step 302. If the size of the area usable in the shared memory is equal to or larger than the data size N, the process proceeds to step 340 in FIG. In the case of reading, since the data to be acquired exists on the second OS side, the application 30 on the first OS side does not know the actual size of the data to be acquired at the stage of issuing the read command. Therefore, the application 30 secures a work area of a predetermined size (sufficiently large enough to be transferred) in the memory 12B, and sets the size of the work area as a transfer size (data size N) by a read command. I am trying to specify.

  As shown in FIG. 15, when the size of the shared memory is limited and the size of the work area of the application 30 secured for acquiring the transfer target data is larger than the size of the area that can be used in the shared memory. Is negatively determined at step 300. On the other hand, as shown in FIG. 16, when the size of the work area of the application 30 secured for acquiring the transfer target data is smaller than the size of the usable area of the shared memory, an affirmative determination is made in step 300. Is done. Here, an example of the timing chart of the read process shown in FIG. 15 is omitted, and an example of the timing chart of the read process shown in FIG. 16 is shown in FIG.

  First, as shown in FIG. 15, a case where the size of the shared memory is limited and the size of the usable area of the shared memory is smaller than the size of the work area of the application 30 will be described.

  In step 302 in FIG. 13, a predetermined size α × m areas 52 are acquired (reserved) within the size of the usable area from the shared memory. This process is the same as step 102 in the case of writing.

  In step 304, the division number n is calculated and 1 is set to the parameter k. Here, the division number n is a quotient obtained by dividing the data size N by α. When a remainder is obtained as a result of division, the value obtained by adding 1 to the quotient is set to n.

  In step 306, 1 is set to the parameter s, and the start address add0 of the area acquired from the shared memory is set to the address add.

  In step 308, it is determined whether or not the read processing of the data to be transferred on the second OS side has been completed. Here, the read end message indicating that the read processing of the last divided data of the transfer target data has been completed is issued from the inter-OS communication module 40 on the second OS side, and the read end is determined. When the read processing of the last divided data is completed, the inter-OS communication module 40 on the second OS side adds the read processing of the last divided data to the status information of the read end message (see also FIG. 7B). A read end message is generated including information indicating the end (described later). Therefore, the HW-independent device driver 34 determines Step 308 from the status information of the read end message. Note that the last divided data of the transfer target data is not necessarily the nth divided data. As described above, since the application 30 on the first OS side does not know the exact size of the transfer target data acquired from the second OS side, the size of the transfer target data is larger than the data size N. This is because if it is smaller, the read process may be completed with a smaller number of divided read commands than the calculated n.

  In the initial stage where no divided read command has been issued, the determination in step 308 is of course negative. Accordingly, the process proceeds to step 310.

  In step 310, it is determined whether data can be written to the shared memory. In the read process, the HW-independent device driver 44 on the second OS side writes the data to be transferred to the shared memory by issuing a divided read command to the second OS. When the writing is finished, a read end message is issued from the second OS side to the first OS side as will be described later. With this message, the HW-independent device driver 34 on the first OS side sends the divided data written in the shared memory. Read out and transfer to the work area of the application 30. Note that data transfer from the shared memory to the work area of the application 30 is sequentially performed according to the read end message from the second OS side input via the inter-OS communication module 36, but is not shown in this flowchart. is doing.

  On the other hand, as described above, the size of the shared memory is limited, and the reserved area 52 is used as a ring buffer. Here, in a state where no divided data is written in the shared memory (a state where no divided read command is issued), it can be determined in step 310 that writing is possible. However, after the divided data is written up to the end address of the area 52 acquired from the shared memory, the next divided data must be overwritten on the already written data, so the HW-independent device on the first OS side The HW-independent device driver 44 on the second OS side cannot perform the next writing unless the driver 34 has read the data written in the shared memory and transferred it to the work area of the application 30. The HW-independent device driver 34 determines whether the shared memory has a size sufficient to write the divided data α in accordance with the transfer process executed by itself and the read end command, and until a writable area is created. In step 310, it is determined that writing is impossible, and the process waits.

  In the present embodiment, as will be described later, one divided data is written for one divided read command, and one read end message is issued from the second OS for one divided data write. . If a read end message corresponding to this divided read command is issued from the second OS, and the divided data is read by the HW-independent device driver 34 and transferred to the work area of the application 30, the area in which the divided data is written in the shared memory Is an area in which the next divided data can be written.

  After determining in step 310 that writing is possible, the process proceeds to step 312.

  In step 312, the HW-dependent device driver 46 on the second OS side reads the divided data of the data size α obtained by dividing the data to be transferred via the interface 14D, and the HOS-independent device driver 44 of the second OS reads the read data. A command for issuing a read command with the address add and the data size α as arguments is issued to the inter-OS communication module 36 so that the divided data is written to the address add of the shared memory. The inter-OS communication module 36 receives this issuance command and generates and issues one read command.

  In step 314, 1 is added to s, and 1 is added to k. Further, α is added to the address add.

  In step 316, it is determined whether k is equal to n. If a negative determination is made here, the process proceeds to step 318. In step 318, it is determined whether s is greater than m. Here, when it is determined that s is larger than m, in order to indicate that the issue of the divided read command for transferring m pieces of divided data to the area 52 secured in the shared memory is completed, step 306 is performed. Returning to, the initialization is performed by setting 1 to s, and the head address add0 of the area 52 is set to address add, and the above-described processing is repeated. On the other hand, if a negative determination is made in step 318, in order to indicate that the issue of the divided read command for transferring m pieces of divided data to the area 52 secured in the shared memory has not been completed, step 308 is executed. Return and repeat the process described above.

  If it is determined in step 316 that k is equal to n, the next divided read command to be issued is the nth divided read command, and thus the process proceeds to step 320. In step 320, it is determined whether or not s is larger than m. If it is determined that s is larger, in step 322, the head address add0 of the area 52 is set in the address add, and the process proceeds to step 324. If it is determined in step 320 that s is equal to or less than m, step 322 is skipped and the process proceeds to step 324.

  In step 324, as in step 308, it is determined whether or not the read processing of data to be transferred on the second OS side has been completed. If it is determined in step 324 that the read process of the data to be transferred has not been completed, the process proceeds to step 326. In step 326, as in step 310, it is determined whether or not the divided data can be written. If it is determined that the divided data can be written, the process proceeds to step 328, where the address add and the data size of the nth divided data are obtained. A command for issuing a divided read command with an argument of (the data size of the nth divided data is not necessarily α) is issued to the inter-OS communication module 36. The inter-OS communication module 36 receives this issue command and generates and issues one divided read command.

  In step 330, as in step 308, it is determined whether or not the read processing of the data to be transferred on the second OS side has been completed.

  If an affirmative determination is made in steps 308, 324, and 330, the process proceeds to step 332 to determine whether the last divided data has been read from the shared memory and transferred to the work area of the application 30. Continue waiting. If an affirmative determination is made in step 332, the process proceeds to step 334 to notify the application 30 of the result indicating the end of reading. That is, a result notification is issued to the application 30 when all the transfer target data is written in the work area of the application 30.

  If it is determined in steps 308 and 324 that the read processing of the data to be transferred on the second OS side has been completed, the issue of the divided read command is stopped before the nth divided read command is issued. Will be. As described above, since the application 30 on the first OS side does not know the exact size of the transfer target data acquired from the second OS side, the size of the transfer target data is larger than the data size N. This is because if it is smaller, the read process may be completed with a smaller number of divided read commands than the calculated n. Therefore, if the size of the data to be transferred is smaller than the data size N, an unused area may be generated in the work area secured in the memory 12B by the application 30, as shown in FIGS.

  Next, as shown in FIG. 16, processing when the data size N is equal to or smaller than the usable size of the inter-OS shared memory and a positive determination is made in step 300 will be described.

  If an affirmative determination is made in step 300, the process proceeds to step 340 in FIG. 14, and an area of the data size N specified in the read command (see also FIG. 18 (1)) is acquired from the shared memory.

  In step 342, the division number n is calculated and 1 is set to the parameter k. The calculation method of the division number n is the same as that in step 304.

  In step 344, the start address add0 of the area 52 acquired from the shared memory is set to the address add.

  In step 346, as in step 308, it is determined whether or not the read processing for the data to be transferred has been completed.

  If a negative determination is made in step 346, the process proceeds to step 348, where the HW-dependent device driver 46 on the second OS side reads the divided data of the data size α obtained by dividing the transfer target data via the interface 14D, and the second OS The inter-OS communication module issues a read command issuance command with the address add and the data size α as arguments so that the divided data read by the HW-independent device driver 44 is written to the address add of the shared memory. Take out to 36. The inter-OS communication module 36 receives this issuance command and generates and issues one read command (see also FIGS. 18 (2), (5), (6), and (8)).

  In step 350, 1 is added to k, and α is added to address add.

  In step 352, it is determined whether k is equal to n. If a negative determination is made here, the process returns to step 346 and the above-described processing is repeated. If the determination in step 352 is affirmative, the process proceeds to step 354, where it is determined whether or not the read processing of the data to be transferred has been completed as in step 308.

  If a negative determination is made in step 354, the process proceeds to step 356, and the address add and the data size of the nth divided data (the data size of the nth divided data is not necessarily α) are used as arguments. The divided read command issuance command is issued to the inter-OS communication module 36. The inter-OS communication module 36 receives this issue command and generates and issues one divided read command.

  In step 358, as in step 308, it is determined whether or not the read processing of the data to be transferred has been completed.

  If an affirmative determination is made in steps 346, 354, and 358, the process proceeds to step 332. If an affirmative determination is made in step 332, a result indicating the end of reading is notified to the application 30 in step 334 ( (See also FIG. 18 (11)).

  On the other hand, when the HW-independent device driver 44 on the second OS side receives the divided read command from the first OS side via the inter-OS communication module 40, it executes the processing routine shown in FIG.

  When a command is received from the first OS side in step 200, it is determined in step 202 whether the received command is a write or a read. If it is determined that the command is read, the process proceeds to step 212, and an IO request is issued to the HW-dependent device driver 46 (see also (3) in FIG. 18). Device processing is performed by this IO request. That is, the HW-dependent device driver 46 reads data from a memory (FIFO or the like) in an interface controller (USB controller or the like) that controls the interface 14D in response to an IO request, and writes the data to the device driver work area (DMA transfer). ). When the DMA transfer ends, a DMA transfer end signal is output from the HW-dependent device driver 46 to the HW-independent device driver 44 (see also (4) in FIG. 18). In step 214, the data written in the work area of the device driver is read by the HW-independent device driver 44 and written in the shared memory.

  Note that if the data size specified by the divided read command is larger than the size d of each device driver area, the HW non-HW is set so that DMA transfer is performed by the data size specified by the divided read command. An IO request is output from the dependent device driver 44 to the HW dependent device driver 46 a plurality of times. If there are multiple work areas for the device driver, as described above, reading data from the work area where writing has been completed and writing to other work areas are performed in parallel, thereby improving efficiency. Perform transfer work.

  In the example shown in FIG. 18, two device driver work areas are provided, the data size α is twice the device driver work area d, and the divided data of the data size α is read out by two DMA transfers. To be transferred.

  In step 216, it is determined whether or not the data transfer (writing to the shared memory) for the data size specified by the divided read command has been completed. If it is determined that the transfer has not ended, the process returns to step 212. Repeat the above process. If it is determined in step 216 that the transfer has been completed, the process proceeds to step 218.

  Here, the HW-independent device driver 44 is DMA-transferred by the HW-dependent device driver 46 only when the data is transferred only partway through the work area of the device driver (the data is transferred by DMA rather than the size of the work area of the device driver). If the data size is smaller), even if the transferred data size is smaller than the data size specified by the divided read command, all the transfer target data is the interface controller (USB When it is determined that the data has been read from the memory (FIFO or the like) in the controller or the like and this data is transferred from the device driver work area to the shared memory, an affirmative determination is made in step 216 and the process proceeds to step 218.

  In step 218, a read end message issuance command is output to the inter-OS communication module 40. As a result, the inter-OS communication module 40 creates a read end message and issues it to the inter-OS communication module 36 of the first OS (see also FIGS. 18 (7), (9), and (10)). The format of the read end message is as described with reference to FIG.

  However, in the present embodiment, the status information corresponds to the corresponding divided read command so that it can be determined whether or not the transfer of data to be transferred (writing to the shared memory) is completed by the read end message. Information on the size of the transferred data is included. For example, if the size of the transferred data is smaller than the data transfer size specified by the divided read command, it can be determined that the transfer of the data to be transferred (writing to the shared memory) has been completed. As a result, the inter-OS communication module 36 and the HW-independent device driver 34 on the first OS side can make determinations in steps 308, 324, 330, 346, 354, and 358 of FIGS. The status information may include status information indicating that the transfer of all the data to be transferred is completed together with the size of the transferred data or instead of the size of the data.

  As a result, status information indicating that all data transfer of the data to be transferred has been completed in the second OS is generated, and a read end message including the status information (hereinafter referred to as final read end message) is generated and issued. (See also FIG. 18 (10)).

  Even if the command issued to the second OS is not a divided read command but a read command, data transfer by the HW-independent device driver 44 and the HW-dependent device driver 46 in the second OS is performed in the same manner as described above.

  Here, the process of the inter-OS communication module 40 on the second OS side during the read process will be described. FIG. 17 is a flowchart illustrating a processing routine of read command processing performed by the inter-OS communication module 40 of the second control unit 14.

  In step 400, it is determined whether or not the read processing (writing to the shared memory) of the data to be transferred on the second OS side has been completed. For example, the inter-OS communication module 40, when the read end message issuance command from the HW-independent device driver 44 includes “the size of transferred data” as information for generating status information, If the size of the transferred data is smaller than the data size specified by the divided read command corresponding to the read end message, the second OS may determine that the read processing of the data to be transferred has been completed. . Alternatively, the issue command may be issued so that status information indicating that the read processing of the final divided data has ended explicitly is generated instead of the data size.

  If a negative determination is made in step 400, normal read command output processing is performed in step 402. Here, the normal read command output processing means that when the inter-OS communication module 40 of the second OS receives a divided read command, the divided read command is sent to the HW via the external interface 42 at a predetermined output timing. This process is output to the independent device driver 44. The HW-independent device driver 44 that has received the divided read command executes the processing routine shown in FIG. The timing at which the inter-OS communication module 40 outputs the divided read command to the HW-independent device driver 44 is a timing at which at least one of the work areas of the device driver of the second OS can be used. Since this timing is the same as the description of the output timing of the divided write command, the description is omitted here.

  On the other hand, if an affirmative determination is made in step 400, an abort process is performed in step 404. When read processing (writing to the shared memory) of data to be transferred on the second OS side is completed, it is issued before receiving the final read end message on the first OS side, and is not yet sent to the HW-independent device driver 44. Since it is not necessary to output the divided read command for output to the HW-independent device driver 44, the divided read command is erased without being output to the HW-independent device driver 44. This is called abort processing. For example, in the example shown in FIG. 18, in response to the issuance instruction of the read end message ((10) in FIG. 18) for the third divided read command ((6) in FIG. 18), the read of data to be transferred on the second OS side is performed. Since it is known that the processing has been completed, the fourth divided read command need not be output. Therefore, the fourth divided read command is aborted (see also (8) in FIG. 18).

  In the above embodiment, the example in which the divided read command is issued to the second OS even when an affirmative determination is made in step 300 has been described. However, the present invention is not limited to this. For example, if an affirmative determination is made in step 300, a read command that uses the data size N of the data to be transferred as an argument may be issued to the second OS.

  In the case of processing in this way, the processing shown in steps 360 to 364 shown in FIG. 19 is performed instead of the processing shown in steps 340 to 358 shown in FIG.

  In step 360, the area 52 having a size corresponding to the data size N specified in the read command is acquired from the shared memory.

  In step 362, the HW-dependent device driver 46 on the second OS side reads the data to be transferred via the interface 14D, and the read data is read by the HW-independent device driver 44 of the second OS at the address add0 of the shared memory. Is issued to the inter-OS communication module 36 with the address add0 and the data size N as arguments. The inter-OS communication module 36 receives this issuance command and generates and issues one read command. Even if the command issued to the second OS is not a divided read command but a read command, the format is the same as that described above.

  In step 364, it is determined whether or not the read processing of the data to be transferred on the second OS side has been completed. Here, it is determined that the read process is completed when the read end message for the read command issued in step 362 is received. If an affirmative determination is made here, the process proceeds to step 332 in FIG. 13. If an affirmative determination is made here, a result indicating the end of reading is notified to the application 30 in step 334.

  In the above-described embodiment, the example in which the data size α of the divided data is set to a predetermined size (fixed) has been described. However, the present invention is not limited to this. Size (that is, data size N specified by the write command or read command, which is an area that is dynamically secured in the application 30 at the time of the write command or read command and is not a fixed size), and the use of the shared memory Efficient transfer is possible according to the size of the possible area (fixed size because it is an area provided in advance for data transfer), the work area (fixed size) and the number of device drivers on the second OS side Determine the size of the appropriate split data and issue a split write command or split read command. Good.

  In the above embodiment, the interface 14D such as a USB port has been described as an example of a hardware device provided in the second control unit 14 and managed and controlled on the second OS side. However, the present invention is not limited to this. It may be other hardware devices. For example, when the second control unit 14 is provided with a hardware device such as an HDD, it may be the HDD or a device that can write to and read from a storage medium such as a CD-RW. There may be. Even in such a hardware device, a divided data transfer command is issued from the first OS side as in the above embodiment, and data is read or written as described above.

  Further, the example has been described in which the HW-independent device driver 34 acquires a predetermined data size α × m areas 52 from the shared memory. However, the acquired size is the size of the usable area of the shared memory. Any smaller size is acceptable, and α × m may be applied.

  In the above-described embodiment, the image forming apparatus is described as an example to which the data transfer control apparatus is applied. However, the present invention is not limited to this and is applied to various apparatuses in which a plurality of OSs operate. Is possible.

10 Image forming apparatus 12 First control unit 12A CPU
12B Memory 12C Storage unit 14 Second control unit 14A CPU
14B Memory 14C Storage unit 14D Interface 30 Application 32 External interface 34 HW independent device driver 36 Inter-OS communication module 40 Inter-OS communication module 42 External interface 44 HW independent device driver 46 HW dependent device driver

Claims (12)

A data transfer instruction for transferring data from the first operating system to a hardware device managed by a second operating system different from the first operating system is issued to the first operating system. The data to be transferred by the data transfer instruction is divided into a plurality of divisions having a size smaller than the usable size of the shared memory shared and used by the first operating system and the second operating system. Writing means for dividing into data and writing to the shared memory;
The divided data is read from the shared memory by the writing means so that the divided data written to the shared memory by the writing means is read by the second operating system and transferred to the hardware device. Issuing means for generating a divided data transfer command specifying the data size of the divided data as a transfer size and issuing the divided data transfer command to the second operating system,
A data transfer control device. When a data acquisition instruction for acquiring data from a hardware device managed by a second operating system different from the first operating system is issued to the first operating system, the second In the operating system, the data to be acquired by the data acquisition instruction is divided into a plurality of pieces having a size smaller than the usable size of the shared memory shared and used by the first operating system and the second operating system. A divided data transfer command that specifies the size of the divided data as a transfer size so that the divided data is read from the hardware device and written to the shared memory for each divided data; The divided data written is As read in the operating system, and issuing means for issuing to the second operating system,
Transfer means for reading out the divided data written in the shared memory in response to the divided data transfer command by the second operating system from the shared memory and transferring it to the issuer of the data acquisition instruction;
A data transfer control device. Control for controlling execution of the unexecuted divided data transfer command that has already been issued to the second operating system when the transfer of the data to be acquired to the shared memory is completed Means,
The data transfer control device according to claim 2, further comprising: The issuing means has a size that is an integral multiple of a transfer processing unit size of a device driver that performs a data transfer operation according to the divided data transfer command on the second operating system, and is a usable size of the shared memory The data transfer control device according to any one of claims 1 to 3, wherein a divided data transfer command in which a smaller size is designated as a transfer size is generated and issued to the second operating system. The device driver according to claim 1, further comprising a device driver that operates on the second operating system and performs a data transfer operation in response to a divided data transfer command issued from the issuing unit. Data transfer control device. A data transfer instruction for transferring data from the first operating system to a hardware device managed by a second operating system different from the first operating system is issued to the first operating system. The data to be transferred by the data transfer instruction is a plurality of second data having a size smaller than the usable size of the shared memory shared and used by the first operating system and the second operating system. Writing means for dividing into one divided data and writing to the shared memory;
The first divided data is written by the writing means so that the first divided data written to the shared memory by the writing means is read by the second operating system and transferred to the hardware device. A first issuing means for generating a first divided data transfer command specifying the data size of the first divided data as a transfer size and issuing the first divided data transfer command to the second operating system each time data is written to the shared memory ,
When a data acquisition command for acquiring data from the hardware device is issued to the first operating system, data to be acquired by the data acquisition command in the second operating system is: It is divided into a plurality of second divided data having a size smaller than the usable size of the shared memory, and is read from the hardware device and written to the shared memory for each second divided data. Generating a second divided data transfer command designating the size of the second divided data as the transfer size, and reading the second divided data written in the first operating system so as to be read by the first operating system. A second issuing means for issuing to the system;
Transfer means for reading the second divided data written in the shared memory in response to the second divided data transfer command by the second operating system from the shared memory and transferring it to an issuer of the data acquisition instruction;
A data transfer control device. The first issuing means has a size that is an integral multiple of a transfer processing unit size of a device driver that performs a data transfer operation according to the first divided data transfer command on the second operating system, and Generating a first divided data transfer command in which a size smaller than the usable size is designated as a transfer size, and issuing it to the second operating system;
The second issuing means has a size that is an integral multiple of a transfer processing unit size of a device driver that performs a data transfer operation according to the second divided data transfer command on the second operating system, and The data transfer control device according to claim 6, wherein a second divided data transfer command in which a size smaller than a usable size is designated as a transfer size is generated and issued to the second operating system. When transfer of the data to be acquired to the shared memory is completed, data transfer is not executed by the unexecuted second divided data transfer command that has already been issued to the second operating system. Control means for controlling;
The data transfer control device according to claim 6 or 7, further comprising: It operates on the second operating system and performs a data transfer operation in response to a first divided data transfer command issued from the first issuing means and a second divided data transfer command issued from the second issuing means. The data transfer control device according to any one of claims 6 to 8, further comprising a device driver. Computer
A data transfer instruction for transferring data from the first operating system to a hardware device managed by a second operating system different from the first operating system is issued to the first operating system. The data to be transferred by the data transfer instruction is divided into a plurality of divisions having a size smaller than the usable size of the shared memory shared and used by the first operating system and the second operating system. Write means for dividing into data and writing to the shared memory, and the divided data written to the shared memory by the writing means is read by the second operating system and transferred to the hardware device So that the writing means Issuing means for generating a divided data transfer command specifying the data size of the divided data as a transfer size and issuing it to the second operating system each time the divided data is written to the shared memory;
Program to function as. Computer
When a data acquisition instruction for acquiring data from a hardware device managed by a second operating system different from the first operating system is issued to the first operating system, the second In the operating system, the data to be acquired by the data acquisition instruction is divided into a plurality of pieces having a size smaller than the usable size of the shared memory shared and used by the first operating system and the second operating system. A divided data transfer command that specifies the size of the divided data as a transfer size so that the divided data is read from the hardware device and written to the shared memory for each divided data; The divided data written is Issuing means for issuing to the second operating system so as to be read by the operating system; and the divided data written to the shared memory in response to the divided data transfer command by the second operating system Transfer means for reading from the shared memory and transferring to the issuer of the data acquisition instruction;
Program to function as. Computer
A data transfer instruction for transferring data from the first operating system to a hardware device managed by a second operating system different from the first operating system is issued to the first operating system. The data to be transferred by the data transfer instruction is a plurality of second data having a size smaller than the usable size of the shared memory shared and used by the first operating system and the second operating system. Writing means for dividing into one divided data and writing to the shared memory;
The first divided data is written by the writing means so that the first divided data written to the shared memory by the writing means is read by the second operating system and transferred to the hardware device. First issuing means for generating a first divided data transfer command specifying the data size of the first divided data as a transfer size and issuing the first divided data transfer command to the second operating system each time
When a data acquisition command for acquiring data from the hardware device is issued to the first operating system, data to be acquired by the data acquisition command in the second operating system is: It is divided into a plurality of second divided data having a size smaller than the usable size of the shared memory, and is read from the hardware device and written to the shared memory for each second divided data. Generating a second divided data transfer command designating the size of the second divided data as the transfer size, and reading the second divided data written in the first operating system so as to be read by the first operating system. A second issuing means for issuing to the system, and the second operation Transfer means for reading the second divided data written in the shared memory in response to the second divided data transfer command from the shared memory and transferring it to the issuer of the data acquisition instruction,
Program to function as.

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