JP2012147074A - Storage device, storage method, and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a storage device, a storage method, and a program, capable of attaining high reliability and also a low cost in storing image data.SOLUTION: A storage device includes NAND flash memories and encodes an image, thereby to generate low-frequency component image data indicating the low-frequency component of the image and high-frequency component image data indicating the high-frequency component of the image and to store them in the NAND flash memories. The NAND flash memories are constituted by an SLC (single level cell) NAND flash memory and an MLC (multi level cell) NAND flash memory, and then, store the generated low-frequency component image data in the SLC NAND flash memory and the generated high-frequency component image data in the MLC NAND flash memory.

Description

  The present invention relates to a storage device that stores image data, a storage method, and a program.

  An image taken by an imaging device or the like is usually encoded using a compression method such as JPEG (Joint Photographic Experts Group) and stored as image data in a NAND flash memory provided in the imaging device or the like.

  For example, Patent Literature 1 discloses a technique that enables a change in compression conditions when an image is compressed. Also, for example, Patent Document 2 discloses a technique for performing high-speed image compression.

  Here, NAND flash memories are classified into SLC (Single Level Cell) NAND flash memory and MLC (Multi Level Cell) NAND flash memory.

  The SLC NAND flash memory is a NAND flash memory that stores 1-bit data in one memory cell, and has high reliability but high cost. On the other hand, the MLC NAND flash memory is a NAND flash memory that stores data of 2 bits or more in one memory cell, and has low reliability but low cost.

JP-A-8-205144 Japanese Unexamined Patent Publication No. Hei 8-195594

  Image data is often stored in an MLC NAMD flash memory with an emphasis on cost. However, the data stored in the MLC NAND flash memory has a higher rate of bit corruption than the data stored in the SLC NAND flash memory. When bit corruption occurs, the image generated by decoding the image data is disturbed (image disorder). That is, there is a problem that high reliability in storing image data cannot be ensured.

  On the other hand, if image data is stored in the SLC NAND flash memory, there is a problem that costs are increased.

  It is an object of the present invention to provide a storage device, a storage method, and a program that can achieve both high reliability and low cost when storing image data.

In order to achieve the above object, a storage device according to the present invention has a NAND flash memory, and encodes an image to obtain low frequency component image data indicating a low frequency component of the image and a high frequency component of the image. A high-frequency component image data to be generated and stored in the NAND flash memory,
The NAND flash memory includes an SLC NAND flash memory and an MLC NAND flash memory,
The generated low frequency component image data is stored in the SLC NAND flash memory, and the generated high frequency component image data is stored in the MLC NAND flash memory.

In order to achieve the above object, the storage method of the present invention includes a NAND flash memory, and encodes an image to thereby generate low frequency component image data indicating a low frequency component of the image and high frequency of the image. A storage method in a storage device that generates high-frequency component image data indicating a component and stores the generated high-frequency component image data in the NAND flash memory,
The SLC NAND flash memory constituting the NAND flash memory stores the generated low-frequency component image data, and the MLC NAND flash memory constituting the NAND flash memory stores the generated high-frequency component image data.

In order to achieve the above object, the program of the present invention includes a NAND flash memory, and encodes an image to thereby generate low-frequency component image data indicating a low-frequency component of the image and a high-frequency component of the image. In a storage device that generates high-frequency component image data indicating and stores in the NAND flash memory,
A function of storing the generated low-frequency component image data in an SLC NAND flash memory constituting the NAND flash memory;
A function of storing the generated high-frequency component image data in an MLC NAND flash memory constituting the NAND flash memory.

  According to the present invention, the low frequency component image data indicating the low frequency component of the image is stored in the SLC NAND flash memory, and the high frequency component image data indicating the high frequency component of the image is stored in the MLC NAND flash memory.

  Here, since the low frequency component image data includes the DC component and the low frequency component of the image as described in Patent Document 1 described above, the low frequency component image data roughly represents the image. Reproducible contours and colors.

  For this reason, even if high-frequency component image data stored in the MLC NAND flash memory is garbled, image distortion that can be clearly seen by the human eye in the image generated by decoding the image data Does not occur.

  Therefore, the low frequency component image data is stored in the highly reliable SLC NAND flash memory, and the high frequency component image data is stored in the low cost MLC NAND flash memory. Costs can be balanced.

1 is a block diagram illustrating a configuration of an embodiment of an imaging apparatus to which a storage device of the present invention is applied. 2 is a flowchart for explaining an operation when an image stored in a RAM shown in FIG. 1 is encoded. It is a figure which shows an example of the discrete cosine transform coefficient after being quantized by the encoding process part shown in FIG. It is a figure for demonstrating the order when carrying out the zigzag scan of the discrete cosine transform coefficient which belongs to the low frequency band shown in FIG. It is a figure for demonstrating the order when carrying out the zigzag scan of the discrete cosine transform coefficient which belongs to the high frequency band shown in FIG. 2 is a flowchart for explaining an operation when a set of image data stored in a RAM shown in FIG. 1 is stored in a NAND flash memory. FIG. 2 is a diagram showing an example of an address map of the NAND flash memory shown in FIG. 1, (a) is a diagram showing an example of an address map of an SLC NAND flash memory, and (b) is an example of an address map of an MLC NAND flash memory. FIG. 4 is a flowchart for explaining an operation when reading a set of image data stored in the NAND flash memory shown in FIG. 1. 3 is a flowchart for explaining an operation when a set of image data stored in a RAM shown in FIG. 1 is decoded.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of an embodiment of an imaging apparatus to which a storage device of the present invention is applied.

  As illustrated in FIG. 1, the imaging apparatus 200 according to the present embodiment includes a storage device 100, an operation unit 201, a display controller 202, a display device 203, and a camera device 204.

  The storage device 100 includes a control unit 101, an encoding processing unit 102, a decoding processing unit 103, a RAM (Random Access Memory) 104, a ROM (Read Only Memory) 105, a flash memory controller 106, and an SLC NAND. A flash memory 107 and an MLC NAND flash memory 108 are provided.

  The SLC NAND flash memory 107 is a NAND flash memory that stores 1-bit data in one memory cell.

  The MLC NAND flash memory 108 is a NAND flash memory that stores data of 2 bits or more in one memory cell. Hereinafter, when referring to both the SLC NAND flash memory 107 and the MLC NAND flash memory 108, they are simply referred to as a NAND flash memory.

  The operation unit 201 is a human interface for the user to operate the imaging apparatus 200. The operation unit 201 receives various instructions from the user, and outputs user instruction information indicating the contents of the received instructions to the control unit 101.

  The control unit 101 receives the user instruction information output from the operation unit 201 and outputs various commands for operating each unit of the imaging apparatus 200 according to the content indicated by the received user instruction information. Further, the control unit 101 stores low-frequency component image data, which will be described later, in the SLC NAND flash memory 107 via the flash memory controller 106. Further, the control unit 101 stores high-frequency component image data, which will be described later, in the MLC NAND flash memory 108 via the flash memory controller 106. Further, the control unit 101 reads out the low frequency component image data and the high frequency component image data stored in the SLC NAND flash memory 107 and the MLC NAND flash memory 108 via the flash memory controller 106.

  The RAM 104 stores data required when the control unit 101 executes various control programs, and is used as a work memory.

  The ROM 105 stores various control programs executed by the control unit 101 and fixed data.

  The camera device 204 forms a subject image from incident light by a lens (not shown), and converts the formed subject image into an electrical signal by an image sensor such as an image sensor (not shown). Thereby, the camera device 204 acquires an image in, for example, a YUV format. Then, the camera device 204 stores the acquired image in the RAM 104.

  The encoding processing unit 102 generates image data by reading out an image stored in the RAM 104 and encoding the image using JPEG or the like. At this time, the encoding processing unit 102 generates low-frequency component image data indicating the low-frequency component of the image stored in the RAM 104 and high-frequency component image data indicating the high-frequency component of the image. Then, the encoding processing unit 102 causes the RAM 104 to store a set of image data including the generated low frequency component image data and high frequency component image data. A method for generating low-frequency component image data and high-frequency component image data from an image has already been realized by progressive JPEG or the like. A technique for encoding using progressive JPEG is disclosed in, for example, Patent Document 1 described above.

  The decoding processing unit 103 generates an image to be displayed on the display device 203 by decoding the low-frequency component image data and the high-frequency component image data that constitute one set of image data stored in the RAM 104. To be stored in the RAM 104. The decoding method is disclosed in, for example, Patent Document 2 described above.

  The display controller 202 causes the display device 203 to display the image stored in the RAM 104.

  The display device 203 is, for example, an LED (Light Emitting Diode) or an organic EL (Electro Luminescence).

  Hereinafter, an operation of the imaging apparatus 200 configured as described above will be described.

  When the operation unit 201 receives a shooting instruction from the user, the operation unit 201 outputs user instruction information indicating that to the control unit 101.

  The control unit 101 that has received the user instruction information output from the operation unit 201 outputs a shooting command for instructing shooting to the camera device 204.

  The camera device 204 that has received the shooting command output from the control unit 101 forms a subject image from the incident light using a lens, and converts the formed subject image into an electrical signal using an image sensor such as an image sensor. Get an image.

  Next, when the operation unit 201 receives an instruction to save a captured image from the user, the operation unit 201 outputs user instruction information indicating that to the control unit 101.

  The control unit 101 that has received the user instruction information output from the operation unit 201 outputs a save command for instructing to save an image to the camera device 204.

  The camera device 204 that has received the save command output from the control unit 101 stores the acquired image in the RAM 104.

  Next, the control unit 101 outputs an encoding command for encoding an image stored in the RAM 104 to the encoding processing unit 102.

  When the encoding processing unit 102 receives the encoding command output from the control unit 101, the encoding processing unit 102 encodes the image stored in the RAM 104. Details of this operation will be described below.

  FIG. 2 is a flowchart for explaining an operation when an image stored in the RAM 104 shown in FIG. 1 is encoded.

  The encoding processing unit 102 reads the image stored in the RAM 104 and divides the image into a plurality of blocks of 8 × 8 pixels for each of a plurality of planes (step S1).

  And the encoding process part 102 performs a discrete cosine transform for every some block (step S2). As a result, the image read from the RAM 104 is converted into a discrete cosine transform coefficient that is a spatial frequency component. The discrete cosine transform coefficient is a frequency space coefficient represented by an 8 × 8 matrix.

  Next, the encoding process part 102 quantizes a discrete cosine transform coefficient (step S3). In quantization, the amount of code data is reduced by dividing a discrete cosine transform coefficient by a value called a scale factor determined for each element.

  FIG. 3 is a diagram illustrating an example of discrete cosine transform coefficients after being quantized by the encoding processing unit 102 illustrated in FIG. 1. Each of the numbers shown in FIG. 3 is a discrete cosine transform coefficient after being quantized. Hereinafter, the quantized discrete cosine transform coefficient is simply referred to as a discrete cosine transform coefficient.

  The subsequent processing is executed by dividing the discrete cosine transform coefficient into a low frequency band and a high frequency band. Here, as shown in FIG. 3, it is assumed that the discrete cosine transform coefficients “0 to 5” belong to the low frequency band, and the discrete cosine transform coefficients “6 to 63” belong to the high frequency band.

  Referring to FIG. 2 again, next, the encoding processing unit 102 zigzags scans the discrete cosine transform coefficients belonging to the low frequency band (step S4). As a result, the discrete cosine transform coefficients belonging to the low frequency band are one-dimensionally arranged.

  FIG. 4 is a diagram for explaining the order in which the cosine transform coefficients belonging to the low frequency band shown in FIG. 3 are zigzag scanned.

  As shown in FIG. 4, the encoding processing unit 102 zigzags scans the discrete cosine transform coefficients “0 to 5” belonging to the low frequency band in ascending order.

  And the encoding process part 102 produces | generates low frequency component image data by performing two-dimensional Huffman transformation (step S5).

  Next, the encoding processing unit 102 performs zigzag scanning for the discrete cosine transform coefficients belonging to the high frequency band (step S6). As a result, the discrete cosine transform coefficients belonging to the high frequency band are one-dimensionally arranged.

  FIG. 5 is a diagram for explaining the order in which the discrete cosine transform coefficients belonging to the high frequency band shown in FIG. 3 are zigzag scanned.

  As shown in FIG. 5, the encoding processing unit 102 zigzags scans the discrete cosine transform coefficients “6 to 63” belonging to the high frequency band in ascending order.

  And the encoding process part 102 produces | generates high frequency component image data by performing two-dimensional Huffman transformation (step S7).

  As described above, a set of image data composed of the low-frequency component image data and the high-frequency component image data is generated.

  Next, the encoding processing unit 102 stores the generated set of image data in the RAM 104 (step S8).

  Next, an operation when a set of image data stored in the RAM 104 shown in FIG. 1 is stored in the NAND flash memory will be described.

  FIG. 6 is a flowchart for explaining an operation when a set of image data stored in the RAM 104 shown in FIG. 1 is stored in the NAND flash memory.

  First, the control unit 101 generates a management table for managing addresses indicating storage areas in which low frequency component image data and high frequency component image data constituting one set of image data are stored (step S21). ).

  Next, the control unit 101 stores the low frequency component image data in the SLC NAND flash memory 107 via the flash memory controller 106 among the set of image data stored in the RAM 104 (step S22).

  Further, the control unit 101 stores the high-frequency component image data in the MLC NAND flash memory 108 via the flash memory controller 106 among the set of image data stored in the RAM 104 (step S23).

  Next, the control unit 101 writes the address indicating the storage area where the low-frequency component image data is stored in step S22 among the storage areas of the SLC NAND flash memory 107 to the management table generated in step S21 (step S21). S24).

  Further, the control unit 101 writes the address indicating the storage area in which the high-frequency component image data is stored in step S23 among the storage areas of the MLC NAND flash memory 108 in the management table generated in step S21 (step S25). .

  As described above, the address indicating the storage area of the SLC NAND flash memory 107 storing the low-frequency component image data constituting one set of image data and the high-frequency component image data constituting the one set of image data are stored. The address indicating the storage area of the MLC NAND flash memory 108 is associated and stored in the management table.

  Then, the control unit 101 stores the management table in which the address is written in the SLC NAND flash memory 107 (step S26).

  FIG. 7 is a diagram showing an example of an address map of the NAND flash memory shown in FIG. 1, (a) is a diagram showing an example of an address map of the SLC NAND flash memory 107, and (b) is an MLC NAND flash memory 108. It is a figure which shows an example of this address map.

  As shown in FIG. 7A, the SLC NAND flash memory 107 stores a management table 11 and low frequency component image data 12 of one set of image data. As shown in FIG. 7B, the MLC NAND flash memory 108 stores high frequency component image data 13 of the set of image data.

  Next, an operation of reading and decoding a set of image data stored in the NAND flash memory shown in FIG. 1 and generating, for example, a YUV format image for display on the display device 203 will be described.

  First, an operation for reading a set of image data stored in the NAND flash memory will be described.

  FIG. 8 is a flowchart for explaining the operation when reading a set of image data stored in the NAND flash memory shown in FIG.

  First, the operation unit 201 receives an image display instruction from a user. Note that it is assumed that the user has selected whether to display an image in a reduced state such as a thumbnail or not.

  The operation unit 201 that has received an instruction from the user outputs user instruction information indicating that to the control unit 101.

  The control unit 101 that has received the user instruction information output from the operation unit 201 reads the management table from the SLC NAND flash memory 107 via the flash memory controller 106 (step S41).

  Next, the control unit 101 stores the storage area of the SLC NAND flash memory 107 in which low-frequency component image data constituting one set of image data indicating an image instructed to be displayed by the user is stored from the read management table. Is extracted (step S42).

  Further, the control unit 101 extracts, from the read management table, an address corresponding to the address extracted in step S42, that is, an address indicating the storage area of the MLC NAND flash memory 108 in which the high frequency component image data is stored ( Step S43).

  Next, the control unit 101 reads out the low-frequency component image data from the SLC NAND flash memory 107 via the flash memory controller 106 based on the address of the SLC NAND flash memory 107 extracted in step S42 and stores it in the RAM 104 ( Step S44).

  Next, the control unit 101 confirms whether or not the received user instruction information indicates that the image is to be reduced and displayed (step S45). Note that the reason for checking whether the image is reduced or displayed without reducing the size is that the high-frequency component image data indicates a fine part of the image, so the image is reduced and displayed. This is because no high frequency component image data is required.

  As a result of the confirmation in step S45, when the received user instruction information does not indicate that the image is to be reduced and displayed, that is, when high frequency component image data is necessary, the control unit 101 extracts in step S43. Based on the address of the MLC NAND flash memory 108, the high frequency component image data is read from the MLC NAND flash memory 108 via the flash memory controller 106 and stored in the RAM 104 (step S46).

  As described above, the low frequency component image data and the high frequency component image data constituting one set of image data indicating an image instructed to be displayed by the user are stored in the RAM 104.

  On the other hand, as a result of the confirmation in step S45, if the received user instruction information indicates that the image is to be reduced and displayed, that is, if the high frequency component image data is not necessary, the process is terminated.

  Next, an operation for decoding a set of image data stored in the RAM 104 shown in FIG. 1 will be described.

  FIG. 9 is a flowchart for explaining an operation when decoding a set of image data stored in the RAM 104 shown in FIG.

  First, the control unit 101 outputs a decoding command for decoding a set of image data stored in the RAM 104 to the decoding processing unit 103.

  The decoding processing unit 103 that has received the decoding command output from the control unit 101 rearranges the low-frequency component image data and the high-frequency component image data that constitute one set of image data stored in the RAM 104 (step S61). . Specifically, the low-frequency component image data and the high-frequency component image data in a one-dimensional array are formed into an 8 × 8 matrix before zigzag scanning is performed for each of a plurality of blocks.

  Next, the decoding processing unit 103 performs inverse quantization (step S62). Specifically, multiplication using the value obtained by division in step S3 in the flowchart shown in FIG. 2 is executed.

  Next, the decoding processing unit 103 performs inverse discrete cosine transform for each of a plurality of blocks (step S63). Thereby, each of the plurality of blocks is converted into 8 × 8 pixel data, and an image is generated.

  As described above, in the present embodiment, the low-frequency component image data indicating the low-frequency component of the image is stored in the SLC NAND flash memory 107, and the high-frequency component image data indicating the high-frequency component of the image is stored in the MLC NAND flash memory 108. Is done.

  Here, since the low frequency component image data includes the DC component and the low frequency component of the image as described in Patent Document 1 described above, the low frequency component image data roughly represents the image. Reproducible contours and colors.

  Therefore, even when high-frequency component image data stored in the MLC NAND flash memory 108 is garbled, an image that can be clearly seen by human eyes in an image generated by decoding the image data. Disturbance does not occur.

  Therefore, as in this embodiment, low-frequency component image data constituting a set of image data representing an image is stored in the highly reliable SLC NAND flash memory 107, and the high-frequency components constituting the set of image data are stored. By storing the image data in the low-cost MLC NAND flash memory 108, it is possible to achieve both high reliability and low cost when storing the image data.

  Next, it will be described with reference to a specific example that both high reliability and low cost can be achieved by applying the storage device 100 of the present embodiment.

  When the chip area is the same, the MLC NAND flash memory can secure a capacity that is at least twice that of the SLC NAND flash memory. Therefore, the unit price per bit of the MLC NAND flash memory is less than half that of the SLC NAND flash memory. Here, the price ratio between the SLC NAND flash memory and the MLC NAND flash memory is assumed to be SLC NAND flash memory price: MLC NAND flash memory price = 2: 1.

  3 shows how the cost changes according to the ratio between the number of discrete cosine transform coefficients belonging to the low frequency band and the number of discrete cosine transform coefficients belonging to the high frequency band shown in FIG.

(1) When emphasizing reliability In order to ensure high reliability, all of the 64 discrete cosine transform coefficients shown in FIG. 3 belong to the low frequency band. In this case, the number of discrete cosine transform coefficients belonging to the low frequency band: the number of discrete cosine transform coefficients belonging to the high frequency band = 100: 0.

  The number of discrete cosine transform coefficients in each band is proportional to the size of image data encoded based on the coefficient. Therefore, the size of the low frequency component image data: the size of the high frequency component image data = 100: 0.

  Then, the low frequency component image data is stored in the SLC NAND flash memory, and the high frequency component image data is stored in the MLC NAND flash memory. Assuming that the cost in this case is “cost A”, cost A = ((size of low-frequency component image data) × (price of SLC NAND flash memory) + (size of high-frequency component image data) × (MLC NAND flash memory Price)) = 100 × 2 + 0 × 1 = 200.

(2) Case where cost is emphasized Cost is emphasized, and all of the 64 discrete cosine transform coefficients shown in FIG. 3 belong to the high frequency band. In this case, the number of discrete cosine transform coefficients belonging to the low frequency band: the number of discrete cosine transform coefficients belonging to the high frequency band = 0: 100. Thereby, the size of the low frequency component image data: the size of the high frequency component image data = 0: 100.

  Assuming that the cost in this case is “cost B”, the cost B = ((size of low-frequency component image data) × (price of SLC NAND flash memory) + (size of high-frequency component image data) × (MLC NAND flash memory Price)) = 0.times.2 + 100.times.1 = 100.

(3) When the storage device 100 of the present embodiment is applied to achieve both high reliability and low cost, 20% of the 64 discrete cosine transform coefficients shown in FIG. 3 belong to the low frequency band, 80% shall belong to the high frequency band. In this case, the number of discrete cosine transform coefficients belonging to the low frequency band: the number of discrete cosine transform coefficients belonging to the high frequency band = 20: 80. Thereby, the size of the low frequency component image data: the size of the high frequency component image data = 20: 80.

  Assuming that the cost in this case is “cost C”, the cost C = ((size of low frequency component image data) × (price of SLC NAND flash memory) + (size of high frequency component image data) × (memory of MLC NAND flash) Price)) = 20 × 2 + 80 × 1 = 120. That is, it is possible to improve reliability with a cost increase of 20% compared with the case (2) where the cost is emphasized.

  In addition, when displaying a reduced image such as a thumbnail in the present embodiment, it is possible to shorten the reading time of image data. This is because when the reduced image is displayed, the high frequency component image data is not necessary and only the low frequency component image data needs to be read.

  In this embodiment, an address indicating a storage area in which the low frequency component image data and the high frequency image data are stored is written in the management table. Therefore, it is possible to shorten the time for reading out the low frequency component image data and the high frequency image data. This is because it is not necessary to confirm each time the image data stored in the SLC NAND flash memory 107 and the MLC NAND flash memory 108 should be read at the time of reading.

  In this embodiment, the management table and the low-frequency component image data are stored in the SLC NAND flash memory 107, but the management table and the low-frequency component image data can also be stored in the RAM 104.

  In this case, the time required for reading out the management table and the low-frequency component image data can be shortened and the reliability can be improved. This is because the RAM 104 basically has a shorter access time at the time of reading than the NAND flash memory, and bit corruption does not occur if the power is on.

  In the present embodiment, the imaging apparatus to which the storage device of the present invention is applied has been described. However, the imaging apparatus includes, for example, a portable terminal such as a mobile phone having an imaging function.

  In the present invention, the processing in the storage device is recorded on a recording medium readable by the storage device, in addition to the processing realized by the dedicated hardware described above. A program recorded on a recording medium may be read into a storage device and executed. The recording medium readable by the storage device refers to an HDD built in the storage device in addition to a transferable recording medium such as a flexible disk, a magneto-optical disk, a DVD, and a CD.

DESCRIPTION OF SYMBOLS 11 Management table 12 Low frequency component image data 13 High frequency component image data 100 Memory | storage device 101 Control part 102 Encoding process part 103 Decoding process part 104 RAM
105 ROM
106 Flash Memory Controller 107 SLC NAND Flash Memory 108 MLC NAND Flash Memory 200 Imaging Device 201 Operation Unit 202 Display Controller 203 Display Device 204 Camera Device

Claims (6)

The NAND flash memory has a NAND flash memory and encodes an image to generate low frequency component image data indicating a low frequency component of the image and high frequency component image data indicating a high frequency component of the image. A storage device for storing in
The NAND flash memory includes an SLC NAND flash memory and an MLC NAND flash memory,
A storage device that stores the generated low-frequency component image data in the SLC NAND flash memory and stores the generated high-frequency component image data in the MLC NAND flash memory. The storage device according to claim 1,
Of the storage area of the SLC NAND flash memory, an address indicating the storage area where the generated low frequency component image data is stored, and the generated high frequency component image data of the storage area of the MLC NAND flash memory is stored. A storage device that stores an address indicating a storage area in association with each other. The NAND flash memory has a NAND flash memory and encodes an image to generate low frequency component image data indicating a low frequency component of the image and high frequency component image data indicating a high frequency component of the image. A storage method in a storage device for storing in
Storage having processing for storing the generated low frequency component image data in an SLC NAND flash memory constituting the NAND flash memory and storing the generated high frequency component image data in an MLC NAND flash memory constituting the NAND flash memory Method. The storage method according to claim 3.
Of the storage area of the SLC NAND flash memory, an address indicating the storage area where the generated low frequency component image data is stored, and the generated high frequency component image data of the storage area of the MLC NAND flash memory is stored. A storage method further comprising a process of storing an address indicating a storage area in association with each other. The NAND flash memory has a NAND flash memory and encodes an image to generate low frequency component image data indicating a low frequency component of the image and high frequency component image data indicating a high frequency component of the image. To the storage device
A function of storing the generated low-frequency component image data in an SLC NAND flash memory constituting the NAND flash memory;
A program for realizing the function of storing the generated high-frequency component image data in the MLC NAND flash memory constituting the NAND flash memory. The program according to claim 5,
In the storage device,
Of the storage area of the SLC NAND flash memory, an address indicating the storage area where the generated low frequency component image data is stored, and the generated high frequency component image data of the storage area of the MLC NAND flash memory is stored. A program for further realizing a function of storing an address indicating a storage area in association with each other.

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