JP2012124387A - Method of manufacturing semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor element capable of easily machining a shape varying in etching depth in the same plane, for reduced mask area without changing an etching area.SOLUTION: The distance from a mask end in the region to be etched shows almost constant value with a mask width of 1 μm or larger. This means that the hydrogen plasma present in the region from the mask end on a mask down to 1 μm contributes to etching by dispersing in an opening part. Here, the hydrogen plasma present in the region from the mask end on the mask to 1 μm or larger is considered to leave from the top of the mask without contributing to etching. Consequently, the distance of the etching region from the mask end is sufficiently obtained when the mask width is 1 μm or larger in a selective etching of the present invention. By taking the fact that the element separation in a high density integration of semiconductor element is around 10 μm into account, the mask width is effective at 1 μm or larger and 10 μm or smaller.

Description

  The present invention relates to a method for manufacturing a semiconductor element, and more particularly to a method for manufacturing a semiconductor element in which shapes having different etching depths are processed in the same plane.

  In the research and development of high-performance and high-function devices, it is important to integrate the structure of complex devices, and device fabrication process technology such as processing (etching) and crystal regrowth technology is required. In particular, when a plurality of structures are integrated, a plurality of etching processes are usually required.

  FIGS. 1A to 1F show an etching process when etching is performed at different depths according to the conventional method. When etching is performed on the sample (for example, InP crystal) 1110 at different depths, a portion not etched at the time of the first etching is covered with a mask (dielectric material) 1120 (FIG. 1A) and then etched (FIG. 1). (B)). Next, after removing the mask for the first etching (FIG. 1C), the portion not etched again for the second etching is covered with a mask (FIG. 1D), and further etched (FIG. 1). 1 (e)) and the process of removing the mask (FIG. 1 (f)) must be repeated.

  In semiconductor optical device fabrication, when etching with different depths is required, a plurality of mask formation, etching, and mask removal processes are essential, leading to waste in terms of time and cost. . In consideration of such a problem, it has been substantially difficult to form fine and complicated structures having different depths by etching.

  Therefore, in order to solve the above-mentioned problem, when performing etching at different depths, it is possible to perform etching with different depths by performing etching once by using masks having different areas corresponding to the etching depths. Has been invented (see Patent Document 1).

  2A to 2C show a basic etching process. In the case of dry etching using a plasma state gas for etching a semiconductor, the etching proceeds by the reaction of the semiconductor 411 and the etching species (etching gas) 412 on the semiconductor surface in the etching process by the semiconductor.

  3A to 3C show an etching process when a mask that does not react with the etching species is used. When the surface of the semiconductor is covered with a material that does not react with the etching species 512 (for example, a dielectric such as silicon oxide or silicon nitride) using the mask 513, the etching species 512 on the mask is diffused and masked. The semiconductor surface that is not covered with is reached. As a result, the density of the etching species 512 increases on the semiconductor surface near the mask. This increase in the etching species 512 increases the etching rate of the semiconductor.

  As described above, the etching species flying on the mask diffuses on the semiconductor surface and promotes the etching of the semiconductor, so that the amount of etching of the semiconductor increases as the mask area increases. Therefore, according to this method, it is possible to easily produce a simple groove structure whose depth changes.

  In particular, when a hydrocarbon-based gas such as methane or ethane is used as the gas in dry etching using a plasma state gas for semiconductor etching, the gas is decomposed into a hydrocarbon group and hydrogen in the plasma state to be ionized or chemically respectively. Is activated (radicalized). In the present specification, hereinafter, ionized or chemically activated (radicalized) hydrocarbon groups are referred to as hydrocarbon plasma, and similar hydrogen atoms are referred to as hydrogen plasma.

When the hydrocarbon plasma and the hydrogen plasma come into contact with the semiconductor, a process of etching the semiconductor and a process of forming and depositing a polymer on the semiconductor without etching the semiconductor occur. In general, when there is sufficient hydrogen plasma, the etching process is the main process, and when hydrogen plasma is insufficient, the process of polymer deposition is the main process. At the same time, on the surface of the dielectric mask (such as SiO ₂ ), the hydrocarbon plasma and the hydrogen plasma do not react with the dielectric, so that they are deposited as a polymer.

  Here, a case where the above-described dry etching is performed on a sample having a mask will be described. FIGS. 4A and 4B show a phenomenon that occurs in a region without a mask when etching using methane plasma is performed, and FIGS. 5A to 5C show etching using methane plasma. This shows the phenomenon that occurs in the area surrounded by the mask when applied.

  In the region without the mask, the hydrogen plasma is uniformly distributed on the sample surface with respect to the methane plasma (FIG. 4A). When the concentration of the uniformly distributed hydrogen plasma is low, there is insufficient hydrogen for etching, so a polymer is generated on the sample surface and the sample surface is covered, so that etching does not proceed (FIG. 4B). The polymer deposition due to the lack of hydrogen plasma also occurs in a region where the width of the opening of the mask is wide and the distance from the mask is sufficient.

On the other hand, in the region surrounded by the mask, particularly in the region where the opening width of the mask is narrow, first, hydrogen plasma is uniformly distributed on the sample surface on the mask as well as on the semiconductor surface of the opening (see FIG. FIG. 5 (a)). Since the mask material (SiO ₂ ) is not etched on the mask, the methane plasma does not contribute to the etching and a polymer is generated. The hydrogen plasma on the mask diffuses on the mask without reacting with the methane plasma and aggregates in the opening. As a result, the concentration of hydrogen plasma at the opening increases (5 (b)). Therefore, the etching proceeds because the concentration of hydrogen plasma at the opening reaches a concentration sufficient to cause etching.

  Thus, in the region without the mask or the region where the opening width of the mask is wide, the polymer is generated and the etching does not proceed, and the etching proceeds in the region where the opening width is narrow. Therefore, shapes having different depths can be processed in one etching process.

JP 2004-247710 A

  However, if the area of the mask is too large, a large sample area is required when a shape having a depth change is processed by selective etching. This is problematic because it reduces the number of elements that can be manufactured from one wafer, thus reducing the production efficiency of the elements.

  The present invention has been made in view of such problems. The object of the present invention is to easily process shapes having different etching depths in the same plane, reducing the mask area without changing the etching area. Another object is to provide a method for manufacturing a semiconductor element.

  In order to solve the above problems, the invention according to claim 1 is directed to irradiating a semiconductor surface on which a mask having an opening having a variable opening width is irradiated with hydrocarbon-based plasma and hydrogen plasma. A method of manufacturing a semiconductor device that etches the semiconductor surface to a plurality of different depths, and etches the surface of the semiconductor for each region having a different opening width with respect to the hydrocarbon-based plasma and the hydrogen plasma at a predetermined flow rate. A mask having an opening width set on the semiconductor surface so that only one of the first state in which the process proceeds or the second state in which a polymer is uniformly generated on the semiconductor surface appears. A first step of forming, and a second step of irradiating the surface of the semiconductor having the mask with the hydrocarbon-based plasma and the hydrogen plasma at the predetermined flow rates, It is characterized by having a width edge from 1μm or 10μm or less of the opening.

  According to a second aspect of the present invention, in the method for manufacturing a semiconductor device according to the first aspect, the third step of removing the polymer deposited on the semiconductor surface in the first step by plasma irradiation having oxygen. It further has these.

  According to a third aspect of the present invention, in the method for manufacturing a semiconductor device according to the second aspect, at least one of the regions having different opening widths is obtained by changing a distance that the hydrogen plasma reaches the opening from the mask end. A fourth step of changing the predetermined flow rate of the hydrogen plasma so as to change the state developed in one region to either the first state or the second state; The second step is further performed after the fourth step.

  According to a fourth aspect of the present invention, in the method for manufacturing a semiconductor device according to any one of the first to third aspects, the mask includes a first mask portion having a first pattern formed on the semiconductor surface. And a second mask portion formed on the first mask portion and having a second pattern that is thicker than a mask thickness of the first mask portion and defines an opening width of the first pattern. It is characterized by comprising.

  The present invention has the effect of facilitating shapes having different etching depths within the same plane, which reduces the mask area without changing the etching area. Thereby, a high-speed semiconductor optical device can be provided. As a result, more high-speed semiconductor optical devices can be provided from one wafer.

(A)-(f) is a figure which shows the etching process in the case of performing the etching of different depth by the conventional method. (A)-(c) is a figure which shows a basic etching process. (A)-(c) is a figure which shows the etching process at the time of using the mask which does not react with an etching seed | species. (A), (b) is a figure which shows the phenomenon which arises in the area | region without a mask, when etching using methane plasma is given. (A)-(c) is a figure which shows the phenomenon which arises in the area | region enclosed by the mask, when etching using methane plasma is given. It is a figure which shows the mask shape (top view) of the sample used for the experiment for verifying the relationship between the distance from the mask edge of the area | region etched in a mask width and an opening part. Selective etching mask width from the relationship between L / Lo when L is the distance from the mask edge of the region to be etched in the opening and L is the value at which L is saturated (the maximum value of L), and the mask width It is a figure which shows dependency. It is sectional drawing of the waveguide layer from which layer thickness changes in the same surface produced in Embodiment 1 of this invention. It is a figure which shows the mask used in order to produce the waveguide layer from which layer thickness changes in the same surface produced in Embodiment 1 of this invention. (A)-(e) is a figure which shows the preparation process of the waveguide layer from which layer thickness changes in the same surface produced in Embodiment 1 of this invention. (A) is a top view of FIG.10 (b), (b)-(d) shows the cross section for every opening part from which the opening part width | variety of FIG.10 (b) differs. (A) is a three-dimensional view of a semiconductor laser device using a waveguide structure with a varying layer thickness according to Embodiment 2 of the present invention for a spot size conversion unit, and (b) is a cross-sectional view thereof. It is a figure which shows the mask for producing the diffraction grating which concerns on Embodiment 3 of this invention. It is a figure which shows the manufacturing process of the diffraction grating which concerns on Embodiment 3 of this invention. It is a figure which shows the structure of the DBR semiconductor laser using the diffraction grating which concerns on Embodiment 3 of this invention. (A) is a figure which shows the relationship between the distance from the end of the diffraction grating in the diffraction grating which concerns on Embodiment 3, and coupling coefficient ３, (b) When the diffraction grating which concerns on Embodiment 3 is used, and a coupling coefficient are shown. It is a figure which shows the reflection spectrum at the time of using 80 nm ^-1 constant diffraction grating. It is a figure which shows the behavior of the etching seed | species on the mask of FIG. (A) is a figure which shows the behavior of the etching seed | species when a thin film thickness mask is used, (b) is a figure which shows the behavior of the etching seed | species when a thick film mask is used. FIG. 10 is a diagram showing a SiN _x / SiO ₂ mask formed on the sample surface in the fourth embodiment. (A)-(d) is a figure which shows the preparation process of the mask from which thickness differs in the surface used for the diffraction grating formation in Embodiment 4. FIG. (A)-(e) is a figure which shows the preparation process of the diffraction grating in the preparation method which concerns on Embodiment 4. FIG. It is a figure which shows the mask shape which can be used for this invention.

  Hereinafter, embodiments of the present invention will be described in detail.

  FIG. 6 shows the mask shape (top view) of the sample used in the experiment for verifying the relationship between the mask width and the distance from the mask edge of the region to be etched in the opening. A mask was formed on InP. The mask opening width 1920 was fixed to 5 μm, and the mask widths 1921 to 1924 were changed to 10 μm, 5 μm, 2 μm, and 0.5 μm. The sample was subjected to RIE using a mixed gas of methane and hydrogen under the conditions of a methane flow rate of 40 sccm, a hydrogen flow rate of 5 sccm, a discharge power of 100 W, and a gas pressure of 10 Pa.

  As a result of performing RIE under the above conditions, InP is etched in the vicinity of the mask in the opening, and a polymer is generated in a region away from the mask (near the central region of the opening), and etching does not proceed. This is because hydrogen plasma that contributes to etching diffuses from above the mask toward the opening. In the vicinity of the mask where hydrogen plasma can reach by diffusion, hydrogen plasma sufficient to cause etching is supplied. On the other hand, in a region that is a certain distance away from the mask to which hydrogen plasma does not reach (near the central region of the opening), a polymer is generated because hydrogen is insufficient.

  FIG. 7 shows the mask width dependency of selective etching. The vertical axis represents L / Lo where L is the distance from the mask edge of the region to be etched in the opening, and Lo is the value at which L is saturated (the maximum value of L). The distance from the mask edge of the region to be etched is less than 0.4 when the mask width is 0.5 μm, but L / Lo has already reached 1.0 when the mask width is 2 μm. . For this reason, the distance from the mask edge of the region to be etched shows a substantially constant value when the mask width is 1 μm or more. This indicates that hydrogen plasma existing in a region from the mask edge to 1 μm on the mask diffuses into the opening and contributes to etching. At this time, hydrogen plasma existing in a region of 1 μm or more from the mask edge on the mask is considered to be detached from the mask without contributing to etching.

  From the above results, it can be seen that in the selective etching of the present invention, if the mask width is 1 μm or more, the distance from the mask edge of the etching region, that is, the etching area can be sufficiently obtained. Considering that the element interval in high-density integration of semiconductor elements is about 10 μm, the mask width is effective when the mask width is 1 μm or more and 10 μm or less.

(Embodiment 1)
FIG. 8 is a cross-sectional view of a waveguide layer whose layer thickness varies in the same plane manufactured in Embodiment 1 of the present invention. Reference numeral 1800 denotes n-type InP, 1801 denotes an InGaAsP (composition wavelength: 1.2 μm) waveguide layer, and 1802 denotes an InP clad layer. A manufacturing method of this embodiment will be described below.

  FIG. 9 shows a mask used for producing a waveguide layer whose layer thickness varies in the same plane produced in Embodiment 1 of the present invention. First, a mask in which the opening width 1900 changes is formed on the surface of InGaAsP (composition wavelength: 1.2 μm) 1801 laminated on the n-type InP substrate 1800. Here, the width of the opening is determined as follows. The mask width 1901 outside the opening is constant at 2 μm. The waveguide length 1902 is 500 μm.

FIGS. 10A to 10E show a waveguide layer manufacturing process in which the layer thickness varies in the same plane manufactured in the first embodiment of the present invention. Reference numeral 1800 denotes n-type InP, and 1801 denotes an InGaAsP (composition wavelength: 1.2 μm) waveguide layer. The above-described SiO ₂ mask is formed on the surface (FIG. 10A). When this sample was first subjected to reactive ion etching (RIE) using a mixed gas of methane and hydrogen at a methane flow rate of 40 sccm, a hydrogen flow rate of 5 sccm, a discharge power of 100 W, and a gas pressure of 40 Pa, the width was 1.8 μm. Etching progresses in the first opening, and a polymer is generated on the surfaces of the second opening (width: 3.7 μm) and the third opening (width: 7.5 μm), and unevenness hardly occurs (see FIG. 10 (b)). 11 (a) to 11 (d) show cross sections of the openings having different opening widths from the top view of FIG. 10 (b). The polymer is deposited in most of the regions in the second opening and the third opening, but etching proceeds in the vicinity of the boundary with the mask. Subsequently, when the oxygen plasma is irradiated at an oxygen flow rate of 10 sccm, a gas pressure of 10 Pa, and a discharge power of 400 W for 1 minute, the deposited polymer is removed (FIG. 10C).

  Next, when the methane flow rate, the hydrogen flow rate, and the discharge power are made constant and the gas pressure is applied at 10 Pa, etching proceeds in the first and second openings having a width of 3.7 μm or less, and the third opening On the surface (width: 7.5 μm), a polymer is generated and unevenness is hardly generated (FIG. 10D). Subsequently, when the oxygen plasma is irradiated at an oxygen flow rate of 10 sccm, a gas pressure of 10 Pa, and a discharge power of 400 W for 1 minute, the deposited polymer is removed. Therefore, in the first opening having a width of 1.8 μm, the etching by the second RIE further proceeds after the etching by the first RIE, so that it becomes deeper than the depth of the second opening.

  Next, when the methane flow rate, the hydrogen flow rate, and the discharge power are made constant and the gas pressure is applied at 1.5 Pa, etching proceeds in the first, second, and third openings having a width of 7.5 μm or less ( FIG. 10 (e)). As a result, the etching depth increases in the order of the first, second, and third openings. Furthermore, there are almost no irregularities on the etched surface.

  Thereafter, an InP layer is laminated on the surface by metal organic vapor phase epitaxy (MOVPE), thereby producing a waveguide structure in which the layer thickness varies within the same plane.

  As described above, by using the first embodiment, the mask width can be reduced to 2 μm and a shape having a depth change can be processed by selective etching, so that the sample area can be reduced. Thereby, the number of elements that can be manufactured from one wafer can be increased, and the production efficiency of the elements can be improved.

  In the first embodiment, the etching in which the depth using the three opening widths is changed in three steps has been described. However, using a larger number of opening widths, the methane / By performing hydrogen RIE, it is possible to perform etching in which the depth changes in more stages.

(Embodiment 2)
FIGS. 12A and 12B are a three-dimensional view and a cross-sectional view of a semiconductor laser device using a waveguide structure with a layer thickness varying according to the second embodiment of the present invention for a spot size conversion unit. This laser element is characterized by having a spot size conversion portion in the outgoing light portion. The spot size conversion unit is a device that widens the diameter of the emitted light beam in order to improve the efficiency (coupling efficiency) of the light emitted from the element to enter the optical fiber. In this spot size conversion section, the light distribution is oozed out into the cladding layer by gradually reducing the thickness of the waveguide layer, thereby increasing the spot size.

2800 is an n-type InP substrate, 2801 is an n-type InP buffer layer, 2802 is an active layer, 2803 is an InGaAsP (composition wavelength: 1.2 μm) guide layer for spot size conversion, and 2804 is an InGaAsP (composition wavelength: 1.1 μm) guide. 2805 is a p-type InP buried layer, 2806 is an n-type InP buried layer, 2807 is a p-type InP clad layer, 2808 is a p-type InGaAs (composition wavelength: 1.65 μm) contact layer, 2809 is an SiO ₂ layer, and 2810 is An n-type ohmic electrode 2811 is a p-type ohmic electrode.

  The active layer 2802 includes an InGaAsP (composition wavelength: 1.1 μm) guide layer, six InGaAsP strained quantum well (strain amount: 0.8%) layers, and five InGaAsP (composition wavelength: 1.1 μm) barrier layers. It consists of an active layer (light emission wavelength: 1.3 μm) composed of a multiple quantum well layer and an InGaAsP (composition wavelength: 1.1 μm) guide layer.

A method for manufacturing the spot size conversion portion in this laser structure will be described. Similar to the first embodiment, an SiO ₂ mask having a plurality of openings with different opening widths is formed on the surface of the spot size conversion InGaAsP (composition wavelength: 1.2 μm) guide layer 2803 adjacent to the active layer 2802. This mask has a shape in which the opening width on the boundary side with the active layer 2802 is wide and the opening width on the emission end side is narrow. At the same time, the entire surface of the active layer is covered with a mask.

  When dry etching shown in Embodiment 1 is performed on this sample, the etching depth is shallow on the boundary side of the active layer and deep on the emission end side. Next, after laminating the InP clad layer, a spot size conversion portion is formed by forming a mesa forming stripe mask and processing it into a mesa structure. With respect to this structure, the structure of the semiconductor laser device of the second embodiment is fabricated by forming electrodes after the growth of the pn structure buried layer and the growth of the cladding layer and the contact layer.

  As described above, by using the present invention, a waveguide layer (spot size conversion section) whose layer thickness can be easily changed can be manufactured. The fabricated device exhibits good characteristics such that the optical loss in the waveguide layer (spot size conversion portion) is reduced, the threshold current at room temperature is 6.7 mA, and the efficiency is 0.42 W / A.

  In the semiconductor laser device with a spot size conversion unit of the second embodiment, the sample area can be reduced because the spot size conversion unit in which the mask width is narrowed to 2 μm and the waveguide layer thickness changes can be processed by selective etching. As a result, the number of semiconductor laser elements with spot size converters that can be manufactured from one wafer can be increased, and the production efficiency of the elements can be improved.

(Embodiment 3)
FIG. 13 shows a mask for producing a diffraction grating according to Embodiment 3 of the present invention. The opening width (diffraction grating portion) 2010 of the mask is set in the same manner as in the first embodiment. The width of the diffraction grating exterior 2011 is 1 μm and constant. By using this mask and performing etching while changing the gas pressure in the same manner as in the first embodiment, a diffraction grating with a varying depth can be produced.

  FIG. 14 shows a manufacturing process of the diffraction grating according to the third embodiment of the present invention. RIE using a mixed gas of methane and hydrogen is performed on the mask shown in FIG. 13 at a methane flow rate of 40 sccm, an oxygen flow rate of 5 sccm, a gas pressure of 40 Pa, and a discharge power of 100 W (FIG. 14A). Then, in the opening portion 2001 having a width of 1.8 μm, etching proceeds without depositing polymer. On the other hand, in the openings 2002 and 2003 having a width larger than 1.8 μm, the polymer is deposited and the etching does not proceed (FIG. 14B). Subsequently, when the oxygen plasma is irradiated for 1 minute at an oxygen flow rate of 10 sccm, a gas pressure of 10 Pa, and a discharge power of 400 W, the deposited polymer is removed (FIG. 14C).

  Next, when RIE is performed under the condition where the gas pressure is changed (gas pressure is 10 Pa), the etching proceeds without depositing polymer in the openings 2001 and 2002 having a width of 3.7 μm or less. On the other hand, in the opening 2003 having a width of 7.5 μm, the polymer 2041 is deposited and the etching does not proceed (FIG. 14D). Accordingly, in the opening 2001 having a width of 1.8 μm or less, the second RIE etching further proceeds after the first RIE etching, so that the depth becomes deeper than the second opening 2002.

  Subsequently, after removing the polymer by irradiating with oxygen plasma, by changing the pressure and alternately repeating RIE and oxygen plasma irradiation, diffraction gratings having different depths can be formed (FIG. 14E). At this time, after removing the mask and processing the mesa structure, the element structure shown in FIG. 15 is manufactured by stacking on the diffraction grating by metal organic vapor phase epitaxy (MOVPE).

FIG. 15 shows the structure of a DBR semiconductor laser using a diffraction grating according to Embodiment 3 of the present invention. After removing the SiO ₂ mask from the surface of the sample having the diffraction gratings having different depths produced by the method of the third embodiment, stacking on this diffraction grating by metal organic vapor phase epitaxy (MOVPE), FIG. A DBR semiconductor laser structure using a diffraction grating of varying depth as shown is fabricated.

  150 is an n-type InP substrate, 151 is an n-type InP buffer layer, 152 is a diffraction grating, 153 is an InGaAsP (composition wavelength: 1.1 μm) guide layer, 154 is an eight-layer InGaAsP strained quantum well (strain: 1.0) %) And 5 layers of InGaAsP (composition wavelength: 1.3 μm) active layer consisting of multiple quantum well layers of barrier layers (emission wavelength: 1.55 μm, active layer length: 400 μm), 155 is a DBR diffraction grating region InGaAsP ( (Composition wavelength: 1.4 μm) guide layer (diffraction grating length is 400 μm before and after the active layer), 158 is an InGaAsP (composition wavelength: 1.3 μm) guide layer, 157 is a p-type InP cladding layer, and 158 is a p-type InGaAs ( Composition wavelength: 1.85 μm) A contact layer, 1591 is an n-type ohmic electrode, and 1592 is a p-type ohmic electrode.

  The oscillation wavelength of the element is 1.55 μm, and the length of the element is 1500 μm. The pitch (period) of the diffraction grating 152 is 240 nm (convex portion: 120 nm, concave portion: 120 nm), and the depth is 5 nm which is shallow at both ends of the element, and 30 nm which is deep at the center of the element.

FIGS. 16A and 16B show reflection characteristics obtained by the diffraction grating according to the third embodiment in the laser shown in FIG. FIG. 16A shows the relationship between the distance from one end of the diffraction grating and the coupling coefficient Κ in the diffraction grating according to the third embodiment. 5nm in depth element end portions of the diffraction grating, by varying such that the 30nm at the center, the coupling coefficient kappa 5 cm ^-1 at element end portions, changes 80 cm ^-1 at the central portion.

The reflection spectrum when this diffraction grating is used is shown by α in FIG. For comparison, a reflection spectrum in the case of using a diffraction grating having a constant coupling coefficient of 80 nm ⁻¹ is represented by β in FIG. It can be seen that the side mode of the reflection spectrum is suppressed by changing the depth of the diffraction grating, that is, the coupling coefficient. This suggests that the side mode in the oscillation spectrum when the DBR laser using this diffraction grating is operated is suppressed.

  As described above, by using the third embodiment, it is possible to easily manufacture a diffraction grating whose depth (coupling coefficient) changes.

  Furthermore, according to the third embodiment, since the diffraction grating whose depth is changed by selective etching with a mask width of 1 μm can be processed, the sample area can be reduced. Thereby, the number of elements that can be manufactured from one wafer can be increased, and the production efficiency of the elements can be improved.

  In the third embodiment, the etching using three opening widths in which the depth is changed in three stages has been described. However, using a larger number of opening widths, methane / By performing hydrogen RIE, it is possible to perform etching in which the depth changes in more stages.

(Embodiment 4)
As a fourth embodiment, a method of manufacturing a diffraction grating whose depth changes in the plane will be described. The fourth embodiment is characterized in that the thickness of the lattice mask is different from the thickness of the opening width adjustment mask that determines the opening width in the longitudinal direction of the opening.

  FIG. 17 shows the movement of the etching species on the mask of FIG. When the diffraction grating is manufactured using the mask used in the third embodiment, not only the etching species 84 that has come on the opening width adjustment mask 82 but also the etching species that has come on the grating mask 81 as shown in FIG. 83 also affects the etching. Therefore, it becomes difficult to control the etching shape of the diffraction grating.

  Next, a case will be described in which dry etching is performed by forming on the semiconductor surface a mask having a different mask thickness that determines the thickness of the lattice mask according to the fourth embodiment and the opening width in the longitudinal direction of the opening. FIGS. 18A and 18B show the behavior of etching species when a thin film mask is used and when a thick film mask is used.

  When the mask 1011 having a small thickness is used (FIG. 18A), the etching species 1012 can be diffused from the semiconductor surface beyond the mask edge onto the mask, so that the etching species density on the semiconductor surface does not increase. Accordingly, the etching rate of the semiconductor 1010 does not increase.

  On the other hand, when the thick mask 1021 is used (FIG. 18B), the etching end 1012 becomes a barrier at the mask end and it is difficult to cross the mask end, so that more etching seed 1012 is confined in the opening. As a result, the etching seed density on the semiconductor surface increases. Therefore, as the mask becomes thicker, the etching rate of the semiconductor 1010 increases.

  Therefore, if the thickness of the opening width adjustment mask 82 is thicker than the thickness of the lattice mask 81, the contribution of the etching species from above the opening width adjustment mask 82 having a large mask thickness is large, and the mask thickness is thin. The contribution of the etching species from above the lattice mask 81 can be reduced. Therefore, in a region having a wide opening width, a large amount of etching species that do not react on the mask diffuse into the opening portion, so that the etching species in the opening portion becomes high concentration and the etching rate increases. On the other hand, in a region with a narrow mask width, the amount of etching species that does not react on the mask and diffuses into the opening is smaller than that in a region with a large mask width, and the etching rate is slow. Therefore, the etching depth is deep in the region where the mask width is wide, and shallow in the region where the mask width is narrow.

FIG. 19 shows a SiN _x / SiO ₂ mask formed on the sample surface in the fourth embodiment. The thickness of the lattice-shaped mask 1910 made of SiN _x is 20 nm, the length of the diffraction grating 1912 is 500 μm, and the grating width 1913 is changed, and 1.8, 3.7, 3.7, 7.5 μm. The pitch (period) 1914 is 240 nm (SiO ₂ part: 120 nm, window part: 120 nm). On the other hand, the thickness of the opening width adjustment mask 1911 formed of SiO ₂ is 1 μm, and the mask widths 1915, 1916, and 1917 are 5, 3, and 2 μm, respectively.

20A to 20D show a process for manufacturing masks having different thicknesses in the plane used for forming the diffraction grating in the fourth embodiment. First, a 30 nm thick silicon oxide (SiO ₂ ) film is formed on the surface of the InP clad layer 1311 on the InP substrate 1310. After coating a resist on the SiO ₂ film, a resist pattern for a diffraction grating fabrication mask is fabricated by electron beam exposure. By processing the SiO ₂ film by reactive ion etching (RIE) using a fluorocarbon system (CF ₄ , C ₂ F _6, etc.) using the resist pattern as a mask, the resist pattern is turned into an SiO ₂ film. Transcript. By removing the resist pattern, a SiO ₂ mask 1311 for forming a diffraction grating portion is formed on InP (FIG. 20A).

Next, a 1 μm-thick silicon nitride (SiN _x ) film 1321 is formed on the InP surface having the above-described diffraction grating portion SiO ₂ mask (FIG. 20B). After applying a resist on the SiN _x film, a resist pattern 1331 for an opening width adjustment mask is formed (FIG. 20C). This resist pattern can be formed not only by electron beam exposure but also by normal photolithography resist exposure. The resist pattern 1331 is transferred to the SiN _x film 1341 by processing the SiN _x film by RIE using a sulfur fluoride-based gas (SF ₆ or the like) using the resist pattern 1331 as a mask (FIG. 20D). At this time, the diffraction grating portion SiO ₂ mask remains unetched because it is resistant to sulfur fluoride gas (SF ₆ or the like). As a result, by removing the resist pattern 1331, masks having different thicknesses are formed on the InP at the lattice-like portion and the opening width adjustment portion (FIG. 20D).

  21A to 21E show a diffraction grating manufacturing process in the manufacturing method according to the fourth embodiment. The above-described mask is formed on the surface of InP200 (FIG. 21A). Here, the widths of the openings 2001, 2002, and 2003 are 1.8, 3.7, and 7.5 μm, respectively. In a series of etching processes described below, the contribution of methane / hydrogen plasma from above the opening width adjustment mask having a large mask thickness is large, and the contribution of methane / hydrogen plasma from the lattice mask having a thin mask thickness is small.

  First, when RIE using a mixed gas of methane and hydrogen is performed at a methane flow rate of 40 sccm, a hydrogen flow rate of 2 sccm, a discharge power of 100 W, and a gas pressure of 40 Pa, in the opening 2001 having a width of 1.8 μm, hydrogen is applied from above the mask. Since there is sufficient supply, etching proceeds without polymer deposition. On the other hand, in the openings 2002 and 2003 having a width wider than 1.8 μm, since the supply of hydrogen from the mask is insufficient, the polymer 2021 is deposited and the etching does not proceed (FIG. 21B).

  Next, when the oxygen plasma is irradiated at an oxygen flow rate of 10 sccm, a gas pressure of 10 Pa, and a discharge power of 400 W for 1 minute, the deposited polymer is removed (FIG. 21C). Next, when RIE is performed under the conditions in which the hydrogen flow rate is increased (methane flow rate 40 sccm, hydrogen flow rate 5 ccm, gas pressure 10 Pa, discharge power 100 W), in the openings 2001 and 2002 having a width of 3.7 μm or less, Since the supply of hydrogen is increased, etching proceeds without polymer deposition.

  On the other hand, in the opening 2003 having a width of 7.5 μm, since the supply of hydrogen from the mask is insufficient, the polymer 2041 is deposited and the etching does not proceed (FIG. 21D). Accordingly, in the opening 2001 having a width of 1.8 μm, the etching by the second RIE further proceeds after the first etching by RIE, so that the depth becomes deeper than the depth of the opening 2002. Subsequently, the removal of the polymer by the oxygen plasma irradiation, the subsequent RIE with the changed pressure, and the oxygen plasma irradiation are alternately repeated, whereby diffraction gratings having different depths can be formed (FIG. 21E). ). Thereafter, the mask is removed and mesa structure processing is performed, and thereafter, the element structure shown in FIG. 18 is fabricated by stacking on this diffraction grating by metal organic vapor phase epitaxy (MOVPE).

  As described above, by using the fourth embodiment, it is possible to easily manufacture a diffraction grating whose depth (coupling coefficient) changes.

  Furthermore, according to the fourth embodiment, a diffraction grating whose depth is changed by selective etching using a mask width of 5, 3, 2 μm can be processed, so that the sample area can be reduced. Thereby, the number of elements that can be manufactured from one wafer can be increased, and the production efficiency of the elements can be improved.

  In the fourth embodiment, the etching in which the depth using three opening widths changes in three stages has been described, but methane is used under a plasma condition corresponding to the opening width using a larger number of opening widths. / By performing hydrogen RIE, it is possible to perform etching in which the depth changes in more stages. The diffraction grating produced in this way has the same characteristics as in the third embodiment.

  In the present invention, hydrogen plasma that did not contribute to the reaction on the mask flows into both ends of the opening of the diffraction grating. Etching proceeds with the reaction of methane by the amount of hydrogen plasma that has flowed in. Therefore, the etching proceeds only at a part of both ends in the opening where the polymer is deposited. Thus, there may be a problem that the depth is not uniform over the entire opening. However, since a mesa structure is adopted in an actual device, both ends of the opening are cut off when the mesa is formed, and this does not cause a problem in actual device fabrication.

  In Embodiments 1 and 3, the mask width outside the opening in the mask is constant, but the length (width) may be such that the distance that oxygen plasma diffused in the opening diffuses on the mask is negligible. If the mask width is 1 μm or more and 10 μm or less, the mask width does not need to be constant as in the fourth embodiment. For example, the shape shown in FIG.

In the present invention, the depth of the diffraction grating is set to 5 to 30 nm. However, the depth is not limited to this depth, and the same effect can be obtained if the depth of the diffraction grating is not constant and varies within the element. . At this time, the depth of the diffraction grating does not need to be symmetrical in the element length direction. The coupling coefficient that changes in accordance with this depth is also set to 5-80 cm ⁻¹ , but is not limited to this value.

  In the present invention, a compound semiconductor InP crystal is used as the element semiconductor crystal. However, a compound semiconductor crystal such as GaAs or SiGe or a mixed crystal such as InGaAsP, AlGaInAs, InGaN, GaInNAs, or AlGaSb can also be used. In addition, although 1.55 μm is used as the wavelength of the laser beam to which the apparatus using the diffraction grating according to the present invention corresponds, the wavelength is set to 1. by changing the structure such as the composition of the InGaAsP crystal and the pitch (period) of the diffraction grating. It can handle long wavelength bands from 0 μm to 1.7 μm. By using other materials (InGaAlN, AlGaInP, AlGaSb, etc.) for the active layer, the wavelength is shorter than 1.0 μm or longer than 1.7 μm. It can also handle wavelength bands. The multi-quantum well structure in the active layer includes an 8 layer, 5 nm thick InGaAsP strained quantum well layer (strain amount: 1.0%), a 5 layer, 10 nm thick InGaAsP barrier layer (composition wavelength: 1.1 μm). However, the structural factors such as the amount of strain, the number of layers, the layer thickness, and the crystal composition may be changed.

  In the present invention, methane is used as an etching gas in dry etching for processing a semiconductor such as a diffraction grating, but other hydrocarbon gases such as ethane may be used. In addition, as a dilution gas when using a mixed gas as an etching gas, hydrogen, nitrogen, or argon may be used together with oxygen gas as well as oxygen gas.

  Further, although oxygen plasma is irradiated to remove the polymer, plasma containing oxygen may be used. For example, a mixed gas of oxygen and an inert gas such as nitrogen or argon, a mixed gas of oxygen and hydrogen, or the like may be used.

Further, although RIBE and RIE methods are used for the dry etching method, processing can also be performed using ion beam assist etching or the like. In addition to the electron beam exposure method, an interference exposure method can be used for producing the resist pattern. Although silicon oxide (SiO ₂ ) is used as a mask formed on the semiconductor surface during etching, a dielectric such as silicon nitride or titanium oxide, or a metal such as gold or titanium can also be used.

81, 82 Mask 83, 84 Etching species 150 n-type InP substrate 151 n-type InP buffer layer 152 diffraction grating
153 InGaAsP (composition wavelength: 1.1 μm) guide layer 154 active layer (emission wavelength: 1.55 μm, active layer length: 400 μm)
155 DBR diffraction grating region InGaAsP (composition wavelength: 1.4 μm) guide layer 158 InGaAsP (composition wavelength: 1.3 μm) guide layer 157 p-type InP cladding layer 158 p-type InGaAs (composition wavelength: 1.85 μm) contact layer 1591 n Type ohmic electrode 1592 p type ohmic electrode 411, 511 semiconductor 412, 512 etching species 1010 semiconductor 1011, 1021 mask 1012 etching species 1110 sample 513, 1120 mask 1310 InP substrate 1311 InP cladding layer 1321, 1341 silicon nitride (SiN _x ) film 1331 Resist pattern 1800, 2800 n-type InP substrate 1801 InGaAsP (composition wavelength: 1.2 μm) waveguide layer 1802 InP cladding layer 1900, 1913, 19 0, 2010 Opening width 1901, 1915-1917, 1921-1924, 2011 Mask width 1902, 1925 Waveguide length 1911 Mask 1912 Diffraction grating length 1914 Pitch 2001, 2002, 2003 Opening 2801 n-type InP buffer layer 2802 Active Layer 2803 Spot size conversion InGaAsP (composition wavelength: 1.2 μm) guide layer 2804 InGaAsP (composition wavelength: 1.1 μm) guide layer 2805 p-type InP buried layer 2806 n-type InP buried layer 2807 p-type InP clad layer 2808 p-type InGaAs (composition wavelength: 1.65 μm) contact layer 2809 SiO ₂ layer 2810 n-type ohmic electrode 2811 p-type ohmic electrode

Claims (4)

A method for manufacturing a semiconductor device, comprising irradiating a hydrocarbon surface and a hydrogen plasma on a semiconductor surface on which a mask having an opening having a variable opening width is formed, and etching the semiconductor surface to a plurality of different depths,
With respect to the hydrocarbon-based plasma and the hydrogen plasma at a predetermined flow rate, the polymer is uniformly applied to the semiconductor surface in the first state where the etching of the semiconductor surface proceeds for each region having a different opening width. A first step of forming on the semiconductor surface a mask in which the opening width is set so that only one of the generated second states is manifested;
A second step of irradiating the surface of the semiconductor having the mask with the hydrocarbon-based plasma and the hydrogen plasma at the predetermined flow rates, and the mask has a width of 1 μm or more and 10 μm or less from an edge of the opening. A method for manufacturing a semiconductor element, comprising:   The method for manufacturing a semiconductor device according to claim 1, further comprising a third step of removing the polymer deposited on the semiconductor surface in the first step by plasma irradiation having oxygen. The state in which the hydrogen plasma reaches the inside of the opening from the edge of the mask is changed, and the state that appears in at least one of the regions having different opening widths is any of the first state and the second state. A fourth step of changing the predetermined flow rate of the hydrogen plasma so as to change
The method for manufacturing a semiconductor element according to claim 2, wherein the second step is further performed after the fourth step. The mask is
A first mask portion having a first pattern formed on the semiconductor surface;
And a second mask portion formed on the first mask portion and having a second pattern that is thicker than a mask thickness of the first mask portion and defines an opening width of the first pattern. 4. The method for manufacturing a semiconductor element according to claim 1, wherein

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