JP2012103923A - Compiler device, compiling method and compiler program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a compiler device for generating an object program for, when the condition determination processing of a condition branching instruction and each instruction after branching depends on a global variable, preventing any malfunction from occurring even when the condition determination processing of the condition branching instruction and each instruction after branching are processed in parallel.SOLUTION: A compiler device of the present invention includes: a core assignment object function extraction part for extracting a function including processing to change the value of a global variable based on the value of the global variable as a core assignment object function; and a source correction part for, when the core assignment object function is a calling function after branching by a condition determination processing of a condition branching instruction, assigning the core assignment object function to each CPU core of a multi-core processor, and for, when the global variable is changed by the condition determination processing of the condition branching instruction, correcting a source program so that the core assignment object function can be made to retry the processing to change the value of the global variable based on the value of the global variable.

Description

  The present invention relates to a compiler apparatus, and more particularly to a compiler apparatus that generates an object program for a multi-core processor.

  In recent years, semiconductor integrated circuits have been mounted on many products, and complex control has been performed on various products. To improve the processing capability of products, multi-core processors with multiple cores mounted on processors have been used. There have been many things. Therefore, there is an increasing need for a compiler apparatus that can generate an object program that uses the characteristics of a processor having a plurality of cores.

  Japanese Patent Laying-Open No. 2008-210027 (Patent Document 1) discloses a compiler device that generates an object program for parallel processing of branch instructions by assigning branch instructions to each CPU core in a multi-core processor having a plurality of CPU cores. Are listed. In this compiler apparatus, when the processing result of the branch instruction possessed by each CPU core is written to the shared memory, the condition of each CPU core is determined based on the condition determination result of the main thread that performs the condition determination of the branch instruction. Using the shared memory update prohibition flag of the store control mechanism, an object program for controlling the reflection of the processing result to the shared memory is generated.

  In the prior art, in each CPU core, when the same global variable in the shared memory is updated and the branch instruction condition determination process and each instruction executed based on the branch instruction condition determination result are processed in parallel, the shared memory There is a problem that the values of the global variables cannot be consistent. For example, the condition determination process of the branch instruction of the main thread includes a global variable update process, and the result is referred to and updated by the branch destination instruction.

  FIG. 9 is an example of a source program that generates an object program including a branch instruction when compiled. The problem is that in FIG. 9, the variable X used in the condition determination process is determined by the operation result of f (a, b, c, d) including the update of the global variable, and is assigned to each CPU core. This is a case where the target g0 (x0), g1 (x1), and g2 (x2) include the same global variable update processing. Since parallel processing is performed by each CPU core, there is no guarantee that the global variable referred to by the branch instruction assigned to each CPU core refers to the global variable after the condition determination processing of the branch instruction of the main thread. For this reason, when a CPU core that speculatively processes branch instructions in parallel performs an operation based on a global variable before being updated by the main thread, the consistency of the value of the global variable in the shared memory cannot be obtained.

JP 2008-210027 A

  It is an object of the present invention to perform conditional branch instruction condition determination processing and conditional branch instruction condition determination processing speculatively by a multi-core processor when each instruction after branching depends on a global variable. An object of the present invention is to provide a compiler apparatus that generates an object program that does not malfunction even when instructions are processed in parallel.

  A compiler apparatus according to the present invention includes a reading unit that reads a source program, a lexical analysis unit that performs lexical analysis of the source program, a syntax analysis unit that performs syntax analysis of the source program, and a function included in the source program. A core allocation target function extraction unit that extracts a function including processing for changing the value of a global variable based on a value as a core allocation target function; In the case of a function, a core allocation target function is allocated to each CPU core of the multi-core processor, the condition determination processing of the conditional branch instruction and the processing of the core allocation target function are processed in parallel, and by the condition determination processing of the conditional branch instruction, If a global variable is changed, it is based on the global variable value. A source modification part that modifies the source program so that the process that changes the value of the variable is retried to the core allocation target function, and an intermediate that creates an intermediate language in an intermediate language from the source program that is modified by the source modification part A word creation unit; an optimization unit that optimizes the intermediate language; and an object generation unit that generates an object program from the optimized intermediate language.

  In the compiling method of the present invention, the reading unit reads the source program, the lexical analysis unit performs the lexical analysis of the source program, the syntax analysis unit performs the syntax analysis of the source program, and the core allocation. The target function extraction unit extracts a function including a process of changing the value of the global variable from the function included in the source program based on the value of the global variable as a core allocation target function, and the source correction unit includes the core When the assignment target function is a call function after branching by the conditional determination processing of the conditional branch instruction, the core allocation target function is allocated to each CPU core of the multi-core processor, the conditional determination processing of the conditional branch instruction, and the core allocation target Function processing is performed in parallel, and conditional branch instruction condition determination processing If the variable is changed, the step of modifying the source program so that the core allocation target function will retry the process of changing the value of the global variable based on the value of the global variable, and the intermediate language creating unit, A step of creating an intermediate language in an intermediate language from a source program obtained by correcting a source program by a source correction unit, a step of an optimization unit optimizing the intermediate language, and an object generation unit generating an object from the optimized intermediate language Generating a program.

  According to the present invention, when a conditional branch instruction condition determination process and each instruction after branching depend on a global variable, the multi-core processor speculatively determines the conditional branch instruction condition determination process and It is possible to provide a compiler apparatus that generates an object program that does not malfunction even when instructions are processed in parallel.

FIG. 1 is a block diagram of a compiler apparatus according to an embodiment of the present invention. FIG. 2 is a flowchart of a core allocation target function extraction method in the core allocation target function extraction unit 44 of the compiler apparatus according to the embodiment of the present invention. FIG. 3A is a flowchart of a source code correction method for a core allocation target function in the source correction unit 45 of the compiler apparatus according to the embodiment of the present invention. FIG. 3B is a flowchart of the source code correction method for the core allocation target function in the source correction unit 45 of the compiler apparatus according to the embodiment of the present invention. FIG. 4 shows a C source program 30 to be compiled for explaining the compiler apparatus according to the first embodiment of the present invention. FIG. 5 is an example of the global variable table 33 corresponding to the source program 30 of FIG. 4 in the compiler apparatus according to the first embodiment of the present invention. FIG. 6 is an example of the core allocation target function table 34 corresponding to the source program 30 of FIG. 4 in the compiler apparatus according to the first embodiment of the present invention. FIG. 7 shows an example of the source program after the source program 30 of FIG. 4 is modified by the source modification unit 45 in the compiler apparatus according to the first embodiment of the present invention. FIG. 8 is an operation explanatory diagram when an object program corresponding to the source program of FIG. 7 generated by the compiler apparatus according to the first embodiment of the present invention is executed. FIG. 9 is an example of a source program that generates an object program including a branch instruction when compiled. FIG. 10 is a hardware configuration diagram of the compiler apparatus 40 according to the embodiment of the present invention. FIG. 11 is an example of a multi-core processor that executes an object program generated by the compiler apparatus 40 according to the embodiment of the present invention.

  A compiler apparatus 40 according to an embodiment of the present invention will be described below with reference to the accompanying drawings.

[Description of configuration]
First, the configuration of the compiler apparatus 40 in this embodiment will be described. FIG. 1 is a block diagram of a compiler apparatus 40 according to an embodiment of the present invention. The compiler device 40 according to the embodiment of the present invention includes a reading unit 41, a lexical analysis unit 42, a syntax analysis unit 43, an allocation target function extraction unit 44, a source correction unit 45, an intermediate language creation unit 46, an optimization unit 47, and an object generation. A section 48, a table 32 of various information such as variable names and constants, a global variable table 33, and a core allocation target function table 34.

  The reading unit 41 reads the source program 30 to be compiled into the compiler device 40.

  The lexical analysis unit 42 performs lexical analysis of the source program 30 by a method similar to that of a general compiler device of the prior art.

  The syntax analysis unit 43 performs a syntax analysis of the source program 30 by the same method as that of a general compiler device of the prior art. However, for the management of global variables, a global variable table 33 is created that possesses information on read locations and write locations of global variables included in the source program 30 for each function included in the source program 30.

  The core assignment target function extraction unit 44 extracts a function to be assigned to each CPU core in the multicore processor from the functions included in the source program 30.

  The source correcting unit 45 speculatively executes conditional branch instruction condition determination processing and multi-core processor condition determination processing for a conditional branch instruction when each instruction after the branch depends on a global variable. The source program 30 is modified so that an object program that does not malfunction even if each instruction is processed in parallel can be generated.

  The intermediate language creating unit 46 creates an intermediate language in the intermediate language from the source program 30 by the same method as that of a general compiler device of the prior art.

  The optimization unit 47 optimizes the intermediate language created by the intermediate language creation unit 46 in the same manner as a general compiler device of the prior art.

  The object generation unit 48 generates an object program from the intermediate language optimized by the optimization unit 47 in the same manner as a general compiler device of the prior art.

  A table 32 of various information such as variable names and constants is a table for holding information necessary for the compiler apparatus to generate an object program from the source program 30. Information similar to that of a general compiler apparatus of the prior art is held in a table 32 of various information such as variable names and constants.

  The global variable table 33 is a table that holds information on read and write locations of global variables included in the source program 30 for each function included in the source program 30.

  The core assignment target function table 34 is a table that manages whether a function included in the source program 30 is a function to be assigned to each CPU core of the multi-core processor.

  Next, the hardware configuration of the compiler apparatus 40 in this embodiment will be described. FIG. 10 is a hardware configuration diagram of the compiler apparatus 40 according to the embodiment of the present invention.

  The compiler device 40 includes a display unit 20, an input unit 21, a CPU 22, an auxiliary storage device 23, a memory 24, and a system bus 25.

  The memory 24 is a main storage device of the compiler device 40. When the compiler apparatus 40 is used, the compiler program 10 for realizing the compiler apparatus 40 in the present embodiment is expanded on the memory 24. The display unit 20 displays the execution result of the compiler device 40. The input unit 21 is an interface for the user to operate the compiler apparatus 40. The CPU 22 is a control device that executes a computer program developed on the memory 24. The auxiliary storage device 23 is a device that stores an OS (Operating System) and application programs. The auxiliary storage device 23 stores a compiler program 10 for realizing the compiler device 40 according to this embodiment. The system bus 25 is a communication path that transmits and receives data to and from the display unit 20, the input unit 21, the CPU 22, the auxiliary storage device 23, and the memory 24.

  Next, a multi-core processor that executes an object program generated by the compiler apparatus 40 according to the embodiment of the present invention will be described. FIG. 11 is an example of the multi-core processor 7 that executes the object program generated by the compiler apparatus 40 according to the embodiment of the present invention.

  The multi-core processor 7 includes CPU cores 0 to 2, local memories 3 to 5, and a shared memory 6. The CPU cores 0 to 2 are processor cores of the multi-core processor 7 that can operate independently. The local memories 3 to 5 are memories used independently by the CPU cores 0 to 2. The CPU cores 0 to 2 copy data necessary for calculation from the shared memory 6 to the corresponding local memories 3 to 5, perform calculations using the respective local memories 3 to 5, and calculate the calculation results for each local memory. Stored in memories 3-5. The CPU cores 0 to 2 reflect the calculation results held in the local memories 3 to 5 to the shared memory 6 as necessary. The shared memory 6 is a memory that can be shared by the CPU cores 0 to 2 of the multi-core processor 7.

[Description of operation method]
Next, the compiling method in the compiler apparatus 40 according to the present embodiment will be described. In the compiler apparatus 40 of this embodiment, the functional blocks other than the core allocation target function extraction unit 44 and the source correction unit 45 are the same as the processes in the general compiler apparatus of the prior art. Therefore, an operation method for the core allocation target function extracting unit 44 and the source correcting unit 45 will be described.

  First, an operation method of the core assignment target function extraction unit 44 of the compiler apparatus according to the embodiment of the present invention will be described. FIG. 2 is a flowchart of a core allocation target function extraction method in the core allocation target function extraction unit 44 of the compiler apparatus according to the embodiment of the present invention.

(Step S101)
First, the core allocation target extraction unit 44 determines whether a function included in the source program 30 to be compiled is a main function. If it is a main function, the core allocation target extraction unit 44 proceeds to step S107, and if not a main function, proceeds to step S102.

(Step S102)
Next, the core allocation target extraction unit 44 determines whether a function included in the source program 30 to be compiled returns a value as a return value. The core allocation target extraction unit 44 proceeds to step S103 if the function returns a value as a return value, and proceeds to step S104 if the function does not return a value as the return value.

(Step S103)
Next, the core allocation target extraction unit 44 determines whether a function included in the source program 30 to be compiled uses the return value for determining the condition of the branch instruction. If the return value is used for branch instruction condition determination, the core allocation target extraction unit 44 proceeds to step S107. If the return value is not used for branch instruction condition determination, the core allocation target extraction unit 44 proceeds to step S104.

(Step S104)
Next, the core allocation target extraction unit 44 determines whether a function included in the source program 30 to be compiled is accessing a global variable in the function. The core allocation target extraction unit 44 proceeds to step S105 if the global variable is accessed in the function, and proceeds to step S106 if the global variable is not accessed in the function.

(Step S105)
Next, the core allocation target extraction unit 44 determines whether a function included in the source program 30 to be compiled is accessing a global variable in the repeated statement. The core allocation target extraction unit 44 proceeds to step S107 if the global variable is accessed in the iteration statement, and proceeds to step S106 if the global variable is not accessed in the iteration statement.

  When a global variable is accessed in a repetitive statement, the reason for making it a function that is not a core allocation target is that if a global variable is accessed in a repetitive statement, it takes overhead to access the global variable.

(Step S106)
The core allocation target extraction unit 44 records a function satisfying the condition to be a core allocation target in the core allocation target function table 34 as a core allocation target.

(Step S107)
The core allocation target extraction unit 44 records a function that does not satisfy the condition to be a core allocation target in the core allocation target function table 34 as being not a core allocation target.

(Step S108)
The core allocation target extraction unit 44 determines whether there is a function that has not yet been checked whether or not the function included in the source program 30 to be compiled satisfies the condition for core allocation. When there is an unchecked function, the core allocation target extraction unit 44 proceeds to step S101, and when there is no unchecked function, the core allocation target function extraction process ends.

  Next, an operation method for the source correction unit 45 of the compiler apparatus according to the embodiment of the present invention will be described. 3A and 3B are flowcharts of a source program correction method for a core allocation target function in the source correction unit 45 of the compiler apparatus according to the embodiment of the present invention.

(Step S201)
First, the source correction unit 45 determines whether a function included in the source program 30 is a function that is a call source of a function to be assigned to a core. The source correcting unit 45 proceeds to step S211 if the function is a call source function of the core allocation target function, and proceeds to step S202 if the function is not the call source function of the core allocation target function.

(Step S202)
Next, the source correcting unit 45 determines whether or not the function included in the source program 30 is a core allocation target function. If the function is a core allocation target function, the source correction unit 45 proceeds to step S203. If the function is not a core allocation target function, the source correction unit 45 ends the source program correction process.

(Step S203)
Next, the source correction unit 45 determines whether the core allocation target function reads the global variable. The source correcting unit 45 proceeds to step S204 if the global variable is read in the core allocation target function, and proceeds to step S207 if the global variable is not read in the core allocation target function.

(Step S204)
Next, the source correction unit 45 determines whether another core allocation target function is called before calling the core allocation target function during the source correction process in the call source function of the core allocation target function during the source correction processing. Judge whether. The source correction unit 45 proceeds to step S205 if another core allocation target function is called, and proceeds to step S207 if another core allocation target function is not called.

(Step S205)
Next, the source correction unit 45 determines whether or not the global variable is written in another core allocation target function in step S204. The source correction unit 45 proceeds to step S206 if the global variable is written, and proceeds to step S207 if the global variable is not written.

(Step S206)
Next, when the value of the global variable is changed by a function executed in another CPU core, the source correction unit 45 uses the value of the global variable notified from the other CPU core, The source program 30 is modified so as to retry the read of the global variable. In addition, the source correction unit corrects the source program 30 so as to notify the function calling the function in the source correction process of the end of the function in the source correction process. The source correction unit 45 proceeds to step S207.

(Step S207)
Next, the source correction unit 45 determines whether the core allocation target function is writing a global variable. If the global variable has been written to the core allocation target function, the source correction unit 45 proceeds to step S208. If the global variable has not been written to the core allocation target function, the source correction unit 45 ends the source program correction processing.

(Step S208)
Next, the source correction unit 45 determines whether another core allocation target function is called after the call of the core allocation target function during the source correction processing in the function that is the source of the core allocation target function during the source correction processing. Judging. If another core allocation target function is called, the source correction unit 45 proceeds to step S209. If another core allocation target function is not called, the source correction unit 45 ends the source program correction processing.

(Step S209)
Next, the source correction unit 45 determines whether or not the global variable is read in another core allocation target function in step S208. If the global variable has been read, the source correction unit 45 proceeds to step S210. If the global variable has not been read, the source correction unit 45 ends the source program correction process.

(Step S210)
Next, the source correction unit 45 corrects the source program 30 so as to notify the function including the global variable read, which is executed by another CPU core, of the changed global variable value. The source correction unit 45 ends the source program correction process.

(Step S211)
The source correction unit 45 adds a function for allocating the core allocation target function to the CPU core to the source program 30.

(Step S212)
The source correction unit 45 adds processing for waiting for the end of the function assigned to another CPU core to the source program 30.

(Step S213)
The source correction unit 45 corrects the source program 30 so that the processing result of the function assigned to another CPU core is reflected in the shared memory 6 from the local memory of the corresponding CPU core.

  The above is the description of the operation method for the core assignment target function extraction unit 44 and the source correction unit 45 of the compiler apparatus 40 according to the embodiment of the present invention.

  Next, the compiler apparatus 40 according to the first embodiment of the present invention will be described based on a specific example of a C language source program. FIG. 4 shows a C source program 30 to be compiled for explaining the compiler apparatus according to the first embodiment of the present invention.

  First, the source program 30 in FIG. 4 will be described.

  First, in the first line, an integer type global variable g_nCount is defined and initialized with zero.

  The second to fifth lines describe a function CountOne that adds 1 to the value of the global variable g_nCount.

  The seventh line to the tenth line describe a function ContN that adds nAdd to the value of g_nCount. Here, nAdd is an integer type variable and is an argument of the function CountN.

  The 12th to 16th lines describe a function cond that assigns 1 to the global variable g_nCount, returns 1 when n is 0, and returns 0 when n is not 0. . Here, n is an integer type variable and is an argument of the function cond.

  In the 18th to 24th lines, the main function is described. In the main function, the cond function is first called. Next, if the return value of the cond function is not 0, the CondOne function is called, and if the return value of the cond function is 0, CallN with 10 set as an argument is called. Finally, 0 is returned as a return value and the process is terminated.

  Next, the global variable table 33 corresponding to the source program 30 in FIG. 4 will be described. FIG. 5 is an example of the global variable table 33 corresponding to the source program 30 of FIG. 4 in the compiler apparatus according to the first embodiment of the present invention. The global variable table 33 in FIG. 5 includes a global variable name field and fields for storing a read location and a write location for each function. In the source program 30 in FIG. 4, the global variable g_nCount is read and written in the fourth line of the function CountOne, read and written in the ninth line of the function CountN, and written in the 14th line of the function cond. Not accessed. Therefore, the values of the fields in the global variable table 33 corresponding to the source program 30 in FIG. 4 are as shown in FIG. With the global variable table 33, the read location and the write location of the global variable g_nCount can be grasped for each function.

  Next, the core allocation target function table 34 corresponding to the source program 30 in FIG. 4 will be described. FIG. 6 is an example of the core allocation target function table 34 corresponding to the source program 30 of FIG. 4 in the compiler apparatus according to the first embodiment of the present invention. The core allocation target function table 34 in FIG. 6 includes a function name field, a field corresponding to a condition to be a core allocation target in the flowchart in FIG. For the source program 30 in FIG. 4, field values are stored for each function based on the flowchart of the core allocation target function extraction method in FIG. In FIG. 6, the main function is excluded as a function that is not a core allocation target in step S <b> 101. The cond function returns a return value at the 15th line, and since the return value is used for condition determination at the 21st line of the main function, the cond function is excluded as a function that is not subject to core assignment in step S103. The CountOne function and the CountN function are not main functions, do not have a return value, and have access to global variables, but are not accessed in repeated statements, and thus are functions to be assigned with cores.

  Next, the source program after the source program 30 of FIG. 4 has been corrected by the source correction unit 45 of the compiler apparatus according to the first embodiment of the present invention will be described. FIG. 7 shows an example of the source program after the source program 30 of FIG. 4 is modified by the source modification unit 45 in the compiler apparatus according to the first embodiment of the present invention.

  First, a START function, a WAIT function, a WRITEBACK function, a SEND_TO function, a RECV_FROM function, and an END function that are newly added by the source correction unit 45 to the function described in the source program 30 will be described. .

  The START function assigns a function designated as an argument to one of the CPU cores 0 to 2, and variables necessary for processing the function designated as an argument from the shared memory 6 to the local memories 3 to 3 corresponding to the CPUs 0 to 2. 5 to start processing on any of the CPU cores 0 to 2.

  The WAIT function stops the processing of the function that calls the WAIT function until the function assigned to the other CPU core ends (until the END function called in the function assigned to the other CPU core ends).

  The WRITEBACK function is processed by any of the CPU cores 0 to 2 and is held in any of the local memories 3 to 5 corresponding to the CPU cores 0 to 2 and shares the operation result of the function specified by the argument. Reflected in the memory 6.

  The SEND_TO function transmits the value of the variable specified in the argument from the CPU core in which the function calling the SEND_TO function is executed to another CPU core in which the function specified in the argument is executed.

  The RECV_FROM function is a function corresponding to the SEND_TO function, and receives the value of the variable specified in the argument from another CPU core in which the function specified in the argument is executed.

  The END function is a function corresponding to the WAIT function, performs a termination process of the function assigned to the CPU core, and calls a WAIT function to call a WAIT function for a function executed in another core. Notify that the process has been completed.

  Next, how the function included in the source program 30 in FIG. 4 is corrected by the source correction unit 45 will be described.

  First, the main function will be described. In the main function, first, the source correction unit 45 performs correction to call the CountOne function and the CountN function by the START function in the 45th and 46th lines in FIG. This modification causes other CPU cores to execute CountOne function processing and CountN function processing. Next, processing for calling the WAIT function is added on the 48th line in FIG. With this modification, the end of processing of the CountOne function and the CountN function assigned to other CPU cores is waited. Next, in the 49th line and the 50th line in FIG. 7, correction using the WRITEBACK function is performed. With this modification, the processing result of the CountOne function or the CountN function assigned to another CPU core is reflected in the shared memory 6 from the local memory of the CPU core based on the condition determination result on the 47th line in FIG.

  Next, the cond function will be described. In the cond function, the source correction unit 45 notifies the value of g_nCount to the CountOne function and the CountN function by the SEND_TO function in the 37th and 38th lines of FIG. With this correction, the CountOne function and the CountN function are called by the START function by the main function, and the value of g_nCount after being changed by the cond function is notified to the CountOne function and the CountN function executed by other CPU cores. Can do.

  Next, the CountOne function and the CountN function will be described. Since the correction to the CountOne function and the CountN function by the source correction unit 45 is the same, only the CountOne function will be described.

  When the CountOne function is called by the START function, g_nCount of the shared memory 6 at the time of calling the CountOne function is copied to the local memory of the CPU core where the CountOne function is executed. When the value of g_nCount is changed by the cond function executed by another CPU core in the 6th to 14th lines in FIG. 7, the source correction unit 45 uses the notified value of g_nCount. A correction for retrying the process on the eighth line in FIG. 7 is performed. With this modification, when the value of g_nCount is changed by the cond function, the process of changing the value of g_nCount is retried by the CountOne function. Further, the source correction unit 45 adds processing for calling the END function in the 15th line of FIG. With this modification, in the main function, the end of the CountOne function by the WAIT function on the 48th line in FIG. 7 can be awaited.

  Next, an operation when the object program corresponding to the source program of FIG. 7 generated by the compiler apparatus according to the first embodiment of the present invention is executed by the multi-core processor 7 will be described. FIG. 8 is an operation explanatory diagram when an object program corresponding to the source program of FIG. 7 generated by the compiler apparatus according to the first embodiment of the present invention is executed.

  First, the operation of the CPU core 0 in which the main function is executed will be described.

(Step S301)
First, execution of the main function is started in the CPU core 0.

(Step S302)
Next, the main function assigns the processing of the CountOne function and the CountN function to each CPU core.

(Step S303)
Next, the Cond function with 1 set as an argument is executed by the CPU core 0.

(Step S304)
Next, the main function executed in the CPU core 0 waits for the end of the processing of the CountOne function and the CountN function assigned to other CPU cores.

(Step S305)
Next, based on the value of c into which the execution result of cond (1) is substituted, if c is other than 0, the processing result of the CountOne function is reflected in the shared memory 6, and if c is 0, The processing result of the CountN function with the argument set to 10 is reflected in the shared memory.

(Step S306)
The main function of the CPU core 0 ends the process.

  Next, the operation of the CountOne function assigned to the CPU core 1 by the main function will be described.

(Step S307)
First, the CountOne function holds the value of g_nCount copied from the shared memory 6 to the local memory 4 as a local variable inside the CountOne function when the CountOne function is read.

(Step S308)
Next, the CountOne function performs a process of adding +1 to the value of g_nCount.

(Step S309)
Next, the CountOne function waits for a notification after the cond function of CPU0 rewrites g_nCount to 1.

(Step S310)
Next, the CountOne function determines whether the value of g_nCount read in step S307 is the same as the value of g_nCount after the rewrite of the cond function of CPU0. If the value of g_nCount is the same, the calculation result of step S308 is held in the local memory 4 of the CPU core 1, and if the value of g_nCount is not the same, the process returns to step S307 to retry the process.

(Step S311)
The CountOne function of the CPU core 1 ends the process.

  Next, the operation of the CountN function assigned to the CPU core 2 by the main function will be described.

(Step S312)
First, the CountN function holds the value of g_nCount copied from the shared memory 6 to the local memory 4 as a local variable inside the CountN function when the CountN function is read.

(Step S313)
Next, the CountN function performs a process of adding +10 to the value of g_nCount because 10 is set as an argument.

(Step S314)
Next, the CountN function waits for a notification after the cond function of CPU0 rewrites g_nCount to 1.

(Step S315)
Next, the CountN function determines whether the value of g_nCount read in step S312 is the same as the value of g_nCount after the rewrite of the cond function of CPU0. If the value of g_nCount is the same, the calculation result of step S313 is held in the local memory 5, and if the value of g_nCount is not the same, the process returns to step S312 to retry the process.

(Step S316)
The CountN function of the CPU core 2 ends the process.

  According to the first embodiment, the conditional determination processing of the conditional branch instruction and the conditional determination processing of the conditional branch instruction speculatively by the multi-core processor when each instruction after branching depends on the global variable, It is possible to provide a compiler device that generates an object program that does not malfunction even if each subsequent instruction is processed in parallel.

  Further, according to the first embodiment, it is possible to update the global variable without using the shared memory update flag of Patent Document 1. This is because the function assigned to the CPU core can know update information of the global variable by transmitting and receiving messages between the CPU cores.

  The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the above-described embodiments, and can be appropriately changed by those skilled in the art without departing from the scope of the invention.

0 CPU core 1 CPU core 2 CPU core 3 Local memory 4 Local memory 5 Local memory 6 Shared memory 7 Multi-core processor 10 Compiler program 20 Display unit 21 Input unit 22 CPU (Central Processing Unit)
23 Auxiliary storage device 24 Memory 25 System bus 30 Primitive program (source program)
31 Objective program (object program)
32 Table of various information such as variable names and constants 33 Global variable table 34 Core allocation target function table 40 Compiler device 41 Reading unit 42 Lexical analysis unit 43 Syntax analysis unit 44 Core allocation target function extraction unit 45 Source correction unit 46 Intermediate language creation Unit 47 Optimization unit 48 Object generation unit

Claims (9)

A reading section for reading a source program;
A lexical analyzer for performing lexical analysis of the source program;
A parsing unit for parsing the source program;
A core allocation target function extraction unit that extracts a function including a process of changing the value of the global variable based on the value of the global variable from a function included in the source program as a core allocation target function;
When the core assignment target function is a call function after branching by the condition determination process of the conditional branch instruction, the CPU core assignment function is executed on a different CPU core from the core of the multicore processor on which the function calling the core assignment target function is executed. On the other hand, the core assignment target function is assigned 1: 1, the condition determination processing of the conditional branch instruction and the processing of the core assignment target function are processed in parallel in each CPU core, and the condition determination of the conditional branch instruction A source that modifies the source program so that when the global variable is changed by the processing, the function to change the value of the global variable based on the value of the global variable is caused to retry the function to be allocated to the core Correction part,
An intermediate language creating unit for creating an intermediate language in an intermediate language from a source program obtained by modifying the source program by the source modifying unit;
An optimization unit for optimizing the intermediate language;
A compiler apparatus comprising: an object generation unit that generates an object program from the optimized intermediate language. In the core allocation target function extraction unit, the function included in the source program is not a main function, and the return value of the function is not used for the condition determination processing of the conditional branch instruction, and When there is access to a global variable from a function, and access to the global variable from the function is not accessed from the iterative process in the function, or there is no access to the global variable from the function The compiler apparatus according to claim 1, wherein the function is a core allocation target function of a multi-core processor. For the function that calls the core allocation target function, the source modification unit allocates the core allocation target function to the multi-core processor, waits for the end of the processing of the core allocation target function, and the core allocation Modify to add the processing to validate the processing result of the target function,
For the function used in the condition determination process of the conditional branch instruction, the core allocation target function is modified to add a process for notifying the changed value of the global variable,
For the core allocation target function, a process of holding a value before changing the global variable, a process of waiting until a notification by the notification process is received, and a process of receiving the notification by the notification process After the waiting process, the value of the global variable held in the holding process is compared with the value of the global variable, and if the value of the global variable is not the same, the value of the global variable by the core allocation target function The compiler apparatus according to claim 1, wherein correction is performed to add a process of retrying the process of changing the process. The syntax analysis unit creates a global variable table that holds information on read locations and write locations of global variables included in the source program for each function included in the source program,
The core allocation target function extraction unit creates a core allocation target function table for storing information on whether or not the function included in the source program is a function to be allocated to each CPU core of the multi-core processor. ,
The compiler apparatus according to any one of claims 1 to 3, wherein the source correction unit corrects the source program based on the global variable table and the core allocation target function table. The reading unit reads the source program; and
A lexical analyzer performing lexical analysis of the source program;
A step in which a syntax analysis unit parses the source program;
A step of extracting a function including a process of changing a value of the global variable from a function included in the source program as a core allocation target function from a function included in the source program;
When the core allocation target function is a call function after branching by the condition determination process of the conditional branch instruction, the source correction unit, the core of the multicore processor on which the function that calls the core allocation target function is executed, The core assignment target function is assigned 1: 1 to another CPU core, the condition determination processing of the conditional branch instruction and the processing of the core assignment target function are processed in parallel in each CPU core, and the conditional branch When the global variable is changed by the condition determination process of the instruction, the source to cause the core allocation target function to retry the process of changing the value of the global variable based on the value of the global variable Steps to modify the program;
An intermediate language creating unit creating an intermediate language in an intermediate language from a source program obtained by modifying the source program by the source modifying unit;
An optimization unit optimizing the intermediate language;
A compiling method, comprising: an object generating unit generating an object program from the optimized intermediate language. The step of extracting as the core allocation target function includes:
The core allocation target function extraction unit is configured such that the function included in the source program is not a main function, and the return value of the function is not used for the condition determination process of the conditional branch instruction, and When there is access to a global variable from a function, and access to the global variable from the function is not accessed from the iterative process in the function, or there is no access to the global variable from the function The compiling method according to claim 5, further comprising the step of setting the core allocation target function of a multi-core processor. The step of modifying the source program includes: a process in which the source modification unit allocates the core allocation target function to the multi-core processor for a function that calls the core allocation target function; A process of waiting for completion, a step of correcting to add a process of enabling the processing result of the core allocation target function, and
For the function used in the condition determination process of the conditional branch instruction, the source correction unit adds a process of notifying the core allocation target function of the value of the changed global variable. Steps to do,
For the core allocation target function, the source modification unit holds the value before changing the global variable, waits until receiving a notification by the notifying process, and by the notifying process After waiting for the notification to be received, the global variable value held in the holding process is compared with the global variable value. If the global variable values are not the same, the core allocation target function The compile method according to claim 5, further comprising a step of adding a process of retrying a process of changing the value of the global variable according to. The step of performing the syntax analysis includes the step of creating a global variable table in which the syntax analysis unit possesses information on a read location and a write location of the global variable included in the source program for each function included in the source program. When,
The step of extracting as the core allocation target function is information regarding whether the core allocation target function extraction unit is a function to be allocated to each CPU core of the multi-core processor with respect to the function included in the source program. Creating a core allocation target function table for storing
The compile method according to claim 1, wherein the source correction unit includes a step of correcting the source program based on the global variable table and the core allocation target function table.   A compiler program for causing a computer to execute the compiling method according to any one of claims 5 to 8.

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