JP2012095119A - Arithmetic processing unit and arithmetic processing method in ofdm system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an FFT arithmetic processing unit and an FFT arithmetic processing method which output data in a format of an appropriate fixed-point number according to a frequency bandwidth of data transmitted by a mobile terminal.SOLUTION: An arithmetic processing unit according to the present invention comprises an FFT calculation part 10 which calculates data of a radio signal expressed by a fixed-point number of a first bit number as a fixed-point number of a second bit number which is larger than the first bit number and converts to data of the fixed-point number of the second bit number; and a bit segmentation part 20 which segments data of a specified bit number from the data of the second bit number according to a bit segmentation position determined depending on a degree of a use frequency of the radio signal.

Description

  The present invention relates to an arithmetic processing apparatus and an arithmetic processing method in the OFDM system.

  In a radio communication system such as an LTE (Long Term Evolution) system, OFDM (Orthogonal Frequency Division Multiplexing) is adopted as a signal multiplexing scheme, and radio access schemes are OFDMA (Orthogonal Frequency Division Multiple Access) and SCFDMA (Single Carrier Frequency). Division Multiple Access) is adopted. These wireless access systems execute fast Fourier transform (FFT) and inverse fast Fourier transform (IFFT) by digital signal processing. The time axis signal is converted to a frequency axis signal by FFT, and the frequency axis signal is converted to a time axis signal by IFFT.

  Digital signal processing of FFT / IFFT in a base station or the like is often performed with a fixed-point number. The fixed-point number enables high-speed computation by fixing in advance the number of bits used for the integer part and the number of bits used for the decimal part.

  FIG. 1 shows a specific example of addition of fixed-point numbers. In FIG. 1, decimal numbers 2.375 and 5.25 are expressed as fixed-point numbers in 8-bit Q3 format as 00010.011 and 00101.010 and added. Here, the 8-bit Q3 format is a format in which the number of bits of the entire fixed-point number is 8 bits and the number of bits below the decimal point of the fixed-point number is 3 bits. In the example shown in FIG. 1, the result of addition is 00111.101. This value is 7.625 in decimal notation and is an accurate value.

  FIG. 2 shows a specific example of multiplication of fixed-point numbers. FIG. 2 shows the multiplication of the decimal numbers 2.375 and 5.25 in 8-bit Q3 format fixed-point numbers. In the example shown in FIG. 2, the multiplication result is 001100.01111, which is a 12-bit Q5 format. When a fixed-point number in the 8-bit Q3 format is cut out from the multiplication result in the 12-bit Q5 format and output, the upper 2 bits and the lower 2 bits are rounded down to 01100.011. This value is 12.375 in decimal notation, which is 0.09375 smaller than the exact value 12.46875. As described above, when a fixed-point number in the 8-bit Q3 format is cut out from the fixed-point number in the 12-bit Q5 format and output, a calculation error occurs.

  The FFT / IFFT operation repeatedly performs addition and multiplication. Therefore, when the FFT / IFFT operation is executed with a fixed-point number, a calculation error occurs every time multiplication is performed, and the calculation errors are accumulated by repeating the multiplication. As a result, the calculation result eventually causes a large calculation error. Since the FFT operation and the IFFT operation are equivalent operations in that addition and multiplication are repeated, the FFT operation will be described below as an example.

  FIG. 3 shows an example of a conventional technique for reducing the calculation error of the FFT operation. The FFT operation unit receives an 8-bit Q3 format fixed-point number. The FFT operation unit converts the received fixed-point number into a 12-bit Q5 format fixed-point number. The FFT operation unit performs the FFT operation in the 12-bit Q5 format using the converted fixed-point number in the 12-bit Q5 format. As a result, even if the multiplication is repeated in the FFT operation, the calculation error is smaller than when the multiplication is repeated in the 8-bit Q3 format. The bit cutout unit receives the calculation result from the FFT calculation unit in a 12-bit Q5 format. The bit cutout unit cuts out and outputs an 8-bit Q3 format fixed-point number from a 12-bit Q5 format fixed-point number. As described above, the conventional technique prevents the occurrence of a large calculation error by accumulating calculation errors for each multiplication by performing an FFT operation in which multiplication is repeated while increasing the number of bits of the entire fixed-point number. Yes.

  In addition, in order to reduce the calculation error in the subsequent digital processing unit, an invention has been made to normalize the signal level after the FFT operation (see Patent Document 1).

JP 2010-147603 A

  FIG. 4 shows a functional block diagram of a base station receiver in the LTE system. The base station receives an uplink signal transmitted from the mobile terminal to the base station by the mobile terminal. The uplink signal received by the base station is adjusted to a predetermined power by an LNA (Low Noise Amplifier) 102 and a VGA (Variable Gain Amplifier) 108 in an RF (Radio Frequency) unit 100 that performs radio processing, and then an ADC (ADC) Analog to digital converter) converts analog signal to digital signal. A BB (baseband) unit 200 that performs baseband processing receives the converted digital signal from the RF unit 100, performs baseband computation such as FFT computation, and outputs the signal to the processor 300. The processor 300 executes processing in an upper layer (L2 / L3, etc.) on the received signal.

  In the LTE system, the frequency bandwidth used for data communication between the mobile terminal and the base station is not fixed but variable. Therefore, even if the signal input to the ADC 110 in the RF unit 100 is adjusted to a predetermined level, the signal level per unit frequency after the FFT calculation is the frequency band used for data communication between the mobile terminal and the base station. It depends on the width.

  FIG. 5 shows the relationship between the frequency bandwidth used for data communication between the mobile terminal and the base station and the signal level per unit frequency after FFT processing. FIG. 5A shows a case where the frequency bandwidth is wide. FIG. 5B shows a case where the frequency bandwidth is narrow. The average power shown on the left side of FIGS. 5 (a) and 5 (b) is similar to the average power of the signals received by the FFT processor in the case of FIG. 5 (a) and FIG. 5 (b). Indicates that there is. After the FFT processing, the value obtained by integrating the power per unit frequency with the frequency bandwidth is equal to the average power before the FFT processing. Therefore, when the frequency bandwidth is wide as shown in FIG. 5 (a), the power per unit frequency after the FFT processing is small, and when the frequency bandwidth is narrow as shown in FIG. 5 (b), after the FFT processing. The power per unit frequency is large.

  As described above, the power per unit frequency after the FFT processing varies depending on the frequency bandwidth used for data communication. Therefore, when the frequency bandwidth is narrow and the power per unit frequency after FFT processing is large, the bit cutout position of the fixed-point number is shifted to the upper bit side, the frequency bandwidth is wide, and the unit frequency per unit frequency after FFT processing is When the power is small, it is preferable to shift the bit cutout position of the fixed-point number to the lower bit side.

  According to the prior art, the FFT calculation is performed by increasing the number of bits of the fixed-point number, thereby preventing a calculation error from being accumulated every multiplication and finally generating a large error. However, the bit cutout of the prior art does not correspond to the fact that the frequency bandwidth used for data communication is variable in LTE, and the optimum position of bit cutout differs depending on the frequency bandwidth. Therefore, the prior art method for determining the bit cutout position cannot effectively use the upper bits of the fixed-point number when the frequency bandwidth is wide and the power per unit frequency after the FFT processing is small. As a result, the bit cutout unit of the prior art outputs a value with a lower accuracy than the accuracy that can be achieved by effectively using the number of bits.

  In the invention of Patent Document 1, the output level after the FFT operation is normalized so as to be optimal for the subsequent digital processing unit. However, since this method simply multiplies the data by a constant, the data accuracy is not improved.

  Accordingly, an object of the present invention made in view of such a point is to perform an FFT operation for outputting data in an appropriate fixed-point number format according to a frequency bandwidth used for data communication between a mobile terminal and a base station. A processing device and an FFT operation processing method are provided.

In order to solve the above-described problems, the arithmetic processing apparatus according to the first invention provides:
The wireless signal data represented by a fixed-point number having a first bit number is calculated as a fixed-point number having a second bit number larger than the first bit number, and the second bit number is fixed. An FFT operation unit for converting to decimal data;
A bit cutout unit that cuts out data of a specified number of bits from the data of the second number of bits according to a bit cutout position determined according to a degree of a use frequency of the wireless signal;
Is provided.

  In addition, the bit cutout unit, when the frequency of the radio signal used is small, according to the bit cutout position determined at a position where the number of bits after the decimal point is small or the level of the radio signal use frequency is If there are many, it is desirable to cut out data of the designated number of bits from the data of the second number of bits according to the bit cutout position determined at the position where the number of bits after the decimal point is large.

  According to the present invention, there are provided an FFT operation processing device and an FFT operation processing method for outputting data in an appropriate fixed-point number format according to a frequency bandwidth used for data communication between a mobile terminal and a base station. can do.

It is an example of addition of a fixed-point number. It is an example of multiplication of a fixed-point number. It is a figure which shows an example of FFT calculation and bit extraction in a fixed-point number. It is a figure which shows the structure of the base station receiver in the LTE system which concerns on one Embodiment of this invention. It is a figure which shows the electric power per unit frequency after FFT calculation. It is a block diagram of the base station apparatus in the LTE system which concerns on one Embodiment of this invention. It is a detailed block diagram of the FFT process part of FIG. 6 concerning one Embodiment of this invention. It is the figure which showed the correspondence table of the use number of a resource block and bit extraction position which concern on one Embodiment of this invention. It is a figure which shows the example of the bit cut-out position after the FFT calculation which concerns on one Embodiment of this invention.

  Hereinafter, an embodiment according to the present invention will be described with reference to the drawings.

  FIG. 6 is a configuration diagram of a base station apparatus in the LTE system according to an embodiment of the present invention. This base station configuration includes an RF unit 100 that performs radio processing, a BB unit 200 that processes baseband signals, and a processor 300 that performs processing in higher layers such as the L2 and L3 layers. The processor 300 determines scheduling information such as a frequency and a frequency bandwidth used for data communication between the mobile terminal and the base station based on the transmission path state, the number of users in the cell, and the like.

  The RF unit 100 includes an LNA 102, a BPF (Band Pass Filter) 104, a Q-Demod (Quadrature Demodulator) unit 106, a VGA 108, and an ADC 110 as blocks for processing a received signal. The RF unit 100 includes a DAC (Digital to Analog Converter) 120, an LPF (Low Pass Filter) 118, a QMod (Quadrature Modulator) unit 116, a BPF 114, and a PA (Power Amplifier) 112 as blocks for processing transmission signals. .

  In the reception process of the RF unit 100, the LNA 102 receives an uplink signal transmitted from the mobile terminal and amplifies the received signal with low noise. The BPF 104 removes interference waves and the like outside the communication system band from the signal received from the LNA 102. The Q-Demod unit 106 down-converts the signal received from the BPF 104 into two orthogonal baseband signals. The VGA 108 is a variable amplifier, and amplifies the signal received from the Q-Demod unit 106 so as to have a predetermined signal level. The ADC 110 converts the analog signal received from the VGA 108 into a digital signal, and outputs the digital signal to the BB unit 200.

  In the transmission processing of the RF unit 100, the DAC 120 converts the digital signal received from the BB unit 200 into an analog signal. The LPF 118 removes unnecessary high-frequency signals from the signal received from the DAC 120. The QMod unit 116 modulates the carrier wave with the signal received from the LPF 118. The BPF 114 removes unnecessary waves outside the band of the communication system from the signal received from the QMod unit 116. The PA 112 is a power amplifier and amplifies the signal received by the PF 114 to a predetermined power.

  The BB unit 200 includes a CP (Cyclic Prefix) removing unit 202, an FFT processing unit 204, a demapping unit 206, and a decoding unit 210 as blocks for processing a received signal. The BB unit 200 includes an encoding unit 218, a mapping unit 216, an IFFT processing unit 214, and a CP adding unit 212 as blocks for processing transmission signals.

  In the reception process of the BB unit 200, the CP removal unit 202 receives a digital signal from the ADC 110, and removes the CP added as a guard interval from the received signal. The FFT processing unit 204 converts the signal received from the CP removal unit 202 from a time-axis signal to a frequency-axis signal. The demapping unit 206 associates the signal having the phase and amplitude received from the FFT processing unit 204 with the corresponding symbol. The decoding unit 210 decodes the data received from the demapping unit 206, extracts the original data, and outputs it to the processor 300.

  In the transmission process of the BB unit 200, the encoding unit 218 encodes the data received from the processor 300. The mapping unit 216 associates the data received from the encoding unit 218 with the corresponding phase and amplitude. The IFFT processing unit 214 converts the data received from the encoding unit 218 from a frequency axis signal to a time axis signal. CP adding section 212 adds a CP to the data received from IFFT processing section 214 and outputs the data to RF section 100.

  FIG. 7 is a detailed configuration diagram of the FFT processing unit 204 of FIG. 6 according to an embodiment of the present invention. The FFT processing unit 204 includes an FFT operation unit 10, a bit cutout unit 20, and a scheduler information determination unit 30.

  The FFT operation unit 10 receives the CP-removed signal from the CP removal unit 202. The FFT operation unit 10 performs an FFT operation on the received signal, and converts a time-axis signal into a frequency-axis signal. The FFT operation unit 10 repeats multiplication in the FFT operation, thereby increasing the number of bits of the entire fixed-point number and executing the FFT operation so that a large calculation error does not finally occur. The FFT operation unit 10 outputs the data after the FFT operation to the bit cutout unit 20 in a format in which the number of bits of the entire fixed-point number is increased.

  The bit cutout unit 20 receives data from the FFT operation unit 10 in a state where the number of bits of the entire fixed-point number has increased. The bit cutout unit 20 cuts out a fixed-point number having a predetermined number of bits from the received data and outputs it to the demapping unit 216. The predetermined number of bits is, for example, the number of bits of the whole fixed-point number input to the FFT operation unit 10, but may be a different number of bits. The bit cutout unit 20 receives information on the bit cutout position when cutting out a fixed-point number having a predetermined number of bits from the scheduler information determination unit 30. The bit cutout unit 20 cuts out a fixed-point number based on the information of the bit cutout position received from the scheduler information determination unit 30 and outputs it to the demapping unit 216.

  The scheduler information determination unit 30 determines a bit cutout position based on the scheduling information received from the processor 300, and outputs the determined bit cutout position to the bit cutout unit 20. The scheduling information includes information on the number of resource blocks used by the mobile terminal for data communication. Here, the resource block (RB) is a basic unit when the frequency bandwidth is variable in the LTE system. When the number of resource blocks used for data transmission is large, the frequency bandwidth is wide, and when the number of resource blocks is small, the frequency bandwidth is narrow. In addition, although the resource block is used about the frequency bandwidth of a present Example, according to this invention, the bit cut-out position should just be determined according to the grade of the used frequency bandwidth.

  In determining the bit cutout position, if the upper bit side is the bit cutout position, that is, if the number of bits in the integer part of the fixed-point number is increased and the number of bits after the decimal point is reduced, The steps are coarse but can accommodate large signal levels. When the lower bit side is set as the bit cutout position, that is, when the number of bits in the integer part of the fixed-point number is reduced and the number of bits after the decimal point is increased, the signal level that can be handled is reduced, but the cut-out fixed point Since the number of steps becomes fine, the accuracy of the data of the cut-out fixed-point number increases when the output signal level is small.

  Therefore, when the number of resource blocks used by the mobile terminal for data communication is small, that is, when the signal level per unit frequency output from the FFT operation unit 10 is large, the scheduler information determination unit 30 The bit cutout position is determined on the upper bit side. When the number of resource blocks used by the mobile terminal for data communication is large, that is, when the signal level per unit frequency output from the FFT operation unit 10 is small and the frequency band is wide, the bit extraction position is on the lower bit side. To decide.

  FIG. 8 is an example of a correspondence table when the scheduler information determination unit 30 determines the bit cutout position based on the number of resource blocks. This example shows a case where an 8-bit fixed-point number is cut out from a fixed-point number having 12 bits as a whole. When the number of resource blocks used by the mobile terminal for data communication is as small as 1 to 12, that is, when the frequency bandwidth is narrow, the scheduler information determination unit 30 determines the bit cutout position on the higher bit side. When the number of resource blocks is as large as 40 to 50, that is, when the frequency bandwidth is wide, the scheduler information determination unit 30 determines the bit cutout position on the lower bit side.

  FIG. 9 shows a correspondence table between the number of resource blocks and the bit cutout position in FIG. FIG. 9A shows a case where the number of resource blocks is 1-12. Numbers 0 to 7 vertically arranged on the leftmost side of FIG. 9A indicate that the data on the time axis before the FFT calculation is an 8-bit fixed-point number. 7 indicates an upper bit, and 0 indicates a lower bit. The numbers arranged from 0 to 11 indicate that the FFT operation is executed with a 12-bit fixed-point number and is input to the bit cutout unit as it is with a 12-bit fixed-point number. 11 indicates an upper bit, and 0 indicates a lower bit. The bit cutout unit 20 cuts out an 8-bit fixed-point number from the 12-bit fixed-point number. In FIG. 9A, 4 to 11 bits are cut out. Here, cutting out the 8 bits on the upper bit side means that the step of the cut-out fixed-point number becomes rough, but it can cope with a large signal level. Therefore, when the number of resource blocks is small, that is, when the signal level output from the FFT operation unit 10 is large, it is suitable to determine the upper bit side as the bit cutout position as shown in FIG.

  FIG. 9D shows a case where the number of resource blocks is 40-50. In FIG. 9D, 1 to 8 bits are cut out. Here, cutting out the 8 bits on the lower bit side reduces the signal level that can be handled, but the steps of the cut-out fixed-point number become fine. Therefore, when the output signal level is low, the cut-off fixed-point number This means that the accuracy of the data is increased. Therefore, when the number of resource blocks is large, that is, when the signal level output from the FFT operation unit 10 is small, it is suitable to determine the lower bit side as the bit cutout position as shown in FIG.

  Thus, according to the present embodiment, it is possible to provide an FFT processing apparatus that outputs data in an appropriate fixed-point number format according to the frequency bandwidth of data transmitted by the mobile terminal.

  In addition, the scheduler information determination unit 30 determines the fixed-point format to a format with a small number of bits after the decimal point when the number of resource blocks is small, and determines the fixed-point format as a decimal point when the number of resource blocks is large. By determining the format with a large number of bits, the accuracy of the fixed-point number output from the FFT processing unit 204 can be improved when the number of resource blocks is large.

  Furthermore, the scheduler information determination unit 30 can obtain information on the number of resource blocks without requiring complicated calculation processing by receiving scheduling information notified from the base station to the mobile terminal. This has the effect of reducing power consumption and reducing the chip area.

  Although the present invention has been described based on the drawings and examples, it should be noted that those skilled in the art can easily make various modifications and corrections based on the present disclosure. Therefore, it should be noted that these variations and modifications are included in the scope of the present invention.

  For example, functions included in each member, each means, each step, etc. can be rearranged so as not to be logically contradictory, and a plurality of means, steps, etc. can be combined or divided into one. Is possible.

10 FFT operation unit 20 bit cutout unit 30 scheduler information determination unit 100 RF unit 102 LNA
104 BPF
106 Q-Demod part 108 VGA
110 ADC
112 PA
114 BPF
116 Q-Mod part 118 LPF
120 DAC
200 BB unit 202 CP removing unit 204 FFT processing unit 206 Demapping unit 210 Decoding unit 212 CP adding unit 214 IFFT processing unit 216 Mapping unit 218 Encoding unit 300 Processor

Claims (4)

The wireless signal data represented by a fixed-point number having a first bit number is calculated as a fixed-point number having a second bit number larger than the first bit number, and the second bit number is fixed. An FFT operation unit for converting to decimal data;
A bit cutout unit that cuts out data of a specified number of bits from the data of the second number of bits according to a bit cutout position determined according to a degree of a use frequency of the wireless signal;
An arithmetic processing device comprising: The arithmetic processing device according to claim 1,
The bit cutout unit
If the frequency of the radio signal used is small, the bit cut-out position determined at a position where the number of bits after the decimal point is small, or if the frequency of the radio signal used is high, bits after the decimal point An arithmetic processing device for cutting out data of a specified number of bits from the data of the second number of bits according to the bit cutout position determined at a position having a large number. The time axis data of the uplink signal represented by a fixed-point number of the first bit number is calculated as a fixed-point number of a second bit number larger than the first bit number, and the second A step of converting the data to the frequency axis of a fixed-point number of bits;
Based on the number of resource blocks of the uplink signal, a position at which the fixed-point frequency axis data of the first bit number is cut out from the fixed-axis frequency axis data of the second bit number is determined. Steps,
The step of determining the position of extracting the data from the data of the fixed-point number frequency axis of the second number of bits has the position of extracting the data determined, and the frequency axis of the fixed-point number of the first number of bits Cutting out the data;
An arithmetic processing method comprising: In the arithmetic processing method according to claim 3,
The step of determining the position to cut out the data on the frequency axis is the step of determining the bit cutout position of the frequency axis data of the fixed-point number of the first number of bits when the number of the resource blocks is small. If the number of the resource blocks is determined to be small and the number of resource blocks is large, the bit cutout position of the frequency axis data of the fixed-point number of the first number of bits is the bit cutout position with a large number of bits after the decimal point. To decide,
An arithmetic processing method characterized by the above.