JP2012083413A - Rhythm pattern generation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device capable of using an existing rhythm pattern to generate a rhythm pattern that continuously changes from a sparse state to a dense state.SOLUTION: A logical operation part 200 executes a logical operation based on one pattern taken from a preset pattern storage part 10 and a quasi-random pattern generated by and output from a quasi-random pattern generation part 100, and outputs an n-bit-wide variation pattern. Then, a rhythm pattern generation device can continuously generate changes according to operation of a slider 30 from a state of no 1 existing at all to a state of only 1s existing in a 16-bit-wide variation pattern output from the logical operation part 200.

Description

  The present invention relates to an apparatus having a rhythm pattern generation function.

  There has been proposed an electronic keyboard instrument in which variations are increased over the entire performance information. In this electronic keyboard instrument, displacement (amplitude) patterns are registered in a left channel displacement pattern table and a right channel displacement pattern table, and left and right displacement pattern data corresponding to a user instruction are stored in the respective displacement pattern tables. The read and right channel displacement pattern data is multiplied by the balance signal BL via a multiplier, and the multiplication result is supplied to the first amplifier to modulate the amplitude of the right channel musical signal. The effect is added to the tone signal, while the displacement pattern data for the left channel is multiplied by “1-BL” via a multiplier and an adder, and the multiplication result is supplied to the second amplifier. The effect of adding the effect to the tone signal by modulating the amplitude of the tone signal of the left channel (see, for example, Patent Document 1). The displacement pattern is the time on the horizontal axis and the degree to which the amplitude of the musical signal is displaced on the vertical axis. The displacement pattern table for the left channel and the displacement pattern for the right channel previously prepared by the user or the like are described above. Registered in the table.

JP 2001-215957 A (page 4-6, FIG. 2)

By the way, when the displacement pattern is randomly changed as described in paragraph “0030” of this Patent Document 1, the original pattern is “sparse” (the digital value “1” is small) in the conventional apparatus configuration. However, it is not possible to obtain a variation that makes it “fine” (the digital value “1” is large). In addition, the variation selection means is only described as “according to the user's instruction”, and is merely selected from patterns preset by the panel switch corresponding to each variation pattern. Met. The performer gets tired of just using a preset pattern as it is, and seeks a change in the pattern. However, considering that an existing pattern is processed and used, in the conventional apparatus, as described above, “ In order to obtain a pattern that becomes “dense” compared to the original pattern, a fill-in function that simply inserts a previously prepared pattern is used. It was the actual situation. Although it is possible to enrich variations by using this fill-in function, it has been desired to process a pattern prepared in advance, but this has not been realized.

  The present invention has been made to solve such conventional problems, and provides an apparatus capable of generating an abundant rhythm pattern that continuously changes from “sparse” to “dense” using an existing rhythm pattern. The purpose is to do.

In order to achieve the above object, the present invention provides preset pattern storage means (10) for storing a plurality of types of 0 and 1 patterns (user preset patterns) prepared in advance having an n-bit length (for example, n is 16). When,
A quasi-random pattern generating means (100) that generates and outputs a quasi-random pattern that is a random number pattern in which the probability of occurrence of 1 or 0 is controlled with respect to a random pattern that has a uniform occurrence probability of 0 and 1 constituting an n-bit length )When,
An n-bit length pattern (variation pattern) by performing a logical operation between one pattern extracted from the preset pattern storage means (10) and the quasi-random pattern generated and output from the quasi-random pattern generation means (100) Logical operation means (200) for outputting
A user operator (30),
In response to the operation of the operator (30), in the n-bit length pattern (variation pattern) output by the logical operation means (200), a state where no 1 exists to a state where all are 1 is continuously displayed. The feature is that it can be generated.

  According to the present invention, the logical operation means (200) performs a logical operation between one pattern extracted from the preset pattern storage means (10) and the quasi-random pattern generated and output from the quasi-random pattern generation means (100). To output an n-bit pattern (variation pattern). Then, according to the operation of the operation element, in the n-bit length pattern (variation pattern) output from the logical operation means (200), it is possible to continuously generate from a state in which 1 does not exist at all to a state in which all are 1. Therefore, it is possible to generate an abundant rhythm pattern that continuously changes from “sparse” to “dense” using an existing pattern.

More specifically, the logical operation means (200) includes one pattern (k) extracted from the preset pattern storage means (10) and a quasi-random pattern generated and output from the quasi-random pattern generation means (100). AND section (210) that performs an AND operation on the most significant bit to the least significant bit of each of them, and the one pattern extracted from the preset pattern storage means (10) and the quasi-random pattern generation means (100 ) And the OR part (220) that performs an OR operation on the most significant bit to the least significant bit of each of the quasi-random patterns generated and output from the quasi-random pattern, and can be realized with a simple configuration. In the above apparatus, the quasi-random pattern generation means (100) includes a random number generation unit (110) that generates a random number pattern having a uniform occurrence probability of 0 and 1 constituting an n-bit length, and the random number pattern. One input and the output of the AND circuit (120 times) as the other input for a predetermined number of times (for example, three times) and the input of the AND circuit (120) as one input and the output of the AND circuit (120) as the above operation A two-input OR circuit (130) that repeats as many times as instructed from the child (30) and makes the other input can be configured, and this can also be realized with a simple configuration.

  According to the present invention, it is possible to generate an abundant rhythm pattern that continuously changes from “sparse” to “dense” using an existing rhythm pattern.

1 is a configuration diagram of a rhythm pattern generation device 1. FIG. It is explanatory drawing of the relationship between a quasi-random pattern and the repetition frequency. It is explanatory drawing of the relationship between the position of the slider 30 and the repetition frequency. FIG. 6 is an explanatory diagram of the operation of the logical operation unit 200.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, a case where 16-bit length data is used will be described as an example. However, the bit length is not limited to this, and data of 1 bit or more may be used, but a DSP such as 8 bits or 16 bits may be used. A bit length suitable for the operation in is preferable.

  FIG. 1 is an explanatory diagram showing the configuration of the rhythm pattern generation apparatus 1. The rhythm pattern generation device 1 includes a preset pattern storage unit 10, a rhythm pattern generation unit 20, and a slider 30 as an operator. The preset pattern storage unit 10 stores a plurality of types of digital data composed of 0s and 1s having a 16-bit length. In FIG. 1, N pieces of digital data from “user preset pattern 1 (USER / PRESET pattern 1)” to “user preset pattern N (USER / PRESET pattern N)” are created and stored in advance.

  The rhythm pattern generation unit 20 includes a quasi-random pattern generation unit 100 and a logical operation unit 200. The quasi-random pattern generation unit 100 includes a random number generation unit 110 (for example, an M-sequence random number generator) that generates a random number pattern having a uniform generation probability of 0 and 1 constituting a 16-bit length, and the random number generation unit 110 A two-input AND unit 120 using the generated random number pattern as one input and its output as the other input a predetermined number of times (for example, three times), and an output of this AND unit 120 as one input and its own output as an operator And a two-input OR unit 130 that repeats the number of times designated by 30 and makes the other input. In addition, the number of inputs from the output in the AND unit 120 to the input side is fixed, for example, three times, while the number of repetitions of the input from the output in the OR unit 130 to the input side is variable depending on the slide amount of the slider 30. ing. When the number of repetitions specified by the slider 30 is “0”, the output of the quasi-random pattern generation unit 100 is a pattern consisting of only “0”. The slider 30 may be operable in the left-right direction or may be operable in the up-down direction.

  FIG. 2 is a schematic explanatory diagram of a quasi-random pattern generated and output by the quasi-random pattern generation unit 100. When the number of repetitions decreases, the sparse state where the number of occurrences of “1” decreases, while when the number of repetitions increases, the state of ensemble increases where the number of appearances of “1” increases. I understand. Thus, a quasi-random pattern, which is a random number pattern in which the probability of occurrence of 1 or 0 is controlled, is generated from the random number generator 110 with respect to a random number pattern having a uniform occurrence probability of 0 and 1 constituting a 16-bit length. Will be output.

  The logic operation unit 200 loads (loads) one pattern (USER / PRESET pattern k in FIG. 1) extracted from the preset pattern storage unit 10 and the most significant bit of the quasi-random pattern generated and output from the quasi-random pattern generation unit 100 AND unit 210 that performs an AND operation from the least significant bit to the least significant bit one bit at a time, and the one pattern (USER / PRESET pattern k in FIG. 1) extracted from the preset pattern storage unit 10 and the quasi-random pattern generation unit 100 OR section 220 that performs an OR operation on the most significant bit to the least significant bit of the quasi-random pattern bit by bit, and an output from AND section 210 or an output from OR section 220 as a newly generated variation pattern selected and output With switch 230 to do It made which have, the switch 230 are configured to be controlled by the sliding operation of the slider 30.

  FIG. 4 is an explanatory diagram of a logical operation performed by the logical operation unit 200. When the AND unit 210 performs an AND operation on the most significant bit to the least significant bit of both the “USER / PRESET pattern” indicated by the symbol A and the quasi-random pattern indicated by the symbol B, a variation indicated by the symbol C A pattern is generated and output. On the other hand, when OR operation is performed for each bit from the most significant bit to the least significant bit of the “USER / PRESET pattern” indicated by the symbol A and the quasi-random pattern indicated by the symbol B, It can be seen that the variation pattern shown is generated and output. If a logical product operation with a sparse quasi-random pattern is performed, “0” is buried in the pattern, and the pattern eventually disappears. On the other hand, if a logical OR operation with a dense quasi-random pattern is performed, “1” is embedded in the pattern, and finally 16-bit data of all “1” is obtained.

  FIG. 3 is an explanatory diagram showing the relationship between the slider position and the number of repetitions in the quasi-random pattern generation unit 100. By the operation of the slider 30, the switching between the AND operation and the OR operation and the number of repetitions of the logical sum operation in the OR unit 130 of the quasi-random pattern generation unit 100 are controlled simultaneously. Specifically, the switch 230 selects the OR unit 220 when the slider 30 is on the right side or the center from the center (center), and the switch 230 selects the AND unit 210 when the slider 30 is on the left side from the center. did. As described above, when the number of repetitions designated by the slider 30 is “0”, the output of the quasi-random pattern generation unit 100 is a pattern composed of only “0”.

  FIG. 3 shows the relationship between the slider position and the number of repetitions in the quasi-random pattern generation unit 100 so as to satisfy the following conditions (A), (B), and (C) in accordance with this configuration. . (A) When the slider is at the center position, the preset pattern is output as it is as the output of the rhythm pattern generation unit 20, and (B) a pattern slightly sparser than the preset pattern when the position of the slider 30 is near the left side of the center The pattern density changes continuously according to the position of the slider 30 so that the most sparse pattern is output when the position of the slider 30 is at the left end, and (C) the position of the slider 30 is on the right side of the center. In the vicinity, a pattern slightly denser than the preset pattern is output, and the density of the pattern is continuously changed according to the position of the slider 30 so that the densest pattern is output when the position of the slider 30 is the right end.

  In the graph of FIG. 3, as the position of the slider 30 moves from the left end toward the center, the number of repetitions in the quasi-random pattern generation unit 100 (hereinafter simply referred to as the number of repetitions) increases to “0” at the center, It shows that the number of repetitions is set according to the position of the slider 30 so that the number of repetitions increases from the right to the right end. When the slider 30 is on the left side from the center, the switch 230 selects the AND unit 210 to output a logical product of the preset pattern and the output of the quasi-random pattern generation unit 100 as a variation pattern. As a result of this logical product, a pattern that is sparser than the original preset pattern is output as a variation pattern. As the slider 30 is moved from the left end to the vicinity of the left side of the center, the number of repetitions increases. Therefore, the output of the quasi-random pattern generation unit 100 outputs all the bits from the pattern of “0” to “1”. As a result, the variation pattern is continuously output from a pattern in which all bits are “0” to a pattern close to the preset pattern.

  When the slider 30 is on the right side from the center, the switch 230 selects the OR unit 220, so that the logical sum of the preset pattern and the output of the quasi-random pattern generation unit 100 is output as a variation pattern. As a result of this logical sum, a pattern that is denser than the original preset pattern is output as a variation pattern. Since the number of repetitions increases as the slider 30 moves from the center to the right side, the output of the quasi-random pattern generation unit 100 is similar to a pattern in which all bits are “0” to a pattern in which all bits are “1”. As a result, the variation pattern is continuously output from the preset pattern to a pattern in which all bits are close to “1”. Thus, when the slider 30 is in the center, the preset pattern is directly used as the output (variation pattern) of the rhythm pattern generator 20, and when the slider 30 is in the vicinity of the center, a pattern close to the preset pattern is output and the slider 30 is output. As the distance from the center increases, an intuitively easy-to-operate configuration is realized in which a pattern different from the preset pattern becomes the output (variation pattern) of the rhythm pattern generation unit 20.

  In the rhythm pattern generation apparatus 1 having the above-described configuration, first, the quasi-random pattern generation unit 100 applies 1 to a random number pattern having a uniform occurrence probability of 0 and 1 constituting a 16-bit length. Alternatively, a quasi-random pattern that is a random number pattern in which the probability of occurrence of 0 is controlled is generated and output. Then, the logical operation unit 200 performs a logical operation between an arbitrary pattern loaded from the preset pattern storage unit 10 and the quasi-random pattern generated and output from the quasi-random pattern generation unit 100, and has a 16-bit length. The variation pattern which is a pattern is output. And, according to the operation of the slider 30, in the variation pattern which is a 16-bit length pattern output from the logical operation unit 200, it is possible to continuously generate from a state where 1 does not exist at all to a state where all are 1. An abundant rhythm pattern that continuously changes from “sparse” to “dense” can be generated using existing patterns.

  For example, in the variation pattern output by the logical operation unit 200, if “1” is an instruction for sounding a musical instrument and “0” is an instruction for not sounding a musical instrument, the rhythm patterns of various musical instruments. Can be enriched.

  There are two methods of giving variations in rhythm patterns: a method that shifts the sound generation timing of component sounds, and a method that increases or decreases the component sounds. The methods of “Increase playing method” and “Break (Performance method of reducing component sounds)” are known, and these methods are often used when improvising music. The effect obtained by making “dense” corresponds to “fill-in and decoration sound”, and the effect obtained by making the rhythm component sound “sparse” corresponds to “break”. As described above, since there is an effect corresponding to the conventional performance technique, the performer can continuously change and set the variation without a sense of incongruity.

  As described above, the present invention can be used for various music apparatuses used for enriching rhythm patterns.

1 Rhythm Pattern Generation Device 10 Preset Pattern Storage Unit 20 Rhythm Pattern Generation Unit 30 Slider 100 Quasi-Random Pattern Generation Unit 110 Random Number Generation Unit 120 AND Unit 130 OR Unit 200 Logic Operation Unit 210 AND Unit 220 OR Unit 230 Switch

Claims (6)

Preset pattern storage means for storing a plurality of types of patterns (user preset patterns) consisting of 0s and 1s having a length of n bits (n is a natural number), and the occurrence probability of 0s and 1s constituting an n bit length is one. A quasi-random pattern generating means for generating and outputting a quasi-random pattern that is a random pattern in which the probability of occurrence of 1 or 0 is controlled with respect to a random pattern that is
Logical operation means for performing a logical operation between one pattern extracted from the preset pattern storage means and the quasi-random pattern generated and output from the quasi-random pattern generation means to output an n-bit length pattern (variation pattern) When,
A user operator, and
According to the operation of this operator, in the n-bit length pattern (variation pattern) output by the logical operation means, it is possible to generate continuously from a state where 1 does not exist to a state where all are 1 A rhythm pattern generator characterized by the above. The rhythm pattern generation device according to claim 1,
The logical operation means is
An AND unit that performs an AND operation on the bit from the most significant bit to the least significant bit of both the one pattern extracted from the preset pattern storage unit and the quasi-random pattern generated and output from the quasi-random pattern generation unit;
An OR section that performs an OR operation on the one bit from the most significant bit to the least significant bit of both the one pattern extracted from the preset pattern storage means and the quasi-random pattern generated and output from the quasi-random pattern generation means; A rhythm pattern generation apparatus comprising: The rhythm pattern generation device according to claim 2,
A rhythm pattern generation device configured to be switchable between the AND operation and the OR operation by an operation of the operator. In the rhythm pattern generation device according to any one of claims 1, 2, and 3,
The quasi-random pattern generating means includes
A random number generator for generating a random number pattern having a uniform occurrence probability of 0 and 1 constituting an n-bit length, and a two-input AND having this random number pattern as one input and its output as the other input a predetermined number of times Rhythm pattern generation comprising: a circuit; and a 2-input OR circuit in which the output of the AND circuit is used as one input and the output of the AND circuit is repeated the number of times designated by the operation element and the other input is used. apparatus. The rhythm pattern generation device according to claim 4,
A rhythm pattern generation device configured to simultaneously perform switching between the AND operation and the OR operation and instructing the number of repetitions of the operation of the OR circuit according to an operation of the operator. The device according to any one of claims 1, 2, 3, 4 and 5.
In the variation pattern output by the logical operation means,
A rhythm pattern generation apparatus characterized in that “1” is an instruction for sounding a musical instrument and “0” is an instruction for not sounding a musical instrument.

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