JP2012073154A - Gas sensor and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device for achieving a ultra thin film gas sensor that can be applied to various kinds of gas sensing including hydrogen and other gasses and has a high long term reliability, by applying a thin film in which a metal compound is formed in a nano-space of ultra thin film platinum grain boundary to a sensing film of the gas sensor and changing constituent metal of the platinum and nano-compound, a film thickness, an occupation ratio, and a formation condition.SOLUTION: The gas sensor includes a gate insulation film arranged on a substrate, and a gate electrode arranged on the gate insulation film. The gate electrode includes a metal oxide mixture film in which an oxygen doped amorphous metal containing oxygen and the metal oxide crystal are mixed, and a platinum film arranged on the metal oxide mixture film. The platinum film is composed of a plurality of platinum crystalline grains and a grain boundary region existing between the platinum crystalline grains. The grain boundary region is filled with the metal oxide mixture, and the periphery of the platinum crystalline grains are surrounded by the metal oxide mixture.

Description

  The present invention relates to a gas sensor formed on a semiconductor substrate and a manufacturing method thereof, and particularly to a highly reliable and highly sensitive gas sensor provided on a Si semiconductor and a manufacturing method thereof.

In the latter half of the 1970s, research and development for producing gas sensors using Si-semiconductor processes in the era of eruption were extensively conducted, but they were down except for ISFET for blood analysis. The main cause is that gas sensors operate at a high temperature (around 450 ° C.) in many cases, so that the thin film is peeled or cracked and long-term stability cannot be achieved. The problem of peeling and cracking of the thin film is mainly due to the process of dissolving the fine particles in a solvent, applying them and sintering, in addition to the small heat capacity and weakness against thermal shock due to the thin film. It was also because the adhesiveness could not be sufficiently secured (for example, Yasuhiro Shimizu, Makoto Egashira, Applied Physics Vol. 70, No. 4, 423-427, 2001 (Non-patent Document 1)). However, since the late 1990s, MEMS (Micro Electro Mechanical Systems) technology has begun to be applied to gas sensor development, and research and development is booming again as a trump card for lower power consumption (for example, I. Simon et al., Sensors and Actuators B Vol73, pages 1-26, 2001 (non-Patent Document 2), T.Suzuki other ^{The 10 th Int. Meeting Chemical Sensors} , 3B02, July 11-14, 2004 years, Tsukuba, Japan (non-Patent Document 3) ).

  Most of the current gas sensors are catalytic combustion type, metal oxide semiconductor type, gas heat conduction type, and solid electrolyte type. However, if various gas sensors can be realized using Si-MOSFET technology (silicon semiconductor and its integration technology) as a platform, the sensor sensitive part can be formed with an ultra-thin film, and Si lithography technology can be fully utilized. Cordless (battery operation), portability, ease of network application, low-cost mass production, which is expected to bring about innovation in the world of gas sensors.

Actually, a Si-MOSFET type gas sensor that detects NH ₃ , CO, CH _4, and NO gas by making the Pt gate thin film porous structure has been proposed at the laboratory level (Non-Patent Documents 4 and 5). 6). The sensor principle is that Pt microcrystals are formed with gaps on the gate insulating film, and the work function changes when gas molecules are adsorbed onto Pt, and the Vth of the MOS shifts through the capacitance between Pt microcrystals.

  A Si-MOSFET type hydrogen gas sensor using a platinum film composed of a thin film having a thickness of about 30 to 45 nm as a gate electrode does not respond to ammonia, ethane, methanol, or the like other than hydrogen gas. However, gas selectivity is different in a Si-MOSFET type hydrogen gas sensor (for example, Sensors and Actuators B Vol, pages 15-20, 1990 (non-patent document 7)) using a platinum ultrathin film (˜6 nm) as a gate electrode. . That is, in this research, the platinum thin film is not uniformly deposited on the gate insulating film, but is formed in a striped pattern. As a result, a gap region without platinum is formed on the surface of the gate insulating film. Gas sensors that can detect other gases such as ammonia and ethanemethanol have been manufactured. This can be said to be a gas sensor positively using the property that the adhesion property of the platinum film is poor and the platinum film is easily peeled off. The response mechanism of the gas sensor is as shown below as discussed in the literature (Non-Patent Document 7) and its references.

That is, ammonia gas or the like adheres to the platinum surface formed in stripes, and changes the surface potential φ _s of the platinum surface. At this time, the capacitance between the platinum-free gap region and the platinum microcrystal on the surface of the gate insulating film, and the capacitance between the platinum-free gap region and the channel formed in the semiconductor substrate (Si substrate) This is the principle that the threshold value Vth changes. However, in the gas sensor using this ultra-thin platinum film (up to 6nm), the problem of reliability, such as peeling of the platinum film, is still a problem that has not been solved. Is difficult.

  The reason why Si-MOSFET type hydrogen gas sensor using platinum as a gate electrode cannot be commercialized is that it has poor adhesion to insulating films such as silicon oxide and semiconductor films such as silicon and gallium arsenide (GaAs), and it has long-term reliability. This is because it could not be guaranteed. The problem of the peeling of the platinum film is an extremely important problem in terms of practical use and guarantee of the life of the gas sensor that exposes the gate electrode portion to the outside air.

Further, in the processing process in the FET manufacturing process, partial film peeling occurs, and a technique for stably bonding Pt directly on the gate insulating film has not been established in a practical manufacturing process. Pt film peeling has a problem of contamination of the process equipment due to the Pt film peeled off during the manufacturing process. In the area of electronic devices such as Si and GaAs, Pt and SiO ₂ are used when Pt is used. A technology has been established in which a barrier metal such as Ti, Mo, W or the like is inserted between an oxide, a semiconductor such as Si or GaAs, etc., to maintain adhesion and avoid contamination due to peeling. Pt is a noble metal and tends to be more stable when it is aggregated with Pt itself than when it is combined with oxygen or other constituent atoms of a solid material (oxide such as SiO ₂ or semiconductor such as Si or GaAs). Yes, this is an inherent property of Pt, and the insertion of a barrier metal is an inevitable method for improving adhesion.
From the standpoint of hydrogen sensor operation, if these barrier metal layers are present, hydrogen gas is blocked or occluded by the barrier metal layers and either does not react to hydrogen gas at all, or the hydrogen response sensitivity becomes extremely low, making it unusable as a sensor. There is an essential problem.

On the other hand, we have also annealed the Pt (15 nm) / Ti (5 nm) / SiO ₂ (18 nm) / Si stacked film MOS structure in air at 800 ° C. for 30 minutes to realize a porous structure (for example, patents) In Document 1, FIG. 18 shows a sensor principle explanatory diagram, and FIG. 19 shows a gate cross-sectional TEM image thereof). We also annealed the Pt (15 nm) / Ti (5 nm) / SiO ₂ (18 nm) / Si stacked film MOS structure in air at 400 ° C. for 2 hours, and the Ti layer was formed of TiO _X nanocrystals. Realized a hydrogen sensor using a Pt-Ti-O gate structure that becomes a mixed layer of ultra-high oxygen-doped amorphous Ti and accumulates Ti and O at high concentration at the Pt grain boundary. Air diluted hydrogen from 100 ppm to 1% In the concentration, extremely high sensitivity characteristics are realized (for example, in Patent Document 1, FIG. 12 illustrates the concentration dependency and high sensitivity characteristics of the sensor, FIG. 1 illustrates the gate structure, and FIG. 2 illustrates the gate cross section). TEM image is shown). The present Pt—Ti—O gate structure has excellent characteristics such as an intrinsic chip life of 10 years or more as a characteristic (for example, Usagawa et al., Fuel Cell, Vol. 8, No. 3, 2009, 88-96). Page (see Non-Patent Document 8)), it has been found that by performing the hydrogen annealing process, the reproducibility of the threshold voltage Vth and the uniformity within the wafer are dramatically improved (for example, FIG. a)). However, this Pt—Ti—O gate structure does not respond to 0.1-1.0% methane, 0.1% ethane, 0.1% CO, 817 ppm isooctane at an operating temperature of 115 ° C. Patent Document 8).

  The above barrier metal problem can be solved by using the Pt—Ti—O gate structure invented by the prior application technique (Patent Document 1).

JP 2009-3000297 A Japanese Patent Application No. 2009-254522

Shimizu et al. Applied Physics Vol.70 No.4 (2001) 423-427 I. Simon et al. Sensors and Actuators B vol.73 (2001) pp.1-26. T. Suzuki et al. The 10th Int. Meeting. Chemical Sensors, 3B02, July11-14,2004, Tsukuba, Japan. F. Winquist et al. Appl. Phys. Lett Vol. 43 (1983) pp. 839-841. K. Dobos et al. IEEE ED vol.ED-32 (1985) pp.1165-1169. H. Dannetun et al. J. Appl. Phys Vol. 66 (1989) pp.1397-1402. I. Lundstrom et al. Sensors and Actuators, B1 (1990) 15-20 Usagawa et al. Fuel Cell, Vol. 8, N0.3 (2009) 86-96

The conventional Pt—Ti—O gate structure described above has the following problems.
(1) In the Pt-Ti-O gate structure, there is almost no response except for hydrogen, and it is selected compared to commercially available hydrogen sensors (contact combustion type, metal oxide semiconductor type, gas heat conduction type, solid electrolyte type). Sex is too strong.
(2) The Pt—Ti—O gate structure based on the Pt (15 nm) / Ti (5 nm) / SiO ₂ (18 nm) / Si stacked film MOS structure does not respond when the hydrogen concentration in air is approximately 70 ppm or less. Further, at a concentration of approximately 10% or more, the sensor response intensity ΔVg is saturated in a further high concentration region.
(3) In the porous structure realized in air at 800 ° C. for 30 minutes (see Patent Document 1), the Pt grain interval is too long, the electric capacity is reduced, and as a result, the sensitivity is low and the gap length is controlled. It is difficult, and the Pt grain gap is formed with air, so the Pt film is easily peeled off.
(4) Further, since the porous structure (see Patent Document 1) is processed at a high temperature, it is necessary to perform a high-temperature heat treatment before forming the metal, and the inter-Pt interparticle gap portion is covered with an insulating film in the subsequent steps. In the process of removing the insulating film in the gate region at the end of the process step, it is difficult to remove the insulating film with the Pt grains being too thin and leaving a gap, resulting in poor controllability of the capacitance. .

  In order to solve the above problems (1) to (4), the object of the present invention will be described below.

  An object (first object) of the present invention is to apply a nanocomposite thin film characterized in that a metal compound (nanocompound) is formed in an ultrathin platinum grain boundary nanospace to a sensitive film of a gas sensor, and By changing the compound metal, film thickness, occupancy ratio, and formation conditions of the compound, it is possible to respond to sensing of hydrogen and various other gases, and moreover, an ultra-thin gas sensor with high reliability, especially long-term reliability, and its manufacturing method. Is to provide.

  In addition, another object (second object) of the present invention is to provide a nanocomposite thin film capable of controlling the occupation ratio of ultrathin platinum particles and nanometal compounds, and to adsorb gas to the capacitance between the ultrathin platinum particles and nanometal compounds. It is an object to provide an ultra-thin gas sensor that realizes reading out the amount of charge accumulated in an electric capacity by a voltage signal as a molecule is deposited, and a manufacturing method thereof.

  Furthermore, another object of the present invention (third object) is to provide a nanocomposite thin film having a nanometal compound in which the occupation ratio of the nanometal compound is further increased as compared with that of ultrathin platinum particles or a conductive carrier is present. An ultra-thin gas sensor that realizes that the electrical resistance of the nanocomposite thin film changes by adsorbing adsorbed gas molecules to the nanometal compound by reading the current change, voltage change, or resistance change, and its manufacturing method Is to provide.

Another object (fourth object) of the present invention is to improve the reliability of a sensor chip itself mounted with a gas sensor. In the conventional Pt porous gate structure, the Pt intergranular space is a space (called void) where no solid substance exists, and thus Pt grains are directly formed on an insulating film such as SiO ₂ , SiN, Ta ₂ O _5. Since the structure is easy to peel off, there is a problem that the adhesion between Pt and the gate insulating film is poor, and long-term reliability cannot be guaranteed. This time, the nanocomposite thin film is formed of a thin film containing a metal compound that forms the nanocomposite thin film, thereby providing a long-term highly reliable ultra-thin gas sensor and a method for manufacturing the same.

  Further, another object (fifth object) of the present invention is to provide a hydrogen sensor that operates up to several ppm at several hundred pp or less, a hydrogen sensor that operates in a concentration region of several% to several tens%, and a method for manufacturing the same. It is to be.

  Furthermore, another object of the present invention (sixth object) is to provide a gas sensor for forming the nanocomposite thin film and the base film on a semiconductor substrate such as silicon, SiC, GaN, GaAs or a glass substrate, and a method for manufacturing the same. It is to be.

  Another object of the present invention (seventh object) is to apply a MEMS structure in a sensor structure that realizes the above object, thereby reducing power consumption by about 1/100 or less compared to before the application and other than the sensor part. It is providing the heat insulation structure which can make the sensor substrate temperature below 125 degreeC.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  A gas sensor according to a typical embodiment includes: (a) a gate insulating film provided on a substrate; and (b) a gate electrode provided on the gate insulating film. A gas sensor for detecting an electrical change caused by a detection gas molecule through a gate insulating film, wherein the gate electrode is (b1) a metal in which an oxygen-doped amorphous metal containing oxygen and an oxide crystal of the metal are mixed An oxide mixed film; and (b2) a platinum film provided on the metal oxide mixed film, and the platinum film includes a plurality of platinum crystal grains and a grain boundary region existing between the platinum crystal grains. The grain boundary region is filled with a metal oxide mixture, and the platinum crystal grains are surrounded by the metal oxide mixture.

A gas sensor according to a typical embodiment includes (a) a lower electrode made of a semiconductor substrate, (b) a capacitive insulating film formed on the lower electrode, and (c) an upper part formed on the capacitive insulating film. A gas sensor including a capacitive element that detects an electrical change caused by a gas molecule to be detected adsorbed on the gate electrode through the gate insulating film, wherein the upper electrode includes (c1) oxygen And (c2) a platinum film provided on the metal oxide mixed film, wherein the platinum film includes a plurality of metal oxide mixed films containing oxygen-doped amorphous metal containing metal and metal oxide crystals. It is composed of platinum crystal grains and a grain boundary region existing between the platinum crystal grains. The grain boundary region is filled with a metal oxide mixture, and the periphery of the platinum crystal grains is surrounded by the metal oxide mixture. Special The gas sensor according to the representative embodiment includes a sensor chip having a MOS structure gas sensor and a heater formed on the main surface of the substrate, a mounting substrate on which the sensor chip is mounted, and a gap between the sensor chip and the mounting substrate. A gas sensor including an inserted heat insulating material, wherein the sensor chip includes a MEMS region formed by cutting through the back side of the substrate, a heater region in which a heater formed on the substrate surface side on the MEMS region is formed, A pad electrode formed on the surface of the substrate and connected to the heater via a lead-out wiring, the mounting substrate penetrating the mounting substrate and used for connection to the outside, the pad electrode and the lead R _{D is} the thermal resistance from the heater region to the mounting substrate sandwiching the sensor chip and the heat insulating material through the cavity in the MEMS region. And then, the thermal resistance from the heater region to MEMS area edge and R _M, through the silicon substrate from the MEMS region edge, the thermal resistance from the mounting substrate and R _S of insulating material, the thermal resistance from the MEMS region edge to the pad electrode And the thermal resistance of the lead wire is R _L , the thermal resistance R _P from the heater region to the mounting substrate through the edge of the MEMS region is R _P = R _M + R _S · R _L / (R _S + R _L ), where r _A is the radius of a circle having the same area as the surface area of the heater region, λ is the thermal conductivity of the atmospheric gas by heating the heater, and the difference between the set temperature of the heater region and the assumed minimum temperature of the installation environment Is the temperature difference ΔTmax, and the maximum heater power to be supplied to the heater determined by the electrical resistance of the heater and the power supply voltage at the set temperature is Powmax. 25mW below wherein the heat resistor _R D, the surface area of _{R P} and the heater area is set so as to satisfy the _{Powmax / ΔTmax> 1 / R D} + 1 / R P + 4πλ · r A.

  Further, a gas sensor manufacturing method according to a representative embodiment includes (a) a step of forming a gate insulating film on a semiconductor substrate, and (b) forming a gate electrode on the gate insulating film after the (a) step. In the step of forming the gate electrode, Ti having a thickness of 3-6 nm is deposited on the gate insulating film, and then the ratio of Pt to Ti is in the range of about 1: 1 to 1: 5. Pt is deposited on the Ti and heated in a temperature range of 400 ° C. to 650 ° C. for 20 minutes to 2 hours in an oxygen atmosphere gas diluted with nitrogen or argon.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  A nanocomposite thin film characterized by the formation of a metal compound (nanocompound) in the ultra-thin platinum grain boundary nanospace is applied to the sensitive film of the gas sensor. By changing the formation conditions, it is possible to cope with sensing of hydrogen and various other gases, and further to obtain an ultra-thin gas sensor having high reliability, particularly long-term reliability, and a method for manufacturing the same.

FIG. 5 is a cross-sectional TEM (transmission electron microscope) photograph showing a gate electrode and a laminated structure immediately below it in a Pt—Ti—O gate Si-MOSFET type hydrogen gas sensor using a platinum film as a gate electrode. In the Si-MOSFET type hydrogen gas sensor (FIG. 1A) using a platinum film as a gate electrode, it is a schematic diagram showing a gate electrode and a laminated structure immediately below the gate electrode. (A) is a cross-sectional TEM photograph when the structure of Pt / Ti / SiO ₂ / Si is annealed in air at a heat treatment temperature of 800 ° C. for 30 minutes, and (b) is an annealed product. it is a schematic view showing a structure of a pretreatment of _{Pt / Ti / SiO 2 / Si} . In the Si-MOSFET type gas sensor which uses platinum for the gate electrode, it is a figure which shows typically a porous gate structure. 5 is a planar TEM (transmission electron microscope) photograph from the upper surface of a gate electrode in a Pt—Ti—O gate Si-MOSFET type hydrogen gas sensor using a platinum film as a gate electrode. FIG. 5 is a schematic diagram of a Pt—Ti—O gate Si-MOSFET type hydrogen gas sensor using a platinum film as a gate electrode when observed from the upper surface of the gate electrode. It is a schematic cross-sectional view of the gate structure of the Si-MOSFET type gas sensor having a nanocomposite structure consisting of platinum particles and TiO _X nanostructure gate electrode having a capacity predominant structure of the present invention. A plan sectional schematic view of platinum particles and Si-MOSFET type gas sensor gate structure surface having a nanocomposite structure consisting of TiO _X nanostructure gate electrode having a capacity predominant structure of the present invention. It is a schematic cross-sectional view of a gate structure of a gas sensor Si-MOS structure having a nanocomposite structure consisting of platinum particles and SnO _X nanostructure gate electrode having a resistance predominant structure of the present invention. A plan sectional schematic view of a gate structure surface of the gas sensor of Si-MOS structure having a nanocomposite structure consisting of platinum particles and SnO _X nanostructure gate electrode having a resistance predominant structure of the present invention. (A), (b), (c) is a figure explaining the difference in the function of the said nanocomposite structure with a plane schematic diagram, respectively. Is a diagram showing the response characteristics for the platinum particles and Si-MOSFET type various gases of a gas sensor having a nanocomposite structure consisting of TiO _X nanostructure gate electrode having a capacity predominant structure of the present invention. The nanocomposite structure consisting of platinum particles and SnO _X nanostructures having a resistance predominant structure of the present invention is an explanatory diagram of the Si-MOS structure having the gate electrode. It is the energy band figure of the gate electrode of the nanocomposite structure which consists of the platinum grain which has the resistance dominant structure of this invention, and a SnO _X nanostructure. Is a diagram illustrating the dependence of the electrical resistance of the platinum particles and SnO _X nanostructures nanocomposite structure of the gate electrode composed of body (sensor resistance) and the particle size of SnO _X nanostructures having a resistance predominant structure of the present invention . It is a figure which shows the gas type and gas concentration dependence in the sensor which applied the nanocomposite structure which consists of the platinum grain which has the resistance dominant structure of invention, and a SnO _X nanostructure to the gate electrode. (A), (b) is a figure which shows the process of manufacturing the Si-MOSFET type gas sensor in Embodiment 1. FIG. (A), (b), (c) is a figure which shows the process of manufacturing the Si-MOS type gas sensor in Embodiment 2. FIG. 5 is an optical micrograph of a semiconductor chip forming a hydrogen gas sensor in a third embodiment. (A) is a figure which shows the cross-section of sensor FET formed on the n-type semiconductor substrate in Embodiment 4. FIG. (B) is a figure which shows the cross-section of the reference FET formed on the n-type semiconductor substrate. It is principal part sectional drawing of MISFET for sensors by Embodiment 5 of this invention. It is a principal part top view of the sensor chip by Embodiment 5 of this invention. It is the principal part top view which expanded a part of bridge region formed in the MEMS area | region by Embodiment 5 of this invention. FIG. 12 is an essential part cross-sectional view taken along line AA ′ of FIG. 11C in which a part of a bridge region formed in the MEMS region according to the fifth embodiment of the present invention is enlarged. Each of (a), (b), and (c) is a schematic cross-sectional view of a gas sensor mounted with a sensor chip in Embodiment 5 of the present invention, a schematic back view of a stem base, and a schematic front view of a stem base. is there. Each of (a) and (b) is a graph for explaining the power consumption characteristics according to Embodiment 5 of the present invention and a graph for explaining the heater power consumption characteristics of the gas sensor.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like.

  Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say.

  Similarly, in the following embodiments, when referring to the shape, positional relationship, etc., of components, etc., unless otherwise specified, and in principle, it is considered that this is not clearly the case, it is substantially the same. Including those that are approximate or similar to the shape. The same applies to the above numerical values and ranges.

  In all the drawings for explaining the embodiments, the same members are denoted by the same reference symbols in principle, and the repeated explanation thereof is omitted. In order to make the drawings easy to understand, even a plan view may be hatched.

(Embodiment 1)
First, a technique studied by the present inventors will be described. FIG. 1A shows a TEM (transmission electron microscope) observation image of the gate electrode portion of the Pt—Ti—O gate structure shown in Patent Document 1 described above, and FIG. 1B shows a schematic diagram thereof. The sample of FIG. 1A used for observation formed a Pt (15 nm) / Ti (5 nm) / SiO ₂ (18 nm) / Si laminated film MOS structure by electron beam evaporation (EB evaporation), Then, after removing the protective insulating film on the gate electrode, it is formed by annealing at 400 ° C. for 2 hours in air at 1 atm.

The structure is characterized by the formation of Ti and O agglomerates 77a in the Pt grain boundary region 77 (shown by (3) and (4) in FIG. 1A), effectively expanding the Pt grain boundary region and allowing the passage of hydrogen. 77a is formed, Ti present in the corridor, the aggregation of O tentatively referred to as nanostructure TiO _X Pt layer, Pt for distribution nanostructures TiO _X around the Pt particles and TiO _X It can be regarded as a nanocomposite structure of a nanostructure.

A microcrystal 2c made of oxygen-doped titanium or titanium oxide is formed in the upper part of the grain boundary region in the schematic diagram 1B. Further, the Ti layer 2 at the bottom is a mixed film of TiO _X nanocrystals 2a (metal oxide crystals shown by (2) in FIG. 1A) and amorphous Ti (oxygen-doped amorphous metal) 2b doped with oxygen at a very high concentration. (Metal oxide mixed film). In this mixed film, it is considered that Ti and oxygen acted as a glue for bonding Pt grains, and solved long-term reliability problems such as film peeling and cracking.

On the other hand, we also annealed the Pt (15 nm) / Ti (5 nm) / SiO ₂ (18 nm) / Si stacked film MOS structure in air at 800 ° C. for 30 minutes to realize a porous structure (for example, Open 2009-300277 (Patent Document 1)). FIG. 1C is a cross-sectional TEM photograph (see FIG. 1C (a)) of the structure of Pt / Ti / SiO ₂ / Si when annealed in air at a heat treatment temperature of 800 ° C. for a heat treatment time of 30 minutes. The structure of Pt / Ti / SiO ₂ / Si before annealing is shown in the right region of FIG. 1C (a) (see FIG. 1C (b)). From the cross-sectional TEM photograph shown in FIG. 1C (a), it can be seen that the film thickness of the titanium film and the film thickness of the platinum film change greatly after the annealing treatment. At this time, it is known from the X-ray diffraction that the titanium film is almost a crystal 88 of TiO ₂ (rutile structure). It can be seen that the morphology of the platinum film is also significantly different from the gate structure after annealing for 2 hours at a heat treatment temperature of 400 ° C. shown in FIG. 1A.

  Next, the principle of operation of the gas sensor in this structure will be described with reference to a cross-sectional TEM photograph FIG. 1C (a) and FIG. 1D which is a schematic diagram thereof. FIG. 1D is a diagram schematically showing a gate structure. In FIG. 1D, a gate insulating film 4 made of silicon oxide is formed on a semiconductor substrate 5 made of silicon. A titanium oxide film 88 is formed on the gate insulating film 4. This titanium oxide film 88 is a thin film made of a titanium oxide microcrystal having a rutile structure, a thin film made of a titanium oxide microcrystal mixed with an anatase structure in addition to a rutile structure, or a titanium oxide fine film mixed with an oxygen-doped titanium film, depending on the manufacturing conditions. It is a thin film of crystals.

As discussed in Sensors and Actuators, B1 (1990) 15-20 (Non-patent Document 7) and its reference literature, the mechanism of sensor response is the island-shaped platinum microcrystal 3a formed of ammonia gas, CO gas, methane gas, or the like. Even when an electric dipole due to the asymmetry of the molecule itself or a highly symmetric molecule is attached to the surface of the metal, the effective molecular polarization 1 occurs due to the molecular polarization due to adsorption, and the surface potential φs of the platinum microcrystal 3a changes. Let As a result, the capacitance C _S between the platinum microcrystal 3 a and the gap region (gap 7 a) where platinum does not exist on the surface of the gate insulating film 4, the capacitance C _E between the gap region and the channel region 19, platinum With respect to the capacitance system of the capacitance C _M between the microcrystal 3 a and the channel region 19, the capacitance C _S and the capacitance C _E enter in series, and the capacitance C _M is configured in parallel. For this reason, between the change amount Δφs of the surface potential φs,
ΔV = Δφs C _S · C _E / [C _S · C _E + C _M (C _S + C _E )] Formula (1)
Therefore, a change ΔV in gate potential can be observed with respect to gas adsorption. In this way, the gas sensor according to the first embodiment can detect the gas concentration as the change ΔV in the gate potential. In other words, the gas sensor according to the first embodiment means that any gas that changes the surface potential of platinum microcrystals can be detected from the above-described operating principle. Note that an insulating material may be formed in the gap 7a shown in FIG. 1D in the manufacturing process, but even in that case, the gas concentration can be detected by the above-described operation as the gas sensor. A feature of the gate structure of this gas sensor is that a grain boundary region between platinum microcrystals 3a oriented in the (111) direction disappears and a gap 7a is formed between platinum microcrystals 21a.

Thereafter, for the purpose of examining the Pt—Ti—O gate structure in FIGS. 1A and 1B in detail, planar TEM observation from the surface direction of the gate electrode in FIG. 1A was performed to obtain an observation image shown in FIG. 1E. As a result, from FIG. 1E, a nanocomposite structure of 5-20 nm Pt crystal grains and several nm titanium oxide TiO _X (dotted line region: amorphous titanium doped with ultra-high concentration of oxygen, but also described as TiO _X is described below) It has been found that it has formed. From the results of X-ray analysis, it is known that platinum grains are thin films in which microcrystals having an fcc (face centered cubic lattice) crystal structure are oriented in the (111) direction. From this planar TEM observation, a schematic diagram of FIG. 1F was obtained as a Pt—Ti—O gate structure. While the platinum grains 3 are in contact with each other, the titanium oxide TiO _X 7 is loosely scattered in the platinum grain boundaries. The spacing between the platinum grains 3 and the platinum grains 3 is distributed as shown in the figure, but the average spacing 11 is small in this case, and in the Pt—Ti—O gate structure shown in FIG. 1F, it exists between the Pt grain boundaries. The occupied portion of the TiO _X nanostructure was small, and most of the places were in the state where Pt grains and Pt grains were in contact and electrically short-circuited. In this case, the region 9 where the platinum particles 3 are in contact and overlapping exists with a considerable probability.

On the other hand, in the porous structure shown in FIGS. 1C (a) and 1D, the width of the gap 7a formed between the platinum microcrystals is about 100 nm and is very wide, so that the capacitance Cs becomes too small and the sensitivity is poor. The point that the gap 7a is a gap is a big problem as a device structure. Practically, it is desirable that the width of the gap 7a formed between the platinum microcrystals is about several nm to 10 nm. However, starting from a Pt / Ti / SiO ₂ / Si structure with the same film thickness, realizing different gate structures (FIGS. 1A, 1B, 1C, and 1D) is that Pt and Ti By studying the film thickness, film thickness ratio, film thickness structure, metal other than Ti, and further changing the annealing conditions, the following new device creation became possible.

By artificially controlling both statistical ratio of TiO _X nanostructures and Pt particles formed ultra thin Pt grain boundary nanospace (area ratio or volume ratio), nano TiO _X between the Pt grain boundary If the structure occupies, that is, a structure in which the Pt grains are surrounded by the TiO _X nanostructure, a structure in which the Pt grains are connected by capacitive coupling is realized. Thereby, the porous Pt gate structure described in the prior art can be effectively realized, and the space between Pt grains can be filled with a TiO _X nanostructure instead of a void. This structure has a very large dielectric constant compared to a vacuum, effectively increases the capacitance by the amount of the dielectric constant compared to the same capacitance dimension, and is highly sensitive by the amount of the dielectric constant. become.

In the case of a gap, the gate electrode is formed and filled with an insulating film such as SiO ₂ , PSG (phosphorus doped glass), or silicon nitride (SiN), and finally the insulating film in the sensor gate portion needs to be removed. There is a need for a technique that removes only the part. However, when the TiO _X nanostructure is filled, it is easy to selectively remove the insulating film directly on the TiO _X nanostructure. The greatest feature is that it has the effect of remarkably enhancing the adhesion on the gate insulating film by taking the nanocomposite structure of TiO _X nanostructure and taking the form of a unique Ti mixed layer. That is, compared with the porous Pt gate structure examined so far, high reliability can be realized from the formation form of the Pt—Ti—O structure.

When the above-mentioned “second object” of the present invention is applied to a gate electrode having a Si-MOS (Metal-Oxide-Semiconductor) structure, a schematic cross-sectional view of the gate (FIG. 2A) and a schematic plan view of the gate electrode (FIG. 2B). Shown in In the gate cross-sectional schematic diagram (FIG. 2A), a mixed film of amorphous Ti 2a (here Ti Ti doped with a very high concentration of TiO _X nanocrystal 2a and oxygen on the gate insulating film SiO ₂ 4 on the silicon substrate 5). A structure in which (111) -oriented Pt grains 3 are effectively surrounded by TiO _X nanostructures 7 on the mixed layer 2) is shown. In the figure, an inversion layer 19 is formed. The plan view (FIG. 2B) shows a structure in which (111) -oriented Pt grains 3 are effectively surrounded by TiO _X nanostructures 7. Unlike the Pt—Ti—O gate structure shown in FIG. 1F, this structure is characterized in that the average interval 11 between the Pt grains 3 is wide and the Pt grains are connected by capacitive coupling, and between the Pt grains and the Pt grains. There are few points 9 which are electrically short-circuited. Thereby, the molecular adsorption amount can be sensed as a change amount ΔV of the threshold voltage Vth (or flat band voltage VF) of the MOS structure as a potential change due to a change in the surface potential φs due to the adsorption gas expressed by the equation (1). Actually, in order to increase the electric capacity, the average Pt intergranular distance 11 is preferably about 1 nm to 10 nm. Among possible and TiO _X nanostructures 7 having a larger dielectric constant as TiO _X nanostructures 7 it is also one of the features that no carrier hardly exists. In this case, in the TiO _X nanostructure 7, free carriers such as electrons and holes are not effectively present, or few exist. The reason for reducing the average Pt intergranular distance 11 is to increase the electric capacity, and for example, the carrier concentration in the bulk state is 10 ²¹ pieces / cm ³ or more (the upper limit is the solid solution limit (TiO ₂ )). ) Even if a conductive oxide exists, if it is about several nanometers, one of the features of this structure is the TiO _X nanostructure because of the Schottky barrier between the Pt grains 3 and the TiO _X nanostructure 7 7 is completely depleted. The structural feature is that there are few electrically shorted portions 9 between the Pt grains and the Pt grains. However, the TiO _X nanostructure 7 is an insulator that is completely depleted at the operating temperature or has no carriers.

On the other hand, a gate cross-sectional schematic diagram (FIG. 2C) and a gate electrode plan schematic diagram (FIG. 2D) when the above-described “third object” of the present invention is applied to a gate electrode having a Si-MOS (Metal-Oxide-Semiconductor) structure. ). In this case, a case where Sn (tin) is used instead of Ti will be described. In the gate cross-sectional schematic diagram (FIG. 2C), a mixed film of SnO _X nanocrystals 2a and amorphous Sn 2b doped with oxygen at a very high concentration on the gate insulating film SiO ₂ 4 (here Sn is shown). A structure in which the Pt grains 3 are effectively surrounded by the SnO _X nanostructures 7 is shown on the mixed layer 2. In the plan view (FIG. 2D), the Pt grains 3 are SnO _X nanostructures 7. 2A and 2B, the feature of this structure is that the average distance 11 between the Pt grains and the Pt grains is as wide as several nm or more, The SnO _X nanostructure 7 has semiconducting properties and is characterized by the presence of conductive carriers, and tin oxide SnO _X has its electrons depending on the degree of oxidation (ratio of composition ratio x). Concentration is about 10 ¹⁵ pieces / cm ³ to 2 × 10 ²⁰ It can be changed up to about ³ / cm ³ and is substantially an n-type semiconductor.

If it is exposed to air, SnO _X nanostructures 7 so as to surround the platinum particles 3 are formed, for contact with the platinum particle 3 and SnO _X nanostructures 7 during its SnO _X nanostructures 7 From the interface, so-called depletion layers 6 and 6a are formed in the nanostructure 7, but a reducing gas such as ammonia gas, CO gas, or methane gas adheres to the surface of the SnO _X nanostructure 7 and the molecule itself. Even with electric dipoles with high asymmetry and highly symmetric molecules, due to molecular polarization due to adsorption, an effective molecular polarization 1 is generated, and the surface potential φs of the SnO _X nanostructure 7 is changed to produce SnO _X nanostructures. The depletion layers 6 and 6a in the body 7 shrink like the depletion layers 10 and 10a. On the other hand, when the oxidizing gas is deposited, the thickness of the depletion layers 6 and 6a in the SnO _X nanostructure 7 is increased (not shown). In this structure, the change in electrical resistance in the in-plane direction of the gate electrode is based on the sensing principle. Therefore, MOSFET operation is not used, but an insulating film is formed on the Si substrate. Therefore, it is regarded as a MOS structure in a broad sense and called a gate electrode for convenience (not an electrode for controlling carriers).
In the above description, the case of Pt, TiO _X and SnO _X has been described. However, the structure we have found is that the key to realizing the structure is that the platinum film makes good use of the property that it is difficult to be oxidized at high temperatures. Therefore, any substance other than Pt having a catalytic action that is difficult to oxidize can be applied. For example, there are Ir (iridium), Ru (ruthenium), La (lanthanum), alloys of these metals with Pt, or alloys of these metals. Considering the catalytic function of Pt, the underlying metal does not need to be a Ti layer, and neither the annealing process nor the air is necessary. In particular, in the metal oxide, any metal that can be applied to the gas sensor can be applied. Besides Ti, tin (Sn), indium (In), iron (Fe), cobalt (Co), tungsten (W), molybdenum (Mo) film, tantalum (Ta) film, niobium (Nb) film, chromium (Cr), nickel (Ni), and the like.

  Pt particle size can be adjusted by controlling the film formation method (EB deposition, sputtering method), adjustment of each film thickness and film thickness ratio, and annealing conditions in air and other gases. If technology that artificially controls the statistical ratios (area ratio and volume ratio) of the metal compound nanocomposite region can be developed, it will be impossible if the occupancy ratio can be designed by forming a metal compound in the Pt grain boundary nanospace. Various gas sensor groups can be constructed on the Si substrate (silicon platform).

The principle of the gas sensor of the present invention can be summarized in the Pt / Ti system described above and shown in FIG. FIG. 3 shows a material structure (nanocomposite structure) as viewed from the plane direction of the gate electrode.
FIG. 3A is a plan view of a gate electrode of a Pt—Ti—O gate structure according to the conventional invention. In the Pt—Ti—O gate structure, the exclusive portion of the TiO _X nanostructure 7 existing between the Pt grain boundaries is small, and the Pt grain 3 and the Pt grain 3 are in contact with each other and are electrically short-circuited. The place occupied the majority. In this case, the region 9 where the platinum particles 3 are in contact and overlapping exists with a considerable probability. This is called the Pt dominant form. In this case, the Pt grain boundary region is very narrow and has selective sensitivity to hydrogen molecules.

FIG. 3B corresponds to FIG. 2B and has a structure in which the average interval 11 between the Pt grains 3 is wide and the Pt grains are connected by capacitive coupling, and the Pt grains and the Pt grains are electrically short-circuited. There is little or no portion 9. However, the nanostructure 7 of TiO _X is a completely depleted state or an insulator without carriers at the sensor operating temperature. This is called a capacity-dominated form.

3C corresponds to FIG. 2D, and the average interval 11 between the Pt grains 3 is wider than that in FIG. 3B, or there are conductive carriers in the nanostructure 7 of TiO _X. The Pt grains in a state are connected by resistance coupling, and the electrical resistance in this structure plane is mainly the resistance of conductive carriers in the TiO _X nanostructure 7 and the Pt grains 3 and the TiO _X nanostructure. This is a state determined by the contact resistance of the body 7. There is little or no electrical short 9 between the Pt grains and the Pt grains. This is called a resistance-dominated form.

The specific gate structure creation method will be described later. In the example corresponding to FIGS. 2A and 2B, the present invention is applied to the gate electrode of the Si-MOSFET, and the sensor response intensity to CO, CH ₄ , NH ₃ , NO gas is applied. FIG. 4 shows data when applied to an air gas concentration of ΔVg. The operating temperature of the FET sensor is 150 ° C. Responses to CO, CH ₄ , NH ₃ , and NO gas that have not responded with a simple Pt—Ti—O structure have been found so far, and the sensitivity is several times better than the conventional porous structure. This indicates that the structure can be described by the sensor principle equation (1). In particular, it is considered that the effect of forming a large number of nanocapacitors in which TiO _X nanostructures having a high dielectric constant are inserted is obtained. The response intensity ΔVg was defined as a threshold voltage Vth, which is a gate voltage Vg at which a source / drain voltage Vds = 1.5 V and a sole drain current Ids = 10 μA, and was defined as an absolute value of a Vth change amount due to gas irradiation.

On the other hand, in the case of the resistance dominant form, the cross-sectional schematic diagram 2C of the gate electrode portion will be described in more detail. FIG. 5A shows a cross-sectional structure of the Pt region in FIG. 2C. FIG. 5B shows an energy band diagram of the Pt grains 3, the SnO _X nanostructure 7 and the Pt grains 3 in the line indicated by 12 in the figure. In the figure, reference numeral 13 denotes a Fermi level, and a depletion layer 14 in which the energy band of the conductor of the SnO _X nanostructure 7 comes into contact with the Pt grains 3 and extends into the SnO _X nanostructure 7 from the junction barrier at the interface. Are listed. This is an energy band diagram when exposed to air. Reducing gas such as ammonia gas, CO gas, methane gas, etc. adheres to the surface of the SnO _X nanostructure 7, and even the electric dipole due to the asymmetry of the molecule itself and the highly symmetric molecule are effective due to the polarization of the molecule due to adsorption. polarization 1 is generated in a molecule, by changing the surface potential φs of SnO _X nanostructures 7, the depletion layer 14 in the SnO _X nanostructures 7, shrinks as the depletion layer 16. On the contrary, when an oxidizing gas such as NO ₂ gas is deposited, the thickness of the depletion layer 14 in the SnO _X nanostructure 7 spreads like the depletion layer 15. In this structure, when the reducing gas on the nanostructures 7 of SnO _X is adsorbed, because the electrical resistance in the SnO _X nanostructures 7 a depletion layer 14 in the SnO _X nanostructures 7 contracts decreases, the This makes it possible to sense the gas concentration. That is, the sensing principle is the change in the electric resistance in the in-plane direction of the gate electrode with or without gas adsorption.

A specific method for creating the gate structure will be described later, and an example corresponding to FIGS. 2C and 2D. First, an example of the actual resistance change of the gate structure is shown in FIG. 6A. This data is a curve obtained by fitting data obtained by measuring the change in the sensor resistance by changing the particle diameter of the SnO _X nanostructure 7 (described as crystallite diameter in the figure). The operating temperature is 250 ° C. The 14a of the sensor resistance in the air, in 16a of the sensor resistance in the methane 1000ppm as the reducing gas, shows the sensor resistance when a current 10ppm of NO ₂ as the oxidizing gas to 15a. The crystallite diameter is substituted by the average particle diameter of the SnO _X nanostructure 7. The sensor resistance rises abruptly in the following particle size 4nm, in accordance with the particle diameter decreases, the depletion layer shown in FIG. 5B is attached extends from Pt particle surface across rapidly in nanostructures 7 of SnO _X This is because the number of conduction carriers decreases.

Using this phenomenon, the present invention was applied to a Si-MOS substrate, and sensor characteristics for CO, CH ₄ , and H ₂ gases were shown in FIG. 6B. The operating temperature of the sensor is 250 ° C. The reference resistance R0 of the response intensity Rs / R0 is a ratio of the response intensity Rs / R0 to the gas resistance dependence of the response resistance Rs / R0 with the sensor resistance Rs of the test gas when the hydrogen gas in air concentration is 100 ppm.

Until now, the mainstream of gas sensors for CO, CH ₄ , NH ₃ , and NO gas was a sintered body type in which a catalyst is supported on a metal oxide with a thick film (0.2-20 μm). By devising the structure in this way even for thin films, long-term reliability and low-temperature operation were obtained. In the sintered body method, since the barrier between grain boundaries is high and the contact resistance between metal oxide grain boundaries is large, it is necessary to increase the sensor operating temperature to about 400 ° C.

Next, a method for manufacturing the gate structure disclosed in FIGS. 2A and 2C will be described. First, a method for fabricating the structure of FIG. 2A will be disclosed. After forming the thermal oxide film SiO ₂ 4 on the Si substrate 5, after forming titanium (Ti) 10nm and further platinum (Pt) 5nm by electron beam evaporation (EB evaporation) method, in air at one atmospheric pressure, It was formed by heating at 550 ° C. for 1 hour. The titanium (Ti) film thickness is 5 nm to 15 nm, the platinum (Pt) film thickness is about 1 nm to 10 nm, and the heating temperature is about 350 ° C. to 600 ° C. The ratio of the platinum (Pt) film thickness to the titanium (Ti) film thickness was in the range of 1: 1 to 1: 5. The heating time was set in the range of about 20 minutes to 2 hours. The atmosphere during heating is air, nitrogen, or oxygen diluted with argon. The heating time and atmosphere were the same in the following production methods.

  The second method is the same as the method prepared with the Pt—Ti—O structure. First, 5 nm of titanium (Ti) and 15 nm of platinum (Pt) are formed by electron beam evaporation (EB evaporation), and then air at one atmospheric pressure is formed. Heated at 400 ° C. for 40 minutes to form a Pt—Ti—O structure. Thereafter, the structure of FIG. 2A was formed by heating in air at 650 ° C. for 30 minutes at one atmospheric pressure. Usually, heating is performed in a temperature range of about 550 ° C. to 700 ° C.

  In the third method, after a Ti layer was formed to 5 nm by EB vapor deposition, Pt and Ti were vapor-deposited simultaneously at a ratio of about 1: 3 Pt and Ti by co-evaporation. The film thickness is 15 nm. After vapor deposition, it was heated at 550 ° C. for 2 hours in an air atmosphere at 1 atm. In this case, although strictly different from FIG. 2A, the Pt grain boundary is dispersed in the titanium oxide. The ratio of Pt and Ti is used in the range of 1: 1 to 1: 5. The annealing temperature is in the range of about 400 ° C to 650 ° C.

Next, the structure manufacturing method of FIG. 2C is disclosed. After forming a thermal oxide film SiO ₂ 4 on the Si substrate 5, tin (Sn) 10 nm and platinum (Pt) 5 nm are formed by electron beam evaporation, and then heated at 500 ° C. for 1 hour in an air atmosphere of 1 atm. did. Usually it is heated at 350 to 650 ° C. The ratio between the platinum (Pt) film thickness and the tin (Sn) film thickness was in the range of 1: 1 to 1: 5. The heating time was set in the range of about 20 minutes to 2 hours. The atmosphere during heating is air, nitrogen, or oxygen diluted with argon. The heating time and atmosphere were the same in the following production methods.
In the second method, Pt and Ti were vapor-deposited simultaneously at a ratio of Pt and Sn of about 1: 2 by a co-evaporation method. The film thickness is 15 nm. After vapor deposition, it was heated at 400 ° C. in air at 1 atm for 2 hours.
The ratio of Pt and Sn is in the range of about 1: 1 to 1: 5, and the heating temperature is typically 350 ° C. to 650 ° C.

  Then, the manufacturing method of the Si-MOSFET type gas sensor in this Embodiment 1 is demonstrated. Since the manufacturing method itself of the Si-MOSFET type gas sensor itself is a well-understood technique, in the first embodiment, a process for manufacturing a gate structure, which is a main part of the present invention, and annealing in an oxygen atmosphere are performed. The process will be described mainly. In the first embodiment, an n-channel MOSFET having a gate length (Lg) of 20 μm and a gate width (Wg) of 300 μm is manufactured. This manufacturing method will be described below with reference to FIG.

First, as shown in FIG. 7A, local isolation regions 26 and 26a are formed in a semiconductor substrate 28 into which a p-type impurity has been introduced. The local isolation regions 26 and 26a are formed from a silicon oxide film having a thickness of, for example, 250 nm by performing local oxidation in order to define a gate electrode formation region. Next, in order to form an n-type channel region on the surface of the semiconductor substrate 28, impurity ions are implanted at a dose of 10 × 10 ¹¹ / cm ² . Thereafter, ion implantation for forming n ⁺ type semiconductor regions to be the source region 27 and the drain region 27a is performed in the semiconductor substrate 28 to form an active layer of the Si-MOSFET.

Subsequently, after pre-processing the semiconductor substrate 28 (wafer), a gate insulating film 25 having a thickness of 18 nm is formed on the surface of the semiconductor substrate 28. The gate insulating film 25 is formed of, for example, a silicon oxide film and can be formed by a thermal oxidation method in an oxygen atmosphere. Thereafter, the gate electrode 20 is formed on the gate insulating film by, for example, a lift-off method. At this stage, the gate electrode 20 is composed of a laminated film of a titanium film formed on the gate insulating film 25 and a platinum film formed on the titanium film. The film thickness of the titanium film is, for example, 10 nm, and the film thickness of the platinum film is, for example, 5 nm. At this time, as shown in FIG. 7A, n ⁺ type semiconductor regions constituting the source region 27 and the drain region 27a are formed in accordance with the local isolation region 26 that defines the formation region of the gate electrode 20. The gate electrode 20 is formed so as to cover not only the gate insulating film 25 but also the top of the local isolation region 26, and is arranged so that the end of the gate electrode 20 overlaps the end of the n ⁺ type semiconductor region. Is done. This is because the first embodiment cannot use a technique for forming an n ⁺ type semiconductor region in a self-aligned manner with respect to the main gate electrode 20 as a method for forming a Si-MOSFET. The titanium film and the platinum film constituting the gate electrode 20 are formed by electron beam irradiation vapor deposition (EB vapor deposition), and the film formation rate is 1 Å / s.

  The formation method of the titanium film and the platinum film is an EB (electron beam) evaporation method. A thin film is formed on a silicon oxide film formed on a silicon substrate. First, when only a titanium film was formed and evaluated as a thin film, the titanium film with a film thickness of 1 nm to 10 nm was amorphous, crystal grains were not observed, the surface was uniform, and unevenness was hardly seen. Even when the thickness of the titanium film was increased to 45 nm, most of the film was amorphous and there was a tendency for the titanium metal crystal grains to partially exist, but the surface was uniform and almost no irregularities were seen. . This was greatly different from the form (morphology) of the platinum film formed on the silicon oxide film formed on the silicon substrate as described above.

  Therefore, several kinds of titanium films were formed on the silicon oxide film formed on the silicon substrate, and platinum films were formed by continuous film formation with different film thicknesses. This platinum film was also a thin film in which fine crystals having an fcc (face centered cubic lattice) crystal structure were oriented in the (111) direction. This method for forming the gate metal portion is not desirable for the formation of the sensor FET because a large amount of sputter damage occurs in the gate insulating film and the threshold voltage Vth of the FET varies greatly in the film formation by the usual sputtering apparatus ( For example, in the prior invention, Japanese Patent Application Laid-Open No. 2009-300277 (Patent Document 1), the threshold voltage Vth of a sensor FET in which a gate metal is formed of a sputtered film varies greatly as shown in FIG. It is difficult to achieve a uniform Vth as in EB vapor deposition even after a heat treatment.)

  Next, in the high-purity air (in an atmosphere containing oxygen), the annealing shown in FIGS. 2A and 2B is performed by performing an annealing treatment (heat treatment) in which the heat treatment temperature is 550 ° C. and the heat treatment time is 1 hour. The capacitive gate structure that is the feature of the first embodiment can be realized.

  Thereafter, as shown in FIG. 7A, an insulating film 24 made of PSG (phosphorus-doped glass) is formed on the semiconductor substrate 28 including the gate electrode 20. Then, a contact hole penetrating the insulating film 24 is formed, and a process such as surface treatment is performed. The film thickness of the insulating film 24 was 500 nm. Usually, the thickness of the insulating film 24 is often selected in the range of 400 nm to 1000 nm. Then, the source electrode 21 and the drain electrode 22 made of an aluminum (Al) film containing silicon are formed on the insulating film 24 including the inside of the contact hole. The film thickness of the source electrode 21 and the drain electrode 22 is, for example, 500 nm. Although not shown in FIG. 7A, an aluminum wiring formed of an aluminum film containing the same silicon as the source electrode 21 and the drain electrode 22 is also formed as a heater for heating the extraction electrode of the gate electrode 20 and the chip. Is done. The wiring width of the aluminum wiring is, for example, 10 μm, and the wiring length is 29000 μm.

  Subsequently, an insulating film 23 functioning as a protective film is formed on the semiconductor substrate 28 on the aluminum wiring. This insulating film 23 is formed of, for example, a silicon nitride film after forming phosphorous-doped glass (PSG) with a thickness of 200 nm, and can be formed by a low temperature plasma CVD method. The film thickness of the insulating film 23 is 700 nm, for example. Finally, an opening is formed on an electrode pad (not shown) for connection to the bonding wire, and the opening is formed so as to expose the gate electrode 20 as the sensor as shown in FIG. 7A. Form. In this way, the Si-MOSFET type gas sensor according to the first embodiment can be formed.

In the first embodiment, a silicon oxide film is used as the gate insulating film 25. On this silicon oxide film, a tantalum oxide (Ta ₂ O ₅ ) film, an aluminum oxide (Al ₂ O ₃ ) film, or silicon nitride is used. An insulating film such as a (Si ₃ N ₄ ) film may be formed. After this step, a laminated film composed of a titanium film and a platinum film constituting the gate electrode is formed, and after that, the Si-MOSFET type gas sensor in the first embodiment is formed through the same process as described above. Good.

  Since many trap levels exist in the Ti layer and gate insulating film (silicon oxide film) by annealing in air, trap order is compensated by hydrogen gas from 1000pp to 1% at a temperature of about 115 ℃ -250 ℃. As a result, the reproducibility of Vth uniformity is the same as that of the Pt—T—O gate hydrogen sensor. With such a manufacturing method, the gas sensor characteristics (explained) shown in FIG. 4 were obtained.

  In the Si-MOSFET type gas sensor shown in the first embodiment, the example in which the wiring and the electrodes (the source electrode 21 and the drain electrode 22) are formed using the aluminum film has been described. In the example, for the purpose of improving the reliability of the wiring, an example in which the wiring using the gold film and the ohmic contact to the silicon are surely taken will be described. In this modification, the process until the contact hole is formed in the insulating film 24 is the same as that in the first embodiment shown in FIG.

  Subsequently, a molybdenum film (100 nm), a gold film (500 nm), and a molybdenum film (10 nm) are sequentially formed on the insulating film 24 including the inside of the contact hole. At this time, the molybdenum film (100 nm) is formed by EB vapor deposition, and finally, a gold film (500 nm) and a molybdenum film (10 nm) are formed by sputtering. Then, by patterning these laminated films, the source electrode 21a (the drain electrode 22a is not shown) and the wiring 46 shown in FIG. 7B are formed. Since gold has an effect of diffusing in silicon even at a relatively low temperature, a molybdenum film (100 nm) is used as a barrier metal. In this case, when heat treatment is performed after the wiring 46 and the like are formed, for example, a molybdenum silicide (MoSi) film 221 that is an alloy film of molybdenum and silicon can be formed in a contact region between the source electrode 21 a and the semiconductor substrate 28. it can. The molybdenum film (100 nm) functions as a barrier film that suppresses diffusion of gold into silicon. The molybdenum film (10 nm) is inserted in order to improve the adhesiveness with the insulating film 23. Since the wiring composed of the molybdenum film (100 nm), the gold film (500 nm), and the molybdenum film (10 nm) is also used for the pad portion, the molybdenum film (10 nm) that appears on the surface is removed when the pad portion is formed. In this case, the method of connecting the chip and the mounting substrate uses a gold wire because bonding with the gold wire prevents rust and improves the adhesion to the pad portion.

  By forming the molybdenum silicide film 221 between the source electrode 21 a and the semiconductor substrate 28, an ohmic contact between the source electrode 21 a and the semiconductor substrate 28 can be ensured. As described above, the structure using the gold film as the wiring material is more expensive than the structure using the aluminum film as the wiring material, but is excellent in moisture resistance and oxidation resistance. From this, it is possible to use different wiring materials, such as using a gold film for the wiring from the viewpoint of ensuring the reliability of the wiring and using an aluminum film for the wiring from the viewpoint of reducing the cost.

  As described above, the first embodiment describes the Si-MOSFET type gas sensor in which the titanium film is formed under the platinum film constituting the gate electrode during the manufacturing process, but instead of the titanium film. In addition to Ti, tin (Sn), indium (In), iron (Fe), cobalt (Co), tungsten (W), molybdenum (Mo) film, tantalum (Ta) film, niobium (Nb) film, Needless to say, a highly reliable and highly sensitive gas sensor can be formed by using the same technique as described in the first embodiment even when a chromium (Cr) or nickel (Ni) film is used.

(Embodiment 2)
In the second embodiment, an example of the resistance dominant structure shown in FIGS. 2C and 2D will be disclosed. Since the method for creating the gate portion of the second embodiment has been described in the disclosure of the first embodiment, the method for manufacturing the gas sensor manufactured on the Si-MOS type structure in the second embodiment will be described. The portions common to the first embodiment and the second embodiment will not be described in detail, and the portions directly related to the second embodiment will be mainly described. In the second embodiment, as in the first embodiment, the gate structure is formed in a folded structure on the MOS structure with a gate electrode having a gate length (Lg) of 20 μm and a gate width (Wg) of 3000 μm. . This manufacturing method will be described below with reference to FIGS. 8 (a) to 8 (c). Among the reference numerals described in FIGS. 8A to 8C, the same reference numerals as those in FIGS. 7A and 7B indicate the same components.

  First, in FIG. 8A, after the pretreatment is performed on the semiconductor substrate 28 (wafer), an insulating film 26a having a film thickness of 124 nm is formed on the surface of the semiconductor substrate 28. The insulating film 26a is formed of, for example, a silicon oxide film and can be formed by a thermal oxidation method in an oxygen atmosphere. Thereafter, a laminated film 20a made of a tin film and a platinum film is formed on the entire surface of the semiconductor substrate 28 by EB vapor deposition by electron beam irradiation. At this time, the film thickness of the tin (Sn) film is 5 nm, and the film thickness of the platinum film is 3 nm. The deposition rate of the titanium film and the platinum film is 1 と / s.

  Next, as shown in FIG. 8B, in the high-purity air, annealing is performed at a heat treatment temperature of 500 ° C. and a heat treatment time of 60 minutes to change the laminated film 20a into a thin film 20b. The thin film 20b has a structure shown in FIGS. 2C and 2D. When a dummy solid film formed under the same conditions as those for forming the thin film 20b is evaluated by X-ray, the tin film has been changed to a structure in which amorphous tin doped with oxygen at a high concentration is mixed with tin oxide. Thereafter, as shown in FIG. 8C, while leaving the gate electrode 20b and the extraction electrode (not shown) by photolithography, unnecessary platinum and tin oxide films are removed by ion milling. Although there is a method of leaving the tin oxide film as a surface protective film when the electrical conductivity is extremely low, in Embodiment 2, unnecessary tin oxide films other than the formation region of the gate electrode 20b are removed. ing. Thereby, the gate structure shown in FIG. 2C can be realized.

  Thereafter, as shown in FIG. 8C, an insulating film 24 made of PSG (phosphorus-doped glass) is formed on the semiconductor substrate 28 including the gate electrode 20b. Then, a contact hole penetrating the insulating film 24 is formed, and a process such as surface treatment is performed. Then, an extraction electrode 21a and an extraction electrode 22a made of an aluminum (Al) film containing silicon are formed on the insulating film 24 including the inside of the contact hole. The film thickness is, for example, 500 nm. Although not shown in FIG. 8C, an aluminum wiring formed of an aluminum film containing the same silicon as the extraction electrode 21a and the extraction electrode 22a is formed as a heater for heating the extraction electrode of the gate electrode 20b and the chip. Is done. The wiring width of the aluminum wiring is, for example, 20 μm, and the wiring length is 29000 μm.

  Subsequently, an insulating film 23 functioning as a protective film is formed on the semiconductor substrate 28 on the aluminum wiring. The insulating film 23 is formed of, for example, a silicon nitride film after forming PSG with a thickness of 200 nm, and can be formed by a low temperature plasma CVD method. The film thickness of the insulating film 23 is 700 nm, for example. Finally, an opening is formed on an electrode pad (not shown) for connection to the bonding wire, and the opening is formed so as to expose the gate electrode 20b as the sensor as shown in FIG. 8C. Form. In this way, the resistance-dominated gas sensor according to the second embodiment can be formed. A specific gas response example has already been described with reference to FIG. 6B.

  As in the modification of the first embodiment, a gas sensor is also formed in which the wiring is formed from a laminated structure of Mo / Au / Mo.

In the second embodiment, a silicon oxide film is used for the insulating film 26. On this silicon oxide film, a tantalum oxide (Ta ₂ O ₅ ) film, an aluminum oxide (Al ₂ O ₃ ) film, or a silicon nitride ( As in the first embodiment, an insulating film such as a Si ₃ N ₄ film may be formed.
Also from the result of FIG. 6B, Embodiment 2 can be applied as a hydrogen gas sensor in a low concentration region.

(Embodiment 3)
Next, a configuration of a hydrogen gas sensor applicable to a high concentration of about 1% to several tens of percent in the high concentration region in the third embodiment will be described. FIG. 9 is an optical micrograph of the semiconductor chip forming the hydrogen gas sensor according to the third embodiment. As shown in FIG. 9, a sensor FET 60, a reference FET 61, a heater 63 made of metal wiring, and a PN junction diode 62 for measuring the chip temperature are formed on a 2 mm × 2 mm semiconductor chip (silicon chip) CHP. Yes. In this case, the wiring heater has a wiring width of 30 μm and a wiring length of 19000 μm. The sensor FET 60 and the reference FET 61 use the Si-MOSFET described in the first embodiment. The configurations of the sensor FET 60 and the reference FET 61 that are basically different from those of the first embodiment will be mainly described.

The hydrogen gas sensor according to the third embodiment can be achieved by improving the Pt—Ti—O gate MOS type hydrogen sensor. That is, instead of the Pt (15 nm) / Ti (5 nm) / SiO ₂ (18 nm) / Si stacked film MOS structure, the Pt layer film is made thicker from 30 nm to 45 nm and annealed in the air at 400 ° C. for 2 hours to 120 hours. In addition, by annealing with 115% to 350 ° C and 1000ppm to 1% air diluted hydrogen gas, a hydrogen sensor that can withstand long-term reliability with a lower limit of hydrogen concentration of 1000ppm and an upper limit of hydrogen concentration of 70-90% is realized. did it. The structural reason is that the gate structure shown in FIG. 1B has a longer platinum grain boundary 77 and a longer air annealing time in order to form a hydrogen corridor 77a in which titanium and oxygen are aggregated. The structure shown in FIG. 1B is realized, and it becomes difficult for hydrogen atoms having a small atomic size to pass through the hydrogen corridor 77a, and the sensing response concentration is greatly shifted to the high concentration side.

  In the hydrogen gas sensor according to the third embodiment, since two types of FETs (sensor FET 60 and reference FET 61) and PN junction diode 62 are integrated on a semiconductor chip, element separation is required to separate these devices. In the third embodiment, the most well-known PN junction isolation technique is used to isolate elements from each other. FIG. 10A shows a cross-sectional structure of the sensor FET 60 formed on the n-type semiconductor substrate, and FIG. 10B shows a cross-sectional structure of the reference FET 61 formed on the n-type semiconductor substrate. It is shown. Of the reference numerals shown in FIGS. 10A to 10B, the same reference numerals as those in FIG. 7A indicate the same components.

As shown in FIG. 10A, in the sensor FET 60, a p-type well 42 that defines a formation region of the sensor FET is formed in an n-type semiconductor substrate 43. The p-type well 42 is composed of, for example, a p-type semiconductor region formed by ion implantation. In this case, in order to fix the potential of the p-type well 42, a p ⁺ -type semiconductor region 441 is formed in the n-type semiconductor substrate 43 by, for example, an ion implantation method. Then, like the source electrode 21 and the drain electrode 22, a p-type well electrode 44 formed of an aluminum film is formed so as to be connected to the p ⁺ -type semiconductor region 41. Similarly, in order to fix the potential of the n-type semiconductor substrate 43, an n ⁺ -type semiconductor region 45 is formed in the semiconductor substrate 43 by, for example, an ion implantation method. Then, the substrate electrode 29 formed of an aluminum film is formed so as to be connected to the n ⁺ type semiconductor region 45.

As shown in FIG. 10B, the reference FET 61 also has a p-type well 42 that defines a reference FET formation region in the n-type semiconductor substrate 43. The p-type well 42 is composed of, for example, a p-type semiconductor region formed by ion implantation. In this case, in order to fix the potential of the p-type well 42, the p ⁺ -type semiconductor region 41 is formed in the n-type semiconductor substrate 43 by, for example, an ion implantation method. Then, like the source electrode 21 and the drain electrode 22, a p-type well electrode 44 formed of an aluminum film is formed so as to be connected to the p ⁺ -type semiconductor region 441. Similarly, in order to fix the potential of the n-type semiconductor substrate 43, an n ⁺ -type semiconductor region 45 is formed in the semiconductor substrate 43a by, for example, an ion implantation method. Then, the substrate electrode 29 formed of an aluminum film is formed so as to be connected to the n ⁺ type semiconductor region 45.

  The difference between the sensor FET 60 and the reference FET 61 configured as described above is that, in the sensor FET 60, the gate electrode 20 is exposed from the insulating film 23, whereas in the reference FET 61, the gate electrode 20 is formed on the insulating film 23. It is a covered point. This difference is because the sensor FET 60 needs to be in contact with hydrogen gas, while the reference FET 61 is configured not to be in contact with hydrogen gas.

  Although a sectional view of a PN junction diode (not shown) is omitted, the junction area is 60 μm × 200 μm. It has been found from the temperature calibration condition that a state in which a current of 10 μA flows at a forward bias rising voltage Vf = 0.3 V, which is a diode characteristic, corresponds to a chip temperature of 100 ° C.

  The wiring of the hydrogen gas sensor according to the third embodiment employs, for example, a Mo / Au / Mo structure. Similarly, the wiring of the heater, the source electrode 21 and the drain electrode 22 also adopt a Mo / Au / Mo structure. On the other hand, the heater wiring, the source electrode 21 and the drain electrode 22 are also manufactured as a prototype using the aluminum wiring used in the first embodiment. In the third embodiment, the reliability test is performed using such two kinds of wiring materials. As a result, in the high-temperature thermal acceleration test and the high-temperature and high-humidity test, the gold wiring has a longer life than the aluminum wiring, but the manufacturing cost is high.

  Here, after forming the gate electrode, a wiring is formed on the insulating film 24, and an insulating film (PSG) film and an insulating film (silicon nitride film) 23 are formed on the entire surface of the semiconductor substrate covering the wiring. Thereafter, in the formation region of the sensor FET 60, the sensor FET 60 is formed by removing the insulating film 23 on the gate electrode 20 (sensor sensitive portion) made of a platinum film. On the other hand, in the formation region of the reference FET, the insulating film 23 on the gate electrode 20 made of a platinum film is left without being removed. With this configuration, both the sensor FET 60 and the reference FET 61 realize substantially the same threshold voltage Vth = 1.02V.

  If only the sensor FET 60 is formed alone, the annealing process in which the annealing temperature is 400 ° C. and the annealing time is 2 to 120 hours in high-purity air may not be performed during the gas sensor manufacturing process. It can also be performed when the gas sensor manufacturing process is completed. By this annealing treatment (heat treatment), the work function of titanium before the heat treatment is the dominant factor of Vth, but the work function of platinum is changed to the dominant factor of Vth. It becomes shallow near 2V.

  However, if the reference FET 61 is also integrated on the semiconductor chip CHP at the same time and the threshold voltage Vth is made uniform with the sensor FET 60, the insulating film 24 and the insulating film 23 that protect the gate electrode 20 of the reference FET 61 do not pass oxygen. As for the threshold voltage Vth of the reference FET 61, the work function of the original titanium remains the dominant factor of the threshold voltage Vth.

(Embodiment 4)
In the first to fourth embodiments, the example applied to the gas sensor of the MOS structure has been described. However, the present invention can also be realized using a MIS type capacitor or a Schottky diode. In particular, in the MIS type capacitor in FIG. 7A described in the first embodiment, the planar shape of the gate electrode 20 is, for example, a circular shape having a diameter of 50 μm to 100 μm, and the source electrode 21 and the drain electrode 22 Can be concentrically enclosed. In this MIS capacitor, for example, a voltage in a flat band state is defined as a threshold voltage Vth, and a gas response can be measured. In the MIS capacitor, the gate electrode 20 functions as an upper electrode, and the semiconductor substrate 28 immediately below the gate electrode functions as a lower electrode. The semiconductor substrate 28 is configured to be electrically connected to the source electrode 21 and the drain electrode 20, so that the extraction electrode of the lower electrode becomes the source electrode 21 and the drain electrode 22.

Further, the gate insulating film 25 between the gate electrode 20 and the semiconductor substrate 28 functions as a capacitive insulating film. According to the MIS type capacitor configured as described above, a channel region formed on the surface of the semiconductor substrate 28 is formed or disappears depending on the presence or absence of ammonia gas, CO gas, methane gas, hydrogen gas, NO gas, or even NO ₂ gas. (Corresponding to the threshold voltage Vth being changed by hydrogen gas). That is, since the electric capacity of the MIS capacitor changes depending on the presence or absence of the channel region formed in the semiconductor substrate 28, the presence of gas can be indirectly detected by detecting the change in electric capacity.

The previous examples (Embodiments 1 to 3) show examples applied to sensors such as ammonia gas, CO gas, methane gas, hydrogen gas, NO gas, and further NO ₂ gas applied to the Si-MOS structure. However, the present invention can also be applied to devices using other semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), and gallium nitride (GaN). For example, such a semiconductor material is used. The present invention can also be applied to MIS type FETs, MIS type capacitors, Schottky gate FETs, and PN junction gate FETs.
(Embodiment 5)
The fifth embodiment relates to a means for solving the seventh problem.
First, means for solving the seventh problem will be described.
The present embodiment is an example of an embodiment related to the reduction in power and the heat insulation characteristics of the sensor region and the peripheral portion in the first and second embodiments.

  Low power consumption of the Si-MOSFET type gas sensor is achieved by reducing the surface area of the heater region to reduce heat dissipation from the surface of the heater region, and making the heat diffusion of the heater region a MEMS structure described below. This can be realized. The basic concept for solving the problem (reduction in power consumption and insulation from the surroundings) according to the fifth embodiment is as follows.

The upper limit of the operating temperature of the Si-MOSFET is about 150 ° C., and the heat insulating property of the peripheral portion is sufficient. The power consumption at the sensor operating temperature of 215 ° C. is the lower limit of the operating temperature of the MOS structure resistance-dominated sensor. Focusing on how much it can be lowered, the gas sensor of Embodiment 1 was applied to a MEMS gas sensor. Since the thermal design is almost the same for the resistance-dominated type, the gas sensor of Embodiment 1 was used instead.
(1) When the entire sensor chip is heated to 100 to 150 ° C., the thermal efficiency is poor and the heat capacity becomes too large. By reducing the heat capacity of the intrinsic FET region to 1/1000 or less of the conventional one, even with a low rate of temperature increase Set it to several tens of milliseconds or less.
(2) In order to reduce the heat outflow from the surface of the heater region into the atmospheric gas, the heater region is formed by inserting the heater wiring into the gap portions between the source electrode, the gate electrode, and the drain electrode and the gate electrode, respectively. The surface area is made small, for example, 300 μm × 300 μm or less.
(3) The thermal resistance of the lead-out wiring from the intrinsic FET region to the pad electrode is increased by only slightly increasing the parasitic resistance of the sensor FET.
(4) In order to prevent heat leakage from the mounting lead wire, the number of mounting lead wires is four, the diameter of the mounting lead wire is 8-25 μm, and the length is about 3-12 mm.
(5) In order to prevent heat outflow through the heat insulating material inserted between the sensor chip and the mounting substrate (stem base), a foam glass heat insulating material having extremely low thermal conductivity is used.
(6) According to the above (1) to (5), in the case of 3V voltage battery operation, a low power consumption gas sensor of about 25 to 0.3 mW is realized.

  In the case of the Si-MISFET type gas sensor, only the portion of the catalytic metal gate that controls the channel of the sensor FET needs to be maintained at a predetermined temperature. Since the temperature of the sensor chip can be measured if the temperature characteristic of the resistance of the heater wiring is known, the resistance value of the heater wiring can be used as a thermometer.

  Therefore, since a PN junction diode for measuring the chip temperature is not necessarily required in the sensor chip, the area of the sensor chip can be reduced by removing the PN junction diode. By making only the sensor FET into a chip, the area of the sensor chip can be reduced and only the catalytic metal gate of the sensor FET needs to be heated, so that the area of the heat source (heater wiring) can be reduced. Thereby, low power can be achieved.

  Furthermore, since the number of mounting lead wires can be reduced to, for example, four, the outflow of heat from the mounting lead wires can be prevented. The temperature of the catalyst metal gate of the sensor FET is only required to be maintained at a predetermined temperature of 150 to 215 ° C., and is lower than the operating temperature of 400 ° C. of a typical gas sensor.

  In consideration of these, in the fifth embodiment, first, an SOI substrate is employed, and the Si substrate of the SOI substrate for the sensor FET is penetrated until reaching the buried insulating layer (MEMS region), and the source electrode and the catalyst metal Bending heater wiring is arranged (heater region) in the gap between the gate and the gap between the drain electrode and the catalytic metal gate. As a result, the heater area is smaller than the heating structure of other heater arrangements that heat the entire sensor FET, so the heat flow from the surface of the heater area to the ambient gas can be reduced, and the heater area The manufacturing process is simplified by disposing a catalytic metal gate on the substrate.

    Hereinafter, the region including the catalytic metal gate, the source electrode, the drain electrode, and the heater region of the sensor FET is referred to as an intrinsic FET region.

  Furthermore, by forming a region in which the intrinsic FET region does not overlap with the MEMS region and increasing the thermal resistance of the insulating thin film that covers this region, the heat of the heater region heated by the heater wiring does not escape to the surroundings (Thermally insulated, heat insulation structure). In addition, a sensor chip is installed on a heat insulating material with high thermal resistance so that the influence of the thermal resistance of the extraction wiring to the mounting lead wire on the electrical resistance of the sensor FET or heater wiring is not increased. The thermal resistance of the mounting lead wire is increased, and the heat diffusion from the heater region to the mounting substrate (stem base) is made into a heat insulating structure. Thereby, a low power consumption sensor of 25 to 0.3 mW is realized.

  Further, a region where the intrinsic FET region does not overlap with the MEMS region is formed, and some through holes are formed in the insulating thin film in order to further increase the thermal resistance of the insulating thin film covering this region. Thereby, the power consumption can be further reduced.

  If the MEMS region becomes too large, the mechanical strength of the MEMS region becomes weak and long-term reliability is lost. Therefore, in addition to the reinforcing region where the insulating thin film is left in the region where the intrinsic FET region and the MEMS region do not overlap, the heater wiring extraction wiring and the sensor FET source electrode, drain electrode, and catalytic metal gate extraction wiring are used. By connecting the intrinsic FET region and the outside of the MEMS region, mechanical strength deterioration of the MEMS region can be prevented.

  Furthermore, the thermal resistance of the region connecting the intrinsic FET region and the outside of the MEMS region (hereinafter referred to as the bridge region) with these lead-out wirings is the heat of the insulating thin film that covers the region where the intrinsic FET region and the MEMS region do not overlap. By making the resistance equal to or less than the resistance, a structure (thermally insulating, heat insulating structure) in which the heat in the heater region does not escape to the surroundings is realized.

  In the fifth embodiment, the closest distance between the intrinsic FET region and the MEMS region is formed to be 1 to 20 times the sum of the widths of all the bridge regions and the widths of all the reinforcing regions.

  The configuration conditions and operation conditions of the sensor chip for realizing the means for solving the problems are summarized below.

The temperature of the stem portion is considered to match the environmental temperature with Te, and the convection effect of air is ignored for heat dissipation from the heater surface. The total thermal resistance Rth of the system is as follows. The thermal resistance due to heat loss from the surface of the heater region to the atmosphere gas is R _A , the thermal resistance path from the heater to the MEMS lower air, the heat insulating material, and the stem (thermal resistance R _D ), and the path from the heater to the edge of the MEMS region (Thermal resistance R _M ), path from the MEMS region edge through the Si substrate to the heat insulating material, stem (thermal resistance Rs) and the path to the Si crystal surface, lead wire, pin electrode, stem (thermal resistance R _L ), It can be roughly divided into three.
Let _RA be the thermal resistance associated with heat loss from the surface of the heater region into the ambient gas. Then, the radius of the circle having the same area as the surface area of the heater area are r _A, the thermal conductivity of air at a temperature of the heater wire and lambda, thermal resistance from the circular heating element of radius r _A 1 / (4πλ · r _A ) can be used to approximate the thermal resistance R _A. Furthermore, the thermal resistance Rs and the thermal resistance R _L also is arranged in parallel, because they are discharged to the thermal resistance R _M series, considered the temperature of the stem portion matches the environmental temperature and Te, the heat dissipation from the heater surface The air convection effect is ignored. The total thermal resistance Rth of the system is the above three parallel circuits,
1 / Rth = 1 / R _D + 1 / R _P + 1 / R _A Formula (2)
R _D = R _D (air) + R _D (heat insulating material) Formula (2-1)
R _P = R _M + R _S · R _L / (R _S + R _L ) Formula (2-2)
R _A = 1 / (4πλr _A ) Formula (2-3)
It is expressed.
R _D (air) is the thermal resistance of the air portion under the MEMS region, and R _D (insulating material) is the thermal resistance of the insulating material under the MEMS region. Rs is a thermal resistance to a stem other than the MEMS region of the silicon chip, and is effectively a thermal resistance of a heat insulating material other than the MEMS region.

Accordingly, the temperature difference between the set temperature Ts of the heater region and the estimated minimum temperature Temin of the gas sensor is ΔTmax (= Ts−Temin), and the electric resistance R (Ts) of the heater wiring at the set temperature Ts and the power supply voltage to be used If the heater maximum power to be input to the heater wiring determined by Vdd is Powmax, the heater maximum power Powmax is 25 mW or less,
Powmax / ΔTmax> 1 / R _D + 1 / R _P + 4πλ · r _A formula (3)
It is necessary to set the thermal resistances R _D and R _P and the surface area of the heater region so as to satisfy the above.

  The assumed minimum temperature Temin of the installation environment of the hydrogen gas sensor is about −65 ° C., and the set temperature Ts of the heater region is, in the case of an operation at 150 ° C. which is the maximum chip temperature in the case of the Si-MISFET type gas sensor, It can be considered that the operating temperature is about 15 ° C. Therefore, in this case, the temperature difference ΔTmax is 215 ° C. (= Ts−Temin).

Furthermore, with such a MEMS structure, the heat capacity of the heater region can be reduced by three orders of magnitude or more, so that the arrival time t0 such as the temperature rising speed and the falling speed can be reduced. Therefore, it is suitable for the intermittent operation of the heater wiring, and the duty ratio (τ ₁ / (τ ₁ + τ ₂ )) can be reduced to, for example, about 1/14 as will be described later, which is more effective than the continuous operation. The power consumption can be reduced by one digit or more. In practice, in the case of combustible gas, the duty ratio is in the range of 1/14 to 1.0.

The heater maximum power Powmax is determined from the power supply voltage Vdd (3 V in the case of a gas sensor operated with two lithium batteries having a current capacity of 2.6 Ah) and the electrical resistance R (Ts) of the heater wiring at the set temperature Ts. Actually, if the electric resistance R (Ts) of the heater wiring is set too large, the maximum heater power Powmax becomes too small, and if the operating temperature of the gas sensor is raised to make the temperature difference ΔT too large, the equation (3 the thermal resistance R _D that _satisfies), realistic combination of the surface area of R _P and the heater region ceases to exist. Therefore, as the heater maximum power Powmax decreases, in the case of a gas sensor, a structure that can realize the temperature difference ΔT = 215 ° C. and the operating chip temperature 150 ° C. becomes much more difficult.

On the other hand, if the heater power Pow is increased, a realistic combination of the thermal resistances R _D and R _P and the surface area of the heater region, which inevitably satisfies the formula (3), exists easily. In this case, since the response speed within 30 seconds is required, the duty ratio is limited. For this reason, the heater power Pow cannot be increased unnecessarily, and the heater maximum power Powmax is 25 mW, which is the upper limit as described below. In the case of the Si-MISFET type gas sensor according to the first embodiment, a response speed close to 1 second is shown in a gas concentration region of 1000 ppm to several percent, so that the lower limit of the duty ratio can be up to about 1/14. The maximum power consumption of continuous operation that can guarantee operation for one year with two lithium batteries is 1.78 mW, so it is 25 mW x 1 / 14≈1.78 mW. The upper limit of power is about 25 mW. Therefore, the maximum power consumption that can achieve both the battery capacity and the safety of flammable gas detection is about 25 mW.

The actual structure, there is thermal resistance R _M of the heat flow through the bridge region that connects the outer intrinsic FET region and the MEMS region. When the thermal resistance R _M is reduced spreads the effective heater area, the heat resistance 1 / (4πλ · r _A) is reduced, not satisfy Expression (3). That is, even if electric power is supplied to the heater wiring, the chip temperature does not reach the set temperature Ts. However, the thermal resistance R _M of the intrinsic FET region and the MEMS area edge or if the temperature difference between the pad electrode Torere than about 50% of the temperature difference .DELTA.Tmax, the thermal diffusion to the periphery of the thin film or substrate from the heater region, Can be prevented.

Since the degree of freedom of configuration is high with respect to the thermal resistances R _D , R _L , and r _A , a hydrogen gas sensor structure that satisfies Equation (3) can be realized in the region of 25 to 0.3 mW.

  By the way, if the power consumption is reduced while the temperature of the catalytic metal gate used in the Si-MISFET type combustible gas sensor is fixed at, for example, 150 ° C., it is necessary to reduce the sectional area of the heater wiring and increase the heater resistance. . However, if the current density flowing through the heater wiring is too high, problems such as wire breakage are caused, and the cross-sectional area of the heater wiring cannot be reduced unnecessarily. Therefore, WSi, W, polysilicon (polycrystalline silicon) or the like having high resistivity is used instead of the heater wiring made of Al or Au having low resistivity. As a result, the cross-sectional area of the heater wiring can be maintained to such an extent that the current density problem can be avoided, and the length of the heater wiring can be further reduced. As a result, the surface area of the heater region is reduced, resulting in further lower consumption. It leads to electric power.

  In the fifth embodiment, a case where the sensor FET is applied to an n-channel MISFET will be described. The gate structure of the sensor FET is the same as that of the first embodiment in terms of gate length, gate width, and planar shape.

  Next, the structure of the Si-MISFET type gas sensor according to the first embodiment to which the configuration conditions and operation conditions of the sensor chip for realizing the means for solving the above-described problems are applied will be described in detail.

First, a sensor chip will be described with reference to FIGS. 11A and 11B, and FIGS. 11C and 11D. FIG. 11A shows the main part of the sensor FET formed on the SOI substrate, the heater wiring, the extraction wiring, and the like. FIG. 11B shows the main part of the sensor chip formed on the SOI substrate, the heater wiring, the extraction wiring, the pad electrode, and the like. As shown in FIG. 11A, on the Si substrate 43a, a buried insulating layer (SiO ₂ layer) 123, a channel layer (Si layer) 128, n ⁺ Si layers 27S and 27D, a gate insulating film (SiO ₂ film) 25, A gate electrode (catalytic metal gate) 20, a source electrode 21, a drain electrode 22, and the like are formed. The gate length of the gate electrode 20 is, for example, 5 μm, and the gate width is, for example, 20 μm. The thickness of the channel layer 128 is, for example, 0.1 to 5 μm, and a typical thickness is 0.2 μm. The thickness of the buried insulating layer 123 is, for example, in the range of 0.1 to 5 μm, and a typical thickness can be 3 μm. The thickness of the Si substrate 43a is, for example, 200 to 750 μm, and a typical thickness is 500 μm.

  In addition, since the thermal conductivity λ of the Si crystal is lowered by doping, a p-type Si substrate in which a high-concentration p-type impurity is added to the Si substrate 43a is used when heat insulation is desired as in the fifth embodiment. . As a result, the thermal conductivity λ is reduced to about 1/3 that of the Si crystal to which no impurity is added, so that the heat insulation characteristics are improved. In the fifth embodiment, a p-type Si substrate in which B (boron) is added to the Si substrate 43a is used. However, a high concentration SOI substrate can also be used.

In the fifth embodiment, the n ⁺ Si layers 27S and 27D are formed by an ion implantation method, and then a thermal annealing process for activation is performed. A local oxide film (SiO _{2) is formed} by the proliferation oxidation during the thermal annealing process. Film) 40 is formed. Local oxidation film 40 ⁿ + Si layer 27S under, after forming the 27D, source electrode 21 of the sensor FET, the drain electrode 22, an intrinsic FET region 35 other than the region where the main part of the gate 20 is formed ^{n +} The Si layers 27S and 27D and the channel layer 128 are selectively removed. The purpose of this is that the channel layer 128 has a thermal conductivity that is about two orders of magnitude higher than that of SiO _2. Therefore, if the area of the channel layer 128 is large, the amount of heat flowing into the intrinsic FET region 35 heated by the heater wiring 32 escapes to the surroundings. This is because the intrinsic FET region 35 is efficiently insulated. For example, the thermal conductivity λ of an undoped single crystal Si substrate is 148 W / (m · ° C.), the thermal conductivity λ of SiO ₂ is 1.4 W / (m · ° C.), and the thermal conductivity λ of Si ₃ N ₄ is 25 W / (M · ° C.). The thermal conductivity λ of Si ₃ N ₄ varies in the range of 0.9 to 40 W / (m · ° C.) depending on the fabrication conditions, but the thermal conductivity of the Si ₃ N ₄ film is designed by changing the film thickness. be able to.

  As shown in FIGS. 11A and 11B, the gate region 125 has a rectangular shape surrounded by a local oxide film 40 and a PSG (phosphorus doped glass) protective film 129, and a channel is formed in the gate region 125 via the gate insulating film 25. Layer 128 is formed. The gate 20 is formed by a lift-off method so that a Ti film (for example, a thickness of 10 nm) and a Pt film (for example, a thickness of 5 nm) are sequentially formed by an electron beam evaporation method and ride on the edge of the local oxide film 40. At this time, an air annealing process is performed at 550 ° C. for 1 hour. The width of the gate 20 is designed to be 3 μm wider than the gate length, for example, 8 μm.

Except for the gate region 25, a PSG protective film 129 for gate protection is formed on the n ⁺ Si layers 27S and 27D and the local oxide film 40 by a thermal CVD (Chemical Vapor Deposition) method. Further, a heater wiring 32 made of WSi is formed on the PSG protective film 129. The thickness of the PSG protective film 129 is, for example, 300 nm. The thickness of the heater wiring 32 is, for example, 300 nm, the line width is, for example, 1 μm, and the resistivity at 150 ° C. is, for example, 300 μΩcm. Between the gate 20 and the source electrode 21, for example, four heater wirings 32 are formed at intervals of 1 μm with a length of 30 μm as a unit, and the heater wiring is similarly formed between the gate electrode 20 and the drain electrode 22. 32 is formed. In this case, the total length of the heater wiring 32 is about 250 μm. The resistance of the heater wiring 32 is 1.5 kΩ at 150 ° C., for example.

A PSG protective film 130 is formed on the heater wiring 32 by a thermal CVD method. The thickness of the PSG protective film 130 is, for example, 300 nm. Further, the PSG protective film 130 has contact holes (for example, 3 μm square) 44H and 44S for connecting to the heater wiring 32, and contact holes (for example, 3 μm square) 44G for connecting to the gate electrode 20. The PSG protective films 129 and 130 are formed with contact holes 37 for connection to the n ⁺ Si layers 27S and 27D.

Further, an extraction wiring 20H connected to one end of the heater wiring 32 through the contact hole 44H is formed, and an extraction wiring 20S connected to the other end of the heater wiring 32 through the contact hole 44S is formed. An extraction wiring 20G connected to the gate electrode 20 is formed. Then, the source electrode 21 connected to the n ⁺ Si layer 27S and the extraction wiring 20S of the same layer are formed, and the drain electrode 22 connected to the n ⁺ Si layer 27D and the extraction wiring 20D of the same layer are formed. Yes. The extraction wirings 20S, 20D, 20G, and 20H are made of, for example, Al formed by sputtering, and the thickness thereof is, for example, 500 nm. The lead-out wiring 20S is electrically connected to the other end of the heater wiring 32 through the contact hole 44S and the source electrode 31S through the contact hole 37. The extraction wirings 20S, 20D, 20G, and 20H are connected to pad electrodes 140, 41, 42, and 43 formed around the sensor chip 45S, respectively.

Furthermore, a final protective film 33 is formed on the extraction wirings 20S, 20D, 20G, 20H, the source electrode 21, the drain region 22, and the like. The final protective film 33 is made of a laminated film having a PSG film as a lower layer and an Si ₃ N ₄ film as an upper layer, for example. The lower PSG film is formed by, for example, a thermal CVD method, and the thickness thereof is, for example, 200 nm. The upper Si ₃ N ₄ film is formed by, for example, a low-temperature plasma CVD method, and the thickness thereof is, for example, 1 μm. is there.

  The heater region 10 (planar dimension is, for example, 30 μm × 24 μm) in which the main portion of the heater wiring 32 is formed, and the intrinsic FET region 35 in which the main portions of the source electrode 21, the drain electrode 22 and the gate 20 of the sensor FET are formed. In a MEMS region 34 (planar dimension is, for example, 44 μm × 44 μm) (planar dimension is, for example, 200 μm × 200 μm), the Si substrate 43 a is penetrated until reaching the buried insulating layer 123. This structure is formed by a method in which anisotropic dry etching and wet etching with a KOH solution are combined. The threshold voltage of the sensor FET is designed to be 1 V, for example. The threshold voltage of the sensor FET is defined by the gate voltage Vg at which the source-drain current Ids = 5 μA in the range of the drain voltage Vds = 1.5-3V.

  Next, a structure in which the heat of the heater region 100 according to the first embodiment is adiabatically confined in the MEMS region 34 will be described.

In the case of the Si-MOS type gas sensor, the operation at 150 ° C. is the upper limit, and the setting temperature (standard operating temperature) Ts of the heater region 100 is 150 ° C. in consideration of the margin, the environment where the combustible gas sensor is installed. The lower the temperature Te, the greater the amount of heat generated by heating the combustible gas sensor (heater power Pow). Under the heater wiring 32 in the intrinsic FET region 35, there are a channel layer 128 and n ⁺ Si layers 27 ^</ b ^> S and 27 ^</ b ^> D made of Si having good thermal conductivity, which has an effect of increasing temperature uniformity due to heat generated by the heater wiring 32.

In the fifth embodiment, the heater region 100 is disposed with the gate 20 in between, and the heater region 100 is extremely small. Therefore, it can be considered that the temperature of the heater region 100 and the temperature of the gate 20 are substantially equal. When considering the thermal diffusion to the environment where the heater region 100 and the combustible gas sensor are installed, assuming that the thermal resistance between them is Rth, the temperature of the heater region becomes T at the environmental temperature Te and the heater power Pow. The temperature difference ΔT (= T−Te) of
ΔT = Rth × Pow Formula (4)
It becomes.

  Assuming that −35 ° C. is the average temperature of the environment in which the environment temperature Te is set as an average, in the case of 150 ° C. operation, the temperature difference ΔT is 185 ° C. In the first embodiment, the heater resistance at an operating temperature of 150 ° C. is 1.5 kΩ, the heater maximum power Powmax is 6 mW, and the temperature difference ΔTmax is 215 ° C. when 3V battery operation is considered.

  In general, the highest temperature difference ΔT is about 185 ° C., and in the case of continuous energization, the heater power Pow is 5.16 mW. Considering heater control by intermittent operation, two lithium batteries can be operated continuously for more than one year. Is possible. The heat capacity of the MEMS region 34 is, for example, 1 of the heat capacity (about 270 μW sec / ° C.) of the Si-MISFET type gas sensor in the 2 mm square sensor chip (0.4 mm thickness of the Si substrate) described in Non-Patent Document 2 described above. When the chip temperature is raised from the environmental temperature Te when the power of 5.16 mW is applied to 150 ° C., the arrival time t0 can be shortened to about 2.0 msec. . Therefore, the duty ratio can be reduced to 1/5 by intermittent operation in which the heater wiring 32 is turned on (heated) for 6 seconds and the heater wiring 32 is turned off (heating stopped) for 24 seconds, and the detection capability of the combustible gas sensor is reliable. The power consumption of an effective combustible gas sensor can be reduced to about 1 mW without degrading the performance. As a result, it is possible to operate for about one year with two 3V lithium batteries.

  The lead wires 20S, 20D, 20G, and 20H are formed of an Al film, and the thermal conductivity λ of the Al film is 237 W / (m · ° C.) as a metal, but 180 W / in the case of a thin film. (M · ° C.) The thermal conductivity λ of the WSi film is about 90 W / (m · ° C.), and both become main heat flow paths from the heater region 100. Therefore, the device described below is necessary.

In the fifth embodiment, the PSG protective films 129 and 130 and the protective film 33 are partially formed in a region where the intrinsic FET region 35 and the MEMS region 34 do not overlap for the purpose of better insulating heat generated in the heater region 100. The sensor chip 45S has a structure in which the heat insulating property is dominated by air having excellent heat resistance at each stage by removing and arranging a plurality of through holes 36 through which the buried insulating layer 123 passes. The relative distance between the intrinsic FET region 35 and the MEMS region 34 is 78 μm, the air under the MEMS region 34 is air, and the thermal conductivity λ of air at 115 ° C. is as extremely low as 0.03227 W / (m · ° C.). Therefore, the heat insulating property of this structure is much better. However, if the through hole 36 is too large, the mechanical strength of the MEMS region 34 deteriorates. On the other hand, the protective film 33 made of the Si ₃ N ₄ film is necessary for protecting the heater wiring 32 and the extraction wirings 20S, 20D, 20G, and 20H, but has a thermal conductivity that is about one digit higher than that of SiO ₂ . When the power consumption decreases, the heat insulation characteristics of the bridge region where the lead wirings 20S, 20D, 20G, and 20H are formed cannot be ignored.

  In consideration of these points, the heat insulation method will be described with reference to a plan view and a cross-sectional view shown in FIGS. 11C and 11D, respectively. FIG. 11C is an enlarged view of a peripheral portion of the bridge region 90 of FIG. 11B. The length of the bridge region 90 is 78 μm, for example. The line width of the lead-out wiring 20Z in the bridge region 90 is 2 μm, for example, the line width of the protective film 33S is 3 μm, for example, and the line width of the laminated film 93 of the PSG protective films 129 and 130 is 6 μm, for example. In the peripheral portion of the intrinsic FET region 35, the relative distance between the extraction wiring 20ZS and the protective film 33SS is, for example, 3 μm, and the relative distance between the protective film 33SS and the stacked film 93SS of the PSG protective films 129, 130 is, for example, 3 μm. . In this structure, the bridge region 90G of the extraction wiring 20G connected to the gate electrode 20, the bridge region 90H of the extraction wiring 20H connected to one end of the heater wiring 32, the bridge connected to the extraction wiring 20S connected to the other end of the source electrode 31S and the heater wiring 32. The region 90S has the same structure. In order to reinforce the MEMS region 34, the width of the reinforcing region 91 in which the laminated film of the PSG protective films 129 and 130 is formed is also 6 μm, for example. When the distance between the edge of the MEMS region in the region where the through hole 36 is formed and the edge of the FET region is defined as the length of the bridge region 90, the length of the bridge region 90 is 78 μm in the fifth embodiment. Since it is the closest distance to the edge, it is about 2.2 times the total 36 μm (6 μm × 6) of the width of all the bridge regions 90, 90 S, 90 G, 90 H and the width of all the reinforcing regions 91, It is usually formed from 1 to 20 times.

In the bridge regions 90, 90S, 90G, and 90H, the thickness of the Si ₃ N ₄ film constituting the protective film 33 is, for example, 1 μm, and when PSG is regarded as SiO ₂ , the thickness of the PSG protective films 129 and 130 is SiO _2. 3.8 μm is formed in terms of conversion. Thermal conductivity of SiO ₂ is 1.4 W / (m · ° C.), Thermal conductivity of Si ₃ N ₄ is 25 W / (m · ° C.), Thermal conductivity of Al thin film is 180 W / (m · ° C.), Heat of WSi thin film Considering the conductivity of 90 W / (m · ° C.), the thermal resistance of the bridge region 90 is 9.1 × 10 ⁴ ° C./W at the three bridge portions related to the extraction wirings 20S, 20D, and 20G, and the extraction wiring 20H One bridge portion involved is 39.65 × 10 ⁴ ° C./W, and two bridge portions associated with the reinforcing region 91 are 12.22 × 10 ⁴ ° C./W. The three heat resistance leads to parallel, the thermal resistance _{R M} from the heater region 100 to MEMS region becomes 4.61 × 10 ⁴ ℃ / W. In this case, heat conduction through the through hole 36 can be ignored.

In addition, the thermal resistance from the MEMS region 34 to the surface of the heat insulating material (reference numeral 50 in FIG. 12A described later) sandwiched between the sensor chip and the stem pedestal through the hollow region of the MEMS region 34 is the heat conduction of air. degrees 0.03227W / (m · ℃) from estimable and 7.75 × 10 ⁵ ℃ / W, but an order of magnitude or more compared to the thermal resistance _{R M} of the heater region 100 increases, negligible. That is, when 5 mW of power is applied to the heater region 100, the temperature difference between the bridge region and the heater region 100 is 230.5 ° C. (= 4.61 × 104 ° C./W×5 mW). You can expect.

On the other hand, since the Si ₃ N ₄ film constituting the protective film 33 has a thermal conductivity that is an order of magnitude higher than that of SiO ₂ , on the region where the intrinsic FET region 35 and the extraction wirings 20S, 20D, 20G, 20H are formed, and It is removed leaving the peripheral area of the bridge area described above. Further, a part of the extraction wiring indicated by hatching in the extraction wirings 20S, 20D, 20G, and 20H keeps the influence of the electrical resistance of the extraction wiring on the sensor FET small and increases the thermal resistance. Therefore, for example, by incorporating a zigzag structure (not shown in FIG. 11B), the width is designed to be 10 μm and the length is designed to be 700 μm, for example. At this time, the thermal resistance of the entire extraction wiring is about 1.94 × 10 ⁵ ° C./W, but heat conduction occurs through the Si substrate 22 having high thermal conductivity except in the MEMS region 34. The contribution to the thermal resistance _RL is small.

  Next, a structure in which the heat of the heater region 100 according to the fifth embodiment is insulated from the mounting substrate by the heat insulating material of the sensor chip will be described. FIG. 12 is a diagram illustrating a basic configuration of a combustible gas sensor in which the sensor chip according to the fifth embodiment is mounted on a stem having four lead terminals. 12 (a), (b), and (c) are cross-sectional views of a combustible gas sensor mounted with a sensor chip, a bottom view of a stem base when the combustible gas sensor is viewed from the back, and a sensor chip mounted, respectively. It is a top view of a stem base. Since the mounting shown in the fifth embodiment is a simple explosion-proof mounting, it is desirable to construct the mounting portion using a commercially available product.

In the mounting shown in the fifth embodiment, for example, the PEEK material (polyether / ether / ketone material) 57 having a thickness of 3 mm is caulked from the inside. The welding of the Kovar cap 56 and the stem pedestal 54 is performed by resistance welding. As the waterproof and moisture-permeable material 58 used in the combustible gas sensor of the first embodiment, Gore-Tex (registered trademark) made by combining a film obtained by stretching polytetrafluoroethylene, which is a typical fluororesin, and a polyurethane polymer. ) A membrane is used. The waterproof and moisture-permeable material 58 is characterized in that it allows water vapor to pass through but does not allow water to pass through (both waterproof and moisture-permeable). An example of a Gore-Tex membrane contains 1.4 billion fine holes per cm ² . Although the diameter of the intake hole 160 is in the range of about 0.5 to 2 mm, no significant change was seen in the hydrogen response. The hole diameter and thickness of the waterproof and moisture-permeable material 58 were also compared in the range performance of 1 to 3 μm and 0.3 to 1 mm, respectively, but no particular change was observed.

  Foam glass (thermal conductivity 0.061 W / (m · ° C.)) is used as the heat insulating material 50 formed on the 4-pin Kovar stem pedestal (pedestal inner diameter 4.22φ) 51. It is processed into a rectangular parallelepiped shape of 6 mm × 0.6 mm and 3 mm in height, and is adhered to the stem base 51. The thickness of the sensor chip 8 is, for example, 500 μm, and the planar dimension of the sensor chip 8 is, for example, 0.55 mm × 0.55 mm. The height of the cap 56 is, for example, 12 mm, and the diameter of the intake hole 80 is, for example, 1.5 mm. The hole diameter of the waterproof and moisture-permeable material 58 is, for example, 1.0 μm, and the thickness thereof is, for example, 0.3 mm. The stem pedestal 51 is provided with four lead terminals 55 that penetrate the stem pedestal 51 and protrude from the front surface and the back surface of the stem pedestal 51. The lead terminals 55 are made of a glass material provided on the outer periphery of the lead terminal 55. 161 is fixed to the stem base 51. In FIG. 12A, the dimension indicated by reference numeral 59 is the cap size.

The lead wire (wire bonding) 81 is a gold wire, and the diameter thereof is, for example, 8 to 25 μm, and the length is 3 to 12 mm. Typically, for example, a lead wire of 8 μφ gold wire 6 mm is used, and the four pad electrodes 140, 41, 42, 43 shown in FIG. 11B and the four lead terminals 55 are connected by the lead wires 81, respectively. ing. The total thermal resistance _RL of the four lead wires 168 is, for example, about 9.41 × 10 ⁴ ° C./W. In this case, since the thermal resistance from the heater region 100 to the pad electrodes 140, 41, 42, 43 is not included, 9.41 × 10 ⁴ ° C./W is considered to be the minimum value of the thermal resistance _RL . The thermal resistance _RD in the MEMS region of the heat insulating material 50 is 4.25 × 10 ⁵ ° C./W. Moreover, in heat resistance _RS other than the MEMS area | region of the heat insulating material 50, it is 0.375 * 10 < ⁵ > degreeC / W.

Since the area of the heater region 100 is, for example, 30 μm × 24 μm, the radius r _A of the circle of this area is 15.1 μm, and the thermal conductivity of air λ (0.03227 W / (m · ° C.) at 150 ° C. Using 4πλr _A is 0.613 × 10 ⁻⁵ W / ° C.

  Next, the physical meanings of the above-described equations (2) and (3) will be described with reference to FIG. 13A. FIG. 13A is a graph illustrating the relationship between the temperature difference ΔT (= T−Te) between the operating temperature T of the gas sensor and the ambient temperature Te where the gas sensor is installed, and the heater power Pow administered to the heater wiring. Let Powmax be the maximum heater power input to the heater wiring determined by the electrical resistance R (Ts) of the heater wiring at the set temperature Ts and the power supply voltage Vdd to be used.

  In the case of the fifth embodiment, since Ts = 150 ° C., R (Ts) = 1.5 kΩ, and Vdd = 3 V, the heater maximum power Powmax is 6 mW. On the other hand, the temperature difference ΔTmax (= Ts−Temin) between the set temperature Ts of the heater region and the assumed environmental minimum temperature Temin in which the combustible gas sensor is installed is Temin = −65 ° C. and Ts = 150 ° C. Become. The relationship between the temperature difference ΔT with the inclination of the thermal resistance ΔTmax / Powmax and the heater power Pow is indicated by a dotted line in FIG. 13A.

The relationship between the temperature difference ΔT of the gas sensor according to the fifth embodiment and the heater power Pow is indicated by a straight line with a solid line in FIG. 13A. This thermal resistance Rth is higher than the thermal resistance ΔTmax / Powmax,
Rth> ΔTmax / Powmax Formula (5)
There is a relationship. In this case, within the range of the temperature difference ΔTmax = 215 ° C. at the lowest ambient temperature −65 ° C. of the assumed external environment temperature and the temperature difference ΔT = 45 ° C. at the maximum environment temperature 105 ° C., the heater power is always less than the maximum power Powmax. It shows that the gas sensor can be operated with power consumption of. In the case of a normal environmental temperature of 25 ° C. (in the case of a temperature difference ΔT = 125 ° C.), power consumption of 0.58 is sufficient compared to the case of the temperature difference ΔTmax = 215 ° C., and Rth = ΔTmax / It can be seen that power consumption of 3.5 mW is sufficient even with Powmax.

  That is, when Expression (5) is satisfied, FIG. 13A shows that a temperature difference ΔT in a desired range can be realized with power consumption equal to or less than the heater maximum power Powmax. The necessary condition for satisfying the equation (5) is the above-described equation (3), the right side of the equation (3) is a measurable amount, and the left side is an amount determined from the operation specifications of the gas sensor.

  In the case of operation at a sensor temperature of 150 ° C., which is a condition used in the fifth embodiment, heat is applied in the range of a temperature difference ΔTmax = 215 ° C. at the lowest environmental temperature −65 ° C. and a temperature difference ΔT = 45 ° C. at the highest environmental temperature 105 ° C. In the case of the fifth embodiment, the heater power Pow (185) corresponding to the temperature difference ΔT = 185 ° C. determined from the resistance ΔTmax / Powmax is 5.16 mW.

As described above, in the gas sensor exemplified in the fifth embodiment, 1 / R _D = 0.235 × 10 ⁻⁵ W / ° C., 1 / R _P = 0.137 × 10 ⁻⁵ W / ° C., 4πλr _A = 0. Since it is 613 × 10 ⁻⁵ W / ° C., Powmax / ΔTmax on the left side of Equation (3) is 3.333 × 10 ⁻⁵ W / ° C., which satisfies Equation (3).

  In other words, with such a MEMS structure, when operated at 150 ° C. in an environment of −35 ° C., heat insulation can be secured, and power consumption is about 5.18 mW, before the MEMS structure is applied. Compared to, we achieved a power reduction of 1/100 or less, and achieved a low power that cannot be achieved with a bulk sensor or thick film sensor with continuous energization. FIG. 13B is a graph illustrating the relationship between the resistance of the heater wiring and the power consumption when the gas sensor thus mounted is operated at 215 ° C. in an environment of an external temperature of −35 ° C. and the heater wiring is energized. Shown in The resistance of the heater wiring is 1.7 kΩ and the power consumption is about 7 mW. Also in this case, the temperature difference between the heater region and the end of the MEMS region is about 120 ° C., and the ambient Si temperature is about 95 ° C. at the maximum, so that sufficient heat insulation characteristics are obtained. In the present embodiment, the case where the gas sensor of the first embodiment is developed in the MEMS region has been described, but it is needless to say that the gas sensor of the second embodiment can be similarly deployed in the MEMS region.

As described above, the present invention has been described using the first to fifth embodiments. The effects of the present invention are summarized as follows.
(1) A nanocomposite thin film characterized in that a metal compound (nanocompound) is formed in the ultrathin platinum grain boundary nanospace is applied to the sensitive film of the gas sensor. By changing the occupation ratio and formation conditions, we were able to provide a gas sensor that can respond to various gas sensing. In particular, we were able to provide an ultra-thin gas sensor with high long-term reliability and a method for manufacturing it.
(2) By providing a nanocomposite thin film that can control the occupancy ratio of ultra-thin platinum particles and nano-metallic compounds, the adsorbed gas molecules adhere to the electric capacity between ultra-thin platinum particles and nano-metallic compounds. An ultra-thin gas sensor that realizes reading out the accumulated charge amount with a voltage signal and a method for manufacturing the same are provided.
(3) By increasing the occupation ratio of the nanometal compound compared to the ultrathin platinum particles, or by providing a nanocomposite thin film having a nanometal compound in which conductive carriers exist, the adsorbed gas molecules are covered with the nanometal compound. The present invention provides an ultra-thin gas sensor that realizes reading out a current change, a voltage change, or a resistance change caused by changing the electrical resistance of a nanocomposite thin film, and a method for manufacturing the same.
(4) This time, by forming the base film of the nanocomposite thin film with a thin film containing a metal compound forming the nanocomposite thin film, it was possible to provide a long-term highly reliable ultra-thin gas sensor and a method for manufacturing the same.
(5) In a Pt—Ti—O gate structure, a hydrogen sensor that operates up to several ppm at several hundred pp or less, a hydrogen sensor that operates in a concentration region of several percent to several tens percent, and a manufacturing method thereof can be provided.
(6) A gas sensor in which the nanocomposite thin film and the base film are formed on a semiconductor substrate such as silicon, SiC, GaN, or GaAs, or a glass substrate, and a manufacturing method thereof can be provided.
(7) In the sensor structure that realizes the above object, by applying the MEMS structure, the heat insulation structure that can reduce the power to about 1/100 or less and the temperature of the sensor substrate other than the sensor part to 125 ° C. or less compared to before application. Was able to provide.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say. The metal compounds formed at the catalyst metal grain boundaries such as Pt have different formation conditions, but a gas sensor group can be similarly produced using nitrides.

  The present invention can be widely used in manufacturing industries that manufacture gas sensors formed using semiconductor materials.

1: adsorption polarized molecules,
2: Ti mixed layer or Sn mixed layer,
2a: Titanium oxide microcrystal or tin oxide microcrystal,
2b: oxygen-doped titanium film or oxygen-doped tin film,
2c: Titanium oxide microcrystal or tin oxide microcrystal,
3, 3a: Platinum microcrystal,
4: Silicon oxide film,
5, 5a, 28: Si semiconductor substrate,
6,6a, 14: air hollow depletion layer,
7: Metal compound (TiO _X , SnO _X etc.) nanostructure,
7a: gap between platinum grains,
77: Grain boundary,
77a: near grain boundary region,
8: Sensor chip,
88: Titanium oxide film,
9: Platinum particles overlap,
10, 10a, 16, 16a: reducing gas atmosphere hollow depletion layer,
11: Average distance between platinum grains,
12: Specific gate position display,
13: Fermi level
15, 15a: oxidizing gas atmosphere hollow depletion layer,
16: Intake hole,
19: channel region,
20: gate electrode,
20a: laminated film,
20b: thin film,
20Z: Bridge area extraction wiring,
20ZS: extraction wiring,
21, 21a: source electrode,
21a, 22a, 20D, 20G, 20H, 20S: extraction wiring,
22, 22a: drain electrode,
23: SiN / PSG insulating film,
24: PSG insulating film,
25: Gate insulating film (SiO ₂ layer),
26: Local separation region,
26a: local separation region,
27: Source region
27a: drain region,
27S, 27D: n ⁺ Si layer,
28: Semiconductor substrate 29: Substrate electrode,
31S: source electrode,
32: Heater wiring,
33, 33S, 33SS: protective film,
34: MEMS region,
35: Intrinsic FET region
36: through hole,
37: contact hole,
40: Local separation region,
41, 42, 43: pad electrodes,
42: p-type well,
43, 43a: n-type Si semiconductor substrate,
44: p-type well electrode,
44G, 44H, 44S: contact holes,
45S: sensor chip,
45: n ⁺ type semiconductor region,
46: Wiring,
50: heat insulating material,
51: Stem base,
54: Stem pedestal collar,
55: Lead terminal,
56: Cap,
57: PEEK material,
58: Waterproof and breathable material,
59: Cap size,
60: Sensor FET,
61: Reference FET,
63: heater,
62: PN junction diode
70: Si ₃ N ₄ film,
80: intake hole,
81: lead wire,
90, 90S, 90G, 90H, 95, 96: Bridge region,
91: reinforcement region,
93, 93SS: laminated film,
100: sensor area,
123: buried insulating layer (SiO ₂ layer),
125: gate region;
128: channel layer (Si layer),
129, 130: PSG protective film,
140: pad electrode,
161: glass material,
221: molybdenum silicide film,
440: Local oxide film (SiO ₂ film),
441: p ⁺ type semiconductor region,
CHP: Semiconductor chip,
Vth: threshold voltage,
ΔVg: hydrogen response intensity,
Vgs: gate voltage,
Id: source drain current.

Claims (21)

(A) a gate insulating film provided on the substrate;
(B) a gate electrode provided on the gate insulating film;
A gas sensor that detects an electrical change caused by a gas molecule to be detected adsorbed on the gate electrode through the gate insulating film,
The gate electrode is
(B1) a metal oxide mixed film in which an oxygen-doped amorphous metal containing oxygen and an oxide crystal of the metal are mixed;
(B2) a platinum film provided on the metal oxide mixed film,
The platinum film is composed of a plurality of platinum crystal grains and a grain boundary region existing between the platinum crystal grains,
The gas sensor is characterized in that the grain boundary region is filled with the metal oxide mixture, and the platinum crystal grains are surrounded by the metal oxide mixture. The gas sensor according to claim 1,
The substrate is a semiconductor substrate;
A source region provided on the semiconductor substrate so that one end of the gate electrode and one end of the gate electrode overlap;
A gas sensor, comprising: a drain region provided on the semiconductor substrate so that the other end of the gate electrode and the other end overlap each other. The gas sensor according to claim 1,
A gas sensor comprising two or more electrode terminals for measuring an electric resistance of the gate electrode on the gate electrode. The gas sensor according to claim 1,
In (b2), instead of the platinum film, any one of iridium (Ir), ruthenium (Ru), and lanthanum (La), or an alloy of these metals and Pt is used as the metal film. Gas sensor. (A) a lower electrode made of a semiconductor substrate;
(B) a capacitive insulating film formed on the lower electrode;
(C) an upper electrode formed on the capacitive insulating film;
A gas sensor including a capacitive element that detects an electrical change caused by a gas molecule to be detected adsorbed on the gate electrode through the gate insulating film;
The upper electrode is
(C1) a metal oxide mixed film in which an oxygen-doped amorphous metal containing oxygen and an oxide crystal of the metal are mixed;
(C2) a platinum film provided on the metal oxide mixed film,
The platinum film is composed of a plurality of platinum crystal grains and a grain boundary region existing between the platinum crystal grains,
The gas sensor is characterized in that the grain boundary region is filled with the metal oxide mixture, and the platinum crystal grains are surrounded by the metal oxide mixture. The gas sensor according to claim 5, wherein
In (c2), any one of iridium (Ir), ruthenium (Ru), and lanthanum (La), or an alloy of these metals and Pt is used as a metal film instead of the platinum film. Gas sensor. The gas sensor according to any one of claims 1 to 6,
The gas sensor characterized in that the metal oxide mixed film is a titanium oxide mixed film in which oxygen-doped titanium or oxygen-doped amorphous titanium and amorphous titanium oxide or titanium oxide microcrystals are mixed. . The gas sensor according to any one of claims 1 to 6,
The gas sensor, wherein the metal oxide mixed film is a tin oxide mixed film in which oxygen-doped tin or oxygen-doped amorphous tin is mixed with amorphous tin oxide or tin oxide microcrystals. The gas sensor according to any one of claims 1 to 6,
The amount of oxygen doping oxygen-doped amorphous metal, a gas sensor characterized in that is less than the solubility limit at 10 ²¹ / cm ³ or more. The gas sensor according to any one of claims 1 to 6,
The gas sensor according to claim 1, wherein an average intergranular distance of the platinum crystal grains is in a range of 1 nm to 10 nm. The gas sensor according to any one of claims 1 to 6,
The gas sensor, wherein an average distance between the platinum crystal grains is several nm or more, or a conductive carrier is present in the metal oxide mixed film. The gas sensor according to claim 7,
The platinum film has a thickness of 30 nm to 50 nm,
The gas sensor according to claim 1, wherein the oxygen-doped titanium film has a thickness of 1 nm to 10 nm. The gas sensor according to any one of claims 1 to 6,
The metal is indium (In), iron (Fe), cobalt (Co), tungsten (W), molybdenum (Mo) film, tantalum (Ta) film, niobium (Nb) film, chromium (Cr), nickel (Ni The gas sensor is formed of any one of the above. The gas sensor according to any one of claims 1 to 6,
A gas sensor, further comprising a heater for heating the gas sensor on the semiconductor substrate. The gas sensor according to claim 14, wherein
An extraction electrode connected to the source region or the drain region;
The extraction electrode is formed from a laminated film laminated in the order of gold film / molybdenum film from the upper layer,
Further, the heater for heating the gas sensor is formed of a laminated film of molybdenum film / gold film / molybdenum film. A gas sensor comprising: a sensor chip having a MOS structure gas sensor and a heater formed on a main surface of the substrate; a mounting substrate on which the sensor chip is mounted; and a heat insulating material inserted between the sensor chip and the mounting substrate. ,
The sensor chip includes a MEMS region formed by cutting through the back side of the substrate;
A heater region in which the heater formed on the substrate surface side on the MEMS region is formed;
A pad electrode formed on the surface of the substrate and connected to the heater via a lead wiring;
The mounting substrate is a lead terminal used for connection to the outside through the mounting substrate;
A lead wire connecting the pad electrode and the lead terminal;
The thermal resistance from the heater region through the cavity of the MEMS region to the mounting substrate sandwiching the sensor chip and the heat insulating material is R _D ,
The thermal resistance from the heater region to the MEMS area edges and R _M,
The thermal resistance from the heat insulating material to the mounting substrate through the silicon substrate from the MEMS region edge is R _S ,
When the total thermal resistance of the thermal resistance from the heater region to the pad electrode and the thermal resistance of the lead wire is _RL ,
The thermal resistance R _P from the heater region to the mounting substrate through the MEMS region edge,
R _P = R _M + R _S · R _L / (R _S + R _L )
The thermal resistance from the heater region to the mounting substrate sandwiching the heat insulating material through the sensor chip and the cavity of the MEMS is denoted as _RD ,
The radius of a circle having the same area as the surface area of the heater region is r _A ,
Let λ be the thermal conductivity of the atmospheric gas by heating the heater,
The difference between the set temperature of the heater area and the assumed minimum installation environment temperature is defined as a temperature difference ΔTmax.
When Powmax is the heater maximum power input to the heater determined by the electrical resistance and power supply voltage of the heater at the set temperature,
The heater maximum power Powmax is 25 mW or less,
Powmax / ΔTmax> 1 / R _D + 1 / R _P + 4πλ · r _A
A gas sensor characterized in that the thermal resistances R _D and R _L and the surface area of the heater region are set so as to satisfy The gas sensor according to claim 16, wherein
The substrate of the sensor chip is an SOI substrate composed of a Si substrate, a buried insulating layer, and a silicon layer,
The SOI substrate has a MEMS region in which the Si substrate is hollowed out, and an intrinsic FET region having a smaller planar area than the MEMS region in which the sensor MISFET is formed in the MEMS region,
The heater is formed in the gap between the catalyst metal gate and the source electrode of the sensor MISFET and the gap between the catalyst metal gate and the drain electrode in the intrinsic FET region where the sensor MISFET is formed,
Lead wires for connecting the catalytic metal gate of the sensor MISFET, the source electrode, the drain region, and one end of the heater to the plurality of pad electrodes provided outside the MEMS region are formed. And
In the MEMS region where the intrinsic FET region does not overlap, only the protection film is formed on the buried insulating layer, and the bridge region in which the leading wiring and the protective film covering the leading wiring are formed on the buried insulating layer. And a reinforcing area
The MEMS region where the intrinsic FET region excluding the bridge region and the reinforcing region does not overlap has a through hole in which the protective film and the embedded insulating layer are removed,
The closest distance between the edge of the intrinsic FET region and the edge of the MEMS region is 1 to 20 times the sum of the width of all the bridge regions and the width of all the reinforcing regions. Gas sensor. (A) forming a gate insulating film on the semiconductor substrate;
(B) after the step (a), forming a gate electrode on the gate insulating film,
In the step of forming the gate electrode,
Ti is deposited on the gate insulating film in a thickness range of 3-6 nm, and then Pt is deposited on the Ti so that the ratio of Pt to Ti is in the range of about 1: 1 to 1: 5. A method for producing a gas sensor, comprising heating in a temperature range of 400 ° C. to 650 ° C. for 20 minutes to 2 hours in an oxygen atmosphere gas diluted with nitrogen or argon. A method for manufacturing a gas sensor according to claim 18, comprising:
In the step of forming the gate electrode,
Sn is deposited on the gate insulating film in a thickness range of 3-6 nm, and then Pt is deposited on the Sn so that the ratio of Pt and Sn is in the range of 1: 1 to 1: 5. A method of manufacturing a gas sensor, comprising heating in a temperature range of 350 ° C. to 650 ° C. for about 20 minutes to 2 hours in an oxygen atmosphere gas diluted with nitrogen or argon. A method for manufacturing a gas sensor according to claim 18, comprising:
In the step of forming the gate electrode,
Ti is deposited on the gate insulating film in a thickness range of 3 to 10 nm, and then Pt and Ti are simultaneously deposited on the Ti so that the ratio of Pt and Ti is in the range of about 1: 1 to 1: 5. A method for producing a gas sensor, comprising: vapor deposition (co-deposition) of about 5 nm to 20 nm and then heating in an oxygen atmosphere gas diluted with nitrogen or argon at a temperature range of 400 ° C. to 650 ° C. for about 20 minutes to 2 hours. A method for manufacturing a gas sensor according to claim 18, comprising:
In the step of forming the gate electrode,
Sn is deposited on the gate insulating film in a thickness range of 3 to 10 nm, and then Pt and Sn are simultaneously deposited on the Sn so that the ratio of Pt and Sn is in the range of about 1: 1 to 1: 5. A method for producing a gas sensor, comprising: vapor deposition (co-deposition) of about 5 nm to 15 nm and then heating in a temperature range of 350 ° C. to 650 ° C. for about 20 minutes to 2 hours in an oxygen atmosphere gas diluted with nitrogen or argon.

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