JP2012043828A - Standard wafer for inspection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve a patterned standard wafer that is unaffected by manufacturing variations.SOLUTION: A standard wafer 4 has a chip 1 formed thereon that is made of multiple patterns with a pattern width of 230 nm having a certain pattern pitch of X. A chip 2 next to the chip 1 has the identical pattern width but has a slight difference of Δd in pattern pitch (pattern pitch X + Δd). Further, the next chip 3 has a slight difference of 2Δd in pattern pitch (pattern pitch X + 2Δd). Subsequent pattern pitches are increased to X + nΔd (n is a 3 or more natural number). The pattern width needs not to be consciously varied and can be configured under an optimum condition in manufacturing wafers. The above increase by a certain difference in the pattern pitch may create features necessary in calibrating a device.

Description

  The present invention relates to a standard wafer for calibration of an inspection apparatus used in a semiconductor manufacturing process.

  In an optical semiconductor inspection apparatus, in order to confirm functions such as detection illumination, autofocus, alignment, etc., abstract evaluation values calculated from detection sensor signals of the inspection apparatus (for example, scattering at a plurality of identical positions of an IC pattern) It is known to use the amount of variation in the amount of light.

  When confirming the function of the inspection device, a standard wafer with a pattern dedicated to function confirmation is used.

  Regarding the calibration of the function of the apparatus using a standard wafer, for example, as disclosed in Patent Document 1, the depth and width of the scratch are quantified with a standard wafer of pseudo-processed traces produced by a processing method such as an ion beam, Scratch detection capability is calibrated in the scattered light detector for semiconductor inspection.

JP 2000-58606 A

  The above standard wafer needs manufacturing variations (pattern shape non-uniformity), and in the function management such as detection illumination based on the evaluation value such as the amount of variation in scattered light described above, the standard manufactured in the same lot is used. The wafer needs to have uniform variation.

  However, it is practically difficult to manufacture such a wafer, and with a single standard wafer, variations in the amount of scattered light etc. could be evaluated with good reproducibility. Different evaluation values were calculated for different standard wafers.

  As described above, in the prior art, it is impossible to manufacture a plurality of standard wafers that can obtain the same evaluation value.

  That is, in the above prior art, the production process is shifted from the optimum condition so as to generate nonuniformity of the generated pattern, but the pattern nonuniformity of the standard wafer is not constant for each lot.

  For this reason, it is difficult to calibrate the semiconductor inspection apparatus with high accuracy.

  An object of the present invention is to realize a standard wafer with a pattern which is not affected by manufacturing variations.

  In order to achieve the above object, the present invention is configured as follows.

  A standard wafer for calibration of a semiconductor inspection apparatus is formed with a plurality of chips each having a plurality of patterns. The widths of the plurality of patterns in each chip and the pattern pitch are substantially the same, and patterns of different chips are used. The pitches are different from each other.

  A standard wafer with a pattern that is not affected by manufacturing variations can be realized.

It is explanatory drawing of the standard wafer by Example 1 of this invention. It is a whole schematic explanatory drawing of the standard wafer by Example 1 of this invention. It is a figure which shows the typical example of the pattern shape of the standard wafer by Example 1 of this invention. It is explanatory drawing of the setting of the pattern width and pattern pitch of a standard wafer by Example 1 of this invention. It is explanatory drawing of the width | variety of the light-shielding plate which light-shields the pitch of the diffracted light produced in the Fourier plane, and diffracted light. It is a figure which shows an example of the setting of the pattern width in the chip | tip adjacent to the standard wafer by Example 1 of this invention, and a pattern pitch. It is a schematic block diagram of the semiconductor inspection apparatus which can utilize the standard wafer of this invention. It is an operation | movement flowchart of the calibration of the semiconductor inspection apparatus using the standard wafer by Example 2 of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

  The first embodiment of the present invention is a standard wafer that is used for calibration of a semiconductor inspection apparatus, and has a surface on which a plurality of patterns having various widths are combined.

  That is, it is a standard wafer used for function management of a foreign matter inspection apparatus that detects foreign matter, scratches, defects, dirt, etc. (referred to as foreign matter) present on the surface of an inspection object such as a semiconductor wafer. This standard wafer consists of a silicon wafer.

  1 and 2 show a standard wafer according to a first embodiment of the present invention, FIG. 2 is an overall schematic view of the standard wafer 4, and FIG. 1 is an explanatory diagram of chips 1 to 3 formed on the standard wafer 4. FIG. It is.

  The pattern width of the standard wafer 4 is a width that can be managed in manufacturing. For example, when the pattern width is 230 nm or more, it is assumed that the pattern width has a small manufacturing variation and can be stably manufactured.

  First, a chip 1 composed of a plurality of patterns having a pattern width of 230 nm and a constant pattern pitch X is formed on a wafer to be a standard wafer 4. The chips 2 adjacent to the chip 1 have the same pattern width and have a slight difference (Δd) in the pattern pitch (pattern pitch X + Δd). Then, the pattern pitch of the adjacent chip 3 is further different by 2Δd (pattern pitch X + 2Δd). Thereafter, the pattern pitch becomes X + nΔd (n is a natural number of 3 or more).

  That is, the plurality of chips are arranged on a straight line, and the pattern pitch of the chips increases by Δd as it goes in one direction of the straight line.

  A typical example of the pattern shape of the standard wafer and the stripe vertical pattern shape according to the first embodiment of the present invention are shown in FIG.

  In FIG. 3, a and b represent pattern pitches having a slight difference. If there is a difference for each pattern pitch, it can be applied to various shapes such as stripes, rectangles, curves, and circles. As shown in FIG. 3A, the chip 5 has a stripe shape, and the chip 6 has a rectangular shape. The chip 7 has a curve or a circle.

  FIG. 3B is a diagram for explaining a state in which the chip 9 is formed on the standard wafer 8.

  Here, among a large number of chips formed on the standard wafer 8, each shape such as a stripe, a rectangle, a curve, and a circle is divided into groups, and the pattern width is substantially the same in each group. It is also possible to set the pattern width so that the pattern width is different from that of the group.

  This is because it is conceivable that the pattern width that can be stably formed varies depending on each shape.

  Even if they have the same shape, a large number of chips can be grouped and a pattern width can be provided for each group.

  A wafer pattern having such specifications can be formed at the design stage in a photographic exposure mask used for wafer manufacture. Therefore, it is possible to manufacture standard wafers under optimum process conditions.

  Here, with reference to FIGS. 4 to 6, a method for determining the pattern width and pattern pitch of the standard wafers 4 and 8 will be described.

  The relationship between the pattern pitch and the pitch of the diffracted light (the pitch of the image formed on the Fourier plane) can be expressed by the following equation (1).

P = f · (λ / d) (1)
In the above formula (1), P is the pitch of the diffracted light, f is the focal length of the lens 18 (for example, 35 mm), λ is the wavelength of the laser to be irradiated (for example, 355 nm), and d is the pattern pitch.

  5A shows the pitch P of the diffracted light of the Fourier image 16, and FIG. 5B shows the light shielding plate 17 that shields the diffracted light of the Fourier image 16 (for example, the width h of the light shielding plate 17 has a width h). 1.3 mm).

  FIG. 6 is an explanatory diagram of the pattern pitch of a certain chip formed on the standard wafer 4 and the pattern pitch of a chip adjacent to this chip.

  FIG. 6A shows an example in which the pattern pitch d is 400 nm and the pattern width k is 250 nm. The pattern pitch d is a distance from the center of the pattern to the center of the adjacent pattern.

  FIG. 6B is a diagram showing an example in which a slight difference Δd (10 nm) is given to the pattern pitch d shown in FIG. Therefore, the example shown in FIG. 6B shows an example in which the pattern pitch d is 410 nm and the pattern width k is 250 nm.

  As described above, according to the standard wafer of Example 1 of the present invention, a plurality of chips each having a constant width and a plurality of patterns formed at a constant pattern pitch are formed on a standard wafer. The pattern pitch and the pattern pitch formed on the chip adjacent to the chip differ from each other by a certain value, and the pattern widths are substantially the same. Alternatively, when a large number of chips are grouped, at least the pattern widths within one group are substantially the same.

  For this reason, the width of the pattern can be set under the optimum conditions for wafer manufacturing (a plurality can be set if there are a plurality of optimum conditions), and the generated pattern is required by increasing the pattern pitch by a certain value. Creating a characteristic.

  Therefore, according to the first embodiment of the present invention, it is possible to realize a patterned standard wafer that is not affected by manufacturing variations.

  Next, a second embodiment of the present invention will be described.

  The second embodiment of the present invention is a calibration method for a semiconductor inspection apparatus using the standard wafer of the first embodiment.

  FIG. 7 is a schematic configuration diagram of a semiconductor foreign matter inspection apparatus.

  In FIG. 7, a semiconductor wafer as a sample is placed on the sample stage 14 and irradiated with the laser beam 10. Scattered light 13 from the semiconductor wafer is detected by the detection sensor 12 via the light shielding plate 11 (17).

  The scattered light detected by the detection sensor 12 is processed by the data processing control unit 15 and a foreign object detection process is performed. The result of the foreign object detection processing performed by the data processing control unit 15 is displayed on the display 19 and stored in the memory 20.

  In addition, the data processing control unit 15 performs setting control of the light shielding plate 11 (17). The data processing control unit 15 also performs irradiation control of the laser light 10 and operation control of the sample stage 14.

  In the calibration of the semiconductor foreign matter inspection apparatus, the standard wafer 4 is placed on the sample stage 14.

  FIG. 8 is an operation flowchart of the calibration method of the semiconductor foreign matter inspection apparatus using the standard wafer 4 according to the present invention.

  In step S <b> 1 of FIG. 8, the standard wafer 4 is irradiated with the laser beam 10 according to a command from the data processing control unit 15.

  In step S2, the data processing control unit 15 inspects the standard wafer 4, and acquires the inspection result.

  Here, by irradiating the standard wafer 4 with the laser beam 10, the generated Fourier image (16 in FIG. 5) is shielded at equal intervals by using the light shielding plate 11 (17 in FIG. 5).

  Since the standard wafer 4 of the present invention has a slight difference Δd in the pattern pitch for each chip formed on the wafer 4, the light quantity of the Fourier image shielded by the light shielding plate 11 is slightly different for each chip.

  For this reason, a difference occurs in the foreign object detection image for each chip. Then, a foreign object detection image is generated using the difference. Foreign matter is detected by calculating the difference between the reference image and the previous image at the same position. The device performance can be calibrated by managing the abstract evaluation value calculated from the detection sensor signal such as the luminance value.

  Since a preset difference Δd is set in the pattern pitch, the number of foreign objects detected and the histogram of dispersion (characteristic value of scattered light) are known, and this known value is compared with the detection result, If it is determined whether there is a difference between the two values or more, it can be determined whether there is an abnormality in the setting of the light shielding plate 11.

  Step S3 is a step in which the data processing control unit 15 determines whether or not there is an abnormality in the detection number and the variation histogram based on the above principle.

  In step S3, if it is determined that there is an abnormality in the detected number and variation histogram, the process proceeds to step S5, and the data processing control unit 15 corrects the parameters of the light shielding plate 11. For example, the position of the light shielding plate 11 is moved by a predetermined value based on the difference between normal variation and abnormal variation. That is, the detected scattered light characteristic value is compared with the characteristic value stored in advance in the storage means, and if there is a predetermined difference or more between the two characteristic values, the inspection function of the semiconductor inspection apparatus is determined according to the difference. Is calibrated. Then, the process returns to step S1.

  If it is determined in step S3 that there is no abnormality in the histogram of the number of detections and variation, the process proceeds to step S4, and correction data at that time (for example, position correction data of the light shielding plate 11) is stored in the memory 20. Thereafter, the process ends.

  In addition, the numerical example mentioned above is an example, Comprising: This invention is applicable also to other numerical values other than the above-mentioned.

  In addition to the position of the light shielding plate, the inspection function of the semiconductor inspection apparatus includes detection illumination, autofocus, alignment, and the like, and the present invention can also be applied to these.

  As described above, according to the second embodiment of the present invention, since a standard wafer with a pattern that is not affected by manufacturing variations is used, highly accurate calibration data of a semiconductor inspection apparatus can be acquired.

  Further, in the second embodiment of the present invention, calibration correction data obtained using a standard wafer can be used for performance degradation determination of a semiconductor inspection apparatus. For example, it can be used for laser light source deterioration determination of a semiconductor inspection apparatus.

  That is, it is known that a laser light source (particularly a UV laser light source) used in a semiconductor inspection apparatus deteriorates over time. For example, aged deterioration such as a reduction in the diameter of the laser beam and a decrease in output occurs.

  Therefore, it is possible to periodically calibrate the semiconductor inspection apparatus using the standard wafer of the present invention, and to manage the secular change of the laser light source and the like based on the correction data.

  The present invention can also be applied to calibration of an ion beam processing apparatus or an EB apparatus.

  According to the present invention, a standard wafer with a dedicated pattern does not require manufacturing variations as in the prior art, and manufacturing management is facilitated.

  Further, an effect that a standard wafer can be stably manufactured in each lot can be obtained.

  Furthermore, the standard wafer according to the present invention has a uniform finish, and even when a plurality of lots are manufactured, a uniform finish can be achieved.

  1-3, 5-7, 9 ... chip, 4,8 ... standard wafer, 10 ... laser light, 11,17 ... light-shielding plate, 12 ... detection sensor, 13 ... Scattered light, 14 ... sample stage, 15 ... data processing control unit, 16 ... Fourier image, 18 ... lens, 19 ... display, 20 ... memory

Claims (10)

In the standard wafer for calibration of semiconductor inspection equipment,
A plurality of chips formed with a plurality of patterns are formed, and the widths of the plurality of patterns in each chip and the pattern pitch, which is the dimension between the centers of the widths of adjacent patterns, are substantially the same, and different chips are used. A standard wafer for calibration of a semiconductor inspection apparatus, wherein the pattern pitches of the semiconductor inspection apparatus are different from each other and the pattern widths are substantially the same. In the standard wafer for calibration of the semiconductor inspection apparatus according to claim 1,
The standard wafer for calibration of a semiconductor inspection apparatus, wherein the plurality of chips are arranged on a straight line, and the pattern pitch of the chips increases by Δd toward one direction of the straight line. In the standard wafer for calibration of the semiconductor inspection apparatus according to claim 1,
The standard wafer for calibration of a semiconductor inspection apparatus, wherein the standard wafer is a silicon wafer. In the standard wafer for calibration of semiconductor inspection equipment,
A plurality of chips formed with a plurality of patterns are formed, and the plurality of chips are divided into a plurality of groups, and within one group, the width of the plurality of patterns in each chip and the center of the widths of adjacent patterns. A standard wafer for calibration of a semiconductor inspection apparatus, wherein the pattern pitch is substantially the same, the pattern pitches of different chips are different from each other, and the pattern widths are substantially the same. In the standard wafer for calibration of the semiconductor inspection apparatus according to claim 4,
A plurality of chips in the one group are arranged on a straight line, and the pattern pitch of the chips increases by Δd toward one direction of the straight line. Wafer. In the standard wafer for calibration of the semiconductor inspection apparatus according to claim 4,
The standard wafer for calibration of a semiconductor inspection apparatus, wherein the standard wafer is a silicon wafer. In the standard wafer for calibration of the semiconductor inspection apparatus according to claim 4,
The standard wafer for calibration of a semiconductor inspection apparatus, wherein the plurality of chips are grouped for each type of pattern shape. A method for calibrating an inspection function of a semiconductor inspection apparatus using the standard wafer according to claim 1,
Irradiate light for inspection of the standard wafer,
Detect scattered light from the standard wafer,
Compare the characteristic value of the detected scattered light with the characteristic value stored in advance in the storage means, determine whether there is a difference of a predetermined value or more between the two characteristic values,
A method for calibrating an inspection function of a semiconductor inspection apparatus, comprising: calibrating an inspection function of a semiconductor inspection apparatus in accordance with the difference between the two characteristic values when the difference exceeds a predetermined value. The inspection function calibration method for a semiconductor inspection apparatus according to claim 8,
The semiconductor inspection apparatus includes a light shielding plate that partially shields scattered light, and adjusts the position of the light shielding plate according to the difference between the two characteristic values when the difference exceeds a predetermined value. An inspection function calibration method for semiconductor inspection equipment. The inspection function calibration method for a semiconductor inspection apparatus according to claim 8,
The semiconductor inspection apparatus includes a memory, stores correction data for calibration in the memory for the inspection function of the semiconductor inspection apparatus, and performs the inspection function based on the correction data obtained by a periodic inspection. A method for calibrating an inspection function of a semiconductor inspection apparatus, characterized by determining aged deterioration.

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