JP2012028390A - Method of manufacturing semiconductor light-emitting device - Google Patents

Method of manufacturing semiconductor light-emitting device Download PDF

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JP2012028390A
JP2012028390A JP2010162944A JP2010162944A JP2012028390A JP 2012028390 A JP2012028390 A JP 2012028390A JP 2010162944 A JP2010162944 A JP 2010162944A JP 2010162944 A JP2010162944 A JP 2010162944A JP 2012028390 A JP2012028390 A JP 2012028390A
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semiconductor light
led
substrate
collective substrate
light emitting
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Megumi Horiuchi
恵 堀内
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Citizen Holdings Co Ltd
Citizen Electronics Co Ltd
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Citizen Holdings Co Ltd
Citizen Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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Abstract

PROBLEM TO BE SOLVED: To provide method of manufacturing a semiconductor light-emitting device manufacturing for solving the problems that when a nondestructive inspection based on heat conduction that is known as the nondestructive inspection for a joint state of a flip-chip bonded semiconductor element is applied to an LED device having a resin encapsulation layer, it becomes difficult to determine the joint state so that manufacturing efficiency is not increased.SOLUTION: The method of manufacturing an LED device 10 with a circuit substrate 12 on which a semiconductor light-emitting element 13 is flip-chip bonded comprises: a substrate preparation step of preparing a collective substrate 51 on which the LED elements 13 are mounted; a joint determination step of heating the collective substrate 51 and measuring a temperature of a rear face of the LED element 13 by using a thermography 52 to determine quality of a joint state at an inspection part 53,; an encapsulation step of encapsulating the collective substrate 51 with a resin layer 11 containing a fluorescent material; and a dividing step of cutting the collective substrate 51 in pieces to obtain individual semiconductor light-emitting devices 10. Accordingly, the temperature of the LED element 13 is measured in such a state that the rear face is exposed, so that quality determination of the joint state can be precisely performed. And further, the collective substrate in which LED elements 13 are closely gathered is inspected, thereby increasing manufacturing efficiency.

Description

本発明は、回路基板に半導体発光素子をフリップチップ実装した半導体発光装置の製造方法に関する。   The present invention relates to a method of manufacturing a semiconductor light emitting device in which a semiconductor light emitting element is flip-chip mounted on a circuit board.

半導体発光素子(以後とくに断らない限りLED素子と呼ぶ)を回路基板に実装しパッケージ化した半導体発光装置(以後とくに断らない限りLED装置と呼ぶ)が知られている。このLED装置は、しばしば放熱特性、実装面積効率及び生産性が優れたフリップチップ実装が採用される。ところがフリップチップ実装は回路基板が不透明であると回路基板の電極とLED素子の電極の接合部が見えないため、接合用金属(半田等)のフィレット形状や反射など光を使った非破壊検査では接合状態の良否が判断できない。   2. Description of the Related Art A semiconductor light emitting device (hereinafter referred to as an LED device unless otherwise specified) in which a semiconductor light emitting element (hereinafter referred to as an LED element unless otherwise specified) is mounted on a circuit board and packaged is known. This LED device often employs flip-chip mounting with excellent heat dissipation characteristics, mounting area efficiency, and productivity. However, in flip-chip mounting, if the circuit board is opaque, the joint between the electrode of the circuit board and the electrode of the LED element cannot be seen. Therefore, in nondestructive inspection using light such as fillet shape or reflection of bonding metal (solder etc.) The quality of the joined state cannot be judged.

非破壊でフリップチップ実装時の接合状態を知る方法として熱伝導を利用する方法が知られている。例えば特許文献1の図1には、先ず回路パターンが形成された基板2(回路基板)に複数のバンプ3を介してフリップチップ実装された半導体素子1に、半導体装置4を固定するステージ5と外部の電源(加熱手段6)を用いて電流を印加し、次に半導体素子1の自己発熱による裏面温度分布を測定(測定手段7)してから、その温度分布に基づいてバンプ3の接合状態の良否を判断(判定手段8)する検査装置が示されている。   A method using heat conduction is known as a non-destructive method for knowing the bonding state during flip chip mounting. For example, in FIG. 1 of Patent Document 1, first, a stage 5 for fixing a semiconductor device 4 to a semiconductor element 1 flip-chip mounted on a substrate 2 (circuit substrate) on which a circuit pattern is formed via a plurality of bumps 3; A current is applied using an external power source (heating means 6), and then a back surface temperature distribution due to self-heating of the semiconductor element 1 is measured (measuring means 7), and then the bonding state of the bump 3 is determined based on the temperature distribution. An inspection apparatus for judging whether the quality is good (determination means 8) is shown.

特許文献1の図1の検査装置は半導体素子1の自己発熱により半導体素子1を加熱し、熱がバンプ3を介して基板2へと伝達することにより生ずる温度分布を利用して半導体素子1の接合状態を判定していた。しかしながらLED素子の場合、発光層と重なるバンプ(ふつうp側バンプ)が主な放熱経路となっているため、発光層と重ならないバンプ(ふつうn側バンプ)及びその周囲は放熱による熱分布がはっきり現れず接合状態が判定しづらい。また外部に電流印加用回路を設け、電気的接続用のプローブも準備しなければならない。   The inspection apparatus shown in FIG. 1 of Patent Document 1 heats the semiconductor element 1 by self-heating of the semiconductor element 1, and utilizes the temperature distribution generated by transferring the heat to the substrate 2 through the bumps 3. The joining state was judged. However, in the case of LED elements, bumps that overlap the light-emitting layer (usually p-side bumps) are the main heat dissipation path, so the heat distribution due to heat dissipation is clearly seen around the bumps that do not overlap the light-emitting layer (usually n-side bumps). It does not appear and it is difficult to judge the joining state. Also, a current application circuit must be provided outside, and a probe for electrical connection must be prepared.

以上のように電流印加による自己発熱から接合状態を知る手法をLED素子に適用しようとすると、前述のように電極の種類により判定精度が異なったり、周辺装置が多くなったりする。そこでLED素子を受動的に加熱し良否判定できることが望ましい。特許文献2の図1には、半導体チップ22の裏面22B(電極面とは反対側の面)の中央部に所定時間、所定パワーのレーザ光を照射し、熱が中央から周辺部に放射状に伝わることを利用して、パッド26とランド27の接合状態を検査する検査システムが示されている。ここでは半導体チップ22の裏面22Bの温度分布をサーモグラフィ24で測定し、得られた測定結果にもとづいて検査部25において接合状態を判定している。   As described above, when it is attempted to apply the technique of knowing the bonding state from self-heating due to current application to the LED element, as described above, the determination accuracy varies depending on the type of electrode, and the number of peripheral devices increases. Therefore, it is desirable that the LED element be passively heated to determine whether it is good or bad. In FIG. 1 of Patent Document 2, a laser beam having a predetermined power is irradiated for a predetermined time on the central portion of the back surface 22B (surface opposite to the electrode surface) of the semiconductor chip 22, and heat is radially emitted from the center to the peripheral portion. An inspection system for inspecting the bonding state between the pad 26 and the land 27 using the transmission is shown. Here, the temperature distribution of the back surface 22B of the semiconductor chip 22 is measured by the thermography 24, and the bonding state is determined by the inspection unit 25 based on the obtained measurement result.

特開2007−24542号公報 (図1)JP 2007-24542 A (FIG. 1) 特開平11−201926号公報 (図1)JP-A-11-201926 (FIG. 1)

特許文献2の図1の検査システムは、回路基板上の電子部品を加熱し、その温度分布測定から接合状態を判定していた。しかしながらLED装置の場合、回路基板上にLED素子(ダイ、ウェハーから切り出した素子)が実装され、そのLED素子を樹脂等の封止部材が覆っている。このような構造のLED装置の裏面側を加熱して裏面の温度分布を観察
すると、封止部材の影響で温度分布がぼやけてしまいLED素子の接合状態が判定しづらくなる。すなわち接続に係わる品質保証が不可能となる。特殊なケースとしてLED素子の裏面が露出している場合でも、LED装置を一個づつ検査するとなると生産効率が向上しない。そこで本発明は、これらの課題に鑑みてなされたものであり、回路基板に半導体発光素子をフリップチップ実装した半導体発光装置に対し、接続部の品質が保証でき生産効率の良い製造方法を提供することを目的としている。
The inspection system of FIG. 1 of Patent Document 2 heats an electronic component on a circuit board, and determines a bonding state from the temperature distribution measurement. However, in the case of an LED device, an LED element (die or element cut out from a wafer) is mounted on a circuit board, and the LED element is covered with a sealing member such as a resin. When the back surface side of the LED device having such a structure is heated and the temperature distribution on the back surface is observed, the temperature distribution is blurred due to the influence of the sealing member, and it is difficult to determine the bonding state of the LED elements. In other words, quality assurance related to connection becomes impossible. Even when the back surface of the LED element is exposed as a special case, the production efficiency is not improved if the LED devices are inspected one by one. Accordingly, the present invention has been made in view of these problems, and provides a manufacturing method with a high production efficiency that can guarantee the quality of the connecting portion for a semiconductor light emitting device in which a semiconductor light emitting element is flip-chip mounted on a circuit board. The purpose is that.

上記課題を解決するため本発明は、回路基板に半導体発光素子をフリップチップ実装した半導体発光装置の製造方法において、
複数の前記半導体素子をフリップチップ実装した集合基板を準備する基板準備工程と、
前記集合基板を加熱し、前記半導体発光素子の裏面の温度を測定し、接合状態の良否判定を行う接合判定工程と、
前記集合基板上に実装された前記半導体発光素子を封止する封止工程と、
前記集合基板を切断し個片化した半導体発光装置を得る個片化工程と
を備えることを特徴とする。
In order to solve the above problems, the present invention provides a method for manufacturing a semiconductor light emitting device in which a semiconductor light emitting element is flip-chip mounted on a circuit board.
A substrate preparation step of preparing a collective substrate on which a plurality of the semiconductor elements are flip-chip mounted;
A bonding determination step of heating the collective substrate, measuring the temperature of the back surface of the semiconductor light emitting element, and determining whether the bonding state is good or bad;
A sealing step of sealing the semiconductor light emitting element mounted on the collective substrate;
And an individualization step for obtaining a semiconductor light emitting device by cutting the aggregate substrate into individual pieces.

前記接合判定工程において同時に複数の前記半導体発光素子の温度を測定することが好ましい。   It is preferable to measure the temperature of the plurality of semiconductor light emitting elements simultaneously in the bonding determination step.

前記接合判定工程において前記集合基板の加熱を開始してから熱平衡に達するまでの間に温度測定することが好ましい。   In the bonding determination step, it is preferable to measure the temperature between the start of heating of the collective substrate and the arrival of thermal equilibrium.

本発明の半導体発光装置の製造方法において、基板準備工程で準備される集合基板上にフリップチップ実装された半導体発光素子は保護用の樹脂などで封止されてはいない。この状態、すなわち封止工程の前にLED素子の実装面とは反対側の面(以後裏面と呼ぶ)の温度測定をするので接合状態の良否判定が精度良く行える。その後の樹脂等で集合基板を封止する工程や、個片化する工程は接合に大きな影響を与えないので、接合判定工程における接合検査でLED装置の接合品質が保証できるようになる。また複数の回路基板が一体化した集合基板で各回路基板に実装されたLED素子の接合状態を判定するので、検査装置へのセッティング工数が大幅に削減され製造効率が良くなる。   In the method for manufacturing a semiconductor light emitting device of the present invention, the semiconductor light emitting element flip-chip mounted on the aggregate substrate prepared in the substrate preparation step is not sealed with a protective resin or the like. In this state, that is, before the sealing step, the temperature of the surface opposite to the LED element mounting surface (hereinafter referred to as the back surface) is measured, so that the quality of the bonded state can be accurately determined. Since the subsequent step of sealing the collective substrate with a resin or the like and the step of dividing into pieces do not greatly affect the bonding, the bonding quality of the LED device can be guaranteed by the bonding inspection in the bonding determination step. In addition, since the bonding state of the LED elements mounted on each circuit board is determined by a collective board in which a plurality of circuit boards are integrated, the number of setting steps for the inspection apparatus is greatly reduced, and the manufacturing efficiency is improved.

本発明の実施形態におけるLED装置の斜視図。The perspective view of the LED device in the embodiment of the present invention. 図1のLED装置の斜視図。The perspective view of the LED apparatus of FIG. 図2のLED素子をバンプ面から見た平面図。The top view which looked at the LED element of FIG. 2 from the bump surface. 図1のLED装置の断面図。Sectional drawing of the LED apparatus of FIG. 図1のLED装置を製造するための説明図。Explanatory drawing for manufacturing the LED device of FIG. 図5のLED素子の接合状態を判定するための説明図。Explanatory drawing for determining the joining state of the LED element of FIG.

以下、添付図1〜6を参照しながら本発明の好適な実施形態について詳細に説明する。なお図面の説明において、同一または相当要素には同一の符号を付し、重複する説明は省略する。また説明のため部材の縮尺は適宜変更している。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. In the description of the drawings, the same or equivalent elements will be denoted by the same reference numerals, and redundant description will be omitted. For the sake of explanation, the scale of the members is changed as appropriate.

図1は本実施形態のLED装置(半導体発光装置)の外観を説明するために描いたLED装置10の斜視図である。LED装置10において、回路基板12上に蛍光体を含有した樹脂層11が積層している。樹脂層11は蛍光体を含有するシリコーン樹脂からなる。   FIG. 1 is a perspective view of an LED device 10 drawn for explaining the appearance of the LED device (semiconductor light emitting device) of the present embodiment. In the LED device 10, a resin layer 11 containing a phosphor is laminated on a circuit board 12. The resin layer 11 is made of a silicone resin containing a phosphor.

図2により図1のLED装置10に実装されたLED素子13の実装状況を説明する。図2は図1のLED装置10から樹脂層11を剥がしとった状態のLED装置10の斜視図である。図2に示すように回路基板12は、板材16と、板材16上に形成された−電極14と+電極15を含んでいる。回路基板12上にフリップチップ実装されたLED素子13は、n側バンプ(カソード、図示せず)及びp側バンプ(アノード、図示せず)がそれぞれ−電極14と+電極15に接続している。   A mounting state of the LED element 13 mounted on the LED device 10 of FIG. 1 will be described with reference to FIG. FIG. 2 is a perspective view of the LED device 10 in a state where the resin layer 11 is peeled off from the LED device 10 of FIG. As shown in FIG. 2, the circuit board 12 includes a plate material 16, and a − electrode 14 and a + electrode 15 formed on the plate material 16. The LED element 13 flip-chip mounted on the circuit board 12 has an n-side bump (cathode, not shown) and a p-side bump (anode, not shown) connected to the negative electrode 14 and the positive electrode 15, respectively. .

図3によりLED素子13のバンプ面を説明する。図3はLED素子13をバンプ面側から眺めた平面図である。n型半導体層21は、上層にあるp型半導体層22から一部分が露出している。このn型半導体層21の露出部にn側バンプ23があり、p型半導体層22上にp側バンプ24がある。n側バンプ23はp側バンプ24より平面積が小さく、n側バンプ23およびp側バンプ24は電解メッキ法で形成した金バンプである。なお保護膜は図示していない。   The bump surface of the LED element 13 will be described with reference to FIG. FIG. 3 is a plan view of the LED element 13 viewed from the bump surface side. A part of the n-type semiconductor layer 21 is exposed from the p-type semiconductor layer 22 in the upper layer. There is an n-side bump 23 on the exposed portion of the n-type semiconductor layer 21, and a p-side bump 24 on the p-type semiconductor layer 22. The n-side bump 23 has a smaller plane area than the p-side bump 24, and the n-side bump 23 and the p-side bump 24 are gold bumps formed by electrolytic plating. The protective film is not shown.

図4によりLED装置10の断面を説明する。図4は図2のA−A線に沿ったLED装置10の断面図である。なおn側及びp側バンプ23,24を同時に示すため図2においてA−A線を屈曲させている。   The cross section of the LED device 10 will be described with reference to FIG. 4 is a cross-sectional view of the LED device 10 taken along line AA in FIG. In order to show the n-side and p-side bumps 23 and 24 at the same time, the line AA in FIG. 2 is bent.

先ずLED素子13から説明する。図4に示すように、サファイア基板25の下にn型半導体層21があり、さらにn型半導体層21の下面にはp型半導体層22が形成されている。このn型半導体層21及びp型半導体層22はそれぞれn側バンプ23及びp側バンプ24と接続している。サファイア基板25は厚さが100〜300μm、n型半導体層21は厚さが5μm程度である。p型半導体層22は総厚が1μm程度であり、厚みが100〜200nmのp型GaN層を含んでいる。n側バンプ及びp側バンプ23,24は厚さが10〜30μmである。発光層(図示せず)は、n型半導体層21とp型半導体層22の境界部にあり、平面的な形状は概ねp型半導体層22に等しい。 First, the LED element 13 will be described. As shown in FIG. 4, an n-type semiconductor layer 21 is provided under the sapphire substrate 25, and a p-type semiconductor layer 22 is formed on the lower surface of the n-type semiconductor layer 21. The n-type semiconductor layer 21 and the p-type semiconductor layer 22 are connected to an n-side bump 23 and a p-side bump 24, respectively. The sapphire substrate 25 has a thickness of 100 to 300 μm, and the n-type semiconductor layer 21 has a thickness of about 5 μm. The p-type semiconductor layer 22 has a total thickness of about 1 μm and includes a p-type GaN layer having a thickness of 100 to 200 nm. The n-side bumps and the p-side bumps 23 and 24 have a thickness of 10 to 30 μm. The light emitting layer (not shown) is at the boundary between the n-type semiconductor layer 21 and the p-type semiconductor layer 22, and the planar shape is substantially equal to the p-type semiconductor layer 22.

次に回路基板側を説明する。回路基板12は板材16と−及び+電極14,15、スルーホール14a,15a、出力電極14b,15bからなっている。板材16の上面に形成された−電極14及び+電極15は、マザー基板(図示せず)の電極と接続するため板材16の下面に形成した出力電極14b,15bとそれぞれスルーホール14a,15aで接続している。−及び+電極14,15はそれぞれn側バンプ23及びp側バンプ24と接続している。蛍光体を含有した樹脂層11は回路基板12の上面とLED素子13を覆っている。回路基板12の板材16は厚さが300μmでアルミナからなる。−及び+電極14,15と出力電極14b,15bは厚さが10〜30μmでニッケルと金を積層した銅箔である。スルーホール14a,15aは直径が200μmで銅ペーストが充填されている。樹脂層11は厚さが400μm程度でシリコーンからなる。   Next, the circuit board side will be described. The circuit board 12 is composed of a plate 16 and-and + electrodes 14 and 15, through holes 14a and 15a, and output electrodes 14b and 15b. The negative electrode 14 and the positive electrode 15 formed on the upper surface of the plate 16 are connected to the electrodes of the mother substrate (not shown) by the output electrodes 14b and 15b formed on the lower surface of the plate 16 and through holes 14a and 15a, respectively. Connected. The − and + electrodes 14 and 15 are connected to the n-side bump 23 and the p-side bump 24, respectively. A resin layer 11 containing a phosphor covers the upper surface of the circuit board 12 and the LED element 13. The plate 16 of the circuit board 12 has a thickness of 300 μm and is made of alumina. The − and + electrodes 14 and 15 and the output electrodes 14b and 15b are copper foils having a thickness of 10 to 30 μm and laminated with nickel and gold. The through holes 14a and 15a have a diameter of 200 μm and are filled with a copper paste. The resin layer 11 has a thickness of about 400 μm and is made of silicone.

図5によりLED装置10の製造工程を説明する。図5はLED装置10を製造するための説明図である。   The manufacturing process of the LED device 10 will be described with reference to FIG. FIG. 5 is an explanatory diagram for manufacturing the LED device 10.

(a)は基板準備工程である。複数のLED素子13をフリップチップ実装した集合基板51を準備する。この集合基板51は、個片化すると図2に示した回路基板12(或いは樹脂層11が着いていないLED装置10)になる。このとき一枚の集合基板51には電気的特性の揃ったLED素子13を実装するのが好ましい。こうすると色度のばらつきをおさえ込み易い。 (A) is a substrate preparation step. A collective substrate 51 on which a plurality of LED elements 13 are flip-chip mounted is prepared. When the collective substrate 51 is divided into pieces, the circuit substrate 12 (or the LED device 10 without the resin layer 11) shown in FIG. 2 is obtained. At this time, it is preferable to mount the LED elements 13 having the same electrical characteristics on one collective substrate 51. This makes it easy to suppress variations in chromaticity.

(b)は接合判工程である。集合基板51を加熱し、LED素子13の裏面の温度を測定し、接合状態の良否判定を行う。まず加熱台54を所定の温度に設定する。加熱台54に集合基板51を近接(或いは接触)させた瞬間から温度測定を開始する。サーモグラフィ
52の時間分解能は25μ秒であり、数1m秒で測定を終了させる。サーモグラフィ52は測定データを検査部53に送り、検査部53はLED素子13の裏面の温度上昇に基づいて接合の良否判断を行う。なおサーモグラフィ52は、視野と精度がトレードオフになるが、一回に複数チップ同時に測定する(図では2個同時測定をイメージして描いた)。集合基板51上の全てのLED素子13が良否判断されるまでこのサイクルを繰り返す。
(B) is a joining process. The collective substrate 51 is heated, the temperature of the back surface of the LED element 13 is measured, and the quality of the bonded state is determined. First, the heating table 54 is set to a predetermined temperature. Temperature measurement is started from the moment when the collective substrate 51 is brought close to (or in contact with) the heating table 54. The time resolution of the thermography 52 is 25 μs, and the measurement is completed in several milliseconds. The thermography 52 sends measurement data to the inspection unit 53, and the inspection unit 53 determines whether or not the bonding is good based on the temperature rise on the back surface of the LED element 13. The thermography 52 measures a plurality of chips simultaneously at the same time, although the visual field and the accuracy are in a trade-off (in the figure, it is drawn by imagining two simultaneous measurements). This cycle is repeated until all the LED elements 13 on the collective substrate 51 are judged acceptable.

(c)は封止工程である。集合基板51上に実装されたLED素子13を樹脂層11で封止する。例えば、型に集合基板51を収納し、蛍光体を含有したシリコーン樹脂で樹脂層11を形成しても良い。 (C) is a sealing process. The LED elements 13 mounted on the collective substrate 51 are sealed with the resin layer 11. For example, the collective substrate 51 may be housed in a mold, and the resin layer 11 may be formed of a silicone resin containing a phosphor.

(d)は個片化工程である。樹脂層11を備えた集合基板51をダイシング装置等で切断し、個片化したLED装置10を得る。この工程で検査部53から送られてくるデータにもとづき接合不良と判定されたLED装置を除去する。なお接合判定工程において接合不良と判定したLED素子13を電気的に破壊するようなマーキングを実施すれば、電気特性をチェックする工程(図示せず)において、接合が不良なLED装置10を除去できる。 (D) is an individualization step. The collective substrate 51 provided with the resin layer 11 is cut with a dicing device or the like to obtain the LED device 10 which is divided into pieces. In this step, the LED device determined to be defective in bonding based on the data sent from the inspection unit 53 is removed. In addition, if marking which electrically destroys the LED element 13 determined to be defective in the bonding determination step is performed, the LED device 10 having poor bonding can be removed in the step of checking electrical characteristics (not shown). .

図6により接合状態を判定する方法をさらに詳しく説明する。図6はLED素子13の接合状態を判定するための説明図であり、(a)が集合基板51上に実装したLED素子13とその周辺部を示す平面図、(b)がLED素子13の裏面の温度上昇を示すグラフである。   The method for determining the joining state will be described in more detail with reference to FIG. 6A and 6B are explanatory diagrams for determining the bonding state of the LED elements 13. FIG. 6A is a plan view showing the LED elements 13 mounted on the collective substrate 51 and their peripheral portions, and FIG. It is a graph which shows the temperature rise of a back surface.

図6(a)においてLED素子13の下面のバンプを点線で示した。LED素子13の裏面の温度を測定する測定点61はほぼチップの中央にある。また同時に集合基板51の温度を測定点62で測る。   In FIG. 6A, the bumps on the lower surface of the LED element 13 are indicated by dotted lines. The measuring point 61 for measuring the temperature of the back surface of the LED element 13 is substantially at the center of the chip. At the same time, the temperature of the collective substrate 51 is measured at the measurement point 62.

図6(b)は横軸が時間、縦軸が温度であり、接続が良好な場合は測定点61の温度上昇カーブ63となり、接続が不良な場合は温度上昇カーブ64となる。接合が良好な場合、LED素子13の測定点61の温度は急激に上昇する。これに対し接合が不良の場合、LED素子13の測定点61の温度はゆっくりと上昇する。この違いから接合状態の良否判定が可能となる。集合基板51は加熱台54に接触させると集合基板51の温度ムラが生じやすいので、t=0において集合基板51と加熱台54(図示せず)を数十μmで近接させた。また各温度上昇カーブ63,64は、測定点62を使って集合基板51の温度上昇の影響を取り除くよう補正している。温度測定の時間間隔は約25μ秒であり、各温度上昇カーブ63,64は1m秒以内に飽和する。   In FIG. 6B, the horizontal axis represents time and the vertical axis represents temperature. When the connection is good, the temperature rise curve 63 at the measurement point 61 is obtained, and when the connection is poor, the temperature rise curve 64 is obtained. When the bonding is good, the temperature of the measurement point 61 of the LED element 13 rises rapidly. On the other hand, when the bonding is poor, the temperature of the measurement point 61 of the LED element 13 rises slowly. From this difference, it is possible to determine whether the joining state is good or bad. When the collective substrate 51 is brought into contact with the heating table 54, the temperature unevenness of the collective substrate 51 is likely to occur. The temperature rise curves 63 and 64 are corrected so as to remove the influence of the temperature rise of the collective substrate 51 using the measurement point 62. The time interval of temperature measurement is about 25 μs, and each temperature rise curve 63, 64 is saturated within 1 msec.

測定点61の温度上昇はほとんどp側バンプ24の熱伝導によって起こされているので、図6はp側バンプ24の接合状態を判定していると言ってよい。n側バンプ23の接合状態を知る必要がある場合は、n側バンプ23上に測定点を配置すれば良い。   Since the temperature rise at the measurement point 61 is almost caused by the heat conduction of the p-side bump 24, it can be said that FIG. 6 determines the bonding state of the p-side bump 24. When it is necessary to know the bonding state of the n-side bump 23, a measurement point may be arranged on the n-side bump 23.

本実施形態では接合判定工程において同時に複数のLED素子13の温度を測定し製造効率を高くしていた。しかしながら本発明の製造方法は、一回の温度測定で一個づつLED素子13を処理しても、個片化前のLED装置10が密集した集合基板51を対象に判定処理しているため、検査装置に一個づつLED装置を搭載してから検査する手法や、マザー基板に離散的に配置された半導体素子について接合判定を行う方法に対し生産効率が高い。   In the present embodiment, the temperature of the plurality of LED elements 13 is measured at the same time in the bonding determination step to increase manufacturing efficiency. However, in the manufacturing method of the present invention, even if the LED elements 13 are processed one by one in one temperature measurement, the determination is performed on the collective substrate 51 in which the LED devices 10 before separation are densely packed. The production efficiency is higher than the method of inspecting after mounting the LED devices one by one on the device and the method of determining the bonding of the semiconductor elements discretely arranged on the mother substrate.

本実施形態では接合判定工程において集合基板の加熱開始から短時間で温度測定を完了させていた。これは熱伝導の過渡的状態を観察するものである。LED素子13が熱平衡に達してから温度分布を測定しても良いが、一方の端子の接合が良好で他方の端子の接合
が不良である場合、熱平行に達すると一方の端子を伝わってきた熱が他方の端子に向かって拡散するので温度分布がぼやけてしまう。このため過渡的状態で温度測定することがより好ましい。また本実施形態では測定点61の温度上層を計測していたが、LED素子13の裏面の温度分布についてパターン認識しても良い。
In this embodiment, the temperature measurement is completed in a short time from the start of heating of the aggregate substrate in the bonding determination step. This observes the transient state of heat conduction. The temperature distribution may be measured after the LED element 13 reaches thermal equilibrium. However, when the bonding of one terminal is good and the bonding of the other terminal is poor, the one terminal is transmitted when reaching the heat parallel. Since heat diffuses toward the other terminal, the temperature distribution is blurred. For this reason, it is more preferable to measure the temperature in a transient state. In the present embodiment, the upper layer of the temperature at the measurement point 61 is measured. However, the temperature distribution on the back surface of the LED element 13 may be recognized.

10…LED装置(半導体発光装置)、
11…樹脂層、
12…回路基板、
13…LED素子(半導体発光素子)、
14…−電極、
14a,15a…スルーホール、
14b,15b…出力電極、
15…+電極、
16…板材、
21…n型半導体層、
22…p型半導体層、
23…n側バンプ、
24…p側バンプ、
25…サファイア基板、
51…集合基板、
52…サーモグラフィ、
53…検査部、
54…加熱台、
61,62…測定点
63,64…温度上昇カーブ。
10 ... LED device (semiconductor light-emitting device),
11 ... resin layer,
12 ... circuit board,
13 ... LED element (semiconductor light emitting element),
14 ...- electrodes,
14a, 15a ... through hole,
14b, 15b ... output electrodes,
15 ... + electrode,
16 ... plate material,
21 ... n-type semiconductor layer,
22 ... p-type semiconductor layer,
23 ... n-side bump,
24 ... p-side bump,
25 ... sapphire substrate,
51. Collective substrate,
52 ... Thermography,
53. Inspection section,
54 ... heating table,
61, 62 ... measurement points 63, 64 ... temperature rise curves.

Claims (3)

回路基板に半導体発光素子をフリップチップ実装した半導体発光装置の製造方法において、
複数の前記半導体素子をフリップチップ実装した集合基板を準備する基板準備工程と、
前記集合基板を加熱し、前記半導体発光素子の裏面の温度を測定し、接合状態の良否判定を行う接合判定工程と、
前記集合基板上に実装された前記半導体発光素子を封止する封止工程と、
前記集合基板を切断し個片化した半導体発光装置を得る個片化工程と
を備えることを特徴とする半導体発光装置の製造方法。
In a method of manufacturing a semiconductor light emitting device in which a semiconductor light emitting element is flip-chip mounted on a circuit board,
A substrate preparation step of preparing a collective substrate on which a plurality of the semiconductor elements are flip-chip mounted;
A bonding determination step of heating the collective substrate, measuring the temperature of the back surface of the semiconductor light emitting element, and determining whether the bonding state is good or bad;
A sealing step of sealing the semiconductor light emitting element mounted on the collective substrate;
A method of manufacturing a semiconductor light emitting device, comprising: a step of obtaining a semiconductor light emitting device obtained by cutting the aggregate substrate into pieces.
前記接合判定工程において同時に複数の前記半導体発光素子の温度を測定することを特徴とする請求項1に記載の半導体発光装置の製造方法。   The method for manufacturing a semiconductor light emitting device according to claim 1, wherein the temperature of the plurality of semiconductor light emitting elements is measured simultaneously in the bonding determination step. 前記接合判定工程において前記集合基板の加熱を開始してから熱平衡に達するまでの間に温度測定することを特徴とする請求項1又は2に記載の半導体発光装置の製造方法。
3. The method of manufacturing a semiconductor light emitting device according to claim 1, wherein the temperature is measured from when heating of the collective substrate is started until thermal equilibrium is reached in the bonding determination step.
JP2010162944A 2010-07-20 2010-07-20 Method of manufacturing semiconductor light-emitting device Pending JP2012028390A (en)

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JPH04359447A (en) * 1991-06-05 1992-12-11 Fujitsu Ltd Soldering-junction inspecting apparatus for semiconductor device
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Publication number Priority date Publication date Assignee Title
JPH04359447A (en) * 1991-06-05 1992-12-11 Fujitsu Ltd Soldering-junction inspecting apparatus for semiconductor device
JPH09166422A (en) * 1995-12-18 1997-06-24 Nec Corp Device and method for inspecting bump junction
JP2006108621A (en) * 2004-09-09 2006-04-20 Toyoda Gosei Co Ltd Solid-state element device
JP2009218234A (en) * 2008-03-06 2009-09-24 Mitsubishi Electric Corp Solder joint inspection device

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