JP2012023535A - Video encoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an encoder and a decoder for allowing a user to easily visually confirm a state (existence of freeze) of a variable-length encoding code which is generated by compression.SOLUTION: An encoder and a decoder perform the compression/expansion processing of an input HD-SDI stream in real-time. The encoder newly includes an interface conversion part 15 for converting a transport stream, which is supplied from a multiplex part separately from a DVB-ASI stream being a conventional interface, into an SD-SDI stream to be displayed on a general purpose business monitor, and also includes means for transmitting the DVB-ASI stream or the SD-SDI stream by performing changeover in a selective way. The decoder includes an interface conversion part 32 for receiving even the SD-SDI stream from the encoder in addition to the conventional DVB-ASI stream.

Description

  The present invention relates to a video encoding apparatus capable of outputting encoded video from DVB-ASI (Digital Video Broadcasting-Asynchronous Serial Interface).

MPEG-2 and H.264 encoding methods are generally employed as HD (High Definition) video compression methods.
Even in TV broadcasting business, in the transmission of material from the coverage to the relay station and the transmission of material between relay stations, video transmission equipment is used to compress the transmission bit rate allowed by the transmission path. Is normal.

FIG. 4 is a functional block diagram of a conventional image encoding device (encoder), and FIG. 5 is a functional block diagram of a conventional image decoding device (decoder).
In FIG. 4, an HD-SDI video signal imaged with a force camera is input to the input terminal (A) of the encoder.

The pre-processing unit 1 performs pre-processing such as serial-parallel processing, filtering processing, gain correction, and the like of the input signal, and converts the video data of the actual video period excluding the blanking period into the luminance signal component Y and two types of color difference signals The video data is separated into video data of components Cb and Cr, and output to the subsequent encoding unit 2.
When the encoding unit 2 receives the video data of the luminance signal component Y and the color difference signal components Cb and Cr supplied from the preprocessing unit 1, the encoding unit 2 repeats a simple loop process inside the encoding unit 2, Performs .264 encoding processing and continuously outputs variable-length encoded codes.

The multiplexing unit 3 performs TS multiplexing in accordance with, for example, ISO / IEC 13818-1: 2007 and ARIB TR-B22. In addition to the variable-length encoded code from the encoding unit 2, an audio signal (terminal B) The private signal (terminal C) is input, and a 4-byte TS header including an identifiable flag is added to each signal every 188 bytes to generate a time-multiplexed transport stream TS. Then, the generated TS and the enable TS_EN indicating the effective period of the stream are output to the DVB-ASI formatter 4.
The DVB-ASI formatter 4 takes in TS according to the timing when the enable TS_EN from the multiplexing unit 3 becomes true, performs parallel-serial conversion and 8B / 10B encoding, and outputs the obtained DVB-ASI stream to the output terminal ( Output from BNC1) to the transmission line.

  On the other hand, as shown in FIG. 5, the decoder serial-parallel converts the DVB-ASI stream received at the input terminal (BNC2) by the DVB-ASI formatter 20 and adds the 4-byte TS header added by the multiplexing unit of the encoder device. Based on the above, the separating unit 21 separates the variable length coding code, the audio signal (terminal G), and the private signal (terminal H). Further, the variable length coded code is decompressed by the decompression unit 22 into a stream before encoding, formatted by the post-processing unit 23 into an HD-SDI stream, and output from the output terminal (F).

  As described above, the conventional video encoding apparatus performs compression processing on the video signal in the actual video period excluding the horizontal / vertical blanking period of the HD-SDI stream. The variable length encoded code generated by the compression is converted into a stream format such as DVB-ASI that does not include the concept of the blanking period, and is transmitted to the video decoding apparatus.

  In addition, as a technique related to the present invention, there is known software that performs binary dumping in software that performs structure analysis and error check of an MPEG-2 TS file (see, for example, Non-Patent Document 1).

“TS Aranizer NT1A1 (V1.4.0.0 compatible version) product description”, [online], June 2010, Nikon Systems, Inc. [searched on June 28, 2010], Internet <URL: http: //www.nikon-sys.co.jp/products/pdf/NT1A1.pdf>

  Since the conventional video encoding device and video decoding device are installed at locations apart from each other, even a simple check such as whether the output of the video encoding device is frozen or not can capture the output stream. However, a special analysis device that can perform file-based analysis was required.

  For example, if there is only a limited number of measuring instruments in the field test environment, if the output video of the decoder freezes due to some problem, whether the cause is the encoder, the transmission path, or the decoder Is difficult to identify. In general, an error trap circuit is installed in the decoder on the receiving side to detect abnormalities in the received stream and determine whether the problem is the encoder problem or the decoder problem. Since it is rare, to determine whether there is a problem with the output stream of the encoder itself on the encoder side that is the transmission source, capture the output stream and generate stream header information or specific code on a file basis It is necessary to check the period. For this reason, it is difficult for the encoder side to easily determine whether or not the output stream of the encoder is frozen.

  The present invention provides a video encoding apparatus and video decoding which can display the state of a variable length encoded code generated by compression (presence / absence of freezing) on a general-purpose business monitor in real time, and allows a user to easily visually check an output abnormality. An object is to provide an apparatus. .

The above object is to provide a video encoding device that generates a transport stream by compressing an input HD-SDI stream in real time, and encapsulates the transport stream into an effective video period in SD (Standard Definition) -SDI format. -Achieved by outputting as SDI stream.
The video encoding device compresses an input HD-SDI stream as it is in HD, and includes an interface conversion unit that adds a horizontal / vertical synchronization timing signal, performs the encapsulation, and further transmits a transmission line. And a selector for selecting the transport stream in the DVB-ASI format and the SD-SDI stream.

According to the video encoding device of the present invention, the interface conversion unit that can arbitrarily switch the output (interface with the video decoding device) to the DVB-ASI stream or the SD-SDI stream is provided. By switching to the SD-SDI stream and visually checking the monitor screen without using a video decoding device or special analyzer, it is possible to easily determine an abnormality (freeze etc.) in the output stream.
Also, by incorporating an interface conversion unit corresponding to the interface conversion unit of the video encoding device into the video decoding device, decoding can be performed regardless of which stream the video encoding device is switched to.

  An embodiment of the present invention will be described with reference to FIGS.

FIG. 1 is a functional block diagram of an encoder according to an embodiment of the present invention.
The encoder apparatus of this example includes a preprocessing unit 1, a coding unit 2, a multiplexing unit 3, a DVB-ASI formatter 4, an interface conversion unit 15, and a selector 16. The same components as those in FIG. 3 are denoted by the same reference numerals.

  The interface conversion unit 15 converts the TS into SD-SDI format according to SMPTE 259M or the like by inserting a horizontal / vertical blanking period necessary for monitor display into the TS and TS_EN signals output from the multiplexing unit 3. Bit shift unit 5, buffer 6, parity bit addition unit 7, synchronization word addition unit 8, SD-SDI formatter 9, and related timing generation unit (enable generation unit 10, buffer monitoring unit 11, read timing generation unit 12, a synchronization word detection unit 13, and a synchronization word regeneration unit 14).

  The selector (SEL) 16 switches the output stream to the DVB-ASI stream or the monitor-displayable SD-SDI format according to the switching signal reflecting the user setting input from the terminal D so that transmission is possible. is there.

  In this example, the encoder is equipped with an interface converter 1 that converts the TS stream to the SD-SDI format, so that when an error occurs, the output interface is switched to the SD-SDI stream, and the monitor screen can be visually checked without the need for a decoder. It is possible to determine whether or not the encoder output stream is frozen only by confirmation.

  That is, since the encoded stream having no correlation is displayed as pixels during normal operation of the encoder, a random noise-like image in which one side is uniformly jagged is displayed on the monitor screen. On the other hand, if the buffer in the encoder is broken or the operation freezes due to external factors such as electrostatic noise, the previous data will be held and output. The whole or part of the display on the monitor screen is displayed in a stationary manner without being jagged, so that it can be easily determined that the problem is on the encoder side.

Next, an internal block of the interface conversion unit 15 of the encoder of this example will be described with reference to FIG.
Each internal bookmark in the interface converter 1 must manage (keep constant) the frame phase of the input HD-SDI and output SD-SDI signals.
The synchronization word detection unit 13 acquires an HD-SDI input signal to the terminal A through the preprocessing unit 1 and detects a frame pulse signal based on a frame period obtained by detecting a synchronization word such as TRS (Timing Reference Signal). Generate.
The sync word regenerator 14 regenerates a sync word including the horizontal / vertical sync word of the SD-SDI output signal (BNC1) based on the pulse from the sync word detector 13 and uses it as a reference for each internal block. Passed as timing signal F-rst.

On the other hand, the bit shift unit 5 receives the 8-bit transport stream TS and the enable signal TS_EN from the multiplexing unit 3 and converts the 8-bit TS per word into 9-bit data by 8b / 9b in order to improve the image quality.
Specifically, 8-bit TS per word supplied in bursts according to the TS_EN signal is sequentially stored in a register, and when 9 words are concatenated to form 72-bit bus data, the alignment is re-divided by 9 bits and 9 bits. / The process of sequentially writing data as word data to the subsequent buffer 6 is repeated.
Here, for example, when the format of the SD-SDI signal output to the transmission line is 480i@59.94 format, the multiplexing unit 3 determines from the ratio of the total number of pixels including the number of pixels in the effective video area and the blanking period. The maximum bit rate of TS data that can be transferred is about 188 Mbps according to the following conversion formula (= (number of pixels in effective video area / total number of pixels) × 27 MHz × 9 bits).

  The enable generation unit 10 is initialized by the reference timing signal F-rst (or line start timing), and every time the TS_EN signal is received nine times, the bit shift unit 5 reads enable and the buffer 6 write enable (hereinafter simply referred to as enable). Signal). Using the enable signal generated by the enable generation unit 10 as a trigger, the buffer monitoring unit 11 defeats the time from the start of writing, and when the time corresponding to 19.5 lines has elapsed, GO as a read start trigger signal is read timing. The data is sent to the generation unit 12 and the synchronization word addition unit 8.

The buffer 6 is a rate conversion buffer for providing a horizontal / vertical blanking period necessary for monitor display for the 9-bit TS data described above. The read control of the buffer 6 is performed according to the timing control from the read timing generation unit 12 that manages the time management of the effective video period and the blanking period in the SD-SDI format.
Specifically, in the above-mentioned SD-SDI format, the vertical blanking periods of Field 1 and Field 2 are 20 lines and 19 lines, respectively, so 19.5 lines (1 line = approx. 63.5 μs) If reading is started after the elapse of time, the buffer will not fail (underflow). The buffer 6 has a capacity of at least about 40 lines.

The buffer monitoring unit 11 uses the enable signal generated by the enable generation unit 10 as a trigger and counts the time from the start of writing. When the time corresponding to 19.5 lines elapses, the buffer monitoring unit 11 reads GO as a read start trigger signal. The data is output to the timing generation unit 12 and the synchronization word addition unit 8.
The read timing generation unit 12 performs read control of the buffer 6 during the effective video period in the SD-SDI format based on the GO and F-rst.

  The parity bit adding unit 7 performs a process of combining the parity bit obtained by inverting the MSB bit with respect to the 9-bit data read from the buffer 6 and outputs the result to the synchronization word adding unit 8.

  The synchronization word adding unit 8 adds a synchronization word such as SAV (Start Active Video) and EAV (End Ative Video) indicating the start and end of the effective video area for each line to the 10-bit parallel data from the synchronization word adding unit 8. Insert at a predetermined timing and output to the SD-SDI formatter 9 in the subsequent stage.

  The SD-SDI formatter 9 scrambles 10-bit parallel data, performs serial-parallel conversion, and outputs a stream compliant with the SD-SDI standard. An appropriate value is stuffed to ANC (ANCyillary data).

Here, with reference to FIG. 3, the internal block of the encoding part 2 of the encoder of this example will be described. The encoding unit 2 in this example is a general H.264 encoder.
The input terminal 101 corresponds to an input terminal for a signal supplied from the preprocessing unit 1 in FIG.
The MB division unit 103 encodes the luminance signal Y of the 16 × 16 pixel block and the color difference signals Cb and Cr of the 8 × 8 pixel block in units of MB (Mac block). Conversion to the target signal MBS.

Subtraction unit 104, a prediction image signal PV to be described later from the coded signal MBS subtracted in MB, supplied to the orthogonal transform unit 105 and the resulting difference as a predictive differential picture signal PDV _1. The encoding target signal MBS is handled as 16 × 16 pixels in the luminance signal Y and 8 × 8 pixels in the color difference signals Cb and Cr, but only the luminance signal Y is described below for the sake of simplicity. Is described as an encoding target.
The orthogonal transform unit 105 converts the image luminance data in the horizontal and vertical directions into frequency spectra in the horizontal and vertical directions.

The quantizing unit 106 uses the characteristic that human visual characteristics are insensitive to high frequency components for video data converted into a spatial frequency spectrum, and changes the roughness between the high frequency component side and the low frequency component side to quantize. And output as a conversion coefficient.
The variable length encoding unit 107 compresses the image data by encoding the transform coefficient from the quantization unit 106 and outputs the compressed image data from the output terminal 102 to the next multiplexing unit 3.

On the other hand, the inverse quantization unit 108 performs an inverse quantization process on the transform coefficients of the luminance signal Y and the color difference signals Cb and Cr from the quantization unit 106.
The inverse orthogonal transform unit 109 performs inverse orthogonal transform on the inverse quantization result of the inverse quantization unit 108, restores the reproduction prediction difference signal PDV ₂ , and outputs it to the addition unit 110.

The adder 110 reproduces the decoded image signal RV by adding the reproduction prediction signal PDV ₂ and a prediction image signal PV described later.
The debucking filter unit 111 removes the buzzing distortion from the decoded image signal RV in order to perform motion compensation described later.
The storage unit 112 holds the decoded image signal RV from which distortion has been removed as a reference picture, and supplies the decoded picture signal RV to the motion compensation prediction unit 113 and the motion detection unit 116.

  The intra prediction unit 114 predicts the encoding target signal MBS from the MB dividing unit 103 using the encoded image signal RV that is the encoding target signal immediately before or one line before and is supplied from the addition unit 110, and performs prediction Output to the selection unit as an image candidate.

The motion detection unit 116 uses 16 × 16, 16 × 8, 8 × 16, 8 × 8, 8 × 4, 4 × 8, and 4 × 4 pixel blocks that use the encoding target signal MBS as a target of motion search. And search for each bookmark. For example, a 16 × 16 encoding target signal MBS is divided into four 8 × 8 pixel blocks, and these four blocks are compared with a reference image to be identical or similar. Search for bookmarks. By the search, a difference value of the minimum luminance is calculated and output to the motion compensation prediction unit 113 and the selection unit 115.
The motion compensation prediction unit 113 selects an optimal prediction image based on the calculation result of the bookmark search.

In the selection unit 115, if the difference value in the motion vector search of the motion detection unit 116 is larger than a threshold set experimentally in advance, the selection unit 115 matches or is similar to the target encoding target signal MBS within the search range. It is determined that there is no bookmark, and the output of the intra prediction unit 114 is selected instead of the output signal from the motion detection unit 116 and supplied to the subtraction unit 104 and the addition unit 110.
On the other hand, when the divided block having the smallest difference value is selected in the motion vector search of the motion detection unit 116, the selection unit 115 selects the output of the motion compensation prediction unit 113. In the above description, only the luminance signal Y has been described. However, the color difference signal is processed in the same manner as the luminance signal except when it is divided into 4 × 4 fixed pixels, and thus detailed description thereof is omitted. .

Next, the decoder of this example will be described with reference to FIG.
The decoder of this example includes a DVB-ASI formatter 20, a separation unit 21, a decompression unit 22, a post-processing unit 23, an interface conversion unit 32, and a selector 33. The same parts as those in FIG.

  The decoder of this example receives the DVB-ASI stream input from the input terminal (BNC2) by the DVB-ASI deformer 20 and appropriately receives the SD-SDI signal from the SD-SDI by appropriately supplying the switching signal (SEL) from the outside. They are received by the SDI deformer 24, decompressed in real time, and output as HD or SD-SDI signals. The operation when received by the DVB-ASI deformator 20 is the same as the conventional one.

The interface conversion unit 32 basically performs the opposite process of the interface conversion unit 15.
The SD-SDI deformator 24 performs descrambling processing, serial-parallel conversion of serial data into 10-bit parallel data, and passes the data to the synchronization word detection unit 25.

The synchronization word detection unit 25 detects a synchronization word indicating the head of the frame, outputs it as an activation trigger signal (F_rst), and outputs 10-bit parallel data as it is. When the parallel data to be output is actual valid data, the enable signal ED is also output.
The parity bit separation unit 26 deletes the parity bit located in the most significant bit from the 10-bit parallel data that has passed through the synchronization word detection unit 25, and outputs the 9-bit data to the bit shift unit 27. .

The bit shift unit 27 is a block for converting the input 9-bit data into the same 8 bits as the bus output by the DVB-ASI deformer 20, and is a 9b / 9 which is in a mirror relationship with the bit shift unit 5. Perform 8b conversion.
Specifically, according to the enable signal ED from the synchronization word detection unit 25, 9 bits of data Db_9 per word is stored in a register and connected to 8 words, and when the data becomes 72 bits, the alignment is re-divided by 8 bits. The process of sequentially writing the 8-bit / word data Db_8 into the subsequent buffer 28 is repeated.

  The buffer 28 is a rate conversion buffer for removing the horizontal / vertical blanking period inserted by the encoder from the above-described 8-bit data Db_8 so as to obtain a uniform output. The read control of the buffer 28 is performed by leveling the data read within the frame period including the horizontal / vertical blanking period at the TS rate (about 188 Mbps) that matches the TS rate transmitted from the multiplexing unit of the encoder. Buffer 2 never fails.

  Therefore, here, at least a time corresponding to one line or more after the start of writing by the enable generation unit 29 is counted by the timer unit 30, and when the corresponding time has elapsed, the TS timing generation unit 31 is activated. To do. As a result, the transport stream that has returned to the same rate as the TS input to the interface conversion unit 1 of the encoder is output from the 28 buffer 2 and supplied to the subsequent separation unit 21.

As described above, when the encoder and decoder of this example are used in pairs, the HD TS is encapsulated in the SD-HDI signal and transmitted, so that the video equipment that can handle only the SD-HDI signal in the transmission path. Even if it exists, HD video, audio, material transmission auxiliary data, and the like can be reproduced on the decoder side.
Note that the TS is not limited to being encapsulated in the SD-HDI format, but may be encapsulated in HD-HDI. However, if it is SD, it can be displayed on most commercial monitors (including HD monitors). Usually, only SD is sufficient.
The encoder input and decoder output are described as HD-SDI. However, the present invention is not limited to this, and 3G-SDI (SMPTE 424M) or other digital video signal interfaces may be used.
Further, although the synchronization word detection unit 13 has been described as detecting a synchronization word from the HD-SDI signal input to the preprocessing unit 1, the synchronization word detection unit 13 is not limited thereto, and an equivalent signal may be acquired from the multiplexing unit 3. .
The selectors 16 and 32 are not limited to those that immediately follow a switching signal from the outside, but may be switched after waiting for an activation trigger signal (F_rst) corresponding to the head of the frame. 25 or the parity bit separation unit 26 may be automatically switched according to the success or failure of the process.
Further, the encoder may be provided with a dedicated output terminal for outputting the SD-SDI signal separately from BNC1, and in this case, the selector 16 may not be provided.

Functional block diagram of the encoder in the embodiment Functional block diagram of the decoder in the embodiment The internal block of the encoding part 2 in the encoder of FIG. Functional block diagram of a conventional image encoding device (encoder) Functional block diagram of a conventional image decoding device (decoder)

DESCRIPTION OF SYMBOLS 1 ... Pre-processing part, 2 ... Code | symbol part, 3 ... Multiplexing part, 4 ... DVB-ASI formatter,
5 ... bit shift unit, 6 ... buffer, 7 ... parity bit adding unit,
8 ... Synchronized word adding unit, 9 ... SD-SDI formatter, 10 ... Enable generating unit,
11: Buffer monitoring unit, 12 ... Read timing generation unit,
13 ... Synchronized word detector, 14 ... Synchronized word regeneration unit,
15 ... interface conversion unit, 16, 33 ... selector (SEL),
20 ... DVB-ASI formatter, 21 ... separation unit, 22 ... expansion unit, 23 ... post-processing unit,
24 ... SD-SDI deformer, 25 ... Sync word detector,
26: Parity bit separation unit, 27 ... Bit shift unit, 28 ... Buffer,
29 ... Enable generation unit, 30 ... Timer unit, 31 ... TS timing generation unit,
32: Interface conversion unit.

Claims (2)

  In a video encoding device that generates a transport stream by compressing the input HD-SDI stream in real time, the video code that encapsulates the transport stream into an effective video period in the SD-SDI format and outputs it as an SD-SDI signal Device.   2. The video encoding device according to claim 1, wherein the video encoding device compresses an input HD-SDI stream as it is in HD and includes an interface conversion unit for adding a horizontal / vertical synchronization timing signal. A video encoding apparatus comprising: a selector that performs the encapsulation and further selects the transport stream in the DVB-ASI format and the SD-SD stream as a transmission stream to be output to a transmission path.

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