JP2011253226A - Ic chip issue system, ic chip issue method and ic chip issue program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent IC chips, issued by multi-step processing, from being illicitly issued or otherwise processed by the processing personnel or any third party while reducing the consumption of memory resources used for a key intended for authentication at each step of processing.SOLUTION: An IC chip issue system comprises a key generating device that generates a first key and a second key making up an asymmetric pair, an IC chip issued by a predetermined multi-step processing, and a plurality of process processors that execute the multi-step processing, wherein authentication at each step is processed with a common key, each step at which authentication is successful with the common key is allowed to be executed, a key for subsequent steps is encrypted with the first key out of the asymmetric pair of keys belonging to the manager and distributed, and the key for subsequent steps is set if authentication with the second key is successfully processed.

Description

  The present invention relates to a technique for issuing an IC chip through a plurality of process processes.

  Various services such as an electronic money service, a cash card service, and a credit card service are provided using an information medium including an IC (Integrated Circuit) chip. Such an information medium is manufactured through a plurality of process steps. Here, when a plurality of process processes are performed by different process processors (entities), if a specific process processor can rewrite the contents of the IC chip without limitation, a card that can be used illegally is manufactured. Can be considered. For this reason, it is desirable that each process is performed independently. Therefore, the IC chip has a function of performing an authentication process using a key determined in each process, and performing a process process in a range determined for each process only when the authentication is successful. Some are pre-installed in the pre-manufacturing stage.

  For example, Patent Document 1 describes a technique for performing such an authentication process for each process using a key based on a public key cryptosystem. Here, among the plurality of process processes, the process processor of the subsequent process process generates a public key and a secret key by the public key cryptosystem, and transmits the public key to the process processor of the previous process process. The process processor of the previous process registers the public key of the process processor of the subsequent process in the IC chip and delivers the IC chip to the subsequent process processor. A process processor of a later process inputs his / her private key into the IC chip. The IC chip performs an authentication process based on the public key registered in the previous process and the input private key, and permits the process process to be executed when the authentication is successful. Thereby, only the post-process processor having the secret key can perform the post-process. That is, for example, even if the IC chip is stolen when the IC chip is handed over from the process processor of the previous process to the post process processor, a third party impersonates the post process processor and performs illegal acts such as issue processing. It becomes impossible to do.

Japanese Patent No. 3913363

  However, the public key based on the public key cryptosystem has a larger amount of data than the key based on the common key system. That is, according to the above-described technique, it is necessary to store the public key corresponding to each of the plurality of process processes in the IC chip, so that it is considered that a considerable amount of memory resources of the IC chip are consumed. Also, for example, if the previous process processor sets his / her public key as a public key for performing the subsequent process process, the previous process processer uses his / her private key to succeed in authentication, Thus, a plurality of process processes can be performed. Therefore, it is desirable to reduce the consumption of memory resources of the IC chip and to prevent an illegal act by such self-made performance.

  The present invention has been made in view of such a situation, and while reducing the consumption of memory resources for a key used for an authentication process for each process of an IC chip issued through a plurality of process processes, An IC chip issuance system, an IC chip issuance method, and an IC chip issuance program for preventing a process processor or a third party from performing illegal acts such as issuance processing are provided.

  In order to solve the above-described problem, the present invention is issued through a key generation device that generates a first key and a second key, which are a pair of asymmetric keys, and a plurality of predetermined process steps. IC chip issuing system comprising an IC chip and a plurality of process processing devices for performing a plurality of process processes, wherein the IC chip includes a key storage unit in which a second key is stored in advance, and a plurality of process processes A process key storage unit that stores a process key, which is a key based on a common key encryption method, defined for each process, a process key corresponding to a process performed by the process processor from the process processor, and a first A receiving unit that receives a post-process key corresponding to a process process after the process process, encrypted using the key; a process key received by the receiving unit; and a process key stored in the process key storage unit; Process key authentication unit that performs authentication processing based on Therefore, when it is determined that the authentication is successful, a process process permission unit that permits execution of a process process corresponding to the process key received by the reception unit, an encrypted post-process key received by the reception unit, and a key storage unit If the authentication process is performed based on the second key stored in the process key and it is determined that the authentication is successful, the encrypted subsequent process key is decrypted using the second key and stored in each process key storage unit. A registration key authenticating unit, wherein the key generation device encrypts the input post-process key using the first key, and the post-process key encrypted by the encryption processing unit A process key transmitting unit that transmits the process key to the process processing device, and the process processing device is transmitted from a key generation device and a process key storage unit that stores a process key corresponding to a process performed by itself. Stored in the post-process key receiving unit that receives the encrypted post-process key and the process key storage unit The process part and the encrypted post-process key received by the post-process key receiving part are transmitted to the IC chip, and the process processing is executed by the IC chip according to the process key transmitted by the transmission part. And a process processing unit that executes a predetermined process for the IC chip.

  Further, the present invention provides a process processing device that performs process processing after another process processing device among a plurality of process processing devices, a key receiving unit that receives a second key from a key generation device, A process key generation unit that generates a post-process key corresponding to the process process, a random number is generated, the post-process key is blinded based on the random number and the second key, and the blinded post-process key is transferred to the key generation device. Input, transmitted in accordance with the input post-blind post-process key, received the post-process key that is blinded and encrypted using the first key by the key generation device, and performs non-blind processing A blind processing unit that generates a post-process key that is encrypted using the first key, and a process that is performed by the process processing device that generates the encrypted post-process key generated by the blind processing unit. Process processing for further process processing Characterized in that it comprises an encryption step key transmission unit for transmitting to the location, the.

  In the present invention, the process key includes key data based on a predetermined key encryption method and information indicating a predetermined tag, and the process key authentication unit and the registration key authentication unit are process keys to be authenticated. The authentication processing is performed based on the tag included in.

  According to the present invention, the key storage unit of the above-described IC chip is a non-rewritable memory, and each process key storage unit is a rewritable memory.

  In addition, the present invention provides a key generation device that generates a first key and a second key, which are a pair of asymmetric keys, a key storage unit that stores a second key in advance, and a plurality of predetermined numbers. An IC chip having a process key storage unit that stores a process key, which is a key based on a common key encryption method, determined for each process process, and a process key corresponding to the process process performed by itself is stored. An IC chip issuance method for an IC chip issuance system, comprising a plurality of process processing devices having a process key storage unit and performing a plurality of process processes, wherein the IC chip is transferred from the process processing device to the process processing device. Receiving a process key corresponding to a process process to be performed, a post-process key corresponding to a process process subsequent to the process process, encrypted using the first key, the received process key, and a process Authentication process based on the process key stored in the key storage unit And a step of permitting the execution of the process corresponding to the received process key, the received encrypted post-process key, and the second stored in the key storage unit. A step of decrypting the encrypted post-process key using the second key and storing the encrypted post-process key in each process key storage unit when the authentication process is performed based on the key and the authentication is determined to be successful; The step of encrypting the input post-process key using the first key, the step of transmitting the post-process key encrypted by the encryption processing unit to the process processing device, and the process processing device, A step of receiving an encrypted post-process key transmitted from the key generation device; a process key stored in the process key storage unit; and an encrypted post-process key received by the post-process key receiving unit. The step of transmitting to the IC chip, and the transmitter Depending on the process key, if it is determined to permit the execution of the steps processed by the IC chip, characterized in that it comprises a step of performing a process processing determined for IC chip, a.

  In addition, the present invention provides a key generation device that generates a first key and a second key, which are a pair of asymmetric keys, a key storage unit that stores a second key in advance, and a plurality of predetermined numbers. An IC chip having a process key storage unit that stores a process key, which is a key based on a common key encryption method, determined for each process process, and a process key corresponding to the process process performed by itself is stored. An IC chip issuance system comprising a plurality of process processing devices having a process key storage unit and a plurality of process processing devices, and from the process processing device to the process processing performed by the process processing device. A step of receiving a corresponding process key and a post-process key corresponding to a process process subsequent to the process process encrypted using the first key, and storing the received process key and the process key storage unit The authentication process is performed based on the processed process key. And the step of permitting the execution of the process corresponding to the received process key, the received encrypted post-process key, and the second key stored in the key storage unit. When the authentication process is performed based on the authentication, and it is determined that the authentication is successful, the encrypted post-process key is decrypted using the second key and stored in each process key storage unit, and key generation is performed. A step of encrypting a post-process key input to the computer of the apparatus using a first key; and a step of transmitting the post-process key encrypted by the encryption processing unit to the process processing apparatus. Receiving the encrypted post-process key transmitted from the key generation apparatus to the computer of the process processing apparatus, the process key stored in the process key storage unit, and the post-process key receiving unit The encrypted post-process key And a step of executing a predetermined process process for the IC chip when it is determined that the IC chip is allowed to execute the process process according to the process key transmitted by the transmitter. IC chip issuing program to be executed.

  As described above, according to the present invention, the authentication process in each process process is performed with a common key, and when the authentication of the common key is successful, the process process is executed, and among the pair of asymmetric keys of the administrator, The post-process key is encrypted and distributed by the first key, and the post-process key can be set when the authentication process by the second key is successful. It is possible to prevent the process processor from performing an illegal act such as an issue process while reducing the consumption of memory resources.

It is a figure which shows the process processor who performs each process process by one Embodiment of this invention. 1 is a block diagram illustrating a configuration example of an IC chip issuing system 1 according to an embodiment of the present invention. It is a figure which shows the example which performs the authentication process of the process key by one Embodiment of this invention by a challenge response. It is a figure which shows the example of the blind process by one Embodiment of this invention. It is a figure which shows the example of the non-blind process by one Embodiment of this invention. It is a sequence diagram which shows the operation example of the initial phase of the IC chip issue system 1 by one Embodiment of this invention. It is a sequence diagram which shows the operation example of the initial phase of the IC chip issue system 1 by one Embodiment of this invention. It is a sequence diagram which shows the operation example of the process of the IC chip issue system 1 by one Embodiment of this invention.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
The IC chip issuing system 1 according to the present embodiment issues an IC card including an IC chip issued through a plurality of process processes. FIG. 1 is a diagram illustrating a process processor (entity) who performs each process of the present embodiment. The entity of the symbol a is a card vendor that manufactures an IC card OS (Operating System) (OS manufacturing process). The entity of symbol b is an administrator who comprehensively manages the hardware aspects of the IC card to be issued. The administrator generates a key to be stored in the ROM of the IC card (key generation process) or mounts an IC chip manufactured by an IC vendor on the IC card (IC card manufacturing process). The entity of the symbol c is an IC vendor that physically manufactures an IC chip in which an IC card OS and various keys are stored (IC chip manufacturing process). The entity of the symbol d is a manufacturer that stores the data structure in the IC card manufactured by the administrator (0th issue process step). The entity of the symbol e is a producer that stores a service program in an IC card manufactured by the manufacturer (service manufacturing process). The entity of the symbol f is a service provider that provides a service using the manufactured IC card (service provision process). Here, an example in which each process process is performed by six types of entities will be described. However, at least three types of an entity that performs a key generation process and two or more types of entities that perform other two or more process processes are described. The IC chip issuing system 1 of this embodiment can be applied to a system in which the above entities exist.

  Here, the OS manufacturing process, the key generation process, the IC chip manufacturing process, the IC card manufacturing process, and the zero-order issue processing process are processes that mainly manufacture the hardware side of the IC card. On the other hand, the service manufacturing process and the service providing process are processes for manufacturing a software side of a service provided mainly using an IC card. In the present embodiment, authentication processing in these process processes is performed by an encryption technique using a key. Since the authentication process using such a key is performed in the process after the key is stored in the IC chip in the IC chip manufacturing process, the IC card manufacturing process after the IC chip manufacturing process is the first step. The process will be described as a second process, a service manufacturing process as a third process, and a service providing process as a fourth process.

  FIG. 2 is a block diagram showing the configuration of the IC chip issuing system of this embodiment. The IC chip issuing system 1 includes an IC chip 10, a key generation device 20 that performs a first process, a process processor 30-1 that performs a second process, and a process processor that performs a third process. 30-2 and a computer processing apparatus 30-3 for performing a fourth process. Here, a predetermined process key is transmitted and received between the plurality of computer devices. This transmission / reception may be performed, for example, by connecting computer devices via a network, or may be performed, for example, by storing key information in some recording medium and mailing the recording medium. When transmitting and receiving via a network, key information is securely transmitted and received by using encryption or a dedicated line.

  The key generation device 20, the process processing device 30-1, the process processing device 30-2, and the process processing device 30-3 each include a process processing unit that performs a process process for manufacturing the IC chip 10. The process process itself is the same as the conventional one. In addition, the process processing apparatus 30-1, the process processing apparatus 30-2, and the process processing apparatus 30-3 have the same configuration except that different process processes are performed. The apparatus 30 will be described. In the present embodiment, three process processing apparatuses 30 that perform three process steps are shown and described, but the process processing apparatuses 30 may be two or more. That is, the entity corresponding to the process processing apparatus 30 may be two or more types.

  The IC chip 10 is an integrated circuit that records information and performs calculations. The hardware and software are manufactured through a plurality of predetermined process processes, and issued for providing services. In the present embodiment, the IC chip 10 is issued by being mounted on an IC card. The IC chip 10 includes a key storage unit 11, each process key storage unit 12, a process key authentication unit 13, a registration key authentication unit 14, and a process processing permission unit 15.

  The key storage unit 11 stores a second key of the first key and the second key, which is a pair of asymmetric keys generated by the key generation device 20, and a management key. The key storage unit 11 is a non-rewritable memory (ROM (Read Only Memory)). Here, the second key stored in the key storage unit 11 is a public key (PK: e, n) based on a public key cryptosystem (for example, RSA). The second key is used to decrypt or verify information encrypted by the corresponding first key (SK: d). The management key (ROM.key) is a common key based on a common key cryptosystem. The management key is used to conceal information stored in the IC chip 10. Here, the information stored in each process key storage unit 12 of the IC chip 10 is encrypted and stored by the registration key authentication unit 14 of the IC chip 10 using the management key. When information stored in each process key storage unit 12 is read, the process key authentication unit 13 or the registration key authentication unit 14 of the IC chip 10 decrypts the information using the management key. The key storage unit 11 is formed in the IC chip 10 by, for example, an IC chip vendor in the IC chip manufacturing process shown in FIG.

  Each process key storage unit 12 stores a process key, which is a key based on a common key encryption method, determined for each of a plurality of process processes in the manufacturing process of the IC chip 10. Each process key storage unit 12 is a rewritable memory (for example, EEPROM). The process key is transmitted from the key generation apparatus 20 or the process processing apparatus 30 in each process, and is stored in each process key storage unit 12 by the registration key authentication unit 14. Further, the process key is read by the process key authenticating unit 13 in each process, and the validity is verified. Each process key storage unit 12 stores, for example, a second process key (man.key), a third process key (pro.key), and a fourth process key (initial.key). Here, the process key includes key data based on the common key encryption method and information indicating a predetermined tag. The tag is configured in a format such as <tag name> <key data size> <key data>, for example. The process key is handled with such a tag attached when the key data is generated. Using such a tag, it is possible to authenticate the validity of the process key.

Here, the communication unit included in the IC chip 10 described above is encrypted by using the process key corresponding to the process performed by the process processing apparatus 30 and the first key from the process processing apparatus 30. A post-process key corresponding to a process process subsequent to the process process is received.
The process key authentication unit 13 performs an authentication process based on the process key received by the communication unit and the process key stored in each process key storage unit 12. The process key authenticating unit 13 determines that the authentication is successful if the contents of the process key received by the communication unit match the contents of the process key stored in each process key storage unit 12, and determines that the authentication fails if they do not match. . In this way, the entity authentication process in each step can be performed using the common key. This eliminates the need for the IC chip 10 to store the public key for each process for the entity authentication process in each process. That is, since the common key has a smaller data amount than the public key, it is possible to reduce the consumption of memory resources of the IC chip 10. Here, the process key authentication process may be performed by a challenge response as shown in FIG.

  When the registration key authentication unit 14 performs authentication processing based on the encrypted post-process key received by the communication unit and the second key stored in the key storage unit 11 and determines that the authentication is successful, The encrypted post-process key is stored in each process key storage unit 12. The authentication process is performed based on a tag included in a process key that is an authentication target. Here, the registration key authenticating unit 14 uses the second key to decrypt the encrypted post-process key received by the communication unit. If the decrypted information matches a predetermined tag, it is determined that authentication is successful, and if it does not match, it is determined that authentication fails. Here, for example, since the second key is unknown to a third party, it is extremely difficult to generate information that matches a specific tag when decrypted by the second key. For this reason, even if a specific process processor or a third party tries to register an arbitrary post-process key, the registration key authentication unit 14 determines that the authentication has failed and registration cannot be performed. Thereby, it is possible to prevent a specific process processor or a third party whose second key is unknown from performing an illegal act such as an issuance process by setting a post-process key by himself / herself.

  If the process key authentication unit 13 determines that the authentication is successful by the process key authentication unit 13, the process process permission unit 15 permits the process key corresponding to the process key to be authenticated by the process key authentication unit 13 to be executed. Specifically, permitting the execution of the process is, for example, performing a mode change that enables rewriting of data or a data structure in a memory area of the IC chip 10 that is predetermined to be rewritten by the process.

The key generation device 20 is a computer device that generates a key to be stored in advance in the ROM of the IC chip 10, and includes a key generation unit 21, a key storage unit 22, a key output unit 23, an encryption processing unit 24, and an encryption unit. The process key transmission unit 25, the process key generation unit 26, and the post-process key registration unit 27 are provided.
The key generation unit 21 generates a first key (SK) and a second key (PK) that are a pair of asymmetric keys, and a management key (ROM.key) that is a common key, and a key storage unit 22. Remember me.
The key storage unit 22 stores a first key, a second key, and a management key generated by the key generation unit 21.
The key output unit 23 outputs the management key and the second key stored in the key storage unit 22. The output management key and the second key are stored in the key storage unit 11 of the IC chip 10 by the IC vendor.

The encryption processing unit 24 encrypts the process key generated and transmitted by the process processing device 30-3 using the first key stored in the key storage unit 22. Here, the process key encrypted by the encryption processing unit 24 is a process key blinded by the process processing device 30-3, as will be described later.
The encryption process key transmission unit 25 transmits the process key encrypted by the encryption processing unit 24 to the process processing apparatus 30 that is the process key transmission source.

The process key generation unit 26 generates a second process key (man.key). The process key generation unit 26 transmits the generated second process key to the process processing apparatus 30-1.
The post-process key registration unit 27 encrypts the second process key generated by the process key generation unit 26 with the first key stored in the key storage unit 22 and stores it in the registration key authentication unit 14 of the IC chip 10. Send.

The process processing device 30-1 is a computer device that executes a specific process process among a plurality of predetermined process processes, and includes a process key storage unit 31 (process key storage unit 31-1) and a post-process key. A registration unit 32 (post-process key registration unit 32-1).
The process key storage unit 31 stores a process key (second process key) corresponding to a process performed by itself. For example, the process processing device 30-1 receives the second process key transmitted from the key generation device 20, and stores the second process key in the process key storage unit 31-1.

  The post-process key registration unit 32 receives the post-process key encrypted by the first key, and transmits the received post-process key to the registration key authentication unit 14 of the IC chip 10. Here, the post-process key (third process key) encrypted by the first key is generated by the process processing device 30-3 and blinded, and then encrypted by the key generation device 20 to be processed. It is deblinded and transmitted by the processing device 30-3. In other words, in this example, the post-process key encrypted with the first key is transmitted from the key generation device 20 to the process processing device 30-3, and the process processing device 30-1 is transmitted via the process processing device 30-3. Sent to. However, for example, when there is another manufacturing process in terms of hardware between the zero-order issue processing process (second process) and the service manufacturing process (third process), the process key of that process is the key The generation device 20 may generate and encrypt the data, and transmit it as a post-process key to the process processing device 30 of the process. Alternatively, a reliable entity that generates and manages all process keys may be set so that the entity distributes the process keys. The process processing device 30 has the function of an IC reader / writer that communicates with the IC chip 10, and is encrypted by the first key transmitted from the encryption process key transmission unit 35-3 of the process processing device 30-3. The converted post-process key and the process key stored in the process key storage unit 31 are transmitted to the IC chip 10.

  As described above, the process processing apparatus 30 includes a process processing unit that performs a predetermined process. The process processing unit uses the IC chip 10 according to the process key transmitted from the communication unit of the process processing device 30 to the IC chip 10 and the encrypted post-process key transmitted from the post-process key registration unit 32-1. When it is determined that the execution of the process process is permitted, the process process defined for the IC chip is executed. Here, the execution of the process process specifically means, for example, rewriting of data and data structure for the memory area of the IC chip 10 that is rewritten by the process.

The process processing apparatus 30-2 has the same configuration as the process processing apparatus 30-1, and performs the process process of the third process.
The process processing device 30-3 is a computer device that performs process processing after the other process processing devices 30 among the plurality of process processing devices 30, and performs fourth process processing in the present embodiment. The process processing device 30-3 includes a process key storage unit 31 (process key storage unit 31-3), a process key generation unit 33 (process key generation unit 33-3), and a blind processing unit 34 (blind processing unit). 34-3) and an encryption process key transmission unit 35 (encryption process key transmission unit 35-3).
The process key storage unit 31-3 has the same configuration as the process key storage unit 31-1 included in the process processing device 30-1, and stores a fourth process key for performing authentication in the fourth process process.

  The process key generation unit 33 generates a third process key corresponding to a third process, which is a process subsequent to the second process, and a fourth process key corresponding to the fourth process. The process key generation unit 33 transmits the generated third process key to the process processing apparatus 30-2. Further, the process key generation unit 33 stores the generated fourth process key in the process key storage unit 31-3.

  The blind processing unit 34 blinds the third process key (pro.key) and the fourth process key (Initial.key) generated by the process key generation unit 33 and sends them to the encryption processing unit 24. Send. Here, the blind processing unit 34 receives the second key transmitted from the key generation device 20, generates a random number, blinds the process key based on the generated random number and the second key, and performs blind processing. The process key is transmitted to the key generation apparatus 20, and the process key that has been blinded and encrypted using the first key by the key generation apparatus 20 is received from the key generation apparatus 20 and is unblinded. Process. As a result, the blind processing unit 34 generates a process key encrypted using the first key.

FIG. 4 is a diagram illustrating the concept of the blinding process performed by the blinding processing unit 34. Here, the second key (PK) is e, n, the random number that is the blind factor is r1, and the third process key that includes the verification tag to be blinded is the pro. The key. The blinding processing unit 34-3 performs the blinding process of the third process key (pro.key) by calculating (r1 ^e · pro.key mod n). The second key (PK) is set to e, n, the random number that is a blind factor is set to r2, and the fourth process key including the verification tag to be blinded is set to initial. The key. Here, initial. If the key is, for example, a PIN (Personal identification number), the blinding processing unit 34-3 performs initial. The hash value of the key is calculated (h (initial.key)). For example, SHA-256 can be applied to hashing. The blinding processing unit 34-3 performs the blinding process of the third process key (pro.key) by calculating (r1 ^e · h (initial.key) mod n). initial. If the key is not a PIN but an encryption key, the process may be executed without hashing. Here, pro. When the key and h (initial.key) are blinded, it is desirable to perform a padding process using, for example, an OAEP (Optimal Asymmetric Encryption Padding) method.

FIG. 5 is a diagram illustrating the concept of the non-blind processing by the blind processing unit 34. 5 is a diagram illustrating an encryption process by the encryption processing unit 24 of the key generation device 20, and a code b is a non-blind process by the blinding processing unit 34-3 of the process processing device 30-3. It is a figure which shows (step S11).
First, in the encryption processing of the code a, if the first key (SK) is d and the second key (PK) is e, n, the encryption processing unit 24 is blinded by the following equation (1). The third process key (pro.key) is encrypted.

  Further, the fourth process key (initial.key) blinded by the following expression (2) is encrypted.

  Next, in the non-blind process of the code b, pro. The key ciphertext is changed to Epro. Assuming that the key is used, the blinded and encrypted third process key (pro.key) is deblinded by the following equation (3).

  Further, according to the following formula (4), pro. The key is verified.

また、以下式（５）により、ブラインド化されかつ暗号化された第４の工程鍵（ｉｎｉｔｉａｌ．ｋｅｙ）の非ブラインド化を行う。

Further, the blinded and encrypted fourth process key (initial.key) is deblinded by the following equation (5).

  Further, according to the following formula (6), pro. The key is verified.

  In this way, the process processing device 30-3 can obtain the process key encrypted by the first key of the key generation device 20 in a state where the contents of the process key are kept secret from the key generation device 20. it can. For example, when the content of the process key is leaked to the process processor of the key generation device 20, the process processor of the key generation device 20 can perform the process using the process key and perform an illegal act. It is thought that it becomes. For this reason, the process key thus blinded is transmitted to the key generation apparatus 20, and the process key returned after being encrypted is unblinded, thereby concealing the process key from the key generation apparatus 20 Thus, the process key encrypted with the first key of the key generation device 20 can be obtained.

  The encrypted process key transmission unit 35 performs the previous process process on the encrypted process key generated by the blinding process unit 34 with respect to the process process performed by the process processing device 30 corresponding to the process key. It transmits to the process processing apparatus 30. Here, the encrypted process key transmitting unit 35-3 transmits the encrypted third process key to the process processing apparatus 30-1, and the encrypted fourth process key to the process processing apparatus 30-2. To do.

Next, an operation example of the IC chip issuing system 1 according to the present embodiment will be described with reference to the drawings. 6 to 8 are sequence diagrams illustrating an operation example in which authentication for each process is performed by the IC chip issuing system 1.
As shown in FIG. 6, in the initial phase before starting the process process with key authentication, the key generation unit 21 of the key generation apparatus 20 generates the first key, the second key, and the management key. Then, it is stored in the key storage unit 22 (step S1). The key output unit 23 outputs the management key stored in the key storage unit 22 and the second key. For example, the key output unit 23 stores the management key and the second key in a portable recording medium. The process processor of the key generation device 20 delivers the portable recording medium storing the management key and the second key to the IC vendor by mail or the like. The IC vendor manufactures an IC chip in which the management key and the second key stored in the received portable recording medium are stored in the ROM. As a result, the second key and the management key are stored in the key storage unit 11 of the IC chip 10 (step S2).

  The key generation device 20 transmits the second key to the process processing device 30-3 (step S3). The process key generation unit 26 of the key generation apparatus 20 generates a second process key (step S4), and transmits the generated second process key to the process processing apparatus 30-1 (step S5). The process key generation unit 33-3 of the process processing apparatus 30-3 generates a third process key and a fourth process key (step S6). The blind processing unit 34-3 blinds the third process key and the fourth process key generated by the process key generation unit 33-3 in step S6 (step S7).

  The process processing apparatus 30-3 transmits the blinded third process key and fourth process key to the key generation apparatus 20 (step S8). When the key generation apparatus 20 receives the blinded third process key and fourth process key transmitted from the process processing apparatus 30-3, the encryption processing unit 24 of the key generation apparatus 20 performs steps. Encryption is performed using the first key generated in S1 and stored in the key storage unit 22 (step S9). The encryption process key transmitting unit 25 sends the third process key and the fourth process key that are blinded by the process processing apparatus 30-3 and encrypted by the encryption processing unit 24 to the process processing apparatus 30-. 3 (step S10). When the process processing device 30-3 receives the blinded and encrypted third process key and fourth process key transmitted from the key generation apparatus 20, the blind processing unit 34-3 Then, non-blind processing is performed. Thereby, the encrypted third process key and fourth process key are generated (step S11).

  Proceeding to FIG. 7, the process key generating unit 33-3 of the process processing apparatus 30 transmits the third process key generated in step S6 to the process processing apparatus 30-2 (step S12). The process processing device 30-2 receives the third process key transmitted from the process processing device 30-3 and stores it in the process key storage unit 31-2. In addition, the process key generation unit 33-3 of the process processing device 30-3 stores the fourth process key generated in step S6 in the process key storage unit 31-3. The encrypted process key transmission unit 35-3 of the process processing apparatus 30-3 transmits the encrypted third process key generated in step S11 to the process processing apparatus 30-1 (step S13).

  When the process processing apparatus 30-1 receives the encrypted third process key transmitted from the process processing apparatus 30-3, the post-process key registration unit 32-1 performs the encrypted third process key. Store the key in its own storage area. In addition, the encrypted process key transmission unit 35-3 of the process processing apparatus 30-3 transmits the encrypted fourth process key generated in Step S11 to the process processing apparatus 30-2 (Step S14). ). When the process processing apparatus 30-2 receives the encrypted fourth process key transmitted from the process processing apparatus 30-3, the post-process key registration unit 32-2 performs the encrypted fourth process key. Store the key in its own storage area.

  Proceeding to FIG. 8, in a first step involving key authentication, a processing person of the key generation device 20 mounts an IC chip manufactured by an IC vendor on an IC card. The key generation device 20 communicates with the IC chip 10 and performs a predetermined first process such as an IC chip acceptance test (step S20). In addition, the key generation device 20 encrypts the second process key generated in step S4 using the first key generated in step S1, and transmits the encrypted key to the IC chip 10. The registration key authentication unit 14 of the IC chip 10 authenticates the encrypted second process key received from the key generation device 20 using the second key stored in the key storage unit 11 and succeeds in authentication. If it is determined, the encrypted second process key is decrypted and stored in each process key storage unit 12 (step S21). If it is determined that the authentication has failed, the process is terminated without storing the encrypted second process key in each process key storage unit 12.

  Next, the IC chip 10 is delivered from the process processor of the key generation device 20 to the process processor of the process processing device 30-1. The process processing device 30-1 uses the second process key transmitted from the key generation device 20 and stored in step S5 (if the authentication process is performed by the challenge response method, a challenge based on the second process key) as the IC. Transmit to chip 10. The process key authentication unit 13 of the IC chip 10 is based on the second process key transmitted from the process processing device 30-1 and the second process key stored in each process key storage unit 12 in step S21. Then, an authentication process for verifying the validity of the process key is performed (step S30). Here, the authentication process can be performed by the challenge response method as described above. Thereby, the authentication process can be performed without outputting the process key itself to the outside of the IC chip 10 or the process processing apparatus 30-1. If the authentication process determines that the authentication has failed, the IC chip 10 rejects the execution of the process process and ends the process. If it determines with authentication success, the process process permission part 15 will permit execution of a process process. If the execution of the process process is permitted, the process processing apparatus 30-1 communicates with the IC chip 10 and performs the second process process (step S31). When the second process processing is completed, the process processing apparatus 30-1 transmits the encrypted third process key transmitted from the process processing apparatus 30-3 and stored in the post-process key registration unit 32-1 in step S13. Is transmitted to the IC chip 10. The registration key authenticating unit 14 of the IC chip 10 uses the encrypted third process key transmitted from the process processing device 30-1 and the second key stored in the key storage unit 11 in step S2. Based on this, the encrypted third process key is authenticated. Here, if the registration key authenticating unit 14 determines that the authentication is successful, the registration key authenticating unit 14 decrypts the encrypted third process key and stores the decrypted third process key in each process key storage unit 12 (step S31). If it is determined that the authentication has failed, the IC chip 10 rejects the execution of the process and ends the process.

  Next, the IC chip 10 is delivered from the process processor of the process processing apparatus 30-1 to the process processor of the process processing apparatus 30-2. The process processing device 30-2 receives the third process key transmitted from the process processing device 30-3 in step S12 and stored (if the authentication process is performed by the challenge-response method, the challenge is based on the third process key). To the IC chip 10. The process key authentication unit 13 of the IC chip 10 is based on the third process key transmitted from the process processing device 30-2 and the third process key stored in each process key storage unit 12 in step S31. Then, an authentication process for verifying the validity of the process key is performed (step S40). Here, if it determines with authentication failure, IC chip 10 will refuse execution of a process process, and will complete | finish a process. If it determines with authentication success, the process process permission part 15 will permit execution of a process process. When the process processing apparatus 30-2 is permitted to execute the process processing, the process processing device 30-2 communicates with the IC chip 10 to perform the third process processing (step S41). When the second process processing is completed, the process processing device 30-2 transmits the encrypted fourth process key transmitted from the process processing device 30-3 in step S14 and stored in the post-process key registration unit 32-2. Is transmitted to the IC chip 10. The registration key authentication unit 14 of the IC chip 10 uses the encrypted fourth process key transmitted from the process processing apparatus 30-2 and the second key stored in the key storage unit 11 in step S2. Based on this, the encrypted fourth process key is authenticated. Here, if the registration key authenticating unit 14 determines that the authentication is successful, the registered key authenticating unit 14 decrypts the encrypted fourth process key and stores the decrypted fourth process key in each process key storing unit 12 (step S41). If it is determined that the authentication has failed, the IC chip 10 rejects the execution of the process and ends the process.

  Next, the IC chip 10 is transferred from the process processor of the process processing apparatus 30-2 to the process processor of the process processing apparatus 30-3. The process processing device 30-3 transmits the fourth process key generated and stored in step S6 (or a challenge based on the fourth process key in the case of performing authentication processing by the challenge response method) to the IC chip 10. To do. The process key authentication unit 13 of the IC chip 10 is based on the fourth process key transmitted from the process processing device 30-3 and the fourth process key stored in each process key storage unit 12 in step S41. Then, an authentication process for verifying the validity of the process key is performed (step S50). Here, if it determines with authentication failure, IC chip 10 will refuse execution of a process process, and will complete | finish a process. If it determines with authentication success, the process process permission part 15 will permit execution of a process process here. If the execution of the process process is permitted, the process processing apparatus 30-3 communicates with the IC chip 10 and performs the fourth process process (step S51).

  Thus, according to the present embodiment, the entity authentication process in each step can be performed with a common key, and therefore, the amount of memory resources consumed by the IC chip 10 compared to performing the authentication process with a public key. Can be reduced. Furthermore, among the pair of asymmetric keys of the administrator, the process key is encrypted and distributed by the first key, and when the authentication process by the second key is successful, the key for the subsequent process can be set. It is possible to prevent a specific process processor or a third party whose second key is unknown from performing fraudulent acts such as an issuance process by setting a post-process key by himself / herself.

  In addition, the program for realizing the function of the processing unit in the present invention is recorded on a computer-readable recording medium, and the program recorded on the recording medium is read into the computer system and executed, thereby executing authentication for each process. Processing may be performed. Here, the “computer system” includes an OS and hardware such as peripheral devices. The “computer system” includes a WWW system having a homepage providing environment (or display environment). The “computer-readable recording medium” refers to a storage device such as a flexible medium, a magneto-optical disk, a portable medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system. Further, the “computer-readable recording medium” refers to a volatile memory (RAM) in a computer system that becomes a server or a client when a program is transmitted via a network such as the Internet or a communication line such as a telephone line. In addition, those holding programs for a certain period of time are also included.

  The program may be transmitted from a computer system storing the program in a storage device or the like to another computer system via a transmission medium or by a transmission wave in the transmission medium. Here, the “transmission medium” for transmitting the program refers to a medium having a function of transmitting information, such as a network (communication network) such as the Internet or a communication line (communication line) such as a telephone line. The program may be for realizing a part of the functions described above. Furthermore, what can implement | achieve the function mentioned above in combination with the program already recorded on the computer system, and what is called a difference file (difference program) may be sufficient.

DESCRIPTION OF SYMBOLS 1 IC chip issue system 10 IC chip 11 Key memory | storage part 12 Each process key memory | storage part 13 Process key authentication part 14 Registration key authentication part 15 Process process permission part 20 Key generation apparatus 21 Key generation part 22 Key storage part 23 Key output part 24 Encryption processing unit 25 Encryption process key transmission unit 26 Process key generation unit 27 Post process key registration unit 30 Process processing device 31 Process key storage unit 32 Post process key registration unit 33 Process key generation unit 34 Blind processing unit 35 Encryption Process key transmitter

Claims (6)

A key generation device that generates a first key and a second key as a pair of asymmetric keys, an IC chip that is issued through a plurality of predetermined process processes, and a plurality of processes that perform the plurality of process processes An IC chip issuance system comprising the process processing apparatus of
The IC chip is
A key storage unit in which the second key is stored in advance;
Each process key storage unit that stores a process key, which is a key based on a common key encryption method, defined for each of the plurality of process processes;
A process key corresponding to the process performed by the process processing apparatus from the process processing apparatus and a post-process key corresponding to a process process subsequent to the process process encrypted using the first key. A receiving unit for receiving and
A process key authenticating unit that performs an authentication process based on the process key received by the receiving unit and the process key stored in the process key storage unit;
When the process key authentication unit determines that the authentication is successful, a process process permission unit that permits execution of a process process corresponding to the process key received by the reception unit;
Based on the encrypted post-process key received by the receiving unit and the second key stored in the key storage unit, the authentication process is performed when it is determined that the authentication is successful. A registration key authenticating unit that decrypts the post-process key using the second key and stores the decrypted key in the respective process key storage units,
The key generation device includes:
An encryption processing unit that encrypts the input post-process key using the first key;
A process key transmitting unit that transmits the post-process key encrypted by the encryption processing unit to the process processing device;
The process processing apparatus includes:
A process key storage unit that stores a process key corresponding to a process performed by itself;
A post-process key receiving unit that receives the encrypted post-process key transmitted from the key generation device;
A transmitter that transmits the process key stored in the process key storage unit and the encrypted post-process key received by the post-process key receiver to the IC chip;
In response to the process key transmitted by the transmission unit, if it is determined that the IC chip is allowed to execute the process process, a process processing unit that executes a process process defined for the IC chip; An IC chip issuance system characterized by comprising: Among the plurality of process processing apparatuses, a process processing apparatus that performs a process process after another process processing apparatus,
A key receiving unit that receives the second key from the key generation device;
A process key generation unit that generates a post-process key corresponding to the subsequent process process;
Generates a random number, blinds the post-process key based on the random number and the second key, inputs the blinded post-process key to the key generation device, and inputs the blinded post-process key By receiving the post-process key transmitted in response to a process key and encrypted using the first key by the key generation device and performing a non-blind process, A blind processing unit for generating the post-process key encrypted using the first key;
An encrypted process key transmitting unit that transmits the encrypted post-process key generated by the blind processing unit to the process processing apparatus that performs a process process prior to the process process performed by the process processing apparatus;
The IC chip issuing system according to claim 1, further comprising: The process key includes key data based on a defined key encryption method and information indicating a defined tag,
3. The IC according to claim 1, wherein the process key authentication unit and the registration key authentication unit perform the authentication process based on the tag included in the process key to be authenticated. Chip issuing system. Of the IC chip,
The key storage unit is a non-rewritable memory,
The IC chip issuance system according to any one of claims 1 to 3, wherein each of the process key storage units is a rewritable memory. A key generation device that generates a first key and a second key that are a pair of asymmetric keys, a key storage unit that stores the second key in advance, and a plurality of predetermined process processes An IC chip including a process key storage unit that stores a process key that is a key based on a defined common key encryption method, and a process key storage unit that stores a process key corresponding to a process performed by itself. An IC chip issuance method for an IC chip issuance system, comprising: a plurality of process processing devices that perform the plurality of process processes;
The IC chip is
A process key corresponding to the process performed by the process processing apparatus from the process processing apparatus and a post-process key corresponding to a process process subsequent to the process process encrypted using the first key. Receiving and
Performing an authentication process based on the received process key and the process key stored in the process key storage unit;
If it is determined that the authentication is successful, the step of permitting execution of the process corresponding to the received process key;
Based on the received encrypted post-process key and the second key stored in the key storage unit, if it is determined that the authentication is successful, the encrypted post-process key is Decrypting with the second key and storing it in the process key storage unit;
The key generation device is
Encrypting the input post-process key with the first key;
Transmitting the post-process key encrypted by the encryption processing unit to the process processing device;
The process processing apparatus comprises:
Receiving the encrypted post-process key transmitted from the key generation device;
Transmitting the process key stored in the process key storage unit and the encrypted post-process key received by the post-process key receiving unit to the IC chip;
If it is determined that the execution of the process process is permitted by the IC chip according to the process key transmitted by the transmission unit, a step of executing a process process defined for the IC chip;
An IC chip issuing method comprising: A key generation device that generates a first key and a second key that are a pair of asymmetric keys, a key storage unit that stores the second key in advance, and a plurality of predetermined process processes An IC chip including a process key storage unit that stores a process key that is a key based on a defined common key encryption method, and a process key storage unit that stores a process key corresponding to a process performed by itself. An IC chip issuance system comprising: a plurality of process processing devices that perform the plurality of process processes;
In the computer of the IC chip,
A process key corresponding to the process performed by the process processing apparatus from the process processing apparatus and a post-process key corresponding to a process process subsequent to the process process encrypted using the first key. Receiving and
Performing an authentication process based on the received process key and the process key stored in the process key storage unit;
If it is determined that the authentication is successful, the step of permitting execution of the process corresponding to the received process key;
Based on the received encrypted post-process key and the second key stored in the key storage unit, if it is determined that the authentication is successful, the encrypted post-process key is Decrypting with the second key and storing in each process key storage unit, and
In the computer of the key generation device,
Encrypting the input post-process key with the first key;
Transmitting the post-process key encrypted by the encryption processing unit to the process processing apparatus,
In the computer of the process processing apparatus,
Receiving the encrypted post-process key transmitted from the key generation device;
Transmitting the process key stored in the process key storage unit and the encrypted post-process key received by the post-process key receiving unit to the IC chip;
If it is determined that the execution of the process process is permitted by the IC chip according to the process key transmitted by the transmission unit, a step of executing a process process defined for the IC chip;
IC chip issuance program for executing

Images