JP2011243680A - Semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method with which it becomes possible to suppress variations in resistance values of contacts and stabilize yield.SOLUTION: A semiconductor device manufacturing method includes: forming an insulating film on a conductive layer formed on a semiconductor substrate; exposing a surface of the conductive layer by performing dry etching on the insulating film using a first gas containing halogen gas; performing a first plasma treatment on the exposed conductive layer using a second gas that is capable of reducing the halogen gas; and performing a second plasma treatment on the exposed conductive layer using a third gas that contains a C element and an O element and does not contain a halogen element.

Description

  Embodiments described herein relate generally to a method for manufacturing a semiconductor device.

  In a multilayer wiring used for a semiconductor device, a contact is provided for electrical conduction between upper and lower conductive layers.

For example, such a contact is formed by forming a conductive layer such as a Ni salicide layer on a semiconductor substrate and forming an insulating film such as a SiN film or a SiO ₂ film, and then performing photolithography, dry etching, or the like. A contact hole reaching the layer is formed, and a metal is embedded in the contact hole. When a metal is embedded in the contact hole, it is usually wet-treated with a mixed solution of sulfuric acid and hydrogen peroxide (hereinafter referred to as SH solution) in advance.

JP 2002-15187 A (Claim 10, paragraph [0018], etc.) JP 2009-194195 A (paragraph [0051] etc.)

  In the conventional case, there is a problem that the resistance value of the contact varies and the yield is not stable.

  An object of the present invention is to provide a method of manufacturing a semiconductor device capable of suppressing variations in contact resistance values and stabilizing the yield.

  In order to solve the above problems, according to one embodiment of the present invention, an insulating film is formed on a conductive layer formed on a semiconductor substrate, and the insulating film is formed using a first gas containing a halogen gas. Is dry-etched to expose the surface of the conductive layer, and the exposed conductive layer is subjected to a first plasma treatment using a second gas capable of reducing halogen gas, and the exposed conductive layer is subjected to C element and There is provided a method for manufacturing a semiconductor device, characterized in that a second plasma treatment is performed using a third gas containing an O element and no halogen element.

In addition, an insulating film is formed on the metal silicide layer formed on the semiconductor substrate, and an opening having a predetermined pattern reaching the conductive layer is formed in the insulating film by dry etching using a gas containing a halogen gas. The first plasma treatment is performed on the semiconductor substrate in which the opening is formed using the N ₂ / H ₂ mixed gas, and the CO / O ₂ mixed gas is used in the semiconductor substrate on which the opening is formed. A semiconductor device manufacturing method is provided, wherein the second plasma treatment is performed.

It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. 4 is a flowchart of a manufacturing process of a semiconductor device according to an embodiment of the present invention. It is a figure which shows the structure of the RIE processing apparatus which concerns on one Embodiment of this invention. It is a figure which shows the yield of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the fluctuation | variation of the yield of the semiconductor device by the air leaving time which concerns on one Embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
1A to 1I are cross-sectional views showing the manufacturing process of the semiconductor device of this embodiment, and FIG. 2 is a flowchart thereof.

As shown in FIG. 1A, a Ni silicide layer 12 as a conductive layer is first formed on a semiconductor substrate 11 such as a Si substrate (Step 1), and an SiN film 13a and an SiO ₂ film 13b are sequentially formed as an insulating film 13. Film (Step 2). The Ni silicide layer 12 that is a conductive layer is provided, for example, on the gate electrode of the transistor or on the diffusion layer. Further, as shown in FIG. 1B, a resist film is formed by coating, and a resist pattern 14 is formed by exposing with a predetermined pattern (Step 3).

  Next, the wafer w obtained by forming the resist pattern 14 and the like on the semiconductor substrate 11 is introduced into a chamber 31 where, for example, RIE (Reactive Ion Etching) processing shown in FIG. 3 is performed (Step 4).

  As shown in FIG. 3, in the chamber 31, an upper electrode 32, a wafer stage 33 for placing the wafer w and a lower electrode disposed opposite to the upper electrode 32 are installed, and a high frequency for applying a high frequency voltage is provided. Power supplies 34 and 35 are connected. A process gas supply mechanism 36 including a mass flow controller for introducing a process gas having a predetermined gas type and flow rate is connected to the chamber 31. Below that, there is provided an exhaust mechanism 37 comprising a vacuum pump, an exhaust amount adjustment valve, and the like for discharging excess process gas, reaction by-products and the like and controlling the inside of the chamber 31 to a predetermined pressure. It has been.

After the wafer w is placed on the wafer stage 33, a mixed gas of C ₄ F ₈ / C ₄ F ₆ gas, which is a halogen gas, and O ₂ and Ar is introduced into the chamber 31 by the process gas supply mechanism 36. It is introduced and controlled to a predetermined pressure by the exhaust mechanism 37. Thereafter, predetermined power is supplied from the high-frequency power sources 34 and 35. Then, as shown in FIG. 1C, using the resist pattern 14 as a mask, the SiO ₂ film 13b that is the upper insulating film is processed into a predetermined pattern by RIE (Step 5-1).

Next, O ₂ gas is introduced into the chamber 31 by the process gas supply mechanism 36, and the resist pattern 14 is removed by ashing as shown in FIG. 1D (Step 5-2).

Next, a mixed gas of CH ₂ F ₂ gas, which is a halogen gas, and O ₂ and Ar is introduced into the chamber 31 by the process gas supply mechanism 36, and is controlled to a predetermined pressure by the exhaust mechanism 37. Thereafter, predetermined power is supplied from the high-frequency power sources 34 and 35. Then, as shown in FIG. 1E, the SiN film 13a is processed into a predetermined pattern by RIE using the SiO ₂ film 13b having a predetermined pattern as a mask. In this way, the Ni silicide layer 12 which is a conductive layer is exposed, and a contact hole 15 is formed in the insulating film 13 (Step 5-3). In this embodiment, the SiN film 13a is provided as an etching stop layer for the SiO2 film 13b, but it is not always necessary to provide it. Further, it may be replaced with a film which can be etched with a halogen-based etching gas with an etching selection ratio with respect to the SiO2 film 13b.

  The wafer w on which the contact hole 15 is formed in this way is subjected to post-processing by two-stage plasma processing.

First, a N ₂ / H ₂ mixed gas, which is a gas capable of reducing halogen gas, is introduced into the chamber 31 by the process gas supply mechanism 36, controlled to a predetermined pressure by the exhaust mechanism 37, and the high-frequency power sources 34, 35. More predetermined power is supplied, and as shown in FIG. 1F, the surface of the Ni silicide layer 12 that is a conductive layer is subjected to N ₂ / H ₂ plasma treatment (Step 6-1). Thereby, the halogen element on the surface of the Ni silicide layer 12 which is a conductive layer is removed.

Next, a CO / O ₂ mixed gas, which is a gas containing a C element and an O element and not containing a halogen element, is introduced into the chamber 31 by the process gas supply mechanism 36, and is controlled to a predetermined pressure by the exhaust mechanism 37. . Thereafter, predetermined power is supplied from the high-frequency power sources 34 and 35, and CO / O ₂ plasma processing is performed as shown in FIG. 1G (Step 6-2).

In this way, after the contact hole 15 is formed, the wafer w subjected to the sequential plasma processing using N ₂ / H ₂ and CO / O ₂ is unloaded from the chamber 31. And as shown to FIG. 1H, it wash | cleans with SH liquid (Step7). Then, as shown in FIG. 1I, the TiN layer 16a / W layer 16b, which is a metal layer, is sequentially formed, so that the contact hole 15 is buried and the contact 16 is formed (Step 8).

For the contacts obtained in this way, the contact resistance value was measured when left in the atmosphere for 11.5 hours from the time when the contact was carried out after the plasma treatment until before cleaning with the SH liquid, and the yield (resistance value was the standard value). The following ratio) was obtained. The obtained yield (relative value) is shown in FIG. As a comparative _example, after N 2 / _{H 2} plasma treatment, having been subjected to the plasma treatment sequentially with _{O 2} gas does not contain element _C, without performing the N 2 / _{H 2} plasma treatment, using _{O 2} gas The yield of the plasma treatment is also shown. Furthermore, as a reference value, the yield when a plasma treatment using only O ₂ gas is left in the atmosphere for 3.5 hours is also shown.

As shown in FIG. 4, the contact yield obtained by this embodiment is clearly higher than that of the comparative example. Then, it can be seen that the yield of the sample that has been subjected to plasma processing using only O ₂ gas is greatly reduced as the standing time is increased.

Further, FIG. 5 shows the variation in yield (relative value) based on the measurement result of the contact resistance value when the standing time in the atmosphere from the time when the plasma treatment is carried out to the time before the cleaning with the SH liquid is varied. As comparative examples, none of the N ₂ / H ₂ plasma treatment was performed, and the yield fluctuations of the plasma treatment using CO / O ₂ gas and the plasma treatment using O ₂ gas were combined. Show.

  As shown in FIG. 5, the contact yield obtained according to the present embodiment is higher than that of the comparative example, and fluctuation due to the standing time in the atmosphere is suppressed.

As described above, according to the present embodiment, after the contact hole is formed by etching, the post-treatment is performed by changing the etching gas to N ₂ / H ₂ and CO / O ₂ and performing two-stage plasma treatment. Contact resistance can be obtained, and the yield can be improved. In addition, variation in contact resistance due to the standing time in the atmosphere from when the plasma treatment is carried out to the chamber before the cleaning with the SH liquid is suppressed, and the yield can be stabilized.

  Such an effect is considered to be due to the following mechanism.

  That is, when a contact hole is formed by etching using a gas containing a halogen element such as F, halogen remains in the contact hole and reacts with a metal element (for example, Ni) in the exposed conductive layer. . And if it exposes to air | atmosphere as it is, metal halides, such as NiF, will react with the water | moisture content in air. This reaction product cannot be removed by the subsequent SH cleaning, and causes corrosion. Therefore, as the first stage, residual halogen is removed by plasma treatment using a reducing gas.

Therefore, the gas used for the first stage plasma treatment needs to be a gas capable of reducing the halogen gas, and for example, a gas containing H ₂ , N ₂ , and NH ₄ can be used.

  Further, the exposed conductive layer surface is damaged by the plasma, resulting in an unstable metal element (for example, Ni when the conductive layer is a Ni silicide layer), which reacts with moisture in the air, Increase contact resistance over time. Therefore, as a second stage, the gas is vaporized and removed by plasma treatment using a gas containing C element and O element. At this time, if a halogen element such as F is present, the progress of the reaction between the metal element and the gas containing the C element and the O element is suppressed. Therefore, the treatment needs to be performed after the halogen is removed by the reducing gas. .

Therefore, the gas used for the second stage plasma treatment must be a gas that does not contain a halogen element, can react with a metal element, and can be vaporized, and has a relatively low temperature (eg, 300 ° C. or less). In addition to CO-based gas such as CO and CO ₂ that can be vaporized, gas mixed with O ₂ , CH ₄ / O ₂ gas, and the like can be used.

(Second Embodiment)
In the present embodiment, the process up to the formation of the contact hole and the contact formation process after the plasma treatment are the same as those in the first embodiment, but after the N ₂ / H ₂ plasma treatment, once exposed to the atmosphere, The difference is that the CO / O ₂ plasma treatment is performed.

Similar to the first embodiment, after the contact hole is formed, the contact hole is carried into the chamber 31 and placed on the wafer stage 33. Next, an N ₂ / H ₂ mixed gas that is a gas capable of reducing halogen gas is introduced by the process gas supply mechanism 36, and is controlled to a predetermined pressure by the exhaust mechanism 37. Then, predetermined power is supplied from the high-frequency power sources 34 and 35, and N ₂ / H ₂ plasma processing is performed (Step 6).

Next, after the wafer w is once unloaded from the chamber, it is loaded again into the chamber 31 and placed on the wafer stage 33. As in the first embodiment, a CO / O ₂ mixed gas, which is a gas containing a C element and an O element and not containing a halogen element, is introduced into the chamber 31 by the process gas supply mechanism 36, and the exhaust mechanism 37 is controlled to a predetermined pressure, predetermined power is supplied from the high-frequency power sources 34 and 35, and CO / O ₂ plasma processing is performed (Step 6-2).

  In this way, the plasma-treated wafer w is unloaded from the chamber and cleaned with the SH liquid as in the first embodiment (Step 8). Then, by forming a metal layer such as a TiN layer / W layer, the contact hole is buried and a contact is formed (Step 9).

  And when the same evaluation as 1st Embodiment was performed about the obtained contact, the same result was able to be obtained.

As described above, according to the present embodiment, after the contact hole is formed by etching, after the first-stage N ₂ / H ₂ plasma treatment, the wafer is once exposed to the atmosphere, and then the second-stage CO / O is formed. _{Even when the two} plasma treatments are performed, a good contact resistance can be obtained and the yield can be improved as in the case where the plasma treatment is performed sequentially. Further, variation of contact resistance is suppressed by the standing time in the air from being carried out from the chamber after the plasma treatment before washing with SH solution, the yield can be stabilized Incidentally, same as always N _{2 /} H ₂ plasma treatment the need not CO / _{O 2} plasma treatment is performed in the chamber 31, may be CO / _{O 2} plasma treatment performed in different chambers.

  In these embodiments, Ni silicide is exemplified as an example of the conductive layer, but the conductive layer is not limited to this. Any metal element may be used as long as it contains a metal element. Specifically, in addition to Ni, a metal layer containing a late transition metal element such as Co or Cu, or a silicide layer thereof can be used.

  In addition, this invention is not limited to embodiment mentioned above. Various other modifications can be made without departing from the scope of the invention.

11 ... semiconductor substrate 12 ... Ni silicide layer 13: insulating film 13a ... SiN film 13b ... SiO ₂ film 14 ... resist pattern 15 ... contact hole 16 ... contact 16a ... TiN layer 16b ... W layer 31 ... chamber 32 ... upper electrode 33 ... Wafer stages 34, 35 ... high frequency power supply 36 ... process gas supply mechanism 37 ... exhaust mechanism

Claims (5)

An insulating film is formed on the conductive layer formed on the semiconductor substrate,
Dry etching the insulating film with a first gas containing a halogen gas to expose the surface of the conductive layer;
Performing a first plasma treatment on the exposed conductive layer using a second gas capable of reducing the halogen gas;
A second plasma treatment is performed on the exposed conductive layer using a third gas containing a C element and an O element and no halogen element.
A method for manufacturing a semiconductor device. The method of manufacturing a semiconductor device according to claim 1, wherein the second gas includes any one of H ₂ , N ₂ , and NH ₄ . The method for manufacturing a semiconductor device according to claim 1, wherein the third gas contains CO or CO ₂ .   4. The method for manufacturing a semiconductor device according to claim 1, wherein the conductive layer includes a metal layer or a metal silicide layer. 5. Forming an insulating film on the metal silicide layer formed on the semiconductor substrate;
By dry etching using a gas containing a halogen gas, an opening having a predetermined pattern reaching the conductive layer is formed in the insulating film,
A first plasma treatment is performed on the semiconductor substrate in which the opening is formed using a N ₂ / H ₂ mixed gas,
A second plasma treatment is performed on the semiconductor substrate in which the opening is formed using a CO / O ₂ mixed gas.
A method for manufacturing a semiconductor device.

Images