JP2011243134A - Program compression device, program execution device and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve size efficiency of instruction data comprising a plurality of instruction lines in a machine language.SOLUTION: An instruction data compression device 103 analyzes instruction lines contained in instruction data, replaces each instruction line by a meta instruction with a smaller amount of data, generates meta instruction dictionary data representing the original instruction line replaced by the meta instruction, and stores compressed instruction data replaced by the meta instruction and the meta instruction dictionary data in a instruction data storage part 106. A compressed instruction execution device 104 acquires compressed instruction data and meta instruction dictionary data from the instruction data storage part 106, and executes the instruction line shown by the meta instruction dictionary data if the meta instruction becomes an execution target during execution of the compressed instruction data.

Description

The present invention relates to a data processing apparatus implemented in hardware or software such as a microcomputer or a data processor.
For example, a central processing unit (hereinafter referred to as “CPU”) in terms of hardware and a virtual central processing unit (hereinafter referred to as “VM”) in terms of software are targeted.

The CPU and VM are devices that perform various data processing and perform various controls of the environment in the mounted environment.
Normally, what kind of data processing a CPU or VM performs is described in a program stored in a storage device or the like mounted in the same environment, and the contents are read and interpreted sequentially. Then, processing according to the interpretation result is executed.
The program is composed of a normal instruction and a sequence of zero or more parameters that accompany it, and the CPU and VM read the instruction to be processed and parameters that accompany it, and execute processing.
The CPU and VM use a register generally called a program counter (hereinafter referred to as PC) in order to hold information indicating which instruction should be processed next.
The PC holds the address of the instruction to be processed next in the processing target program stored in the storage device, and the CPU and VM process the instruction of the address held by the PC, and after the processing is completed The PC is moved to the address where the next instruction is stored. By repeating this series of processing, the processing described in the program is sequentially executed.
Data necessary for processing is acquired from a high-speed accessible storage device such as a register or stack of the CPU or VM and processed.
There is an instruction to set data in the register or stack, and the data is acquired and set from a large-capacity but low-speed storage device or another register or stack.

On the other hand, along with the recent development of information processing equipment, small mobile information processing devices equipped with CPUs and VMs have been developed in various devices such as mobile phones, smartphones, car navigation systems, etc., and various services have been realized. .
Since these small mobile information processing apparatuses are small compared with a general personal computer, the board area is small and it is difficult to mount a memory having a sufficient capacity.
In addition, with the sophistication and complexity of services provided in recent years, the amount of memory used by software has increased, and even if there was sufficient capacity in the past, there is not enough capacity to realize all services. There are many issues.
In addition, if services can be realized with a smaller amount of memory, costs will be reduced and competitiveness in terms of price can be strengthened. This is still an important and urgent task.

  In order to deal with such a problem, in Patent Document 1, when an instruction having a long word length in an operation code portion of an instruction is frequently used, it is replaced with an operation code having a short reserved code length, and the operation code before and after the replacement is stored in a register. The program is compressed by writing.

Patent Document 2 defines a new index for an instruction used in each function in a program, treats the index as an operation code part of the instruction, and has a table for resolving the instruction from the index in combination with the function. By setting the size of the index smaller than the opcode, the program is compressed.
Patent Document 3 analyzes the branch distance in the program, the size of immediate data, the frequency of register usage, etc., and redefines a new instruction set architecture to reduce the size of each instruction code and register designation. Based on the number of dynamic steps of the program re-created according to the instruction set, the calculation capability of the logical operation means is determined, and a decoding means from the instruction set to the actual instruction set is designed.

JP 11-224199 A JP 2006-79451 A Japanese Patent Laid-Open No. 10-031588

“Compiler configuration and optimization”, Ikuo Nakata, Asakura Shoten, ISBN 4-254-12139-3 C3041

In Patent Document 1, the compression of a program can be realized only when an instruction having an operation code part having a long word length is frequently used. However, when the operation code parts of all instructions have the same word length, or the word length is short. There is a problem that the program is not compressed when an instruction having an opcode portion is used frequently.
Further, Patent Document 2 has a problem that it is necessary to decode all indexes into original instructions according to a table at the time of execution, resulting in a decrease in processing speed at the time of execution.
Further, in Patent Document 3, in order to realize an optimum instruction set and decoding design corresponding to individual programs, it depends on processing contents, and when applied to an arbitrary program, it must be repeated from the analysis process. There is a problem.

The main object of the present invention is to solve the above-described problems, and to improve the size efficiency of instruction data to be processed by the CPU and VM.
Another object is to reduce the processing that is indirectly required when interpreting and executing the instruction data.

A program compression apparatus according to the present invention provides:
A program input unit for inputting a program in machine language including a plurality of instruction sequences each having a fixed data length;
An instruction replacement unit that analyzes each instruction sequence of the program input by the program input unit and replaces the instruction sequence satisfying a predetermined condition with a meta-instruction having a smaller data amount than the instruction sequence;
A meta-instruction dictionary data generation unit that generates meta-instruction dictionary data in which an instruction sequence replaced with the meta-instruction is indicated in association with the meta-instruction;
A program output unit that outputs a program in which an instruction sequence is replaced with a meta-instruction by the instruction rewriting unit and a meta-instruction dictionary data generated by the meta-instruction dictionary data generation unit in association with each other. .

  According to the present invention, analysis is performed for each instruction sequence, and the data amount of the program is compressed by replacing the instruction sequence with a meta-instruction for each instruction sequence. For this reason, when executing a compressed program, it is not necessary to determine how much of the instruction sequence is compressed, and overhead during program execution can be reduced.

FIG. 3 illustrates a configuration example of an information processing terminal according to Embodiment 1; FIG. 3 shows basic activities of the information processing terminal according to Embodiment 1; FIG. 4 is a diagram showing a source code reception processing sequence according to the first embodiment. FIG. 4 is a diagram showing a processing sequence for an instruction data generation and compression request according to the first embodiment. FIG. 3 is a diagram showing an instruction data execution processing sequence according to the first embodiment. FIG. 3 is a diagram showing an example of source code according to the first embodiment. FIG. 4 is a diagram illustrating an example of a data format of an instruction sequence according to the first embodiment. FIG. 4 is a diagram illustrating an example of correspondence between an instruction identification number, a process name, and a parameter size according to the first embodiment. FIG. 6 is a diagram illustrating an example of instruction data expressed using an instruction name according to the first embodiment. FIG. 3 is a diagram illustrating an example of instruction data according to the first embodiment. FIG. 4 is a diagram illustrating an example of instruction data compression processing according to the first embodiment. FIG. 6 is a diagram illustrating an example of the same instruction sequence appearance count counting process according to the first embodiment. The figure which shows the example of the data structure of the appearance frequency recording table element according to instruction ID which concerns on Embodiment 1. FIG. The figure which shows the example of the data structure of the appearance count recording table element according to parameter which concerns on Embodiment 1. FIG. The figure which shows the example of the appearance frequency recording table according to instruction ID which concerns on Embodiment 1. FIG. FIG. 6 is a diagram showing an example of a compression target instruction sequence table generation process according to the first embodiment. FIG. 4 is a diagram illustrating an example of elements of a compression target instruction sequence table according to the first embodiment. FIG. 5 shows an example of instruction data compression conversion processing according to the first embodiment. FIG. 4 is a diagram illustrating an example of a compression target instruction sequence table according to the first embodiment. FIG. 4 shows an example of meta-instruction dictionary data according to the first embodiment. FIG. 6 is a diagram illustrating an example of instruction data replaced with a meta instruction according to the first embodiment. 1 is a diagram illustrating a configuration example of a compressed instruction data execution device according to Embodiment 1. FIG. FIG. 3 is a diagram illustrating an example of an execution processing procedure of the compressed instruction data execution device according to the first embodiment. FIG. 3 is a diagram illustrating an example of a state of the compressed instruction data execution device according to the first embodiment. FIG. 3 is a diagram illustrating an example of a state of the compressed instruction data execution device according to the first embodiment. FIG. 10 is a diagram illustrating an example of similar source code according to the fourth embodiment. FIG. 10 shows an example of instruction data for similar source code according to the fourth embodiment. FIG. 10 is a diagram showing an example of a compressed instruction data conversion processing procedure according to the fourth embodiment. The figure which shows the example of the compression command data before the variable identification information change which concerns on Embodiment 4. FIG. The figure which shows the example of the compression command data after the variable identification information change which concerns on Embodiment 4. FIG. The figure which shows the example of the compression command data at the time of producing | generating the some meta command dictionary data based on Embodiment 5. FIG. The figure which shows the example of the compression command data at the time of producing | generating the some meta command dictionary data based on Embodiment 5. FIG. FIG. 18 shows an example of jump instruction type determination processing according to the sixth embodiment. FIG. 19 is a diagram showing an example of the data structure of elements of a jump instruction information list according to the sixth embodiment. FIG. 20 is a diagram showing an example of jump instruction change processing according to the sixth embodiment. FIG. 20 is a diagram showing an example of jump-out instruction processing in the compressed instruction data execution device according to the sixth embodiment. FIG. 19 is a diagram illustrating an example of jump-in instruction processing in the compressed instruction data execution device according to the sixth embodiment. FIG. 20 is a diagram illustrating an example of an execution processing procedure in the compressed instruction data execution device according to the sixth embodiment. FIG. 4 is a diagram showing a concept of a minimum processing unit during compression processing according to the first embodiment. The figure which shows the problem when the parameter which concerns on Embodiment 1 isolate | separates into another instruction sequence. FIG. 3 is a diagram showing a memory space before restoration processing according to the first embodiment. FIG. 3 is a diagram showing a memory space after restoration processing according to the first embodiment. The figure which shows the example of memory arrangement | positioning in case size differs with the type | mold which concerns on Embodiment 3. FIG. The figure which shows the example of memory arrangement | positioning in case size differs with the type | mold which concerns on Embodiment 3. FIG. The figure which shows the example of memory arrangement | positioning in case size is the same irrespective of the type | mold which concerns on Embodiment 3. FIG. FIG. 18 shows situations 1 to 4 according to the sixth embodiment. The figure which shows the relationship between the jump-out command which concerns on Embodiment 6, and a jump destination. FIG. 3 is a diagram illustrating a configuration example of an instruction data compression device according to the first embodiment. The figure which shows the hardware structural example of the information processing terminal device which concerns on Embodiment 1-6.

Embodiment 1 FIG.
In the present embodiment, a system including at least an instruction data generation device, an instruction data compression device, and a compressed instruction data execution device is assumed.
An instruction data generation device is a software development engineer that implements a certain application as software, so that the developed source code is used as input and the instruction data (in machine language) replaced with instructions that can be interpreted and executed by the compressed instruction data execution device. Program) and its instruction data is output.
The instruction data compression device is the result of converting the instruction data generated by the instruction data generation device as input and analyzing the inside of the instruction data so that the size is smaller than the input instruction data. Generate compressed instruction data and output the compressed instruction data.
The instruction data compression device is an example of a program compression device.
The compressed instruction data execution device receives the instruction data or the compressed instruction data as input, interprets the instructions described in them, executes the appropriate processing, and performs the same processing as that described in the source code Is realized in the information processing apparatus.
Here, the compressed instruction data execution device can accept not only compressed instruction data but also uncompressed instruction data as input, both of which can be processed and are not required when executing instruction data. Minimizes the processing required when executing compressed instruction data.
The compressed instruction data execution device is an example of a program execution device.

The method for realizing the instruction data generation device, the instruction data compression device, and the compressed instruction data execution device is not particularly limited, and may be realized as hardware or realized as software executed in a specific information processing terminal device. It doesn't matter.
In the following, for simplicity of explanation, only the case where it is realized as software will be described.

In addition, the information processing terminal device on which the instruction data generation device, the instruction data compression device, and the compressed instruction data execution device are executed need not be closed to one, and each of them is executed by an independent information processing terminal device, for example, A command data generation device and a command data compression device are executed by one information processing terminal device, and a plurality of commands are executed by a single information processing terminal device, as if only a compressed command data execution device is executed by another information processing terminal device. It does not matter as a structure to do.
When configured with a plurality of information processing terminal devices, the information processing terminal devices may be connected to each other via a network so that they can communicate with each other and be automatically processed. The movement may be performed with a manual operation, for example, storing data in a memory card or the like, inserting the memory card into another information processing terminal device, and using it as an input to each device from there.
Hereinafter, for the sake of simplicity of explanation, only the case where the instruction data generation device, the instruction data compression device, and the compressed instruction data execution device are executed by one information processing terminal device will be described.
Similarly, in order to simplify the explanation, all processing is based on sequential serial execution below, but there is no problem even if processing is performed in parallel execution or streaming execution.

FIG. 1 is a block diagram illustrating the configuration of the information processing terminal device 100 according to the present embodiment.
All requests to the information processing terminal device 100 are received by the central control device 101, and the instruction data generation device 102, the instruction data compression device 103, the compressed instruction data execution device 104, and the source code storage device 105 are executed according to the request contents. .
The source code storage device 105 is a storage device that stores source code to be converted into compressed instruction data in the information processing terminal device 100.
The instruction data storage device 106 is a storage device that stores instruction data and compressed instruction data generated by the instruction data generation device 102 and the instruction data compression device 103.
The instruction data generation device 102 is a processing device that acquires one or more designated source codes from all the source codes stored in the source code storage device 105, analyzes them, and converts them into instruction data. is there.
The instruction data compression apparatus 103 acquires one or more designated instruction data from all the instruction data stored in the instruction data storage apparatus 106, performs analysis, and calculates a total size larger than the total size of the designated instruction data. Is a processing device that performs processing for conversion into one or more compressed instruction data.
In the following, when referring to instruction data, the term refers to both the instruction data generated by the instruction data generation device 102 and the compressed instruction data generated by the instruction data compression device 103, and strictly the instruction data generated by the instruction data generation device 102 only. Is referred to as uncompressed instruction data.
The compressed instruction data execution device 104 acquires specified data from all the instruction data stored in the instruction data storage device 106 and the compressed instruction data, and sequentially executes the processing according to the instructions described in the data. It is.

  Hereinafter, a basic processing sequence in the information processing terminal device 100 according to the present embodiment will be described with reference to FIGS. 2, 3, 4, and 5.

FIG. 2 is an activity diagram showing processing required in the information processing terminal device 100 according to the present embodiment.
The information processing terminal device 100 according to the present embodiment is a system that converts a source code into compressed instruction data, and executes processing of contents described in the source code based on the converted compressed instruction data.
Therefore, in the present embodiment, at least processing source code storage processing for causing the system to recognize the source code to be processed, instruction data for generating compressed instruction data from all or part of the stored source code Three types of processing are required: compressed instruction data generation processing and instruction data / compressed instruction data execution processing for executing processing of the contents described in the source code based on the generated compressed instruction data.

FIG. 3 shows an example of a specific processing sequence of the processing target source code storage processing.
When the central control apparatus 101 receives a processing target source code registration request from the host, the central control apparatus 101 starts a source code storing process.
The processing source code registration request includes at least one or more source codes to be registered or information that can uniquely identify the source code, such as a source code file name and an identification number, Based on the information, the central controller 101 identifies and acquires the source code stored in the source code storage device.
The central controller 101 stores the acquired source code in the source code storage device 105 and receives a processing result ID indicating the processing result from the source code storage device 105.
In accordance with the contents of the processing result ID, it is notified to the host whether the processing has ended normally or an error has occurred, and the processing is completed.

  FIG. 4 shows an example of a specific processing sequence of the instruction data / compressed instruction data generation process.

When central controller 101 receives an instruction data / compressed instruction data generation request from a host, it starts instruction data generation processing.
The instruction data generation request includes at least information capable of uniquely identifying the source code stored in one or more source code storage devices 105 for which the instruction data is to be generated. The source code to be subjected to the instruction data generation process is specified based on the above, and the instruction data generation process is executed.
In addition, the instruction data generation request does not need to hold identification information of all the necessary source codes when executing the instruction data generation request. It does not matter even if it searches and acquires.

When receiving the instruction data / compressed instruction data generation request, the central control apparatus 101 causes the instruction data generation apparatus 102 to start instruction data generation start processing based on a set of source code identification information included in the request.
The instruction data generation device 102 acquires a source code corresponding to the set of source code identification information from the source code storage device 105, and executes an instruction data generation process.
The specific processing contents of this instruction data generation processing are processing such as lexical analysis, syntax analysis, semantic analysis, optimization applied by a general compiler as described in Non-Patent Document 1, for example. From the processing result, it is to generate instruction data which is a target code which can be interpreted by the compressed instruction data execution device 104 which is an execution environment.
If no error has occurred in the instruction data generation process, it means that correct instruction data has been generated from the source code. In this case, the generated instruction data is stored in the instruction data storage device 106, Finally, a processing result ID indicating the processing result of the instruction data generation processing is returned to the central control apparatus 101.
The instruction data stored in the instruction data storage device 106 is stored with identification information that can uniquely identify each of the instruction data. The instruction data can be identified with the same identification information as the identification information of the source code. It is desirable that
If they are not the same, it is desirable to retain information for associating the identification information of the source code with the identification information of the instruction data generated from the source code.
On the other hand, if an error occurs in the instruction data generation process, it means that correct instruction data is not generated from the source code. In this case, the instruction data storage process in the instruction data storage device 106 is performed. The process result ID indicating the error that has occurred is returned to the central controller 101, and the command data generation process ends.
When the instruction data generation device 102 starts the instruction data generation process, it first checks whether the instruction data corresponding to the source code corresponding to the set of source code identification information is already stored in the instruction data storage device 106. If there is a stored one, the instruction data generation processing for the corresponding source code may not be performed.
The central control apparatus 101 that has received the processing result ID from the instruction data generating apparatus 102 does not perform the subsequent processing when the processing result ID indicates an error, and notifies the host that an error has occurred. Is completed.
Conversely, when the processing result ID indicates normal termination, the central control apparatus 101 causes the instruction data compression apparatus 103 to start instruction data compression processing.

The instruction data compression apparatus 103 receives an instruction data compression start instruction from the central control apparatus 101 and starts instruction data compression processing.
The instruction data compression start instruction includes at least one piece of identification information of instruction data to be compressed, and acquires instruction data to be compressed from the instruction data storage device 106 based on the identification information. Perform data compression processing.
Specific processing contents of the instruction data compression processing will be described later.

If no error occurs in the instruction data compression process and the size of the compressed instruction data generated by the instruction data compression process is at least smaller than the size of the instruction data before compression, the compressed instruction data is stored in the instruction data. Store in device 106.
At this time, identification information that can be uniquely identified is added to the compressed instruction data and stored, and the identification information is preferably the same as the identification information of the source code or the identification information of the instruction data. .
If they are not the same identification information, it is desirable to retain information for associating the identification information of the source code and the identification information of the instruction data with the identification information of the compressed instruction data generated therefrom.
Finally, the instruction data compression apparatus 103 returns a processing result ID indicating the success of the instruction data compression process to the central control apparatus 101.
Conversely, if an error occurs in the instruction data compression process, or the size of the instruction data before compression is the same as the size of the compressed instruction data, or the compressed instruction data size is larger, the instruction data is compressed. Therefore, the processing result ID indicating that the error has occurred or the processing result ID indicating that the size of the compressed instruction data is equal to or larger than the size of the instruction data is returned to the central control apparatus 101.

  Upon receiving the processing result ID from the instruction data compression apparatus 103, the central control apparatus 101 notifies the processing result ID that an error has occurred, and the processing is completed.

  FIG. 5 shows an example of a specific processing sequence of the instruction data / compressed instruction data execution process.

  When the central controller 101 receives an execution request from the host, the central controller 101 issues an instruction data / compressed instruction data execution start instruction to the compressed instruction data execution device 104 in accordance with the request. The execution request received from the host includes one or more identification information for at least one of the source code, instruction data, and compressed instruction data to be executed, and the instruction data to be processed based on the identification information, Identify compressed instruction data.

Upon receiving the instruction data / compressed instruction data execution start instruction from the central controller 101, the compressed instruction data execution apparatus 104 obtains the instruction data to be processed and the compressed instruction data from the instruction data storage apparatus 106 from the identification information of the execution object. To do.
At this time, if the identification information included in the instruction corresponds to the source code, the identification information for the instruction data corresponding to the source code or the compressed instruction data is associated with the identification information of the source code. Finally, the instruction data or the compressed instruction data is acquired.
Similarly, when the identification information included in the instruction corresponds to the instruction data, it is checked whether or not there is compressed instruction data corresponding to the instruction data by using the association information. Acquires the compressed instruction data from the instruction data storage device 106, and if not, acquires the instruction data from the instruction data storage device 106.
Finally, if the identification information included in the instruction corresponds to the compressed instruction data, the target compressed instruction data is acquired from the instruction data storage device 106 based on the identification information.
After acquiring the instruction data or the compressed instruction data, the compressed instruction data execution device 104 performs pre-execution preparation and constructs information and status necessary for executing the instruction data / compressed instruction data.
Thereafter, the execution of the instruction data / compressed instruction data is started, and after completion of the execution, the information and the situation prepared for execution are ended. Finally, the execution result is returned to the central control apparatus 101, and the processing ends.
Receiving the processing result, the central control apparatus 101 returns the processing result to the upper level, and the instruction data / compressed instruction data execution process ends.

The basic processing sequence in the information processing terminal device 100 according to the present embodiment has been described above with reference to FIGS. 2, 3, 4, and 5. In this description, each processing block is processed in series. However, it is not always necessary to use such a processing format.
For example, in the instruction data / compressed instruction data generation process, the processing may be performed by collectively processing a plurality of source codes without processing only a single source code in the instruction data generation start process. A plurality of source codes may be processed in parallel without being processed in series.

  Next, a specific description of the source code handled in this embodiment will be given.

The source code refers to data that describes the processing contents to be executed by the finally generated software according to the syntax rules of a language specification that has human or some tools.
The purpose of source code is to make it easy for humans to decipher its contents, and the syntax rules to be followed usually assume that the source code is textual data.
In this embodiment, source code according to C language syntax rules is handled. However, this does not indicate that this embodiment is applicable only to C language syntax rules. The present embodiment can be applied to any other language specification such as Java (registered trademark) language.

FIG. 6 is an example of source code.
An example of the source code follows the C language syntax rules as described above.
The first line means that 3 is assigned to the integer type variable a.
The second line means that 4 is assigned to the integer type variable b.
The third line means that the result of adding the variable a and the variable a to the integer type variable c is substituted.
Since 3 is assigned to the variable a in the previous processing, the value assigned to c is 6, which is the addition result.

  Next, specific description will be given regarding the instruction data handled in the present embodiment.

The instruction data refers to data in machine language generated as a result of processing when the instruction data generating apparatus 102 executes the instruction data generating process with the source code specified by the central control apparatus 101 as an input.
The instruction data is expressed in a data format that can be interpreted by the compressed instruction data execution device 104.
In general, instruction data does not necessarily need to be human interpretable, and priority is given to being able to be efficiently interpreted by the compressed instruction data execution apparatus 104.
Therefore, the data format of instruction data is generally a binary format.
Further, the instruction data may be added with additional information such as a source code or a parse tree of the source code together with the binary data.

  FIG. 7 is a diagram showing an example of the data format of the instruction sequence.

In this example, the instruction sequence has a minimum data structure of a combination of an instruction ID part and a parameter part that follows.
The instruction ID part is an area for storing an instruction identification number uniquely assigned to a processing set of the compressed instruction data execution apparatus.
In this embodiment, the instruction ID portion is described as a fixed length of 1 byte. However, the instruction ID portion does not have to be a fixed length and may be a variable length.
Next, the parameter part is an area for storing information necessary when the compressed instruction data execution device 104 executes processing corresponding to the instruction identification number stored in the corresponding instruction ID part.
In this embodiment, the size of the parameter part and the number of parameters stored in the parameter part are described as variable lengths determined by the instruction identification number stored in the instruction ID part. It may be a fixed length having a part.

  FIG. 8 is an example of the correspondence between the instruction identification number in the instruction sequence, specific instruction contents, and parameter part size.

Since the instruction ID portion is 1 byte, the instruction identification number can also take a value from 0 to 255.
The specific processing contents corresponding to each instruction identification number will be explained in a timely manner, so the details are omitted here, and the processing name of the corresponding processing is associated with the size of the parameter part required for the processing. .
For example, when 5 is stored in the instruction ID portion, the compressed instruction data execution device 104 must perform processing corresponding to the processing name popv, and the size of the parameter portion immediately following the instruction identification number at that time Means 0 bytes.
The content that the compressed instruction data execution device 104 interprets a certain instruction sequence does not cause any semantic alteration with the contents of the source code that was processed when the instruction sequence was generated. Is guaranteed by the instruction data generation device 102 and the instruction data compression device 103.
Here, “semantic alteration does not occur” means that the result of processing according to the contents described in the source code and the result of processing according to the contents described in the instruction data are arbitrary input, It does not necessarily mean that the outputs match, and does not require that the processing process be the same.
In other words, although not described in the source code, it is replaced with an instruction that is convenient for processing by the compressed instruction data execution device 104, or an internally required process is added, or is described in Non-Patent Document 1, etc. This means that the instruction data generation device 102 or the instruction data compression device 103 may perform the optimization.

  FIG. 9 is a mnemonic representation of the instruction data generated by the instruction data generation device 102 according to the instruction identification number configuration (instruction set) shown in FIG. It is an example.

Process delocalvar is a process of newly securing variable areas as many as the number specified in the parameters as local variable areas held by the compressed instruction data execution device.
In the present embodiment, the size of the single variable area is premised on a fixed length of 4 bytes, and the content 3 described in the parameter section indicates the number of variables for which the area should be secured.
These three variables are variables a, b, and c.
Here, the size of the single variable area is a fixed length, but it is not necessarily a fixed length. However, by using the fixed length, more effective generation of compressed instruction data, which will be described later, can be performed.
Next, processing corresponding to the first line of the source code is described in the second to fourth lines.
The process number is a process of pushing the integer value described in the parameter section to the stack area held by the compressed instruction data execution device 104.
Here, 3 described in the parameter portion is a value 3 assigned to the variable a.
Next, the process setname is a process of popping the top value of the stack area, assigning it to the variable area at the offset position described in the parameter section, and pushing the assigned value onto the stack area.
Here, 0 described in the parameter part is an offset value for the declared variable a.
In this specification, unless otherwise specified, offset values are assigned in the order of appearance in the source code, and the offset value is the number of variables that have been declared immediately before the variable is declared.
Next, the process popv is a process for deleting the top element of the stack.
By executing this processing, the result of pushing the assigned value performed at the end of the immediately preceding setname to the stack area is released from the stack, thereby preventing the value from remaining in the stack.
This process is not specified in the source code, but is necessary for the compressed instruction data execution apparatus 104 to perform the process.
This completes the processing of the instruction data corresponding to the first line of the source code.

Immediately thereafter, the instruction data corresponding to the second line of the source code is written in the fifth to seventh lines.
The second line of the source code has the same structure as the first line of the source code, and only the variable name and the value assigned to the variable are different. ing.

Finally, the 8th to 12th lines contain instruction codes corresponding to the 3rd line of the source code.
Process names are described in the 8th and 9th lines, and each is a process of pushing the value stored in the variable area at the offset position described in the parameter section to the stack area.
The process add is described in the 10th line, which is a process of popping the top two elements of the stack area and pushing the result of adding the two elements onto the stack. The processing of “a + a” which is a part of the third line of the source code is described by the instruction code so far.
Next, the value “a + a” stored at the top of the stack is popped in the process setname on the eleventh line, assigned to variable c, the assigned value is pushed onto the stack, and the last 12 lines The value pushed at the end of the immediately preceding process setname with the instruction popv is popped from the stack and deleted, and the description corresponding to the third line of the source code is completed.

FIG. 10 shows an example in which the mnemonic-represented instruction data shown in FIG. 9 is expressed in hexadecimal.
When normal instruction data is handled as a binary format, it is expressed in such a format.

  Next, a specific description will be given regarding the compressed instruction data handled in the present embodiment.

Compressed instruction data is processed by one or more instruction data designated by the instruction data compression device 103, guaranteeing the semantic homogeneity of the instruction data, and having a data size larger than the instruction data. This is instruction data as a result of conversion to be smaller.
One specific example of the instruction data compression process in FIG. 4 will be described with reference to FIG.

In order to generate compressed instruction data from instruction data, a process of counting overlapping instruction strings in the instruction data (counting the number of occurrences of the same instruction string) is performed.
Here, the instruction sequence refers to data in which one or more sets of an instruction ID part and a parameter part are continuous.
That is, in the present embodiment, the instruction data is not subjected to data compression processing as data in an arbitrary binary format, but is compressed using the semantic structure as an instruction as a minimum unit. Details of this point will be described later.
Next, it is determined which instruction sequence is effective for compression from the information on the total number of occurrences of the instruction sequence, and creates information about the instruction sequence to be compressed as table data (compression target instruction sequence table) Generation).
The process of generating the compressed instruction data by reducing the data size while retaining the semantic homogeneity of the instruction data by searching for the instruction sequence that was finally compressed from the instruction data and replacing it with the meta instruction (instruction Data compression conversion) is performed, and the compressed instruction data generation process is completed.

Next, in order to implement the processing shown in FIG. 11, the instruction data compression apparatus 103 according to the present embodiment has a configuration shown in FIG. 48, for example.
Here, a configuration example of the instruction data compression apparatus 103 according to the present embodiment will be described with reference to FIG.

The instruction data storage device access unit 1031 inputs instruction data (program) in machine language including a plurality of instruction sequences from the instruction data storage device 106.
As described above, the instruction string is a combination of an instruction code (instruction ID part) indicating an instruction and a parameter value (parameter part) of 0 bytes or more that is an object of the instruction of the instruction code.
In addition, the instruction data storage device access unit 1031 includes the compressed instruction data after the instruction sequence is replaced with the meta instruction by the instruction interpretation / compression unit 1032 described later, and the meta instruction dictionary data generation unit 1036 described below. The command dictionary data is output to the command data storage device 106 in association with the command dictionary data.
The instruction data storage device access unit 1031 is an example of a program input unit and a program output unit.

The instruction interpretation / compression unit 1032 analyzes each instruction sequence of the instruction data input by the instruction data storage device access unit 1031 and converts the instruction sequence satisfying a predetermined condition into a meta-instruction having a smaller data amount than the instruction sequence. replace.
The instruction interpretation / compression unit 1032 is an example of an instruction replacement unit.
The instruction interpretation / compression unit 1032 is classified into an identical instruction sequence appearance count unit 1033, a compression target instruction table generation unit 1034, and an instruction data compression / conversion unit 1035.

  The same instruction sequence appearance count unit 1033 counts the number of instruction sequences having the same combination of instruction code and parameter value in the instruction data input by the instruction data storage device access unit 1031.

The compression target instruction table generation unit 1034 determines which instruction sequence is effective for compression from the information related to the number of appearances of the instruction sequence counted by the same instruction sequence appearance count unit 1033, and the instruction to be compressed A compression target instruction sequence table indicating a sequence is generated.
That is, for each instruction sequence, the compression target instruction table generation unit 1034 calculates the total amount of data in the instruction data from the number of instruction sequences counted by the same instruction sequence appearance count unit 1033 and the data amount per instruction sequence, When the total amount of meta-instruction data and meta-instruction dictionary data for the instruction sequence is calculated, and the total amount of meta-instruction data and meta-instruction dictionary data is less than the total amount of data in the instruction sequence Then, it is determined that the instruction sequence is to be replaced with a meta-instruction, and is added to the compression target instruction sequence table.

The instruction data compression / conversion unit 1035 searches the instruction data targeted for compression by the compression target instruction table generation unit 1034 from the instruction data and replaces it with a meta-instruction to maintain the semantic homogeneity of the instruction data. A process of reducing the size and generating the compressed instruction data (instruction data compression conversion) is performed, and the compressed instruction data generation process is completed.
More specifically, the instruction data compression / conversion unit 1035 extracts an instruction sequence that matches the combination of the instruction code and parameter value indicated in the compression target instruction sequence table, and replaces the extracted instruction sequence with a meta-instruction.
If there are two or more instruction sequences that match the combination of the instruction code and parameter value shown in the compression target instruction sequence table, the two or more instruction sequences are replaced with a common meta-instruction.

The meta instruction dictionary data generation unit 1036 generates meta instruction dictionary data.
The meta-instruction dictionary data is data indicating an instruction sequence that is associated with a meta-instruction and replaced with a meta-instruction.

  The instruction compression time information storage unit 1037 is a storage unit used by the instruction interpretation / compression unit 1032 during compression processing.

  Hereinafter, the operation example of the instruction data compression apparatus 103 will be described in order with a specific example.

FIG. 12 illustrates a specific example of the same instruction string appearance count counting process in FIG.
The same instruction sequence appearance count counting process is performed by the same instruction sequence appearance count counting unit 1033 shown in FIG.
As described above, the target of counting the number of occurrences is an instruction sequence, and a case where a plurality of instruction ID portions are included in one instruction sequence is considered, but here, only a single instruction ID portion is included in the instruction sequence. It will be described as being included.

In the process 1201, the same instruction sequence appearance count counting unit 1033 secures a recording area for recording the appearance count for each instruction and initializes the contents thereof.
The recording area used here is, for example, an instruction compression time information storage unit 1037.

FIG. 13 shows an example of the data structure of the elements of the command ID appearance count recording table.
The instruction identification number area is an area for storing the value of the instruction ID of an instruction that counts the number of appearances of the element.
This area can be substituted by the index of the array when the appearance record table for each instruction ID is implemented as an array.
The parameter-specific appearance count recording table area is an area for storing the address of table data for counting the number of appearances by the value of the parameter part immediately following the command for counting the number of appearances by the element.
In the case of an instruction having no parameter part, the number of appearances may be stored directly instead of the address, and the number of appearances is recorded in the parameter-specific appearance number recording table as in the case of the instruction having the parameter part. It doesn't matter.

FIG. 14 shows an example of the data structure of elements of the appearance count recording table for each parameter.
The parameter part is an area for holding the value of the parameter part immediately after the instruction ID part of the instruction sequence to be counted directly or by indirect reference.
The appearance count recording area is an area for recording a result of totalizing how many times an instruction string including a set of instruction ID and parameter value to be counted appears in the instruction data.
Since the appearance count record table for each parameter must record the appearance count for each value of the parameter part, it is not efficient to manage with a fixed-length array. Assumed.

Returning to the description of the process 1201.
For securing and initializing the storage area, the same instruction sequence appearance count section 1033 has the same number of instructions as defined in the instruction set when the instruction ID appearance count recording table is, for example, a fixed-length array. A storage area is secured so as to have an element, and the value of the instruction ID of the instruction that records the number of occurrences of each element for each element is substituted into the instruction identification number area. Initialization is performed by substituting a value such as 0 or a NULL pointer.
After initialization is completed, the process proceeds to processing 1202.

In the process 1202, the same instruction sequence appearance count counting unit 1033 selects one of the instruction data not yet processed from one or more instruction data to be processed, and sets the head of the instruction data. Create a pointer pt to point to.
This pointer pt is used to indicate the position of the instruction ID portion to be processed in the instruction data currently being processed in the subsequent processing.
After creating pt, the process proceeds to process 1203.

In process 1203, the same instruction sequence appearance count counting unit 1033 determines whether the current pointer pt has reached the end of the instruction data to be processed.
If the end has been reached, it means that all of the instruction ID parts in the instruction data currently being processed have been completed, and the process for executing the next instruction data search process Transition to 1204.
On the other hand, when the terminal has not been reached, it means that the data after the position indicated by pt is not processed in the instruction data to be processed, so that the processing transitions to processing 1205 in order to continue the processing for them. .

In processing 1204, the same instruction sequence appearance count counting unit 1033 has completed processing of all instruction data currently being processed, and therefore searches for instruction data to be processed next, that is, instruction data that has not been processed. To do.
If there is no instruction data to be processed as a result of the search, the processing has been completed for all the instruction data to be processed here, and therefore the same instruction string appearance count counting process is performed with this process. End.
Conversely, when there is instruction data to be processed, the process proceeds to process 1202 with the instruction data as a processing target.

In processing 1205, the same instruction sequence appearance count counting unit 1033 confirms whether an instruction identification number corresponding to the value of the instruction ID part indicated by pt exists in the instruction set, and extracts information on the corresponding instruction.
The information extracted here may be at least parameter part size information.
After the information extraction is completed, the process proceeds to processing 1206.

In the processing 1206, the same instruction sequence appearance count counter 1033 is an element of the instruction ID appearance count recording table for recording the appearance count related to the instruction corresponding to the value of the instruction ID portion indicated by pt (hereinafter referred to as count). Take out.
At this time, if the count-by-parameter appearance count recording table area is NULL, a parameter-by-parameter appearance count recording table is created, and the address is substituted into the count-by-parameter appearance count recording table area.
After the process is completed, the process proceeds to process 1207.

In processing 1207, the same instruction sequence appearance count counter 1033 corresponds from the parameter-specific occurrence count recording table indicated in the count-specific parameter appearance count recording table area by using the parameter part immediately following the instruction ID indicated by pt as a search key. Search for an element (hereinafter referred to as target).
Here, when the instruction identification number for the instruction having no parameter part is described in the instruction ID part indicated by pt, the parameter-specific appearance count recording table area specified without specifying the search key Search for the first element in the occurrence count record table.
After the search process is completed, the process proceeds to process 1208.

In processing 1208, the same instruction sequence appearance count counting unit 1033 performs conditional branching depending on whether or not the target searched in processing 1207 is found.
If the target is not found, it means that the combination of the instruction ID pointed to by pt and the immediately following parameter part is found for the first time, and therefore the process proceeds to a process 1209 which is a process at the first search.
On the other hand, if the target is found, it means that the instruction sequence of the combination has already been found, and the process proceeds to the process 1213 which is the second and subsequent appearance count recording process.

In the processing 1209, the same instruction sequence appearance count counting unit 1033 finds the instruction sequence starting from the position indicated by pt for the first time, and therefore there is no target as a corresponding element in the count.
For this reason, a corresponding parameter appearance count recording element is newly created and initialized, which is set as a target, and the process proceeds to a process 1210.

  In process 1210, the same instruction sequence appearance count counting unit 1033 substitutes 1 for the appearance occurrence count recording area of the target, and the process proceeds to process 1211.

In processing 1211, the same instruction sequence appearance count counting unit 1033 registers the target in the count using the value of the parameter part of the instruction sequence indicated by pt as a key.
The appearance number recording process for the instruction sequence found for the first time by the process 1211 to the process 1211 is completed.
After the process 1211 is completed, the process proceeds to the process 1212.

Next, in processing 1213, the same instruction sequence appearance count counting unit 1033 finds that the target corresponding to the instruction sequence indicated by pt has been found, so the value obtained by adding 1 to the value of the target appearance count recording area is used as the target occurrence count. Substitute in the recording area and update the appearance count.
After the substitution process ends, the process proceeds to process 1212.
Thus, the appearance number update process for the instruction sequence starting from the position indicated by pt is completed.
For this reason, in the process 1212, the same instruction sequence appearance count unit 1033 performs a process of shifting pt to the instruction ID part of the instruction sequence to be processed next.
The size to be shifted is calculated from the size information of the parameter part acquired in processing 1205.
After the shift is completed, the processing transitions to processing 1203 in order to execute processing for the new pt.

The creation / initialization processing of the appearance count recording table for each instruction ID described above is based on the premise that the instruction string includes only a single instruction ID part, but the instruction string includes a plurality of instruction ID parts as described above. It is assumed that
Therefore, it is necessary to count the number of occurrences of an instruction sequence including a plurality of instruction ID parts, but this can be realized by recursively repeating a method based on only a single instruction ID part.
In the following description, it is assumed that a plurality of instruction ID parts can be included.

For example, for an instruction sequence that appears multiple times, the instruction sequence immediately after the instruction sequence is regarded as one instruction data, the same counting method is performed, and the result is combined to include an instruction sequence including multiple instruction ID parts. Aggregation of the number of appearances is realized.
At that time, an instruction position information list for storing information indicating at which position in each instruction data the instruction sequence appearing a plurality of times appears is added to the element data structure of the appearance count recording table by instruction ID, and A process for recording the appearance position is added to the processes 1213 and 1210, and a process for registering the appearance position information list together with the compression target instruction table in the process 1607 is added. It is possible to grasp from which position of the instruction sequence to be compressed, the recursive processing can be limited to the processing from the position where the same compression target instruction sequence is started, and the processing efficiency can be improved. is there.
In the following description, the appearance position information list will be described as being included in the elements of the command ID appearance count recording table and the compression target command table.

  Further, the method of counting the number of appearances described above is merely an example, and it may be counted by other procedures.

FIG. 16 is a specific example of the compression target instruction sequence table generation process in FIG.
The compression target instruction sequence table generation process is performed by the compression target instruction table generation unit 1034 shown in FIG.

For compressed instruction data, one or more instruction sequences are selected from all instruction sequences in one or more instruction data to be processed in consideration of the size reduction rate, etc. The instruction data is smaller in size than the instruction data as a whole by replacing with the instruction.
When the meta-instruction is interpreted by the compressed instruction data execution device 104, the original instruction sequence at the position where the meta-instruction exists is identified by the corresponding instruction identification number or the value of the associated parameter part, and the meta-instruction is executed. Instead of executing the original instruction sequence.
Therefore, in the compressed instruction data, there is information for knowing the original instruction sequence by using the instruction identification number corresponding to the meta instruction or the value of the associated parameter part as a key together with the instruction data replaced by the meta instruction. Necessary. The compression target instruction sequence table generation processing generates the compression target instruction sequence table as the information.

In process 1601, the compression target instruction table generation unit 1034 generates an entity of a compression target instruction sequence table (hereinafter referred to as table).
This table is realized by a variable-length array, a list structure, or the like when it is unknown how many instruction sequences are finally aggregated.
Here, explanation is given assuming a list structure. After the entity generation is completed, the process proceeds to process 1602.

  FIG. 17 illustrates an example of a data structure related to elements of the compression target instruction sequence table.

The instruction string storage area is an area for recording a registered instruction string or information related to the instruction string.
The importance recording area is an area for recording the importance calculated based on a compressible size when the instruction sequence is replaced with a meta instruction.
Finally, the importance for all instruction sequences is calculated, and the instruction sequence to be compressed is determined in descending order of importance.
The compression target instruction sequence table is created using the instruction compression time information storage unit 1037 of FIG.

In process 1602, the compression target instruction table generation unit 1034 performs a process of extracting the head element of the table (hereinafter referred to as “count”) from the instruction-specific appearance count recording table generated in the same instruction sequence appearance count counting process.
After the extraction is completed, the process proceeds to processing 1603.

In processing 1603, the compression target instruction table generation unit 1034 performs conditional branching depending on the presence / absence of an unprocessed element from the parameter-specific appearance count recording table that can be referred to from the count-specific parameter appearance count recording table.
If there is no unprocessed element, all the elements of count have been processed, and the process proceeds to process 1608 to search for a new process target.
Conversely, if there is an unprocessed element, the process proceeds to process 1604 to process the unprocessed element.

  In process 1604, the compression target instruction table generation unit 1034 acquires the unprocessed element (hereinafter referred to as “target”), and transitions to process 1605.

In process 1605, the compression target instruction table generation unit 1034 determines whether or not there is a compression effect when the instruction sequence corresponding to the target is replaced with a meta instruction.
The compression effect is determined to be a compression effect when, for example, the following inequality expression is established.
[Instruction string length]-[Meta instruction length]> 0
After the determination process is completed, the process proceeds to process 1606.

In processing 1606, the compression target instruction table generation unit 1034 determines whether or not to register the instruction sequence corresponding to the target in the compression target instruction sequence table based on the determination result of processing 1605, and performs branch processing.
Normally, if it is determined in step 1605 that there is a compression effect, the table registration is performed, so the process proceeds to step 1607. If it is determined that there is no compression effect, the next element is processed, and therefore processing 1603 Transition to.

In process 1607, the compression target instruction table generation unit 1034 registers information in the compression target instruction string table regarding the instruction string corresponding to the target.
At this time, the importance of the instruction sequence is calculated, and one element is configured and registered together with the result.
Here, as the importance, for example, a value calculated by the following equation can be considered.
Here, the meta-instruction dictionary data registration information length means the data length when this instruction sequence is registered in the meta-instruction dictionary data as an information source for extracting the original instruction sequence from the meta-instruction when replaced with a meta-instruction. To do.
([Instruction string length]-[meta instruction length]) * [instruction string appearance count]-[meta instruction dictionary data registration information length]

In processing 1608, the compression target instruction table generation unit 1034 branches depending on the presence / absence of an unprocessed element to be processed next because all of the parameter-specific occurrence count recording table elements registered in the current count have been processed. Process.
If there is an unprocessed element, the process proceeds to process 1609; otherwise, the process proceeds to process 1610.

  Since there is an unprocessed element in the process 1609, the compression target instruction table generating unit 1034 transitions to the process 1603 with the element as a count.

In the processing 1610, it means that there is no unprocessed element, that is, processing has been completed for all the instruction sequences, so the compression target instruction table generation unit 1034 generates a final compression target instruction sequence table from the table.
Normally, there is an upper limit on the number of instruction sequences that can be replaced with meta-instructions. If the upper limit is N, all elements in the table are sorted by importance, and the upper N and lower are excluded from compression. Then, the remaining N instruction sequences are determined as final compression target instruction sequences, and a table in which the importance is deleted from each element is used as meta-instruction dictionary data, and the process is completed.

FIG. 18 is a specific example of the instruction data compression conversion process in FIG.
In this process, the instruction sequence registered in the meta-instruction dictionary data generated by the compression target instruction sequence table generation process is searched from all instruction data to be processed, and the instruction sequence is replaced with an appropriate meta-instruction. Do.

The following are specific examples of meta-instructions.
As a specific example of the meta instruction, an example using an unused instruction identification number space of the instruction set will be given.
In this embodiment, it is assumed that the instruction identification number has a fixed length of 1 byte, and the instruction identification number can be assigned 256 numbers from 0 to 255, and in hexadecimal notation from 0x00 to 0xFF.
Of these, for example, if 0 to 0xF9 is an unused instruction identification number to which a specific normal instruction is not assigned, the 0xF0 to 0xF9 are reserved for the metainstruction, and the metainstruction is set to 0xF0 to 0xF9. It is possible to express.
With this method, the meta instruction can be expressed by 1 byte.
In that case, the maximum number of elements in the meta instruction dictionary data is 10, and 0xF0 corresponds to the instruction sequence of the first element, and 0xF1 corresponds to the second instruction sequence. Can be determined.

Even in the case where the unused instruction identification number spaces are not continuous, it is also possible to allocate meta instructions to unused instruction identification numbers.
In this case, one of the unused instruction identification numbers is defined for the meta instruction, and at least one parameter part is included in the meta instruction, and the corresponding compression target in the meta instruction dictionary data is included in the parameter. A method is conceivable in which the index value of the element in which the instruction sequence is stored is held and associated.
In the case of this method, the meta instruction length is 2 bytes or more.

In addition, the value of the instruction identification number of the corresponding meta-instruction is registered in the meta-instruction dictionary data in combination with the instruction sequence to be compressed. It is also possible to search for an element having the same value as the target meta-instruction and associate it.
In the case of this method, the meta-instruction length is 1 byte. However, as described above, a corresponding instruction string search process is required when processing is performed by the compressed instruction data execution apparatus.

Next, as a specific example of a meta-instruction, an example in which an instruction identification number that has not been used in all instruction data to be processed is used as a meta-instruction in a used instruction identification number space of an instruction set. Give up.
In this method, when the instruction has already been allocated to the entire instruction identification number space, or when there are unused instruction identification numbers, but there are more meta-instructions to be compressed, the unused instruction identification number This is effective when defining meta-instructions exceeding the number.
In the case of this method, it is necessary to record information indicating which instruction identification number is replaced with a meta instruction in compressed instruction data such as meta instruction dictionary data.

In addition, the instruction sequence registered in the meta-instruction dictionary data cannot always be limited to a predetermined instruction length.
When the instruction length of such an instruction sequence to be registered is indefinite, the instruction length of the instruction is also registered at the time of registration.

A specific example of the instruction data compression / conversion process in FIG. 11 will be described with reference to FIG.
The instruction data compression / conversion process is performed by the instruction data compression / conversion unit 1035 shown in FIG.

  In process 1801, the instruction data compression / conversion unit 1035 selects one unprocessed instruction data from all the instruction data to be processed, points to the first instruction part of the instruction data with the pointer pt, and proceeds to process 1802. Transition.

In process 1802, the instruction data compression / conversion unit 1035 determines whether or not the content pointed to by pt is the end of the instruction data, and performs a branch process based on the result.
If it is at the end, it means that all the instruction sequences described in the instruction data have been processed, and the processing transits to processing 1803.
If it is not the end, it means that there is an unprocessed instruction sequence in the instruction data, and the head of the instruction data is an instruction sequence indicated by pt, and the processing shifts to processing 1804.

In processing 1803, the instruction data compression / conversion unit 1035 determines whether unprocessed instruction data exists in all instruction data to be processed, and performs branch processing based on the result.
If unprocessed instruction data exists, the process proceeds to process 1801 in order to process the unprocessed instruction data.
On the other hand, when there is no unprocessed instruction data, it means that the processing for all the processing target instruction data has been completed, and thus the instruction data compression conversion process is ended.

In processing 1804, the instruction data compression / conversion unit 1035 searches whether the instruction string from the position indicated by pt is registered in the meta instruction dictionary data.
When the search is completed, the process proceeds to process 1805.

In process 1805, the instruction data compression / conversion unit 1035 performs a branch process according to the search result of process 1804.
As a result of the search, if there is a matching instruction string, the process proceeds to process 1806, and if there is no matching instruction string, the process proceeds to process 1807.

In processing 1806, the instruction data compression / conversion unit 1035 replaces the instruction string from the position indicated by pt with the meta instruction because the matching instruction string exists in the meta instruction dictionary data.
After the replacement is completed, the process proceeds to process 1807.

In the processing 1807, since the instruction sequence from the position pointed to by pt has been processed, the instruction data compression conversion unit 1035 shifts pt by the length of the instruction sequence so that the head of the next instruction sequence is indicated. Update.
After the shift process is completed, the process proceeds to process 1802.

  Thus, the generation of compressed instruction data is completed by replacing all the instruction data to be processed with the instruction sequence registered in the meta instruction dictionary data with the meta instruction.

FIG. 15 is an example of an instruction ID appearance count recording table that is finally generated when the same instruction sequence appearance count counting process shown in FIG. 12 is applied to the instruction data taken up in FIG.
The areas of the command identification number and the appearance count recording table for each parameter are as shown in FIG.
The parameter portion and the appearance count recording area, which are elements of the appearance count recording table for each parameter, are as shown in FIG.

  19 is an example of a compression target instruction sequence table generated when the compression target instruction sequence table generation process shown in FIG. 16 is performed based on the instruction ID appearance count recording table shown in FIG. 20 is an example of meta-instruction dictionary data generated based on the compression target instruction sequence table.

In this example, the meta instruction is generated with a meta instruction length of 1 on the premise that the meta instruction is defined using a continuous unused instruction identification number space.
In the instruction sequence table to be compressed, only the instruction sequence name (0) has an importance level greater than 0, and the other size is determined by considering the increase in the data size that is increased by registering the instruction sequence in the meta-instruction dictionary data. It means that there is no reduction effect.
This meta-instruction dictionary data means that only the instruction string name (0) can be converted into a meta-instruction, thereby contributing to a reduction in the size of the instruction data.

  FIG. 21 is an example of instruction data generated as a result of performing the instruction data compression / conversion process shown in FIG. 18 on the instruction data shown in FIG. 9 based on the meta-instruction dictionary data shown in FIG.

By replacing “0D00” corresponding to name (0) with the meta instruction “F0”, the size of the instruction data is reduced by 3 bytes, the meta instruction dictionary data is 2 bytes, and the instruction data before compression as a whole When the compressed instruction data is compared, the size is reduced by 1 byte.
However, if the instruction length of the instruction sequence registered in the meta instruction dictionary data is indefinite, for example, a 1-byte integer area may be added to the meta instruction dictionary data as the instruction length. The reduction effect is lost.
However, in order to simplify the explanation this time, the instruction data to be processed is small, but in general, the data size is larger than the exemplified instruction data. appear.

For example, in the case of compression of image data, the minimum unit data size (size that is not divided and not subjected to compression processing) is fixed to 3 bytes of RGB, and 1 byte if it is simple binary data. However, in the instruction data compression apparatus 103 according to the present embodiment, the minimum unit data size is not a fixed value but variable.
That is, since the instruction identification number and all the parameters associated therewith are used as the minimum unit, the size of the processing minimum unit is variable (strictly, the processing minimum unit at that position is determined by the instruction identification number).
For example, as shown in FIG. 39, when the instruction identification number at a certain position is accompanied by a parameter for 4 bytes, the minimum processing unit of the data at that position is 5 bytes (assuming that the instruction identification number is fixed at 1 byte).
That is, the compression process is not performed such that only the first 3 bytes are registered as a compressed instruction sequence and the instruction sequence in which the remaining 2 bytes remain in the uncompressed instruction sequence is divided.
If the instruction identification number at the next position is not accompanied by a parameter, the minimum processing unit of the data at that position is 1 byte.
Thus, in the instruction data compression apparatus 103 according to the present embodiment, the minimum unit data size changes for each instruction sequence.

The reason for adopting such a method is to simplify the processing in the compressed instruction data execution device 104, as will be described later.
For example, as shown in FIG. 40, an instruction identification number and a first parameter (Param 1) are included in the uncompressed instruction sequence, but a second parameter (Param 2) and a third parameter (Param 3) associated with the instruction are included. ) Is included in the compressed instruction sequence, the compressed instruction data execution device 104 not only saves the position information of the processing target instruction indicating means corresponding to the program counter (PC), but also A new means is required for knowing from which of the accompanying parameters the compressed instruction sequence is described.
However, when such a means is realized, there is a drawback of increasing the processing load at the time of execution, and in order to avoid the disadvantage, it is always necessary that “if it is described in a certain instruction sequence, it always accompanies that instruction. In order to guarantee that the parameters are described consecutively in the same instruction sequence, the above-described minimum processing unit determination method is employed.

  Next, a specific procedure for executing instruction data and compressed instruction data in the compressed instruction data execution apparatus 104 will be described.

A conventional data processing apparatus that performs processing based on compressed instruction data restores uncompressed instruction data from the compressed instruction data, and performs processing using the restored instruction data.
However, when this method is used, it is necessary to store both the compressed instruction data and the restored instruction data in the data processing device, which compresses the storage area.
Further, the instruction data compression process is essential, and there is a problem that the execution time of the instruction data becomes long.
In order to solve the above problems, the compressed instruction data execution device 104 according to the present embodiment does not require instruction data restoration processing from the compressed instruction data, and realizes reduction in processing time and storage area compression.

Here, “Restoring the uncompressed instruction data from the compressed instruction data” means that “the compressed instruction data secured in the memory is subjected to some processing and compressed into the area secured in the memory. It means the act of “reproducing previous command data”.
That is, in the conventional data processing apparatus, when “restoring uncompressed instruction data from compressed instruction data”, a memory area for reproducing the data before compression must be secured.
However, it is not necessary to limit to the memory, and the above-mentioned “memory” can be replaced with “HDD”, and the act of reproducing the data before compression is required by consuming resources with some upper limit. .
To explain using the memory space, before the “restoration” process, as shown in FIG. 41, a certain area is secured and compressed data exists in the area.
In this state, some processing is performed to reproduce uncompressed data, and a state as shown in FIG. 42 in which a new memory area is secured as the reproduction destination is a state after restoration.
Since the compressed instruction data execution device 104 according to the present embodiment is capable of “execution of compressed instruction data without restoring compressed instruction data to uncompressed instruction data”, the state of FIG. 42 is not created. The processing is continued in the state of FIG.
For this reason, the compressed instruction data execution device 104 according to the present embodiment has an effect of reducing the amount of used memory, and is effective in an environment with severe resource constraints such as an embedded device.

  In the present embodiment, the compressed instruction data execution device 104 is configured as shown in FIG. 22, so that the instruction data restoration process from the compressed instruction data is not required, and the processing time is shortened and the storage area pressure is reduced.

In FIG. 22, an instruction data storage device access unit 1041 accesses the instruction data storage device 106 in which instruction data to be executed is stored in order to interpret and execute the instruction data.
That is, the instruction data storage device access unit 1041 inputs from the instruction data storage device 106 the instruction data in which the instruction sequence is replaced by the meta instruction by the instruction data compression device 103.
The instruction data storage device access unit 1041 inputs meta-instruction dictionary data from the instruction data storage device 106 together with the input of instruction data.
The instruction data storage device access unit 1041 is an example of a program input unit and a meta instruction dictionary data input unit.

The instruction execution time information storage unit 1042 stores information to be held when executing instruction data to be executed.
The instruction execution time information storage unit 1042 is roughly divided into a processing target instruction position storage unit 1043, a processing target command position saving unit 1044, and a meta instruction dictionary data holding unit 1045.

The processing target command position storage unit 1043 stores processing target command position information.
The processing target instruction position information is information for indicating which position in the instruction data to be executed by the instruction sequence interpretation / execution unit 1046 described later is the current processing target. This corresponds to the aforementioned programmable counter (PC).
That is, the instruction execution time information storage unit 1042 designates a position in the instruction data to be executed while moving the designated position when executing the instruction data.
The processing target instruction position storage unit 1043 is an example of a program position specifying unit.

The processing target instruction position saving unit 1044 is means for temporarily saving (temporarily saving) the processing target instruction position information stored in the processing target instruction position storage unit 1043.
More specifically, the processing target instruction position saving unit 1044 stores the meta instruction while the instruction sequence interpretation / execution unit 1046 (described later) executes an instruction sequence associated with the meta instruction in the meta instruction dictionary data. The position information immediately after is saved, and when the execution of the instruction sequence associated with the meta instruction in the meta instruction dictionary data is completed, the saved position information is notified to the processing target instruction position storage unit 1043. After the notification, the stored location information is deleted.
Then, the processing target instruction position storage unit 1043 designates the position notified from the processing target instruction position saving unit 1044 as the position in the instruction data that the instruction sequence interpretation / execution unit 1046 should next execute.
The processing target instruction position saving unit 1044 is an example of a program position saving unit.

  The meta-instruction dictionary data holding unit 1045 holds the meta-instruction dictionary data input by the instruction data storage device access unit 1041.

The instruction sequence interpretation / execution unit 1046 actually interprets instruction data to be executed.
The instruction sequence interpretation / execution unit 1046 includes a meta-instruction interpretation / execution unit 1047.
The meta instruction interpretation / execution unit 1047 interprets and executes meta instructions other than normal instructions.
The instruction sequence interpretation / execution unit 1046 determines whether the content of the designated position specified by the processing target instruction position information in the processing target instruction position storage unit 1043 is a meta instruction, and the content of the designated position is not a meta instruction. If it is a normal instruction sequence, the instruction sequence at the specified position is executed as it is.
On the other hand, when the content of the designated position is a meta instruction, the instruction sequence interpretation / execution unit 1046 stores the information on the position immediately after the meta instruction in the processing target instruction position saving unit 1044 and stores the information in the meta instruction dictionary data. The meta-instruction interpretation / execution unit 1047 executes the instruction sequence associated with the meta-instruction.
The instruction sequence interpretation / execution unit 1046 is an example of a program execution unit.

Normally, when executing instruction data in a data processor, it is possible to call another instruction data from one instruction data, and execution of the calling instruction data is primary until execution of the called instruction data is completed. Stop.
At this time, it is necessary to hold the processing target instruction position information for the instruction data of both the called side and the calling side.
For this reason, the processing target instruction position storage unit 1043 needs one area for storing processing target instruction position information for one instruction data to be executed, and is normally managed in a stack format or the like.
Similarly, when the information on the area where the processing target position information is stored is saved in another storage area by the processing target instruction position saving unit 1044 according to the present embodiment, there is a save destination area for one instruction data. One is required, and it is managed in the same way as a stack.

FIG. 23 illustrates a specific procedure of instruction data and compressed instruction data execution processing in the compressed instruction data execution device 104.
Before this process is started, the compressed instruction data execution device 104 stores the processing target instruction position as the processing target instruction position information by using the pre-execution preparatory process shown in FIG. The description is made assuming that the information is already held by the unit 1043.
The method for determining the end is to record the instruction identification number indicating the end at the end of the instruction data, and to determine by that number, or to store the data size information in pairs for each instruction data, and the position of the processing target instruction position information A method of determining whether or not the value obtained by subtracting the head position of the instruction data from the data size is equal to or larger than the data size −1 held as a set is considered.

In processing 2301, the instruction sequence interpretation / execution unit 1046 performs branch processing depending on whether the data indicated by the current processing target instruction position information is the end.
If it is the end, this process ends because all the processes related to the instruction data are completed.
If it is not the end, the process proceeds to process 2302 in order to execute the instruction string indicated by the current process target instruction position information.

In processing 2302, the instruction sequence interpretation / execution unit 1046 acquires the instruction identification number of the instruction sequence starting from the position indicated by the processing target instruction position information, and determines which instruction should be executed.
For example, in the case of mounting using the C ++ language, this determination method may be a method of branching to specific processing of each instruction with a switch statement on the condition of the value of the instruction identification number.
This determination processing corresponds to the processing 2303. In the case of an instruction identification number corresponding to a normal instruction defined in the conventional instruction set, the process proceeds to the processing 2305, and in the case of an instruction identification number corresponding to a meta instruction, the processing is performed. Transition to 2304.

  Some specific examples of the meta-instruction determination method in the process 2303 are given below.

When the meta instruction is allocated to the unused instruction identification number space, for example, all instruction identification numbers determined as the default of the switch statement may be determined as meta instructions.
In addition, when a specific instruction is allocated but is redefined as a meta instruction using an instruction identification number that is not used in the instruction data, the meta instruction is determined before the normal instruction identification number determination process. It is determined whether the instruction identification number information replaced with the meta instruction recorded in the instruction dictionary data or the like is matched, and if it matches, it is determined as a meta instruction and the process proceeds to processing 2304. A method for making a transition to instruction determination processing is conceivable.

In process 2304, since the instruction indicated by the current process target instruction position information is a meta instruction, the instruction sequence interpreting / execution unit 1046 performs execution preparation processing for the corresponding compression target instruction sequence.
Specifically, the instruction sequence interpretation / execution unit 1046 saves the value of the position information shifted to the current process target instruction position information by the meta instruction length in the save area in the process target instruction save unit 1044. .
Next, the instruction sequence interpretation / execution unit 1046 searches the meta-instruction dictionary data for the instruction sequence to be compressed corresponding to the meta-instruction, and uses the head position as the processing target instruction position information in the processing target instruction position storage unit 1043. Overwrite.
By performing the above processing, the processing target instruction position information indicates the head of the compression target instruction sequence corresponding to the meta instruction, and the processing target instruction position saving unit 1044 stores the address of the instruction ID part of the instruction immediately after the meta instruction. The

  Specific examples of states of the compressed instruction data execution device 104 before and after performing the above processing 2304 are shown in FIGS. 24 and 25, respectively.

As described above, the processing target command position storage unit 1043 is an area for storing processing target command position information.
As described above, the processing target instruction position saving unit 1044 is an area for saving processing target instruction position information stored in the processing target instruction position storage unit 1043.
As described above, the meta-instruction dictionary data holding unit 1045 is an area for holding meta-instruction dictionary data included in the compressed instruction data currently being processed.

The process target instruction position information in the process target instruction position storage unit 1043 in FIG. 24 indicates an instruction ID part having an instruction identification number of a meta instruction immediately before executing the process 2304.
This meta-instruction corresponds to the compression target instruction sequence 2 in the meta-instruction dictionary data.
Further, the processing target instruction position saving unit 1044 does not currently execute the compression target instruction sequence in the meta instruction dictionary data, and thus becomes a NULL reference.

FIG. 25 shows a state immediately after the processing 2304 is executed.
That is, the instruction sequence interpretation / execution unit 1046 saves the value shifted by the meta-instruction length to the current processing target instruction position information in the save area of the processing target instruction position saving unit 1044.
For this reason, in FIG. 25, the processing target instruction position saving unit 1044 points to the instruction sequence next to the execution target meta instruction.
In addition, the instruction sequence interpreting / executing unit 1046 searches the meta instruction dictionary data for an instruction sequence corresponding to the meta instruction, and overwrites the processing target instruction position information of the processing target instruction position storage unit 1043 with the head position.
For this reason, in FIG. 25, the processing target instruction position information of the processing target instruction position storage unit 1043 indicates the compression target instruction sequence 2 in the meta instruction dictionary data.

After completion of the processing 2304, the instruction sequence interpretation / execution unit 1046 restores the uncompressed instruction data from the compressed instruction data by executing the processing 2303 again using the processing target instruction position information in the processing target instruction position storage unit 1043. The processing can be started from the head of the corresponding instruction sequence to be compressed in the meta-instruction dictionary data.
Further, in this case, whether or not the compression target instruction sequence corresponding to the meta instruction is being executed can be determined based on whether or not the processing target instruction position saving unit 1044 is not a NULL reference.

In process 2305, the instruction sequence interpretation / execution unit 1046 executes a specific process corresponding to the instruction identification number determined in process 2303.
If the processing target is a meta-instruction, the meta-instruction interpretation / execution unit 1047 performs processing 2305.
After the execution is completed, the process proceeds to process 2306.

In process 2306, the process target instruction location storage unit 1043 updates the process target instruction information to the position of the instruction ID part that exists next to the instruction processed in process 2305, and prepares to execute the next instruction. .
After the update is completed, the process proceeds to process 2307.

  In processing 2307, when the current processing target is a compression target instruction sequence in the meta-instruction dictionary data, it is determined whether or not the execution of the instruction sequence has been completed. If the process is not completed and if the process target is not a compression target instruction sequence but normal instruction data, the process transitions to process 2301.

A method of determining whether or not the compression target instruction sequence is being executed by using the processing target instruction position saving unit 1044 can be considered.
For example, if it is NULL termination (when the processing target instruction position saving unit 1044 stores the initial value), there is no processing target instruction position information that is currently saved, and the compression target instruction sequence is not being executed. Judgment is possible.
The end of execution of the compression target instruction sequence can be determined based on whether or not the processing target instruction position information is the end as in the case of the process 2301.
Also, if there is a meta instruction in the compression target instruction sequence, it means the end of the compression target instruction sequence. If the meta instruction is indicated in the processing target instruction position information area, a method for determining the end of the meta instruction, etc. Is also possible.
Furthermore, when both the instruction length information being compressed and the instruction length information being registered are registered in the meta-instruction dictionary data, there is a method in which the compression target instruction sequence is processed as much as the instruction length information is used as an end criterion. Conceivable.
If the instruction length of the compression target instruction sequence registered in the meta instruction dictionary data is a fixed length or a fixed number of instructions, processing of the compression target instruction sequence for that fixed length or fixed number of instructions is completed A method of using a judgment standard is also conceivable.
In particular, when the number of instructions included in the instruction sequence to be compressed is limited to 1, a method can be considered in which the processing target instruction position information save area is not NULL and is used as an end criterion.
As described above, whether or not information other than the initial value is stored in the processing target instruction position saving unit 1044, the instruction sequence indicated in the meta instruction dictionary data is repeatedly executed by the number of consecutive meta instructions included in the instruction data. Whether or not the execution of the instruction sequence replaced with the meta-instruction has been completed can be determined.

In the process 2308, since the execution of the compression target instruction sequence to be processed has been completed, the meta instruction execution is terminated and the process returns to the normal instruction sequence execution.
Specifically, the position information stored in the processing target command position saving unit 1044 is notified to the processing target command position storage unit 1043, and the processing target command position storage unit 1043 is notified from the processing target command position saving unit 1044. Specify the position.
Further, the processing target instruction position saving unit 1044 stores a NULL value.
After the return process is completed, the process proceeds to process 2301.

  By executing the above process repeatedly, execution from the meta-instruction in the instruction data to the corresponding instruction sequence to be compressed in the meta-instruction dictionary data can be executed without restoring from the compressed instruction data to the uncompressed instruction data. It becomes possible to do.

Thus, according to the present embodiment, in the data compression apparatus, the minimum unit data size is changed according to the data size of the instruction sequence, and each instruction sequence is replaced with a meta-instruction.
For this reason, when a parameter associated with one instruction is always described continuously in the same instruction sequence and an instruction sequence replaced with a meta-instruction is executed in the compressed instruction data execution device, the compressed instruction data execution device Instructions and all parameters can be obtained from meta-instructions.
As a result, the compressed instruction data execution device does not need to determine how much of the parameter is compressed, and can reduce the overhead when executing the instruction data.

  In addition, it is not necessary to restore the instruction data from the compressed instruction data when the compressed instruction data is executed, thereby shortening the processing time and reducing the amount of memory used.

In the instruction data and compressed instruction data execution procedure described above, it is assumed that a meta instruction is not included in the instruction sequence to be compressed (meta instructions are not nested).
When it is allowed that a meta instruction is included in the instruction sequence to be compressed, it is necessary to have a stack structure or the like so that a variable number of processing target instruction position saving units 1044 can be prepared for instruction data currently being processed. is there.

Further, when the processing target instruction position information is saved in the process 2304, the position information is pushed to the top of the stack, and when the processing target instruction position information is restored in the process 2308, the processing target instruction position saving unit 1044 The top element of the stack is popped, and the position information is substituted into the processing target instruction position storage unit 1043.
Whether or not the compression target instruction sequence necessary for the processing 2307 is being executed is determined based on whether or not the number of elements in the stack of the processing target instruction position saving unit 1044 is zero.

As described above, in the present embodiment,
A system comprising at least an instruction data generation device, an instruction data compression device, and a compressed instruction data execution device described below;
The instruction data generator is
Analyzing the source code and providing instruction data generating means for converting into instruction data according to a prescribed instruction set,
The instruction data compression device
The instruction data generated by the instruction data generation means is replaced with a meta-instruction according to the frequency of occurrence of the instruction and instruction string including parameters appearing in the instruction data, and the replaced instruction and instruction string are instruction data as meta-instruction dictionary data. By including the instruction data compression means for converting the instruction data so that the expression content is the same quality and the length of the instruction data is shortened by being a part of
The compressed instruction data execution device
Storage means for storing instruction data generated by the instruction data generation device or the instruction data compression device;
Processing target instruction indicating means indicating a position to be processed next in the instruction data stored in the storage means;
A processing target instruction instruction information saving means for temporarily storing position information held by the processing target instruction instruction means;
When processing a meta-instruction, the position information held by the processing target instruction indicating unit is stored in the processing target instruction indicating information saving unit, and the instruction corresponding to the meta instruction or the position information of the head of the instruction sequence is stored in the processing target instruction indicating unit. A meta-instruction start means for storing
An instruction data compression and execution system that performs processing according to the processing contents expressed by compressed instruction data has been described.
The compressed instruction data execution device can execute the compressed instruction data without restoring the compressed instruction data to the uncompressed instruction data, and reduces the processing load for the decompression process and stores the uncompressed instruction data. Explained that the amount of memory used to do this can be reduced.

Further, in the present embodiment, it has been described that the meta instruction is defined by at least one of the following.
One specific opcode of the instruction set is allocated.
All or part of the undefined opcode space in the instruction set is allocated as a meta instruction.
All or part of the opcode space of the instruction that was defined as the instruction set when generating the instruction data from the source code but did not appear in the instruction data is allocated as a meta instruction (in this case, compressed) As a part of the instruction data, new instruction set / meta instruction correspondence information indicating which instruction in the instruction set is a meta instruction is added).

In the present embodiment,
The compressed instruction data execution device includes a meta-instruction execution determination unit that determines whether an instruction stored in the meta-instruction dictionary data or an instruction in the instruction data is being executed. Explained that the judgment is based on whether the instruction information has been saved.
As a result, it is possible to determine whether or not the instruction data registered in the meta-instruction dictionary data is being executed with minimal processing.

In the present embodiment,
The compressed instruction data execution device includes a meta-instruction execution end determination unit that determines the end of an instruction in the meta-instruction dictionary data or an instruction sequence. It has been described that the apparatus includes a meta-instruction end unit that returns the position information held by the unit to the processing target instruction instruction unit and initializes the contents of the processing target instruction instruction information saving unit.
That is, the method of returning from the execution of the instruction data registered in the meta instruction dictionary data to the instruction data that has been executed so far has been described.

Further, in the present embodiment, it has been described that the meta instruction execution end determination means provided in the compressed instruction data execution device uses at least one of the following criteria.
The information held by the processing target instruction instruction information saving means is not an initial value,
After execution of the meta instruction start means, the instruction execution process has been performed a specific number of times.
The instruction execution process is executed a specific number of times after executing the meta instruction start means by the same number as the instruction length information registered in the meta instruction dictionary data together with the instruction or instruction sequence.

Embodiment 2. FIG.
In the instruction data compression apparatus 103 and the compressed instruction data execution apparatus 104 described so far, the architecture of the compression instruction data execution apparatus 104 can be applied even to a general CPU.
However, in the general CPU architecture, the register value, immediate value, displacement value, etc. are described as the value given to the parameter part. Usually, even if they are the same instruction identification number, if these values are different, they are explained so far. In this method, since it is treated as a different instruction, it cannot be compressed.

  In general, even in the same process on the source code, the instruction identification number is handled differently depending on the type of data to be handled. For this reason, in this case as well, the method described so far treats it as a different instruction, so it cannot be compressed.

  In the present embodiment, a compressed instruction data execution device 104 and an instruction set corresponding to these points will be described.

As described above, the processing contents differ depending on the type of data handled by the instruction. If the data type is different, the instruction identification number is defined as different, or the instruction identification number is common to the data types. The identification information is given as a parameter for which data type is handled.
Therefore, even if the description is the same in the source code, the data type to be handled is different, so that the generated instruction data may have different results, the matching probability is lowered, and the compression rate is lowered.
Therefore, the instruction data compressing apparatus 103 and the compressed instruction data executing apparatus 104 according to the present embodiment handle the data value to be handled together with the type identification information indicating the type of the data as one set.
This makes it possible to know the data type of the data to be processed without requiring an instruction identification number or a parameter indicating the type, so that the same processing is performed on the source code depending on the data type to be handled. However, it is possible to eliminate the necessity of defining the instruction identification number as a different one and the necessity of a parameter indicating the data type.
As an instruction set for the instruction data compression apparatus 103 and the compressed instruction data execution apparatus 104 having such properties, an instruction set having the same instruction identification number is used even if the types of data handled in the same processing content are different. As a result, it is possible to increase the matching probability of the instruction sequence.

A specific description will be given by taking an instruction related to the addition operation as an example.
Assume that there are four types of data types that can be handled by this addition operation: integer type, floating point type, Boolean type, and character string type.
In that case, in a normal compressed instruction data execution apparatus, since an instruction identification number related to an addition operation is defined for each type to be handled, four types are defined only for the addition operation.
Therefore, for example, even if addition operations of the same type exist at a plurality of locations, if the data types handled by the addition operations are different, they all have different instruction identification numbers and cannot be handled as the same instruction sequence.

For example, the add instruction Add is defined as Add_i for the integer type, Add_f for the floating point type, Add_b for the Boolean type, and Add_s for the string type. Consider the case.
Here, in the source code,
a + b
If the variables a and b are both integer types, for example,
Add_i a, b
Is output.
However, if the variable is a floating point type,
Add_f a, b
Will be output, and a byte code different from the integer type will be output.
Similarly, if the variable is Boolean or string,
Add_b a, b
Add_s a, b
It becomes a different byte code.
In this way, even if the source code has the same expression “a + b”, in the case of an instruction set that depends on the type (type) handled by the instruction, it is generated due to the difference in the types of a and b. The instruction sequence is treated as a different instruction sequence, and four types of “a + b” having different types cannot be compressed as the same instruction sequence.

On the other hand, when the instruction is defined independently of the type, that is, when an add instruction for an operand of any type is defined with one Add instruction, the variables a and b are integer type, floating point type, Boolean type, Whichever string type,
Add a, b
Can be expressed in the same byte code.
Therefore, in the case of an instruction set in a format independent of the type (type) handled by the instruction, the generated bytecode is the same regardless of the type of a and b, and four types of “a + b” are set as the same instruction sequence. Can be compressed.
Therefore, when the instructions are independent than when they depend on the type, the instructions are likely to be the same instruction, so the probability of matching the instruction sequence increases (as in the above example, there are four types of types). In the case, the probability of matching is 4 times).

In the instruction data compression apparatus 103 according to the present embodiment, the instruction content of the instruction code is the same as the above Add_i, Add_f, Add_b, Add_s, but the data type of the parameter value is different. Compression efficiency is improved by replacing different instruction sequences (hereinafter referred to as common instruction different data type instruction sequences) with common meta-instructions.
A configuration example of the instruction data compression apparatus 103 according to the present embodiment is the same as that shown in FIG.

The instruction data storage device access unit 1031 receives instruction data including two or more common instruction different data type instruction sequences from the instruction data storage device 106, and further sets the data type of the parameter value for each common instruction different data type instruction sequence. Type identification information (data type information) is displayed.
In addition, the same instruction sequence appearance count unit 1033 includes two or more common instruction different data type instruction sequences in which the combination of the instruction content (Add_i, Add_f, Add_b, and Add_s of Add_s) of the instruction ID part and the parameter part is common. Extract and count the number of appearances.
The compression target instruction table generation unit 1034 generates a compression target instruction table based on the count result of the same instruction sequence appearance count unit 1033 as in the first embodiment.
Further, the instruction data compression / conversion unit 1035 replaces the instruction sequence with a meta-instruction according to the compression target instruction table, as in the first embodiment.
At this time, when a common instruction different data type instruction sequence having a common combination of the instruction content of the instruction ID portion and the parameter portion is a target of the meta instruction, each of these common instruction different data type instruction sequences is shared. Replace with meta instruction.
Further, the meta-instruction dictionary data generation unit 1036 generates meta-instruction dictionary data as in the first embodiment. For the common instruction different data type instruction sequence, for example, an instruction ID including Add_i, Add_f, Add_b, and Add_s is described.
The instruction data storage device access unit 1031 associates instruction data in which the common instruction different data type instruction sequence is replaced with a meta instruction, meta instruction dictionary data, and type identification information (data type information) in association with each other. The data is output to the storage device 106.

  The configuration example of the compressed instruction data execution device 104 according to the present embodiment is also the same as that shown in FIG.

The instruction data storage device access unit 1041 receives, from the instruction data storage device 106, instruction data in which a common instruction different data type instruction sequence is replaced with a meta instruction, meta instruction dictionary data, and type identification information (data type information). input.
The meta-instruction interpretation / execution unit 1047, when the content of the designated position designated by the processing target instruction position information in the processing target instruction position storage unit 1043 is a meta instruction in which the common instruction different data type instruction sequence is replaced, The data type of the parameter value of the common instruction different data type instruction sequence replaced by the meta instruction is determined with reference to the type identification information.
Then, the common instruction different data type instruction sequence associated with the meta instruction in the meta instruction dictionary data is executed in association with the data type of the determined parameter value.

  The above-described method, that is, a method in which the instruction data compression device 103 outputs type identification information together with instruction data and meta-instruction dictionary data, and a compressed instruction data execution device 104 refers to the type identification information to determine the type of the operand. Instead of this, the following method may be used.

Although an instruction set is effective even with an arbitrary instruction system, as one of the methods for improving compression efficiency, an instruction set independent of the type of data (hereinafter referred to as operand) to be processed by the instruction (hereinafter referred to as type free) A method of applying the program compression apparatus to the instruction set) is conceivable.
The difference in the probability of matching between an instruction set dependent on the operand type (hereinafter referred to as a type-dependent instruction set) and a type-independent instruction set will be described below.
Assume that there are integer types and floating-point types as data types that can be handled by both instruction sets. Further, it is assumed that there is an addition process as one of processes that can be performed on the data.
At this time, in the case of a type-dependent instruction set, the defined instruction is defined depending on the type.
Addition processing instruction Add_i that takes an integer value as an operand
Addition processing instruction Add_f that takes a floating-point value as an operand
These two types of addition processing instructions are defined.
On the other hand, in the case of a type-free instruction set, the defined instruction is a type-independent definition.
Add instruction Add that takes an operand of any type
One kind of addition processing instruction is defined.
At this time, if there is a description of addition processing that handles two variables as operands in part of the program, the type-dependent instruction set generates different addition processing instructions depending on what the type of the two variables is. Add_i is generated when the type is an integer type, and Add_f is generated when the type is a floating-point type.
On the other hand, in the case of a type free instruction set, Add is always generated regardless of the type of the variable.
In other words, coding with a type-free instruction set means that there is an effect of increasing the probability that generated instructions are different by the number of types of types that can be handled by the instructions.
Therefore, by converting the program into a type-free instruction set when coding the program, it is possible to increase the probability of matching the instructions appearing in the code and improve the compression ratio.
Specifically, in the case of the above example, since the types to be processed are two types, an integer type and a floating-point type, the type free instruction set has twice the instruction matching probability with respect to the type-dependent instruction set.
However, as compared to a program execution device that processes a type-dependent instruction set, a program execution device that processes a type-free instruction set does not include operand type information to be handled in the instruction itself. Processing that verifies the type of the operand to be processed and sequentially determines which type of processing should be executed is required.

In other words, in this method, the instruction code “Add” is commonly described in the program input by the instruction data compression apparatus 103 regardless of whether the operand is an integer type or a floating point type.
Therefore, the instruction code match probability is improved and the compression rate in the instruction data compression apparatus 103 can be improved as compared with the case where the instruction code is described in the type-dependent instruction set such as Add_i and Add_f.
In this method, the instruction data compression apparatus 103 outputs only instruction data and meta-instruction dictionary data, and the compressed instruction data execution apparatus 104 inputs only instruction data and meta-instruction dictionary data.
Further, in the compressed instruction data execution device 104, the instruction sequence interpretation / execution unit 1046, as in the first embodiment, replaces the part replaced with the meta instruction in the instruction data with the instruction indicated in the meta instruction dictionary data. The sequence is executed, and the sequence that is not replaced by the meta-instruction is executed as it is.
When executing an instruction sequence (both execution of an instruction sequence replaced with a meta-instruction and execution of an instruction sequence not replaced with a meta-instruction), the instruction sequence interpretation / execution unit 1046 determines the parameter value of the operand. The data type is determined, and the instruction of the instruction code is executed corresponding to the determined data type.
That is, according to the above example, when executing the Add instruction, the instruction sequence interpretation / execution unit 1046 determines whether the data type of the operand is an integer type or a floating-point type. An Add instruction corresponding to the integer type is executed (corresponding to executing Add_i), and if it is a floating point type, an Add instruction corresponding to the floating point type is executed (corresponding to executing Add_f).
Here, two types of data, the integer type and the floating-point type, have been described, but the type free instruction set Add is commonly used for the four types of data including the Boolean type and the character string type. In the compressed instruction data execution device 104, the Add instruction can be executed by determining which of the four data types the operand is.

  According to the present embodiment, for example, it is possible to express all arithmetic processes corresponding to four types of data types by one instruction identification number, and it can be expressed by an instruction sequence with the same instruction identification number regardless of the data type handled. Thus, the probability of matching the instruction sequence related to the addition operation is increased by a factor of four corresponding to the number of corresponding data types.

As described above, in the present embodiment,
In the instruction data generating means and the instruction data compressing means, the instruction data is generated using the set defined independently of the type of data handled by the instruction as the instruction set.
In other words, integer type, floating point type, and string type addition instructions are usually implemented as different instructions in Add_i, Add_f, Add_s, etc., but by adding dynamic type determination processing to the compressed instruction data execution device, the addition instruction It is possible to combine them into one Add, and the probability of matching can be increased.

Embodiment 3 FIG.
The compressed instruction data execution device 104 is capable of expressing the size of all data handled by itself with the same fixed length, so that the memory address can be expressed from the actual memory address value when the memory space at the time of execution is viewed as an array. It can be expressed by array index (offset expression).
For example, memory allocation of local variables is a method of stacking and arranging from the top in the order of appearance of variables in the context, and when the data size is fixed to 4 bytes, the method of expressing the memory address with the array index is the actual memory Compared with the method of expressing with addresses, the set of possible values of memory addresses is one-fourth.
Since the set of possible values is ¼, the probability that a variable under a context that has only these conditions will match a memory address with a variable under another context is four times higher, and the parameter part This shows that the probability of matching increases.

For example, as a variable declaration in a function,
bool a, b;
int c;
Is described.
In general, the memory size assigned to a variable differs depending on the type, such as 1 byte for the bool type, 4 bytes for the int type, 2 bytes for the short type, and so on.
In this case, in the case of local variables, areas are secured in the stack area in the order of declaration, and taking into account alignment and the like, for example, a memory arrangement as shown in FIG. 43 is obtained. Note that hatched portions in FIG. 43 indicate unused addresses.
The address of variable a is 0x12340000, the address of variable b is 0x1234340001, the address of variable c is 0x12340004, and the identifier of each variable is the value of the memory address (equivalent, usually offset from the base address). The

If you generate an instruction to push variable c onto the stack in this situation,
Name 4
It becomes.
Here, “4” is the offset value of the variable c from 0x12340000 as the base address.
Under similar conditions,
bool a;
int b;
bool c;
44, the memory locations as shown in FIG. 44 are obtained, and the addresses of the variables a, b, c are 0x123400000, 0x12340004, 0x12340008, and even if the declaration order of the variables is the same, The address position is affected and changed by the type of the declared variable.
So if you generate an instruction that pushes variable c onto the stack as well,
Name 8
Therefore, it is generated as a different one from the above instruction sequence.
Therefore, even if the declaration order is the same, the variable instruction information is different, so that the generated instruction sequences are not the same.
On the other hand, if the memory size assigned to the variable is fixed (4 bytes fixed length in this example) regardless of the type, even if it is the above two types of variable declarations, it becomes as shown in FIG. The memory area of each variable can be determined only by the variable declaration order.
Therefore, when the instruction that pushes the variable c onto the stack is generated, the declaration order is the same regardless of the variable declaration.
Name 2
Next.
Here, the parameter “2” is a value obtained by subtracting 1 from the variable declaration order.
By having such a property, the identification information of the local variable can be expressed by 30 bits when the fixed length is 4 bytes from 32 bits of the memory address.
Since all variables can be expressed by a set of 2 bits, that is, a quarter, the number of elements in the set to be matched is simply reduced to a quarter, and the probability of matching increases fourfold.

The instruction data compression apparatus 103 according to the present embodiment compresses instruction data in which the same memory size is assigned to all parameter values regardless of the data type as described above.
A configuration example of the instruction data compression apparatus 103 according to the present embodiment is the same as that shown in FIG.

In the present embodiment, the instruction data storage device access unit 1031 uses an offset representation of an address management instruction code (above instruction Name) and a memory address for managing a memory address where a parameter value is stored when the instruction data is executed. An address management instruction sequence (name 4, name 8, name 2, etc.) that is combined with the designated address specification parameter values (above “4”, “8”, “2”, etc.), Input command data to which the same memory size is assigned to all parameter values regardless of the data type.
The same instruction sequence appearance count counter 1033 extracts two or more address management instruction sequences having a common combination of the address management instruction code and the addressing parameter value, and counts the number of appearances.
The compression target instruction table generation unit 1034 generates a compression target instruction table based on the count result of the same instruction sequence appearance count unit 1033 as in the first embodiment.
Further, the instruction data compression / conversion unit 1035 replaces the instruction sequence with a meta-instruction according to the compression target instruction table, as in the first embodiment.
At this time, if an address management instruction sequence having a common combination of the address management instruction code and the addressing parameter value is a target of a meta instruction, each of these address management instruction sequences is replaced with a common meta instruction.
Further, the meta-instruction dictionary data generation unit 1036 generates meta-instruction dictionary data as in the first embodiment.
Further, the instruction data storage device access unit 1031 associates the instruction data in which the address management instruction sequence is replaced with the meta instruction and the meta instruction dictionary data, and outputs them to the instruction data storage device 106.
The operation of the compressed instruction data execution device 104 is the same as that of the first embodiment.

As described above, in the present embodiment,
In the instruction data generating means and the instruction data compressing means, the instruction data is generated using the set in which the memory address indicating the memory position is defined as an abstracted offset expression as the instruction set.
In other words, since the memory size to be consumed is usually different for Boolean type, integer type, and floating point type, it is necessary to specify the address of the memory location, but by making all types the same size, array instead of address It can be expressed with a lower density value than the address of the index.
Therefore, the types of values that can be taken by the memory reference parameter are reduced, and the probability of matching increases.

Embodiment 4 FIG.
In the present embodiment, as in the third embodiment, when the same memory size is assigned to all variables regardless of the data type, the memory addresses for two or more local variables under a certain context are set. By exchanging, it is possible to increase the probability that the memory address matches the variable under another context.

  A method according to this embodiment will be described with reference to FIGS. 26, 27, and 28. FIG.

FIG. 26 is an example of two similar source codes.
Both the left-side function funcA and the right-side function funcB are functions for obtaining the area of the trapezoid.
However, in the case of funcA, the arguments a and b are the upper and lower bases, and the argument c represents the height. In the case of funcB, the upper and lower bases are represented by the arguments c and b. The height is different in that it is an argument a.
An example of the result of converting these functions into instruction data is shown in FIG.
The instruction data 2701 on the left is instruction data for the function funcA in FIG. 26, and the instruction data 2707 on the right is instruction data for the function funcB in FIG.
As described above, the local variable memory is arranged in a stacking order from the top in the order of appearance of variables in the context, and the variable identification information is equal to the order of appearance of the variables.
Therefore, the identification information for the variables a, b, and c is the parameter 2701, the parameter 2702, and the parameters 2703 0, 1 and 2 in the instruction data in the function funcA, respectively, and the parameter 2704 and the parameter 2705 in the instruction data in the function funcB, respectively. , Parameter 2706 is 2, 1, 0.
For this reason, even if the processing contents of the function are the same, the command data generated does not match completely due to the difference in the order of appearance of the variables, and the partial match where only the commands whose variable identification information is not included in the parameters matches. Stays on.
However, in this instruction data, the identification information of the variables a and c is set reversely in either instruction data, so that the instruction data of the function funcA and the function funcB can be completely matched.

FIG. 28 shows processing related to processing for enlarging the size of the instruction sequence to be compressed by changing the variable identification information using the compressed instruction data once generated by the instruction data compression device 103 based on the above observation as the processing target instruction data. It is an example of a procedure.
This processing is assumed to be performed in a situation where all compressed instruction data for the processing target source code is generated, for example, it is performed after it is determined in processing 1803 of FIG. 18 that there is no instruction data to be processed. However, it is not always necessary to perform the processing immediately after the processing 1803.
Here, the processing in FIG. 28 is described as being performed by the instruction data compression / conversion unit 1035, but the processing is not necessarily performed by the instruction data compression / conversion unit 1035. For example, the same instruction sequence appearance count unit 1033 may do.

In the process 2801, the instruction data compression / conversion unit 1035 is a process for determining whether or not there is at least one compressed instruction data that has not been subjected to the present process among all the compressed instruction data to be processed.
Here, when there is no unprocessed compressed instruction data, it means that the processing target does not exist at present, and thus this processing is immediately terminated.
Conversely, if there is one or more unprocessed compressed instruction data, the process proceeds to process 2802.

In process 2802, the instruction data compression / conversion unit 1035 selects one of the unprocessed compressed instruction data found in process 2801, sets a processed flag, and handles it as compressed instruction data serving as a base in the subsequent processes. Preparation is performed, and the process proceeds to process 2803.
In order to simplify the description, this compressed instruction data is represented as A.

In process 2803, the instruction data compression / conversion unit 1035 determines whether there is compressed instruction data other than A and not subjected to the subsequent processes with A among all the compressed instruction data to be processed.
Here, when there is no unprocessed compressed instruction data, it means that the subsequent processing for A has been performed for all the compressed instruction data. Process based on data.
Conversely, if unprocessed compressed instruction data exists, the process proceeds to process 2804.

In process 2804, the instruction data compression conversion unit 1035 selects one of the unprocessed compressed instruction data for A found in process 2803, sets a processed flag for A, and proceeds to process 2805.
In addition, for simplicity of explanation, the compressed instruction data selected here is denoted as B.

In the process 2805, the instruction data compression / conversion unit 1035 excludes the part where the variable identification information is mutually described in the parameter part for the compressed instruction data A and B to be processed, that is, an arbitrary value. However, it is assumed that they match, and a matching point is determined, and all the determination results are expressed as X.
In this case, the match determination may be performed using any criterion. However, in general, a criterion for maximizing the total size of the match-determined areas in the instruction data or a match-determined area is determined. Among them, the standard that makes the maximum size individually is used.
For example, assuming that the two instruction data in FIG. 27 correspond to A and B, since the six parameter parts from the parameter 2701 to the parameter 2706 are the variable identification information, the parameter parts match. Assuming that, the comparison between the instruction data is performed.
Therefore, in this case, it is determined that they are continuously matched from the beginning to the end.
After the process is completed, the process proceeds to process 2806.

In process 2806, the instruction data compression / conversion unit 1035 determines whether or not there is a mismatch in the parameter part in which the variable identification information in the region matched in process 2805 is described.
In this process, for example, in the case of the two instruction data in FIG. 27, parameters 2701 to 2706 are determined as mismatch parameter parts, the result is taken over, and the process proceeds to process 2807.

In process 2807, the instruction data compression / conversion unit 1035 receives the processing result of process 2806, and changes the value of the variable identification information in the mismatched parameter part, thereby completely including the parameter part excluded from the determination target in process 2805. Judgment of matching points is performed.
For example, when this process is applied to the two instruction data shown in FIG. 27, the two instruction data are completely matched from the beginning to the end by exchanging the values of the parameter 2701 and the parameter 2703.
In process 2807, along with the change of the value of the variable identification information, it is verified whether or not the instruction data is inconsistent with the process before the change by the change. Repeat until there is a change pattern that does not occur or until there are no more change patterns.
If a change pattern in which no contradiction occurs is found, or if there is no change pattern, the process proceeds to processing 2808.

In process 2808, the instruction data compression / conversion unit 1035 compares the compressed instruction data before and after the change performed in process 2807, and determines whether the compression rate after the change is improved.
If the compression rate has improved, the process proceeds to process 2810. If the compression ratio has not improved, or if there is no change pattern already, the process proceeds to process 2809.

In the process 2809, the instruction data compression / conversion unit 1035 does not improve the compression ratio by the change made in the process 2807, and therefore the compression ratio is improved by another change pattern or is re-executed, so another change pattern exists. To check.
If another change pattern exists, the process proceeds to process 2807, and if there is no other change pattern, the process proceeds to process 2803.

  In process 2807, process 2808, and process 2809, when a change pattern in which the compression ratio is first improved is found, the process proceeds to process 2810. However, process 2807 is applied to all the change patterns, and the most A method of making a transition to the process 2810 with a change pattern in which the improvement of the compression rate is large is also conceivable.

In process 2810, when the change pattern determined to have improved the compression rate in process 2808 is applied to A and B, the instruction data compression / conversion unit 1035 compresses other instruction data using the compression target instruction sequence. In this case, compressed instruction data is generated and the compression rate is calculated.
After the compressed instruction data generation and the compression ratio calculation are completed, the process proceeds to processing 2811.
Here, the compression rate may simply be the calculation of the size of the entire instruction data.

In process 2811, the instruction data compression / conversion unit 1035 determines whether the overall compression ratio has been improved based on the compression ratio obtained in process 2810.
If the compression rate is improved, the process proceeds to process 2812. If the compression rate is not improved, the process proceeds to process 2803.

In process 2812, the instruction data compression / conversion unit 1035 uses the compressed instruction sequence generated as a result of applying the change pattern determined to have improved the compression rate in process 2811 to the instruction data A and B, and again The result of compressing the instruction data is adopted as the current compressed instruction data.
After the adoption, the process proceeds to processing 2803, where it is verified whether or not the compression efficiency is improved by changing the variable identification information for all the instruction data, and the generation of the optimum compressed instruction data is completed.

The two instruction data in FIG. 27 are compared in size between the compressed instruction data when the present process shown in FIG. 30 is applied and the compressed instruction data when the process shown in FIG. 29 is not applied.
In the compressed instruction data when this processing is not applied, name 1 and add from the third line to the fourth line are the first compression target instruction strings, and mul, number 2, from the sixth line to the ninth line, Div and return are the second instruction sequence to be compressed. Specifically, FIG. 29 is an example.
Data 2901 is instruction data corresponding to the data 2701, and data 2902 is instruction data corresponding to the data 2707. In this processing, the result when the variable identification information on the second and fourth lines of the data 2701 is replaced is shown. Yes.
Data 2093 is meta-instruction dictionary data in which the instruction sequence to be compressed is registered by the instruction data compression device.
Before compression, the data size of data 2701 and data 2707 is 17 bytes, and the total is 34 bytes.
On the other hand, the data sizes of the data 2901, the data 2902, and the data 2903 are 10 bytes, 10 bytes, and 13 bytes, respectively, for a total of 33 bytes, and the size is reduced by 1 byte.
On the other hand, the data size of data 3001, data 3002, and data 3003 after application of this process is 20 bytes in total, 2 bytes, 2 bytes, and 18 bytes, respectively, and 14 bytes before the application of this process. This indicates that 13-byte compression is realized for the compressed instruction data, and that the compression rate can be improved by changing the variable identification information to expand the area of the matching instruction sequence. .

As described above, in this embodiment, the instruction data storage device access unit 1031 has an address management instruction code (the above instruction name) and a memory address for managing the memory address where the parameter value is stored when the instruction data is executed. Is an address management command sequence (name 0, name 1, name 2, etc.) combined with an address specification parameter value (the above “0”, “1”, “2”, etc.) Instruction data in which the same memory size is assigned to all parameter values regardless of the data type.
The instruction data compression / conversion unit 1035 matches the addressing parameter value of the address management instruction included in the specific context (instruction string group) with the addressing parameter value of the address management instruction included in another context (instruction string group) Thus, the sequence of instruction sequences in a specific context and the sequence of instruction sequences in another context are made common, and the instruction sequence in a specific context and the instruction sequence in another context are replaced with a common meta-instruction.
Thereby, a compression rate can be improved.

As described above, in this embodiment, in the instruction data compression means, the memory offset conversion means for replacing the offset value of a certain memory area with another offset value, and the instruction or instruction sequence including the memory offset replaced before and after replacement. And the appearance frequency comparison means for comparing the appearance frequency, and the adoption compression instruction data determination means for judging whether to adopt the pre-replacement or after-replacement as the compression instruction data according to the comparison result is explained. .
For example, when there is a description of “a + b” in a plurality of different functions and the variable index is different (in the case of function A, each is expressed as 0, 1 but in function B, it is expressed as 2, 3) ) Is different in the instruction data corresponding to this, but it is possible to change the index of one of the variables to the other index to match the instruction data.
If the data sizes do not match, it is necessary to be aware of the alignment of the memory addresses and cannot be easily replaced, but if the data size is the same, there is no need to be aware of the alignment.

Embodiment 5 FIG.
The instruction data generation apparatus and instruction data compression apparatus described above have been described on the assumption that, for example, one meta instruction dictionary data is generated for all source codes describing the behavior of one application. I went.
However, it is not always optimal to generate compressed instruction data with one meta-instruction dictionary data for all source code due to the deviation of description contents by functional units as the scale of the application increases. The compression ratio is not always realized.
For this reason, all source code is divided into independent subsets with some standard (for example, for each fixed data size and for each function), and one meta-instruction dictionary data is generated for each subset, and these are integrated. As a result, the compression ratio can be improved by generating the entire compressed instruction data.

When generating one meta-instruction dictionary data for a subset of instruction data, information indicating which instruction data uses which meta-instruction dictionary data should be executed by the compressed instruction data execution device is a compressed instruction. Must be stored in the data.
As one method, there can be considered a method in which meta-instruction dictionary data identification numbers are assigned to all meta-instruction dictionary data, and meta-instruction dictionary data identification numbers used for the instruction data are stored in each instruction data.

  FIG. 31 illustrates an example of a data structure when a plurality of meta-instruction dictionary data is generated at the time of generating compressed instruction data.

This compressed instruction data includes four types of instruction data 3101, 3102, 3103, 3104 and two types of meta-instruction dictionary data 3105, 3106.
The meta instruction dictionary data identification number of the meta instruction dictionary data 3105 is # 1, and the meta instruction dictionary data identification number of the meta instruction dictionary data 3106 is # 2.
In this example, a corresponding dictionary identification number area for storing the meta-instruction dictionary data identification number of the meta-instruction dictionary data corresponding to the instruction data for 1 byte is newly added to the head area of each instruction data, and the instruction string is immediately after that. It is expressed as a data structure followed by
The corresponding dictionary identification numbers of the instruction data 3101, 3102, 3103, and 3104 are 1, 1, 2, and 1, respectively, which means that the compressed instruction data execution device 104 executes the instruction data 3101, 3102, and 3104. In this case, the meta-instruction dictionary data 3105 is used, and when the instruction dictionary data 3103 is executed, the meta-instruction dictionary data 3106 is used to search for a compression target instruction sequence corresponding to the meta-instruction. is doing.

  When executing the compressed instruction data generation processing for generating a plurality of meta-instruction dictionary data as described above, as a reference for determining a subset, an instruction identification number appearing in each instruction data, an instruction string histogram, etc. A method may be considered in which a subset is formed by command data having similar distribution situations by using similarity and bias.

  In order to form such a subset, the instruction data compression processing in the instruction data compression apparatus 103 in FIG. 4 is performed at the beginning, and the subsequent instruction data compression processing is performed with the generated subset as one unit. A compressed instruction data generation processing method is conceivable, in which, after processing is completed for all subsets, a meta-instruction dictionary data identification number corresponding to the head of each instruction data is stored and associated.

In order to implement the method shown in FIG. 31, in the instruction data compression apparatus 103 of the present embodiment, the instruction data compression / conversion unit 1035 divides the instruction data into a plurality of subsets, Replace with meta instruction.
Further, the meta instruction dictionary data generation unit 1036 generates meta instruction dictionary data for each subset, and adds an identifier of the corresponding meta instruction dictionary data to each subset.
Further, in the compressed instruction data execution device 104 of the present embodiment, the instruction data storage device access unit 1041 is divided into a plurality of subsets, and the identifier of the corresponding meta-instruction dictionary data is shown for each subset. Command data is input, and a plurality of meta-instruction dictionary data generated for each subset is input.
Then, the instruction sequence interpretation / execution unit 1046 refers to the corresponding meta-instruction dictionary data according to the identifier shown in the subset for each subset when executing the instruction data.

In the above, an example is described in which each instruction data uses only one meta-instruction dictionary data. However, the number of meta-instruction dictionary data used by each instruction data is not limited to one.
For example, by adding a corresponding dictionary identification number as a meta-instruction parameter, meta-instruction dictionary data used in units of meta-instructions appearing in one instruction data may be changed.
Such a configuration has no particular bias in the entire instruction data, and when a compression target instruction sequence that can be compressed exceeding the number of compression target instruction sequences that can be stored in one meta-instruction dictionary data occurs, etc. There is an advantage that the instruction dictionary data can be divided and registered in plural.

FIG. 32 is a further example of a data structure when a plurality of meta-instruction dictionary data is generated at the time of generating compressed instruction data.
Here, an example is shown in which a single command data uses two meta command dictionary data.
The compressed instruction data is composed of one instruction data 3201 and two meta-instruction dictionary data 3202 and 3203.
The instruction data 3201 includes at least instruction data 3101 instruction sequence, and the meta instruction described therein is accompanied by at least two kinds of parameters, and one indicates meta instruction dictionary data corresponding to each meta instruction. A meta-instruction dictionary data identification number and an instruction string identification number for designating which compression target instruction data in the corresponding meta-instruction dictionary data is a corresponding instruction string.
A meta-instruction dictionary data identification number uniquely assigned to each of the two meta-instruction dictionary data is defined. Here, the meta-instruction dictionary data identification number assigned to the meta-instruction dictionary data 3202 is # 01, the meta-instruction dictionary. The meta-instruction dictionary data identification number assigned to the data 3203 is # 02.
The instruction data 3131 instruction string describes at least two meta instructions 3204 and 3205.
The meta-instruction 3204 and the meta-instruction 3205 are meta-instructions that target different instruction sequences but are assigned a common instruction identification number (for example, 0xF0).
As described above, each meta-instruction has two types of parameters in the parameter part, the first parameter being the meta-instruction dictionary data identification number and the second parameter being the instruction string identification number.
Since the value of the first parameter of the meta instruction 3204 is 01, it can be seen that the meta instruction dictionary data corresponding to this meta instruction is the meta instruction dictionary data 3202 whose meta instruction dictionary data identification number is 01.
On the other hand, since the value of the first parameter of the meta instruction 3205 is 02, it can be seen that the meta instruction dictionary data corresponding to this meta instruction is the meta instruction dictionary data 3203 whose meta instruction dictionary data identification number is 02. .
When the compressed instruction data execution device 104 executes the meta instructions 3204 and 3205 when processing the instruction data 3201, it is necessary to first read the first parameter and select the meta instruction dictionary data corresponding to the value. Become.
Next, the second parameter is read, and a compression target instruction sequence having an instruction sequence identification number corresponding to the value of the second parameter is extracted from the meta instruction dictionary data selected earlier.
Subsequent processing can be performed in the same manner as the execution method described above.

In order to realize the method shown in FIG. 32, in the instruction data compression apparatus 103 of this embodiment, the instruction data compression conversion unit 1035 converts two or more instruction sequences whose description contents in one program are different from each other. Also assign the same meta-instruction and replace the instruction sequence with the meta-instruction.
Then, the meta instruction dictionary data generation unit 1036 generates two or more meta instruction dictionary data in which different instruction sequences are associated with the same meta instruction, and an identifier of the corresponding meta instruction dictionary data is set in each instruction sequence. Append.

In FIG. 31, if there is a common instruction sequence in two or more subsets, it is replaced with a common meta instruction. However, the method of FIG. 31 may be applied to two or more instruction data.
That is, when there is a common instruction sequence in two or more instruction data, the instruction data compression conversion unit 1035 may assign a common meta instruction to the common instruction sequence and replace the instruction sequence with the meta instruction.
Then, the meta-instruction dictionary data generation unit 1036 generates meta-instruction dictionary data that is commonly used by two or more instruction data based on the replacement result of the instruction data compression / conversion unit 1035 with the meta-instruction.
In this case, one meta instruction dictionary data is used for two or more instruction data.

As described above, in the present embodiment,
When the instruction data compression device is applied to a source code set composed of one or more source codes, the source code is classified into at least two, and one meta-instruction dictionary data is generated for each classification. It is characterized by. Further, it has been described that a classification determining means for determining a classification is provided.
More specifically, the classification determining unit uses criteria such as “the deviation in appearance frequency is large” and “the size of the compressed instruction data is minimized as a whole”.
Also, identification information for uniquely identifying individual meta-instruction dictionary data is assigned, and identification information of valid meta-instruction dictionary data is added to an instruction sequence in which the instruction dictionary data is valid.
By generating multiple meta-instruction dictionary data from multiple source codes, when matching instruction sequences are biased for each source, or when there are too many matching instruction sequences to fit in one meta-instruction dictionary data Can generate effective compressed instruction data by dividing the meta-instruction dictionary data into a plurality of pieces.

In the present embodiment,
It has been described that the compressed instruction data execution apparatus includes meta instruction dictionary data selection means for selecting meta instruction dictionary data to be used based on the identification information of the meta instruction dictionary data added to the instruction sequence.
That is, a method for linking a plurality of meta-instruction dictionary data and meta-instructions has been described.

In this embodiment,
It has been described that, when an instruction data compression apparatus is applied to a source code set composed of one or more source codes, one meta-instruction dictionary data is generated for all source codes.
That is, not only can one compressed instruction data be generated by one source code, but one compressed instruction data can be generated by a plurality of source codes. The compression efficiency is improved by using a plurality of source codes as one compressed instruction data.

Embodiment 6 FIG.
Next, in the present embodiment, a method for reducing application restriction conditions for instruction data compression processing will be described.

A processing sequence that can be normally described in a program language can describe not only serial processing but also execution control processing such as conditional branch processing and repetition processing.
The conditional branch process is a process of jumping to a specific location in the instruction data depending on the contents of some value that is referred to or generated during the process. In the C language or the like, an if sentence or a switch sentence corresponds to this.
In addition, iterative processing is control processing that applies conditional branch processing. When a certain value satisfies a certain criterion, it jumps to a specific location and repeats while the instruction sequence at the jump destination location and the criterion judgment location meets the criterion. This is a process to be executed, and in a C language or the like, a for sentence, a while sentence, and the like correspond thereto.
The instruction name of the instruction that performs the discontinuous movement as described above is expressed as “goto”. The instruction goto is also called a jump instruction sequence or a jump instruction.
This instruction “goto” has at least one parameter in the parameter portion, and the parameter has a jump offset value that is an offset value from “goto” to the jump destination instruction.
When the instruction data accompanied with the instruction “goto” is processed by the instruction data compression process, the length of the instruction data is changed, so that the length is changed between “goto” and the jump destination instruction. You must update the jump offset value.
For this reason, the compressed instruction data execution device and instruction set described so far cannot cope with the following situations and cannot jump to an appropriate jump destination. The area including the situation needs to be restricted so as not to be compressed by the instruction data compression apparatus 103, and as a result, the compression efficiency decreases.

[Situation 1]
As shown in FIG. 46A, the instruction goto (501) is described in the compression target instruction sequence, and the jump destination (502) is described in the non-compression target instruction sequence outside the range of the compression target instruction sequence. This is the case that the instruction is.

[Situation 2]
As shown in FIG. 46B, the instruction goto (501) is described in the compression target instruction sequence 1, the jump destination (502) is outside the range of the compression target instruction sequence, and other compression target instructions This is the case of the instruction described in column 2.

[Situation 3]
As shown in FIG. 46 (c), the instruction goto (501) is described in the non-compressed instruction sequence, and the jump destination (502) is the instruction described in the compression target instruction sequence.

[Situation 4]
As shown in FIG. 46D, the instruction goto (501) is described, and at least one compression target instruction sequence exists between the instruction goto (501) and the jump destination instruction (502). It is.

All of these situations are replaced with meta-instructions between the instruction goto (501) and the jump destination (502) when the execution process is performed by compressing the offset described in the parameter of the instruction goto (501) as it is. This causes a problem that the offset value does not indicate a correct jump destination.
In this embodiment, in order to solve this problem, a jump-in instruction and a jump-out instruction are newly provided as instructions corresponding to the jump process.

Here, an outline of the jump-in instruction and the jump-out instruction will be described.
For example, in [Situation 1], it is assumed that the jump offset value of the instruction goto (501) in the instruction sequence to be compressed is 20 at first.
Further, it is assumed that there is a compression target instruction sequence for 10 bytes immediately after the instruction goto (501), and the compression target instruction sequence is compressed to 5 bytes when it is replaced with a meta instruction.
The 20 bytes, which are the jump offset value of the instruction goto (501), have a jump destination at a position 20 bytes ahead assuming an instruction string length of 10 bytes before compression.
When a 10-byte compression target instruction sequence is replaced with a meta-instruction and compressed to 5 bytes, an error of 5 bytes occurs.
When the compressed instruction data execution device 104 processes the instruction goto (501) while keeping the offset value of the instruction goto (501) at 20 bytes, the next program counter stores the instruction 20 bytes ahead of the instruction goto (501). However, since an error of 5 bytes occurs, an invalid area different from the original jump destination is referred to.
In order to avoid such a problem, when there is a jump instruction corresponding to [Situation 1], the instruction data compression apparatus 103 replaces the instruction goto (501) with a jump-out instruction at the time of data compression.
The jump-out instruction and the jump-in instruction are instructions that notify the compressed instruction data execution device 104 that the jump offset value does not indicate the correct jump destination by the replacement with the meta instruction.
When executing the jump-out instruction, the compressed instruction data execution device 104 assumes that the current compression target instruction sequence is complete, and immediately after returning to the non-compression target instruction sequence, the compressed instruction data execution unit 104 calculates the compressed portion of the compression target instruction sequence. Calculate and adjust the jump offset value to find the correct jump destination instruction.
In the above specific example, since the initial offset is 20 and the instruction string immediately after the instruction goto (501) is compressed by 5 bytes (20-5), 15 bytes are the parameters of the jump-out instruction (jump offset value) It becomes.

  In the same way, when the jump destination (502) exists in the instruction sequence to be compressed, it is replaced with a jump-in instruction, and the compressed instruction data execution device 104 calculates the compression amount when executing the jump-in instruction. Search for the correct jump destination instruction by adjusting the jump offset value.

  Only [Situation 4] can be handled by rewriting only the offset value of the parameter without changing the instruction goto (501). Therefore, the corresponding new jump instruction is not defined.

Thus, in the present embodiment, new instructions (jump-out instructions, jump-in instructions) corresponding to the above [situation 1] to [situation 4] are added to the instruction set, and the instructions (jump An instruction data generation device 102 that can generate an out instruction, a jump-in instruction), an instruction data compression device 103, and a compressed instruction data execution device 104 that can execute the instruction.
As a result, the compression process can be performed on all instruction data to be processed without limiting the compression range.

  FIG. 33 is an example of a jump instruction type determination processing procedure for determining a jump instruction sequence (instruction goto) that matches the above [Situation 1] to [Situation 4] in the instruction data compression apparatus 103.

This process is assumed to be performed immediately before the transition from the process 1801 to the process 1802 in FIG.
Note that the variable names appearing in FIG. 33 also appear in FIG. 18, but each is an independent and different variable.
33 is executed by the instruction data compression / conversion unit 1035.

In process 3301, the instruction data compression / conversion unit 1035 sets a pointer indicating the head instruction of the instruction data to be processed, and sets the pointer to pt.
After the pointer setting is completed, the process proceeds to processing 3302.

In process 3302, the instruction data compression / conversion unit 1035 initializes a jump instruction information list for registering information on all jump instruction sequences described in the instruction data to be processed.
FIG. 34 shows an example of the data structure of the list element in the jump instruction information list.
At least location information indicating which jump instruction sequence corresponds to the information described in the element, and whether the jump instruction sequence is an instruction in at least one of the above [situation 1] to [situation 4] Is included as an element.
After initialization of the jump instruction information list is completed in process 3302, the process proceeds to process 3303.

In process 3303, the instruction data compression conversion unit 1035 determines whether pt indicates the end of the instruction code.
If the determination result indicates the end, it means that the jump instruction type determination process for the instruction data to be processed has been completed, and the jump instruction type determination process ends.
At that time, jump instruction information described in the instruction data to be processed is registered in the jump instruction information list.
Conversely, if the determination result does not indicate the end, the process proceeds to process 3304, and the process related to the unprocessed instruction in the instruction data is continued.

In process 3304, the instruction data compression conversion unit 1035 determines whether the instruction indicated by pt is a jump instruction.
If the determination result is not a jump instruction, the process proceeds to process 3305. If the determination result is a jump instruction, the process proceeds to process 3306.

  In process 3305, the instruction data compression conversion unit 1035 shifts pt to the instruction immediately after the instruction pointed to by pt, since the instruction pointed to by pt is not a jump instruction, and transitions to step 3303.

In process 3306, since the instruction pointed to by pt is a jump instruction, the instruction data compression / conversion unit 1035 generates an element for registering the information of the jump instruction in the jump instruction information list, and the element is stored in the jump instruction information list. Register with.
After registration in the list is completed, the process proceeds to process 3307.

In processing 3307 and subsequent steps, the type of the jump instruction pointed to by pt is determined.
In process 3307, the instruction data compression / conversion unit 1035 determines whether the jump instruction is included in the instruction sequence to be compressed.
If the determination result is included in the compression target instruction sequence, the process proceeds to process 3309;
A specific determination method of whether or not the jump instruction in the processing 3307 is included in the compression target instruction sequence is, for example, a part of the compression target instruction sequence in which the target jump instruction is registered in the compression target instruction sequence table. This can be realized by determining whether or not.
This determination processing is performed by determining whether or not the compression target instruction sequence starting from the position information regarding the processing target instruction data in the appearance position information list included in the element of the compression target instruction sequence to be compared includes the instruction indicated by pt. Is possible.

In process 3308, the instruction data compression conversion unit 1035 determines whether or not the jump destination instruction of the jump instruction indicated by pt is an instruction included in the compression target instruction sequence.
The method of specifying the jump destination instruction can obtain the address of the jump destination instruction by adding the offset value included in the parameter portion of the jump instruction to pt.
Whether or not the instruction is included in the compression target instruction sequence can be realized by using a method similar to the processing in which it is determined in processing 3307 whether or not the instruction is included in the compression target instruction sequence of the jump instruction.
If the determination result of the process 3308 is an instruction in the instruction sequence to be compressed, the process proceeds to process 3311. Conversely, if the instruction is not an instruction in the instruction sequence to be compressed, the process proceeds to the process 3310.

In process 3309, the instruction data compression conversion unit 1035 determines whether there is an instruction included in the same compression target instruction sequence as the jump destination instruction of the jump instruction indicated by pt.
This determination process can be realized by using the determination method described in process 3308.
If the determination result is an instruction in the compression target instruction sequence, the process proceeds to process 3313. If the determination result is not an instruction in the compression target instruction string, the process proceeds to process 3312.

In process 3310, since the jump instruction indicated by pt and the jump destination instruction of the jump instruction are not included in the compression target instruction sequence, [Situation 4] or the normal situation (the situation where neither the jump instruction nor the jump destination is the compression target) ) Is a normal jump instruction type.
Therefore, the instruction data compression / conversion unit 1035 sets a value indicating the normal jump instruction type in the type information of the jump instruction information, and transitions to the process 3314.

In the process 3311, the jump instruction pointed to by pt is not included in the compression target instruction sequence, but the jump destination instruction is included in the compression target instruction sequence, so that it is found in [Situation 3].
Therefore, a value indicating the jump instruction type in the meta instruction is set in the type information of the jump instruction information, and the process proceeds to the process 3314.

In processing 3312, the instruction data compression conversion unit 1035 includes the jump instruction indicated by pt in the compression target instruction sequence, but the jump destination instruction is not included in the compression target instruction sequence including the jump instruction. ] Or [Situation 2].
Since these two situation determinations are performed in the jump instruction change process, here, a value indicating the jump instruction type outside meta instruction is set in the type information of the jump instruction information, and the process proceeds to process 3314.
In the process 3313, since the jump instruction indicated by pt and the jump destination instruction of the jump instruction are included in the same compression target instruction sequence, it can be seen that [Situation 4] or the normal situation exists.
Since these two situation determinations are performed in the jump instruction change process, the instruction data compression / conversion unit 1035 sets a value indicating the normal jump instruction type in the type information of the jump instruction information here, and transitions to process 3314.

  In process 3314, the instruction data compression / conversion unit 1035 sets the address held by pt in the location information of the current jump instruction information, transitions to process 3305, and repeats the process for the next instruction.

  By performing the above processing, the type determination of all jump instructions described in the instruction data to be processed is completed.

FIG. 35 shows an example of a processing procedure of a jump instruction change process for rewriting a jump instruction based on the jump instruction type information obtained in the jump instruction type determination process.
This process may be performed immediately before the transition from the process 1801 to the process 1802 in FIG. 18 and after the flow in FIG. 33 ends.
35 is executed by the instruction data compression / conversion unit 1035.

  Before describing the specific contents of the jump instruction changing process, a new instruction for rewriting the jump instruction will be described below.

A jump-out instruction is newly defined in the instruction set as a new instruction for rewriting the jump instruction corresponding to [Situation 1] and [Situation 2].
This jump-out instruction is a jump instruction corresponding to the jump process from the instruction sequence to be compressed, and is necessary for executing a process specialized for the situation when the compressed instruction data execution device 104 processes the jump instruction.
In other words, the compressed instruction data execution unit 104 searches for a jump destination while calculating the amount of compression in the compression target instruction area in which the jump instruction is included.

A jump-in instruction is newly defined in the instruction set as a new instruction for rewriting the jump instruction corresponding to [Situation 3].
This jump-in instruction is a jump instruction corresponding to the jump process from the uncompressed target instruction sequence to the compressed target instruction sequence, and performs processing specialized for the situation when the compressed instruction data execution device 104 processes the jump-in instruction. Is required.
In other words, it is an instruction that causes the compressed instruction data execution device 104 to search for the jump destination while calculating the amount of compression in the compression target instruction area including the jump destination.

  Although the instruction rewrite for the jump instruction in other situations is not performed, the parameter value that is the jump offset value is updated for all the jump instructions corresponding to [Situation 4].

  The new instruction set described here is only an example, and it is possible to solve the problem by defining other instructions, but in the following description, examples using jump-in and jump-out instructions Will be explained.

Returning to the description of the specific contents of the jump instruction change process.
In process 3501, the instruction data compression / conversion unit 1035 acquires an unprocessed element from the jump instruction information list of the process target instruction data and sets it as a process target element in the subsequent processes.
After the element acquisition process is completed, the process proceeds to process 3502.

In process 3502, the instruction data compression / conversion unit 1035 determines whether or not the unprocessed element acquired in process 3501 exists.
If there is no unprocessed element, it means that all the elements in the jump instruction information list have been processed, and the jump instruction change process ends.
On the other hand, if there is an unprocessed element, the process proceeds to process 3503.

In process 3503, the instruction data compression / conversion unit 1035 reads the type information of the element to be processed, and performs a process branch depending on the content.
If the type information is a normal jump instruction type, the process proceeds to process 3504. If the type information is a jump instruction type in a meta instruction, the process proceeds to process 3505. If the type information is a jump instruction type other than a meta instruction, the process proceeds to process 3506.

In process 3504, the instruction data compression / conversion unit 1035 determines whether or not a compression target instruction sequence exists between the jump instruction corresponding to the element to be processed and the jump destination instruction in the jump instruction.
As a result of the determination, if there is an instruction sequence to be compressed, the process proceeds to process 3507.
On the other hand, when the compression target instruction sequence does not exist, the process proceeds to process 3501, and the process for the next element in the jump instruction information list is continued.

In process 3507, the instruction data compression / conversion unit 1035 performs a process of rewriting the offset value described in the parameter part of the jump instruction to be processed.
At least one compression target instruction sequence exists between the jump instruction to be processed 3507 and the jump destination instruction.
The instruction sequence to be compressed means that the place is replaced by a meta instruction by the instruction data compression conversion, and as a result, the instruction data length existing between the jump instruction and the jump destination instruction is changed.
Therefore, when the compressed instruction data execution device 104 executes the jump offset value described in the parameter part of the jump instruction as it is, the jump process to an appropriate instruction cannot be performed.
A process 3507 is performed to solve the above problem, and the instruction data compression / conversion unit 1035 calculates a jump offset value Offset in the parameter part of the jump instruction to be processed as a new jump offset based on the following calculation formula. The value NewOffset is calculated, and the result is reset as a new jump offset value in the parameter portion.

In the above formula, x means a set whose elements are compression target instruction sequences existing between the processing target jump instruction and the jump destination instruction, and length (x) means the instruction sequence length of the compression target instruction sequence x. , Length (metaOP) means the instruction length of the meta instruction.
That is, the above calculation formula subtracts the instruction lengths of all the compression target instruction sequences existing in between from the jump offset value obtained before compression, adds the instruction lengths of meta instructions for the number to be replaced, The jump offset value is calculated for the case.
After completing the update of the jump offset value in process 3507, the process proceeds to process 3501.

In process 3505, the instruction data compression / conversion unit 1035 performs a process on the jump instruction determined to be the meta-instruction jump instruction type.
Here, the instruction identification number of the jump instruction to be processed is rewritten to the instruction identification number of the jump-in instruction.
After the rewriting is completed, the process proceeds to process 3504.

In process 3506, the instruction data compression / conversion unit 1035 performs a process for the jump instruction determined as the meta instruction non-instruction jump instruction type.
Here, the instruction identification number of the jump instruction to be processed is rewritten to the instruction identification number of the jump-out instruction.
After the rewriting is completed, the process proceeds to process 3504.

  By the jump instruction change process described above, it is possible to appropriately update an instruction for a jump instruction that has an influence on the execution of the instruction data compression process.

Next, the execution processing method of the compressed instruction data in which the jump-in instruction and the jump-out instruction described above are rewritten will be described.
FIG. 38 is a specific example of a compressed instruction data execution processing procedure in the compressed instruction data execution device 104 having a function of executing a jump-in instruction and a jump-out instruction. The compressed instruction data execution process procedure shown in FIG. The process 3801 and the process 3802 are added.
Process 3801 and process 3802 are processes executed when it is determined in process 2303 that the instruction is a jump-in instruction or a jump-in instruction from the instruction identification number of the current instruction to be processed. In each case, a process of searching for a jump destination instruction is performed.
The processing in FIG. 38 is performed by the instruction sequence interpretation / execution unit 1046 of the compressed instruction data execution device 104.

FIG. 36 is a diagram showing an example of a specific processing procedure of the processing 3801.
The instruction sequence interpretation / execution unit 1046 also performs the processing in FIG.
The process of FIG. 36 is briefly described. When a jump-out instruction is executed for the first time, a process for searching for a jump destination instruction is performed, the jump destination is stored in a cache, a jump is performed, and the same jump instruction is executed. When executed twice or more, since the jump destination is the same, this is processing for acquiring jump destination information from the cache and performing a jump.
Here, an outline of the jump destination search method will be described.
First, as shown in FIG. 47, the instruction string length (Length (R)) of the instruction area to be compressed after the jump-out instruction (501) is obtained, and the instruction is determined from the offset value (Offset) of the jump-out instruction (501). The sequence length (Length (R)) is subtracted to obtain the instruction sequence length (Offset-Length (R)) of the instruction sequence after the compression target instruction area.
Then, the position is moved backward for each predetermined instruction string length (Length (op)), and in the compressed instruction area, the instruction string length of the original instruction string of the meta instruction is derived, and the movement amount is the instruction string length ( The position corresponding to Offset-Length (R)) is the jump destination.
Hereinafter, each process of FIG. 36 will be described.

In process 3601, the instruction sequence interpretation / execution unit 1046 obtains the jump offset value Offset of the current process target instruction jump-out instruction.
After the acquisition is completed, the process proceeds to process 3602.

In process 3602, the instruction sequence interpretation / execution unit 1046 searches the jump / out instruction cache information list for cache information related to the jump / out instruction of the current instruction to be processed.
After the search is completed, the process proceeds to process 3603.
Here, the jump-out instruction cache information list is information on at least storage information of the processing target instruction position storage means and saving information of the processing target instruction position saving means in the compressed instruction data execution apparatus immediately after processing a certain jump-out instruction. Is a list that manages the position information of the jump-out command as a key.
This is used to skip the process of searching for the jump destination instruction after the second time because the jump instruction always jumps to the same instruction when the jump process is executed.

In process 3603, the instruction sequence interpretation / execution unit 1046 determines whether or not the cache information searched in process 3602 exists.
If the cache information does not exist as a result of the determination, the process proceeds to process 3605, and a jump destination instruction search process is performed.
On the other hand, if the cache information exists as a result of the determination, the process proceeds to process 3604.

In processing 3604, the instruction sequence interpretation / execution unit 1046 stores the storage information stored in the processing target instruction position storage unit 1043 and the processing when the processing target jump-out instruction is executed based on the retrieved cache information. The save information saved by the target command position saving unit 1044 is reproduced.
After the reproduction is completed, the jump-out instruction execution process is terminated.

In processing 3605 and after, a jump destination search for a jump-out instruction is performed.
In processing 3605, the instruction sequence interpretation / execution unit 1046 calculates the unexecuted instruction sequence length Length (R) of the compression target instruction sequence that is currently being processed.
This value can be obtained, for example, by subtracting the address of the current processing target instruction position information from the end address of the compression target instruction sequence to be processed.
After the calculation is completed, the process proceeds to process 3606.

In process 3606, the instruction sequence interpretation / execution unit 1046 ends the meta-instruction execution for the compression target instruction sequence that is currently processed by the compressed instruction data execution device 104.
This is necessary because the jump-out instruction is an instruction for jumping to an instruction preceding the instruction sequence to be compressed that is currently processed.
After executing this processing, the processing target instruction position information stored by the processing target instruction position storage unit 1043 is the head address of the instruction immediately after the meta instruction that has triggered the execution of the compression target instruction sequence executed so far. The processing target instruction position saving information stored by the processing target instruction position saving unit 1044 is returned to the state immediately before the meta instruction is executed.
After completion of the meta instruction execution end process, the process proceeds to process 3607.

In process 3607, the instruction string interpretation / execution unit 1046 performs a preparation process for searching for a jump destination instruction.
Specifically, it is initialization of the variable i that stores the remaining jump offset value that is the offset value to be jumped later.
The remaining jump offset value, for example, specifically, a value obtained by subtracting Length (R) from Offset (Offset-Length (R)) is substituted for i.
After the initialization process is completed, the process proceeds to process 3608.

In process 3608, the instruction sequence interpretation / execution unit 1046 determines whether the remaining jump offset value remains, that is, whether i is a value greater than zero.
If the result of the determination is that there is no remaining, the process proceeds to process 3609, and conversely if it remains, the process proceeds to process 3610.

In the process 3609, the instruction sequence interpretation / execution unit 1046 is a process that makes a transition when no remaining jump offset value remains. The process target instruction position information stored in the current process target instruction position storage unit 1043, and This is a situation in which it is determined that the processing target instruction in the instruction sequence indicated by the processing target instruction position saving information saved by the processing target instruction position saving unit 1044 is an instruction to be jumped by the jump-out instruction.
Therefore, this processing target instruction position information and processing target instruction position saving information is used as a key for the address where the jump-out instruction that triggered the current jump-out instruction execution process is described as a key. Register to the list.
After completion of registration, this jump-out instruction execution process ends.

In process 3610, the instruction sequence interpretation / execution unit 1046 determines whether the instruction indicated by the current process target instruction position information is a meta instruction.
As a result of the determination, if it is not a meta instruction, the process proceeds to process 3611. If it is a meta instruction, the process proceeds to process 3614.

In the process 3611, the instruction sequence interpretation / execution unit 1046 is in a situation where the current process target instruction position information is a normal instruction and the jump offset value remains.
Therefore, the instruction length (Length (op)) of the instruction indicated by the processing target instruction position information for jumping to the next of this instruction is acquired.
After the acquisition, the process proceeds to process 3612.

In process 3612, the instruction string interpretation / execution unit 1046 updates the remaining jump offset value using the instruction length (Length (op)) acquired in process 3611.
Specifically, for example, it is conceivable to subtract the instruction length (Length (op)) from the remaining jump offset value.
After the update is completed, the process proceeds to process 3613.

  In process 3613, the instruction sequence interpretation / execution unit 1046 updates the process target instruction position information to the start address of the next instruction, and the process transitions to process 3608.

In process 3614, the instruction sequence interpretation / execution unit 1046 is in a situation where the current process target instruction position information is a meta-instruction and the jump offset value remains.
Therefore, it is necessary to determine whether or not a jump destination instruction exists in the compression target instruction sequence designated by the meta instruction.
Therefore, in process 3614, the instruction sequence interpretation / execution unit 1046 acquires the compression target instruction sequence designated by the meta instruction from the meta instruction dictionary data.
After the acquisition is completed, the process proceeds to process 3615.

In processing 3615, the instruction sequence interpretation / execution unit 1046 performs processing for determining whether or not a jump destination instruction exists in the compression target instruction sequence specified by the meta instruction.
Specifically, for example, the remaining jump offset value is compared with the instruction sequence length of the compression target instruction sequence specified by the meta instruction. If they match or the remaining jump offset value is smaller, the compression target instruction sequence contains It may be determined that a jump destination instruction exists.
As a result of this determination, if there is a jump destination in the compression target instruction, the flow proceeds to processing 3617, and conversely if there is no jump destination in the compression target instruction, the flow proceeds to processing 3616.

The process 3616 is performed in a situation where there is no jump destination instruction in the compression target instruction sequence corresponding to the meta instruction indicated by the current processing target instruction position information, and there is a jump destination instruction after the meta instruction.
Therefore, in process 3616, the instruction sequence interpretation / execution unit 1046 updates the remaining jump offset value.
In this update, for example, it is conceivable to update the instruction sequence length (Length (op)) of the compression target instruction sequence to a value subtracted from the remaining jump offset value. After the update is completed, the process proceeds to process 3613.

Process 3617 is processed in a situation where a jump target instruction exists in the compression target instruction sequence corresponding to the meta instruction indicated by the current processing target instruction position information.
Therefore, processing is performed to rewrite information stored in the instruction execution time information storage unit 1042 to information necessary for appropriately executing the jump destination instruction.
Specifically, for example, the processing target instruction position information stored at the current processing target instruction position storage unit 1043 is saved as information saved at least by the processing target instruction position saving unit 1044, and then the processing target instruction is saved. For example, the processing target instruction position information recorded by the position storage unit 1043 may be updated to information indicating the jump destination instruction in the compression target instruction sequence.
After the process is completed, the process proceeds to process 3609.

By performing the above processing, it is possible to perform appropriate processing in the compressed instruction data execution device 104 for the jump-out instruction, and a jump destination instruction to be jumped with the jump-out instruction at the first execution for a certain jump-out instruction And the instruction execution time information necessary for executing the jump destination instruction is registered in the jump-out instruction cache information list.
In the second and subsequent executions, the jump destination instruction search process is avoided by restoring the instruction execution time information necessary to execute the jump destination instruction from the information registered in the jump-out instruction cache information list. .

FIG. 37 is a diagram showing an example of a specific processing procedure of processing 3802.
The processing 3802 and the processing 3801 take similar processing procedures. However, since the processing 3802 is processing for a jump-in instruction, the meta-instruction immediately before the loop for searching for a jump destination instruction required in the processing 3801 is performed. The return processing from the execution state becomes unnecessary.
The other processes are the same in the process 3802 and the process 3801.
Therefore, the jump-out instruction cache information list used in the description of the process 3801 may be processed using the same process as the process 3802, but in FIG. It is called an information list and is described as a different list.
However, the basic configuration and functions of the list are the same as those of the jump-out instruction cache information list.

Similarly to FIG. 36, the processing of FIG. 37 is also performed when a jump-in instruction is executed for the first time, a process of searching for a jump destination instruction is performed, the jump destination is stored in the cache, and then the jump is performed. Is executed twice or more times, the jump destination is the same, so the jump destination information is acquired from the cache and the jump is performed.
In the case of FIG. 37, the jump-in instruction is in the non-compressed instruction area and the jump destination is in the compressed instruction area.
For this reason, in FIG. 37, the position is moved backward for each predetermined instruction string length (Length (op)) from the jump-in instruction, and the instruction string length of the original instruction string of the meta instruction is changed in the compressed instruction area. The position where the movement amount coincides with the offset value of the jump-in command is the jump destination.
37 is also executed by the instruction sequence interpretation / execution unit 1046.
Hereinafter, each process of FIG. 37 will be described.

In process 3701, the instruction string interpretation / execution unit 1046 obtains the jump offset value Offset of the current process target instruction jump-in instruction.
After the acquisition is completed, the process proceeds to process 3702.

In process 3702, the instruction sequence interpretation / execution unit 1046 searches the jump-in instruction cache information list for cache information regarding the jump-in instruction of the current instruction to be processed.
After the search is completed, the process proceeds to process 3703.

In process 3703, the instruction string interpretation / execution unit 1046 determines whether or not the cache information searched in process 3702 exists.
As a result of the determination, if there is no cache information, the process proceeds to process 3704, and a search process for a jump destination instruction is performed.
On the contrary, if the cache information exists as a result of the determination, the process proceeds to process 3707.

In process 3707, the instruction sequence interpretation / execution unit 1046 performs a preparation process for searching for a jump destination instruction.
Specifically, it is initialization of the variable i that stores the remaining jump offset value that is the offset value to be jumped later.
A remaining jump offset value, for example, a value obtained by subtracting the instruction length of the jump-in instruction from Offset is substituted for i. After the initialization process is completed, the process proceeds to process 3708.

In process 3708, the instruction sequence interpretation / execution unit 1046 determines whether the remaining jump offset value remains, that is, whether i is a value greater than zero.
If the result of the determination is that there is no remaining, the process proceeds to process 3709;

In the process 3709, the instruction sequence interpretation / execution unit 1046 is a process that transitions when there is no remaining jump offset value. The process target instruction position information stored in the current process target instruction position storage unit 1043, and This is a situation in which it is determined that the processing target instruction in the instruction sequence indicated by the processing target instruction position saving information saved by the processing target instruction position saving unit 1044 is an instruction to be jumped by a jump-in instruction.
Therefore, this process target instruction position information and process target instruction position save information is used as a key for the address where the jump-in instruction that triggered the current jump-in instruction execution process is described. Register to the list.
After completion of registration, the jump-in instruction execution process ends.

In process 3710, the instruction sequence interpretation / execution unit 1046 determines whether the instruction indicated by the current process target instruction position information is a meta instruction.
As a result of the determination, if it is not a meta-instruction, the process proceeds to a process 3711.

In process 3711, the instruction sequence interpretation / execution unit 1046 is in a situation in which the current process target instruction position information is a normal instruction and the jump offset value remains.
Therefore, the instruction length (Length (op)) of the instruction indicated by the processing target instruction position information for jumping to the next of this instruction is acquired.
After acquisition, the process proceeds to a process 3712.

In process 3712, the instruction sequence interpretation / execution unit 1046 updates the remaining jump offset value using the instruction length (Length (op)) acquired in process 3711.
Specifically, for example, it is conceivable to subtract the instruction length (Length (op)) from the remaining jump offset value. After the update is completed, the process proceeds to process 3713.

  In process 3713, the instruction sequence interpretation / execution unit 1046 updates the process target instruction position information to the start address of the next instruction, and the process transitions to process 3708.

In process 3714, the instruction sequence interpretation / execution unit 1046 is in a situation where the current process target instruction position information is a meta-instruction and the jump offset value remains.
Therefore, it is necessary to determine whether or not a jump destination instruction exists in the compression target instruction sequence designated by the meta instruction.
Therefore, in process 3714, the compression target instruction sequence designated by the meta instruction is acquired from the meta instruction dictionary data.
After the acquisition is completed, the process proceeds to process 3715.

In processing 3715, the instruction sequence interpretation / execution unit 1046 performs processing for determining whether or not a jump destination instruction exists in the compression target instruction sequence specified by the meta instruction.
Specifically, for example, the remaining jump offset value is compared with the instruction sequence length of the compression target instruction sequence specified by the meta instruction. If they match or the remaining jump offset value is smaller, the compression target instruction sequence contains It may be determined that a jump destination instruction exists.
As a result of this determination, if there is a jump destination in the compression target instruction, the flow shifts to processing 3717, and conversely if no jump destination exists in the compression target instruction, the flow shifts to processing 3716.

Process 3716 is processed in a situation where there is no jump destination instruction in the compression target instruction sequence corresponding to the meta instruction indicated by the current processing target instruction position information, and there is a jump destination instruction after the meta instruction.
Therefore, in process 3716, the remaining jump offset value is updated. In this update, for example, it is conceivable to update to a value subtracted from the remaining jump offset value by the instruction string length of the compression target instruction string.
After the update is completed, the process proceeds to process 3713.

Process 3717 is processed in a situation in which a jump target instruction exists in the compression target instruction sequence corresponding to the meta instruction indicated by the current processing target instruction position information.
Therefore, processing is performed to rewrite information stored in the instruction execution time information storage unit 1042 to information necessary for appropriately executing the jump destination instruction.
Specifically, for example, the instruction sequence interpretation / execution unit 1046 stores the processing target instruction position information stored in the current processing target instruction position storage unit 1043 as information saved at least by the processing target instruction position saving unit 1044. For example, the processing target instruction position information recorded by the processing target instruction position storage unit 1043 may be updated to information indicating the jump destination instruction in the compression target instruction sequence.
After the process is completed, the process proceeds to process 3709.

By performing the above processing, it is possible to perform appropriate processing in the compressed instruction data execution device 104 for a jump-in instruction, and a jump destination instruction to be jumped with the jump-in instruction at the first execution for a certain jump-in instruction And the instruction execution time information necessary for executing the jump destination instruction is registered in the jump-in instruction cache information list.
In the second and subsequent executions, the jump destination instruction search process is avoided by restoring the instruction execution time information necessary to execute the jump destination instruction from the information registered in the jump-in instruction cache information list. .

Thus, in the instruction data compression apparatus 103 according to the present embodiment, the instruction data storage apparatus access unit 1031 inputs instruction data including a jump instruction sequence describing a jump instruction to a predetermined jump destination instruction sequence. There is a case.
Then, the instruction data compression / conversion unit 1035 determines whether or not to replace each instruction string with a meta instruction, and after specifying the instruction string to be replaced with the meta instruction and before replacing the instruction string to be replaced with the meta instruction, Analyzes the positional relationship among the replacement instruction sequence group, jump instruction sequence, and jump destination instruction sequence that will be replaced by the meta instruction, and the positional relationship between the replacement instruction sequence group, jump instruction sequence, and jump destination instruction sequence is a predetermined condition. If the two match, the correction process for the jump instruction string is performed, and after the correction process for the jump instruction string, the instruction string to be replaced is replaced with a meta-instruction.
When the jump instruction sequence is included in the replacement instruction sequence group and the jump destination instruction sequence is not included in the same replacement instruction sequence group ([situation 1], [situation 2]), the instruction data compression conversion unit 1035
When the jump instruction sequence is not included in the replacement instruction sequence group and the jump destination instruction sequence is included in the replacement instruction sequence group ([situation 3]),
When neither the jump instruction sequence nor the jump destination instruction sequence is included in the replacement instruction sequence group, and one or more replacement instruction sequence groups exist between the jump instruction sequence and the jump destination instruction sequence ([Situation 4]), Correction processing for the jump instruction sequence is performed.

  In the case of [Situation 1] and [Situation 2], the instruction data compression / conversion unit 1035 includes the replacement instruction sequence in which the jump instruction sequence is included in the replacement instruction sequence group and the jump destination instruction sequence is not included in the same replacement instruction sequence group. Instruction identification number (jump-out notification) for notifying the compressed instruction data execution device 104 that the jump offset value of the jump instruction string does not indicate the jump destination instruction string by replacing the group with a meta-instruction Is described as a jump-out instruction.

  In the case of [Situation 3], the instruction data compression / conversion unit 1035 does not include the jump instruction sequence in the replacement instruction sequence group, includes the jump destination instruction sequence in the replacement instruction sequence group, An instruction identification number (jump-in notification) for notifying the compressed instruction data execution device 104 that the jump offset value of the jump instruction string does not indicate the jump destination instruction string due to the replacement is described in the jump instruction string. To make a jump-in instruction.

  In the case of [Situation 4], the instruction data compression / conversion unit 1035 replaces the replacement instruction string group with the total data amount of the replacement instruction string group existing between the jump instruction string and the jump destination instruction string. The jump offset value of the jump instruction sequence is changed based on the total data amount of the meta instruction.

Further, as described above, in the compressed instruction data execution device 104 according to the present embodiment, the instruction data storage device access unit 1041 replaces an instruction sequence group including two or more instruction sequences with a meta-instruction, The replacement instruction sequence group replaced with the meta instruction includes a jump instruction sequence in which a jump instruction to a predetermined jump destination instruction sequence is described, and the jump instruction sequence includes an offset value up to the jump destination instruction sequence. In some cases, instruction data described as a value is input.
The instruction sequence interpretation / execution unit 1046 determines whether or not the jump instruction sequence is a jump-out instruction sequence when executing the jump instruction sequence. If the jump sequence is a jump-out instruction sequence, the jump-out instruction sequence is a meta-instruction. It is determined that the jump offset value does not point to the jump destination instruction sequence, and the data content after the jump out instruction sequence is analyzed, and the jump destination instruction sequence of the jump out instruction sequence is searched. Jump to the searched jump destination instruction sequence and execute the jump-out instruction sequence.

  When the instruction sequence interpreting / executing unit 1046 is a jump-out instruction sequence, the jump-off instruction sequence jump offset value (Offset in FIG. 47) and the replacement sequence from the jump-out instruction sequence Analysis is performed based on the instruction length to the end of the group (Length (R) in FIG. 47) and the instruction length of the instruction sequence after the meta-instruction of the replacement instruction sequence group (Offset-Length (R)), and jump-out Search the instruction sequence jump destination instruction sequence.

The instruction data storage device access unit 1041 has a group of instruction sequences including two or more instruction sequences replaced with a meta instruction, and a jump instruction sequence in which a jump instruction to a predetermined jump destination instruction sequence is described. A replacement instruction sequence group in which an offset value up to a jump destination instruction sequence is described as a jump offset value in the jump instruction sequence and is included outside the meta instruction, and the jump instruction sequence of the jump instruction sequence is replaced with the meta instruction. In some cases, the instruction data included in the is input.
The instruction sequence interpretation / execution unit 1046 determines whether the jump instruction sequence is a jump-in instruction sequence when executing the jump instruction sequence. If the jump sequence is a jump-in instruction sequence, the jump destination of the jump-in instruction sequence is determined. It is determined that the jump offset value does not point to the jump destination instruction sequence because the instruction sequence is replaced with the meta instruction, the program contents after the jump in instruction sequence are analyzed, and the jump destination instruction of the jump in instruction sequence is analyzed. The sequence is searched, the jump to the searched jump destination command sequence is executed, and the jump-in command sequence is executed.

  The instruction sequence interpretation / execution unit 1046 is based on the jump offset value of the jump-in instruction sequence and the instruction length of the instruction sequence after the jump-in instruction sequence when it is a jump-in instruction sequence. Analysis is performed and a jump destination instruction sequence of the jump-in instruction sequence is searched.

  Further, the instruction sequence interpretation / execution unit 1046 refers to the meta-instruction dictionary data when there is another meta-instruction after the meta-instruction of the replacement instruction sequence group, and determines the instruction sequence corresponding to the other meta-instruction. Deriving the instruction length.

A specific method for executing compressed instruction data without decompressing it into uncompressed instruction data in the compressed instruction data execution apparatus 104 described above will be described, and then a new instruction set definition for jump instructions will be described. The jump instruction rewriting process and the processing contents of the instruction after the rewriting were described.
However, it is not intended to be limited to the configuration of the jump-in instruction and jump-out instruction described here, and jump processing in compressed instruction data that is discontinuous instruction data by rewriting at least the jump instruction to another instruction Any configuration may be used as long as the method can be appropriately processed.
For example, in this embodiment, two types of jump-in instructions and jump-out instructions are prepared as instructions for rewriting a jump instruction.
However, as can be seen from the above description, the processing contents of these two instructions are very similar. Therefore, the jump instruction is described when the compressed instruction data execution unit 104 processes the compressed instruction data execution unit 104. This can also be realized by switching processing depending on whether or not the instruction sequence being processed is instruction data to be compressed.

Further, for example, in this embodiment, a jump destination instruction for a rewritten jump instruction is searched when the instruction is executed for the first time. A method may be adopted in which an instruction is added to parameters of another instruction to be rewritten.
In this case, the parameter for the jump-in instruction in this embodiment is a jump offset value,
Jump offset value in uncompressed instruction sequence It is necessary to describe the search result by dividing it into jump offset values in the compressed instruction sequence, and it may be necessary to increase the size of the parameter part.

In the instruction corresponding to the jump-out instruction in this embodiment, when the jump destination exists in the compressed instruction target instruction sequence, an offset value (compressed) within the compression target instruction sequence in which the jump destination instruction is described. The target instruction string offset value) is required, and the instruction string length of the compression target instruction string connecting the compressed Taisho instruction string describing the jump instruction and the compression target instruction string describing the jump destination instruction ( The compression target instruction sequence offset value) is also required as a parameter.
These two types of parameters have different values depending on the content and position of the instruction data to which they are applied even if the compression target instruction sequence in which the jump instruction is described is the same. Included as an instruction parameter usually causes a reduction in compression ratio.
Therefore, it is necessary to describe the value as a parameter of the meta instruction that replaces the compression target instruction sequence in which the jump instruction is described.
For example, the number of jump-out instructions that exist internally as parameters of the meta instruction, the offset value in the compression target instruction sequence and the offset value between the compression target instruction sequences for the jump-out instruction in the order of appearance of the jump-out instruction are used as parameters. It is necessary to define the meta-instruction to have it.
On the other hand, no parameters are particularly necessary for the jump-out instruction.

As described above, in the present embodiment,
A jump instruction exists in the instruction or instruction in the instruction sequence that has been replaced with the meta instruction in the instruction data compression means, and the jump destination jumps beyond the range of the instruction or instruction string registered in the meta instruction dictionary data. In addition, when the instruction at the jump destination is not an instruction registered in the meta instruction or an instruction in the instruction sequence, it has been explained that a jump instruction outside meta instruction is provided to replace the jump instruction with a jump instruction outside the meta instruction. .

In the present embodiment,
In the instruction data compression means, if there is an instruction sequence that can be replaced with at least one meta instruction between the jump instruction and the jump destination instruction for the jump instruction, a jump offset value as a parameter of the jump instruction is set. Explained rewriting.
That is, since the length of the portion rewritten by the meta instruction is shortened, it is possible to solve the problem that the jump to the correct jump destination cannot be made unless the jump offset value is rewritten.

In the present embodiment,
There is a jump instruction in the instruction or instruction in the instruction replaced by the meta instruction in the instruction data compression means, the jump destination jumps exceeding the range of the instruction or instruction sequence registered in the meta instruction dictionary data, In addition, it has been described that an inter-meta-instruction jump conversion unit that replaces a jump instruction with a meta-instruction jump instruction when the jump destination instruction is registered in the meta-instruction has been described.

In the present embodiment,
When the instruction or instruction in the instruction string that has not been replaced by the meta instruction in the instruction data compression means is a jump instruction, and the jump destination is an instruction registered in the meta instruction dictionary data or a specific instruction in the instruction string, It has been described that a meta-instruction jump conversion means for replacing the jump instruction with a meta-instruction jump instruction is provided.

Finally, a hardware configuration example of the information processing terminal device 100 shown in the first to sixth embodiments will be described.
FIG. 49 is a diagram illustrating an example of hardware resources of the information processing terminal device 100 described in the first to sixth embodiments.
49 is merely an example of the hardware configuration of the information processing terminal device 100, and the hardware configuration of the information processing terminal device 100 is not limited to the configuration illustrated in FIG. There may be.
Here, it is assumed that one information processing terminal device 100 includes the functions of the central control device 101 to the instruction data storage device 106. When each is realized by a plurality of information processing terminal devices, FIG. 49 means a hardware configuration example of at least the instruction data compression device 103 and the compressed instruction data execution device 104.

In FIG. 49, the information processing terminal device 100 includes a CPU 911 (also referred to as a central processing unit, a central processing unit, a processing unit, an arithmetic unit, a microprocessor, a microcomputer, and a processor) that executes a program.
The CPU 911 is connected to, for example, a ROM (Read Only Memory) 913, a RAM (Random Access Memory) 914, a communication board 915, a display device 901, a keyboard 902, a mouse 903, and a magnetic disk device 920 via a bus 912. Control hardware devices.
Further, the CPU 911 may be connected to an FDD 904 (Flexible Disk Drive), a compact disk device 905 (CDD), a printer device 906, and a scanner device 907. Further, instead of the magnetic disk device 920, a storage device such as an SSD (Solid State Drive), an optical disk device, or a memory card (registered trademark) read / write device may be used.
The RAM 914 is an example of a volatile memory. The storage media of the ROM 913, the FDD 904, the CDD 905, and the magnetic disk device 920 are an example of a nonvolatile memory. These are examples of a storage device or a storage unit.
The “source code storage device 105”, “instruction data storage device 106”, “instruction compression time information storage unit 1037”, and “instruction execution time information storage unit 1042” described in the first to sixth embodiments are the RAM 914 and the magnetic disk device 920. Etc.
A communication board 915, a keyboard 902, a mouse 903, a scanner device 907, an FDD 904, and the like are examples of input devices.
The communication board 915, the display device 901, the printer device 906, and the like are examples of output devices.

  The communication board 915 is connected to a LAN (Local Area Network), the Internet, a WAN (Wide Area Network), a SAN (Storage Area Network), etc., for example.

The magnetic disk device 920 stores an operating system 921 (OS), a window system 922, a program group 923, and a file group 924.
The programs in the program group 923 are executed by the CPU 911 using the operating system 921 and the window system 922.

The RAM 914 temporarily stores at least part of the operating system 921 program and application programs to be executed by the CPU 911.
The RAM 914 stores various data necessary for processing by the CPU 911.

The ROM 913 stores a BIOS (Basic Input Output System) program, and the magnetic disk device 920 stores a boot program.
When the information processing terminal device 100 is activated, the BIOS program in the ROM 913 and the boot program in the magnetic disk device 920 are executed, and the operating system 921 is activated by the BIOS program and the boot program.

  The program group 923 includes “˜unit” in the description of the first to sixth embodiments (except for “command compression time information storage unit 1037” and “command execution time information storage unit 1042”), and “˜means”. The program which performs the function demonstrated as is memorize | stored. The program is read and executed by the CPU 911.

In the file group 924, in the description of the first to sixth embodiments, “determination of”, “calculation of”, “derivation of”, “calculation of”, “comparison of”, “evaluation of” ”,“ Update of ”,“ setting of ”,“ set of ”,“ registration of ”,“ selection of ”,“ search for ”, etc. Data, signal values, variable values, and parameters are stored as items of “˜file” and “˜database”.
The “˜file” and “˜database” are stored in a recording medium such as a disk or a memory.
Information, data, signal values, variable values, and parameters stored in a storage medium such as a disk or memory are read out to the main memory or cache memory by the CPU 911 via a read / write circuit.
The read information, data, signal value, variable value, and parameter are used for CPU operations such as extraction, search, reference, comparison, calculation, calculation, processing, editing, output, printing, and display.
Information, data, signal values, variable values, and parameters are stored in the main memory, registers, cache memory, and buffers during the CPU operations of extraction, search, reference, comparison, calculation, processing, editing, output, printing, and display. It is temporarily stored in a memory or the like.
In addition, the arrows in the flowcharts described in the first to sixth embodiments mainly indicate input / output of data and signals.
Data and signal values are recorded on a recording medium such as a memory of the RAM 914, a flexible disk of the FDD 904, a compact disk of the CDD 905, a magnetic disk of the magnetic disk device 920, other optical disks, a mini disk, and a DVD.
Data and signals are transmitted online via a bus 912, signal lines, cables, or other transmission media.

In addition, in the description of the first to sixth embodiments, what is described as “to part” and “to means” may be “to circuit”, “to device”, and “to device”. It may be “˜step”, “˜procedure”, “˜processing”.
That is, the information processing terminal device 100 (command data compression device 103, compressed command data execution device 104) according to the present invention is grasped as a method invention by the steps, procedures, and processes shown in the flowcharts described in the first to sixth embodiments. be able to.
In addition, what is described as “˜unit” and “˜means” may be realized by firmware stored in the ROM 913.
Alternatively, it may be implemented only by software, or only by hardware such as elements, devices, substrates, and wirings, by a combination of software and hardware, or by a combination of firmware.
Firmware and software are stored as programs in a recording medium such as a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, and a DVD.
The program is read by the CPU 911 and executed by the CPU 911.
That is, the program causes the computer to function as “to part” and “to means” in the first to sixth embodiments. Alternatively, the procedures and methods of “to part” and “to means” in the first to sixth embodiments are executed by a computer.

As described above, the information processing terminal device 100 shown in the first to sixth embodiments includes a CPU that is a processing device, a memory that is a storage device, a magnetic disk, a keyboard that is an input device, a mouse, a communication board, and a display device that is an output device, A computer including a communication board and the like.
As described above, the functions indicated as “˜unit” and “˜means” are realized by using these processing devices, storage devices, input devices, and output devices.

  DESCRIPTION OF SYMBOLS 100 Information processing terminal device, 101 Central control apparatus, 102 Instruction data generation apparatus, 103 Instruction data compression apparatus, 104 Compression instruction data execution apparatus, 105 Source code storage apparatus, 106 Instruction data storage apparatus, 1031 Instruction data storage apparatus access part, 1032 Instruction Interpretation / Compression Unit, 1033 Same Command Sequence Appearance Count Count Unit, 1034 Compression Target Command Table Generation Unit, 1035 Command Data Compression Conversion Unit, 1036 Meta-Instruction Dictionary Data Generation Unit, 1037 Instruction Compression Time Information Storage Unit, 1041 Command Data Storage device access section, 1042 Instruction execution time information storage section, 1043 Processing target instruction position storage section, 1044 Processing target instruction position saving section, 1045 Meta instruction dictionary data holding section, 1046 Instruction sequence interpretation / execution section, 1047 Meta instruction interpretation / Execution part.

Claims (31)

A program in a machine language including a plurality of instruction sequences, and a program input unit for inputting a program having a different data length for each instruction sequence;
An instruction replacement unit that analyzes each instruction sequence of the program input by the program input unit and replaces the instruction sequence satisfying a predetermined condition with a meta-instruction having a smaller data amount than the instruction sequence;
A meta-instruction dictionary data generation unit that generates meta-instruction dictionary data in which an instruction sequence replaced with the meta-instruction is indicated in association with the meta-instruction;
A program output unit that outputs a program in which an instruction sequence is replaced with a meta-instruction by the instruction rewriting unit and a meta-instruction dictionary data generated by the meta-instruction dictionary data generation unit in association with each other. Program compressor. The program input unit includes:
Input a program including a plurality of instruction sequences in which an instruction code indicating an instruction and a parameter value of 0 bytes or more to be an instruction of the instruction code are combined;
The instruction replacement unit includes:
2. The program according to claim 1, wherein two or more instruction sequences having a common combination of an instruction code and a parameter value are extracted in the program, and each of the extracted two or more instruction sequences is replaced with a common meta-instruction. Program compressor. The instruction replacement unit includes:
The number of instruction sequences having a common combination of instruction code and parameter value in the program is counted, and the total data amount of the instruction sequence in the program is calculated from the counted number and the data amount of the instruction sequence. When the sum of the meta instruction data amount and the meta instruction dictionary data data amount is calculated and the sum of the meta instruction data amount and the meta instruction dictionary data data amount is smaller than the total data amount of the instruction sequence, the instruction sequence The program compression apparatus according to claim 2, wherein: is replaced with a meta instruction. The program input unit includes:
As the instruction code, a program including an instruction sequence in which an instruction identification number for identifying an instruction is described is input,
The instruction replacement unit includes:
4. The program compression apparatus according to claim 2, wherein an instruction sequence included in the program is replaced with an instruction identification number assigned for a meta-instruction in the instruction identification number number system. The program input unit includes:
As the instruction code, a program including an instruction sequence in which an instruction identification number for identifying an instruction is described is input,
The instruction replacement unit includes:
The instruction sequence included in the program is replaced with an unused instruction identification number that is not used in a plurality of instruction sequences included in the program. Program compressor. The program input unit includes:
As at least a part of the plurality of instruction sequences, two or more common instruction different data type instruction sequences having different instruction codes because the instruction contents of the instruction codes are common but the data types of the parameter values are different are included. Enter the program, and further input the data type information indicating the data type of the parameter value for each common instruction different data type instruction sequence,
The instruction replacement unit includes:
In the program, two or more common instruction different data type instruction sequences having a common combination of the instruction content of the instruction code and the parameter value are extracted, and each of the extracted two or more common instruction different data type instruction sequences is used as a common meta-data. Replaced with an instruction,
The meta-instruction dictionary data generation unit
In association with the meta-instruction, generate a meta-instruction dictionary data indicating a common instruction different data type instruction sequence replaced with the meta-instruction,
The program output unit includes:
A program in which a common instruction different data type instruction sequence is replaced by a meta instruction by the instruction rewriting unit, meta instruction dictionary data generated by the meta instruction dictionary data generation unit, and the data type information are output in association with each other. The program compression apparatus according to any one of claims 2 to 5, wherein The program input unit includes:
As a part of the plurality of instruction sequences, an address management instruction code for managing a memory address in which a parameter value is stored during execution of a program and an addressing parameter value in which the memory address is specified by an offset expression are combined Enter a program that includes the address management instruction sequence and assigns the same memory size to all parameter values regardless of the data type.
The instruction replacement unit includes:
Extracting two or more address management instruction sequences having a common combination of address management instruction code and addressing parameter value in the program, and replacing each of the extracted two or more address management instruction sequences with a common meta-instruction;
The meta-instruction dictionary data generation unit
In association with the meta-instruction, generates meta-instruction dictionary data indicating an address management instruction sequence replaced with the meta-instruction,
The program output unit includes:
3. The program in which an address management instruction sequence is replaced with a meta instruction by the instruction rewriting unit and the meta instruction dictionary data generated by the meta instruction dictionary data generation unit are output in association with each other. 7. The program compression apparatus according to any one of 6. The program input unit includes:
As a part of the plurality of instruction sequences, an address management instruction code for managing a memory address in which a parameter value is stored during execution of a program and an addressing parameter value in which the memory address is specified by an offset expression are combined Enter a program that includes the address management instruction sequence and assigns the same memory size to all parameter values regardless of the data type.
The instruction replacement unit includes:
The address specification parameter value of the address management instruction included in the specific instruction sequence group is rewritten to match the address specification parameter value of the address management instruction included in the other instruction sequence group, and the instruction sequence in the specific instruction sequence group And a sequence of instruction sequences in the other instruction sequence group, and the specific instruction sequence group and the other instruction sequence group are replaced with a common meta-instruction,
The meta-instruction dictionary data generation unit
In association with the meta-instruction, generates meta-instruction dictionary data indicating an instruction sequence group replaced with the meta-instruction,
The program output unit includes:
8. The program in which an instruction sequence group is replaced by a meta-instruction by the instruction rewriting unit and the meta-instruction dictionary data generated by the meta-instruction dictionary data generation unit are output in association with each other. The program compression apparatus in any one of. The instruction replacement unit includes:
Assign a common meta instruction to a common instruction sequence existing in two or more programs, and replace the instruction sequence of each program with a meta instruction.
The meta-instruction dictionary data generation unit
9. The program according to claim 1, wherein one meta-instruction dictionary data used in common for two or more programs is generated based on a result of replacement by the instruction replacement unit with a meta-instruction. Compression device. The instruction replacement unit includes:
The program is divided into a plurality of subsets, and the instruction sequence is replaced with a meta-instruction in a subset unit.
The meta-instruction dictionary data generation unit
10. The program compression apparatus according to claim 1, wherein meta instruction dictionary data is generated for each subset, and an identifier of the corresponding meta instruction dictionary data is added to each subset. The instruction replacement unit includes:
Assign the same meta-instruction to two or more instruction sequences whose description contents in one program are different from each other, and replace the instruction sequence with a meta-instruction,
The meta-instruction dictionary data generation unit
2. Two or more meta instruction dictionary data in which different instruction sequences are associated with the same meta instruction, and an identifier of the corresponding meta instruction dictionary data is added to each instruction sequence. The program compression apparatus according to any one of 10. The program input unit includes:
As a part of the plurality of instruction sequences, a program including a jump instruction sequence describing a jump instruction to a predetermined jump destination instruction sequence is input,
The instruction replacement unit includes:
A replacement instruction that will be replaced with a meta-instruction after determining whether or not to replace with a meta-instruction for each instruction sequence and specifying the instruction sequence to be replaced with a meta-instruction and before replacing the instruction sequence to be replaced with a meta-instruction Analyzing the positional relationship between the sequence group, jump instruction sequence, and jump destination instruction sequence, and if the positional relationship among the replacement instruction sequence group, jump instruction sequence, and jump destination instruction sequence meets a predetermined condition, 12. The program compression apparatus according to claim 1, wherein a correction process is performed, and the instruction sequence to be replaced is replaced with a meta instruction after the correction process for the jump instruction sequence. The instruction replacement unit includes:
As a result of analysis,
If the jump instruction sequence is included in the replacement instruction sequence group and the jump destination instruction sequence is not included in the same replacement instruction sequence group,
If the jump instruction sequence is not included in the replacement instruction sequence group and the jump destination instruction sequence is included in the replacement instruction sequence group,
When both the jump instruction sequence and the jump destination instruction sequence are not included in the replacement instruction sequence group, and one or more replacement instruction sequence groups exist between the jump instruction sequence and the jump destination instruction sequence,
In at least one of cases where the jump instruction sequence is included in the replacement instruction sequence group and the jump destination instruction sequence is included in a replacement instruction sequence group different from the replacement instruction sequence group of the jump instruction sequence, correction processing for the jump instruction sequence is performed. 13. The program compression apparatus according to claim 12, wherein the program compression apparatus is performed. The program input unit includes:
Enter the program containing the jump instruction sequence in which the offset value up to the jump destination instruction sequence is described as the jump offset value.
The instruction replacement unit includes:
If the jump instruction sequence is included in the replacement instruction sequence group and the jump destination instruction sequence is not included in the same replacement instruction sequence group,
The jump instruction string is included in the replacement instruction string group, the jump destination instruction string is not included in the same replacement instruction string group, and the jump offset value of the jump instruction string is changed to the jump destination by replacing the replacement instruction string group with the meta instruction. 14. The program compression apparatus according to claim 13, wherein a jump-out notification for notifying the execution unit of the program that the instruction sequence is not indicated is described in the jump instruction sequence. The program input unit includes:
Enter the program containing the jump instruction sequence in which the offset value up to the jump destination instruction sequence is described as the jump offset value.
The instruction replacement unit includes:
When the jump instruction sequence is not included in the replacement instruction sequence group and the jump destination instruction sequence is included in the replacement instruction sequence group,
The jump instruction sequence is not included in the replacement instruction sequence group, the jump destination instruction sequence is included in the replacement instruction sequence group, and the jump offset value of the jump instruction sequence is replaced by the meta instruction in the replacement instruction sequence group. 15. The program compression apparatus according to claim 13 or 14, wherein a jump-in notification for notifying the execution apparatus of the program that the program is not in a state is described in the jump instruction string. The program input unit includes:
Enter the program containing the jump instruction sequence in which the offset value up to the jump destination instruction sequence is described as the jump offset value.
The instruction replacement unit includes:
When both the jump instruction sequence and the jump destination instruction sequence are not included in the replacement instruction sequence group, and one or more replacement instruction sequence groups exist between the jump instruction sequence and the jump destination instruction sequence,
Based on the total data amount of the replacement instruction sequence group existing between the jump instruction sequence and the jump destination instruction sequence, and the total data amount of the meta-instruction that will replace the replacement instruction sequence group, the jump of the jump instruction sequence The program compression apparatus according to claim 13, wherein the offset value is changed. A program input unit for inputting a program in machine language in which the instruction sequence is replaced by a meta-instruction having a smaller amount of data than the instruction sequence;
A meta-instruction dictionary data input unit that inputs meta-instruction dictionary data indicating an instruction sequence replaced with the meta-instruction in association with the meta-instruction;
A program position designation unit for designating a position in the program to be executed while moving the designated position when the program is executed;
A program location saving unit that temporarily saves information on a prescribed location in the program when the program is executed;
It is determined whether or not the program content at the designated position designated by the program location designation unit is a meta instruction, and if the program content at the designated position is an instruction sequence that is not a meta instruction, the instruction sequence at the designated position is executed. When the program content at the designated position is a meta instruction, information on the position immediately after the meta instruction is stored in the program position saving unit and associated with the meta instruction in the meta instruction dictionary data. And a program execution unit that executes a sequence of instructions. The program position saving unit includes:
While the program execution unit is executing an instruction sequence associated with a metainstruction in the metainstruction dictionary data, information on a position immediately after the metainstruction is stored, and the metainstruction is stored by the program execution unit. 18. The program execution device according to claim 17, wherein when the instruction sequence associated with the meta-instruction in the dictionary data is completed, the stored position information is deleted. The program position saving unit includes:
When the execution of the instruction sequence associated with the meta-instruction in the meta-instruction dictionary data is completed by the program execution unit, the information on the stored position is notified to the program position designation unit,
The program position specifying unit includes:
19. The program execution apparatus according to claim 17, wherein the position notified by the program position saving unit is designated as a position in a program that is to be executed next by the program execution unit. The program execution device includes:
Whether or not information other than the initial value is stored in the program position saving unit, and / or whether or not the instruction sequence indicated in the meta instruction dictionary data is repeatedly executed by the number of consecutive meta instructions included in the program. 20. The program execution device according to claim 17, wherein it is possible to determine whether or not the execution of the instruction sequence replaced with the meta-instruction is completed. The program input unit includes:
The instruction content of the instruction code and the parameter value targeted by the instruction code are common to each other, but the data type of the parameter value is different. Enter the program that has been replaced by the instruction, and enter the data type information that indicates the data type of the parameter value for each common instruction different data type instruction sequence,
The meta-instruction dictionary data input unit is
In association with the meta-instruction, input meta-instruction dictionary data indicating a common instruction different data type instruction string replaced with the meta-instruction,
The program execution unit is
The parameter of the common instruction different data type instruction sequence replaced by the meta instruction when the program content at the specified position specified by the program position specifying unit is a meta instruction replacing the common instruction different data type instruction sequence The data type of the value is determined by referring to the data type information, and the common instruction different data type instruction sequence associated with the meta instruction in the meta instruction dictionary data is associated with the data type of the determined parameter value. The program execution device according to claim 17, wherein the program execution device is executed. The program input unit includes:
Enter a program that is divided into a plurality of subsets and shows the identifier of the corresponding meta-instruction dictionary data for each subset,
The meta-instruction dictionary data input unit is
Enter multiple meta-instruction dictionary data generated for each subset,
The program execution unit is
The program execution according to any one of claims 17 to 21, wherein when executing the program, for each subset, the corresponding meta-instruction dictionary data is referred to according to an identifier indicated in the subset. apparatus. The program input unit includes:
An instruction sequence group including two or more instruction sequences is replaced with a meta instruction, and a jump instruction sequence in which a jump instruction to a predetermined jump destination instruction sequence is described in the replacement instruction sequence group replaced with a meta instruction. , And enter the program in which the offset value to the jump destination instruction sequence is described as the jump offset value in the jump instruction sequence,
The program execution unit is
When executing the jump instruction sequence, it is determined whether or not a predetermined jump-out notification is described in the jump instruction sequence, and when the jump-out notification is described in the jump instruction sequence, the jump instruction sequence It is determined that the jump offset value does not indicate the jump destination instruction sequence by replacing the meta instruction with the meta instruction, and the program contents after the jump instruction sequence are analyzed to search the jump destination instruction sequence of the jump instruction sequence The program execution device according to any one of claims 17 to 22, wherein the program jumps to the searched jump destination instruction sequence and executes the jump destination instruction sequence. The program execution unit is
When the jump-out notification is described in the jump instruction sequence, a jump offset value of the jump instruction sequence, an instruction length from the jump instruction sequence to the end of the replacement instruction sequence group, and the replacement instruction sequence group 24. The program execution apparatus according to claim 23, wherein an analysis based on an instruction length of an instruction sequence after the meta-instruction is performed to search a jump destination instruction sequence of the jump instruction sequence. The program execution unit is
When another meta-instruction exists after the meta-instruction of the replacement instruction string group, the instruction length of the instruction string corresponding to the other meta-instruction is derived by referring to the meta-instruction dictionary data. The program execution device according to claim 24. The program input unit includes:
An instruction string group including two or more instruction strings is replaced with a meta instruction, and a jump instruction string in which a jump instruction to a predetermined jump destination instruction string is described is included outside the meta instruction. Is an offset value up to the jump destination instruction sequence is described as a jump offset value, and a program included in the replacement instruction sequence group in which the jump destination instruction sequence of the jump instruction sequence is replaced with the meta instruction is input,
The program execution unit is
When executing the jump instruction sequence, it is determined whether or not a predetermined jump-in notification is described in the jump instruction sequence, and when the jump-in notification is described in the jump instruction sequence, the jump instruction sequence It is determined that the jump offset value does not point to the jump destination instruction sequence by replacing the jump destination instruction sequence with the meta instruction, and the program contents after the jump instruction sequence are analyzed to determine the jump of the jump instruction sequence. The program execution device according to any one of claims 17 to 25, wherein a program is executed by searching for a destination instruction sequence, jumping to the searched jump destination instruction sequence, and executing the jump destination instruction sequence. The program execution unit is
When the jump-in notification is described in the jump instruction sequence, an analysis based on the jump offset value of the jump instruction sequence and the instruction length of the instruction sequence after the jump instruction sequence is performed, and the jump instruction sequence 27. The program execution device according to claim 26, wherein a jump destination instruction sequence is searched. The program execution unit is
28. The program according to claim 27, wherein when a meta instruction is present after the jump instruction sequence, an instruction length of an instruction sequence corresponding to the meta instruction is derived with reference to the meta instruction dictionary data. Execution device. The program input unit includes:
An instruction example in which an instruction code indicating an instruction and a parameter value that is a target of an instruction of the instruction code are combined is replaced with a meta instruction or is not replaced with a meta instruction.
The program execution part
The data type of the parameter value of the instruction sequence is determined when executing the instruction sequence, and the instruction of the instruction code of the instruction sequence is executed corresponding to the determined data type of the parameter value. The program execution device according to any one of 17 to 28. A program in a machine language including a plurality of instruction sequences, and a program input process for inputting a program having a different data length for each instruction sequence;
An instruction replacement process for analyzing each instruction sequence of the program input by the program input process and replacing an instruction sequence satisfying a predetermined condition with a meta-instruction having a smaller data amount than the instruction sequence;
A meta-instruction dictionary data generation process for generating meta-instruction dictionary data indicating an instruction sequence replaced with the meta-instruction in association with the meta-instruction;
Causing a computer to execute a program output process in which a program in which an instruction sequence is replaced by a meta-instruction by the instruction rewriting process and a meta-instruction dictionary data generated by the meta-instruction dictionary data generation process are output in association with each other. A featured program. A program input process for inputting a program in machine language in which the instruction sequence is replaced with a meta-instruction having a smaller amount of data than the instruction sequence;
A meta-instruction dictionary data input process for inputting meta-instruction dictionary data indicating an instruction sequence replaced with the meta-instruction in association with the meta-instruction;
A program position specifying process for specifying a position in the program to be executed while moving the position to be specified when executing the program;
A program position saving process for temporarily storing information on a predetermined position in the program when the program is executed;
It is determined whether or not the program content at the specified position specified by the program position specifying process is a meta instruction, and if the program content at the specified position is an instruction sequence that is not a meta instruction, the instruction sequence at the specified position is executed. When the program content at the designated position is a meta instruction, information on the position immediately after the meta instruction is stored in the program position saving process, and is associated with the meta instruction in the meta instruction dictionary data. A program for causing a computer to execute program execution processing for executing a sequence of instructions.

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