JP2011238781A - Solid-state image pickup device and manufacturing method for the same - Google Patents

Solid-state image pickup device and manufacturing method for the same Download PDF

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JP2011238781A
JP2011238781A JP2010109182A JP2010109182A JP2011238781A JP 2011238781 A JP2011238781 A JP 2011238781A JP 2010109182 A JP2010109182 A JP 2010109182A JP 2010109182 A JP2010109182 A JP 2010109182A JP 2011238781 A JP2011238781 A JP 2011238781A
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Kosaku Saeki
幸作 佐伯
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Panasonic Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14638Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14665Imagers using a photoconductor layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K39/00Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group H10K30/00
    • H10K39/30Devices controlled by radiation
    • H10K39/32Organic image sensors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/30Coordination compounds
    • H10K85/311Phthalocyanine
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/60Organic compounds having low molecular weight
    • H10K85/615Polycyclic condensed aromatic hydrocarbons, e.g. anthracene
    • H10K85/621Aromatic anhydride or imide compounds, e.g. perylene tetra-carboxylic dianhydride or perylene tetracarboxylic di-imide

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To enhance image quality and microfabrication for a pixel characteristic of a solid-state image pickup device.SOLUTION: A solid-state image pickup device has a semiconductor substrate 100 having a pixel region and a peripheral region, and plural diffusion layers 102, 103 formed in the pixel region of the semiconductor substrate 100 and arranged in a matrix form. The solid-state image pickup device further has plural wiring layers 107 formed on the semiconductor substrate 100, plural pixel-side electrodes 108 which are formed on the plural wiring layers so as to be connected to the plural diffusion layers respectively and spaced from one another, a light-shielding film 111 formed in each gap between the plural pixel-side electrodes, an organic photoelectric conversion film 109 formed so as to cover the plural pixel-side electrodes and the light-shielding film, and a transparent electrode 110 which is formed on the organic photoelectric conversion film 109 and transmits visible light therethrough.

Description

本発明は、入射光を光電変換して信号電荷を生成する光電変換膜を備えた固体撮像素子及びその製造方法に関する。   The present invention relates to a solid-state imaging device including a photoelectric conversion film that photoelectrically converts incident light to generate a signal charge, and a manufacturing method thereof.

従来、CCD(charge coupled device:電荷結合素子)イメージセンサ又はCMOS(complementary metal-oxide-semiconductor:相補型金属酸化物半導体)イメージセンサに代表される単板イメージセンサは、行列状に配置された光電変換を行う画素(フォトダイオード)の上に3種類又は4種類の色フィルタをモザイク状に設けることにより、各色フィルタに対応した色信号が出力される。出力された色信号は、信号処理されてカラー画像が生成される。   Conventionally, a single-plate image sensor represented by a charge coupled device (CCD) image sensor or a complementary metal-oxide-semiconductor (CMOS) image sensor has photoelectric elements arranged in a matrix. By providing three or four types of color filters in a mosaic pattern on the pixel (photodiode) to be converted, a color signal corresponding to each color filter is output. The output color signal is subjected to signal processing to generate a color image.

しかし、モザイク状の色フィルタを設けた撮像素子は、原色の色フィルタの場合、およそ入射光の3分の2が色フィルタで吸収されるため、光利用効率が悪く感度が低いという欠点がある。また、各画素で1色の色信号しか得られないため解像度も悪く、特に偽色が目立つ。この偽色を回避するために、光学的ローパスフィルタを必要とし、このフィルタによる光損失も生じる。   However, in the case of an image sensor provided with a mosaic color filter, in the case of a primary color filter, approximately two-thirds of incident light is absorbed by the color filter, so that the light use efficiency is low and the sensitivity is low. . Further, since only one color signal can be obtained for each pixel, the resolution is poor, and false colors are particularly noticeable. In order to avoid this false color, an optical low-pass filter is required, and light loss due to this filter also occurs.

そこで、斯かる問題を克服すべく、基板上に形成された配線の上に有機材からなる光電変換膜が形成される構造を有する撮像素子(以下、有機光導電型撮像素子ともいう。)が研究され開発されている(例えば、下記の特許文献1を参照。)。   Therefore, in order to overcome such a problem, an imaging device (hereinafter also referred to as an organic photoconductive imaging device) having a structure in which a photoelectric conversion film made of an organic material is formed on a wiring formed on a substrate. It has been studied and developed (for example, see Patent Document 1 below).

図7に示すように、従来の有機光導電型撮像素子は、例えば、光入射面から順次、赤(R)、緑(G)及び青(B)の各入射光によって信号電荷を発生する光電変換膜19を重ねた受光部を備えている。さらに、図示はしていないが、各受光部ごと各光電変換膜19で発生した信号電荷を独立に読み出すことができる信号読み出し回路が設けられている。   As shown in FIG. 7, the conventional organic photoconductive imaging device has, for example, a photoelectric that generates a signal charge by each incident light of red (R), green (G), and blue (B) sequentially from the light incident surface. A light receiving portion on which the conversion film 19 is stacked is provided. Further, although not shown, a signal readout circuit is provided that can independently read out signal charges generated in each photoelectric conversion film 19 for each light receiving unit.

斯かる構造の有機光導電型撮像素子の場合、入射光が殆ど光電変換されて読み出され、可視光の利用効率は80%に近く、しかも各受光部でR、G及びBの3色の色信号が得られるため、高感度で且つ高解像度(偽色が目立たない)の良好な画像を生成できる。   In the case of an organic photoconductive imaging device having such a structure, incident light is almost photoelectrically converted and read out, the utilization efficiency of visible light is close to 80%, and each of the light receiving portions has three colors of R, G, and B. Since a color signal is obtained, it is possible to generate a good image with high sensitivity and high resolution (false colors are not conspicuous).

このように従来の有機光導電型撮像素子は、有機膜で形成された光電変換膜19の上に透明電極11が形成され、光電変換膜19の下に画素側電極18が形成されている。   As described above, in the conventional organic photoconductive imaging device, the transparent electrode 11 is formed on the photoelectric conversion film 19 formed of an organic film, and the pixel-side electrode 18 is formed below the photoelectric conversion film 19.

なお、光電変換膜19は、InGaN系、InAlN系、InAlP系又はInGaAlP系の無機半導体(化合物半導体)も考えられるが、これらは成膜温度が高いため、膜の形成時に有機材料が灰化してしまうため、ここでは有機材料膜に限定されている。   The photoelectric conversion film 19 may be an InGaN-based, InAlN-based, InAlP-based, or InGaAlP-based inorganic semiconductor (compound semiconductor), but since these have a high film-forming temperature, the organic material is ashed during film formation. Therefore, it is limited to the organic material film here.

特許文献1においては、画素側電極18と光電変換膜19との構造が最適化されている。すなわち、特許文献1に記載された有機光導電型撮像素子においては、画素側電極18の隙間に関して、信号電荷を効率的に読み出すことができるようにするため、画素側電極18同士の隙間が3μm以下に設定されている。このように各画素側電極18を、それぞれ隙間を設けて配置することにより、固体撮像素子としての残像の抑制を図ろうとしている。   In Patent Document 1, the structures of the pixel side electrode 18 and the photoelectric conversion film 19 are optimized. That is, in the organic photoconductive imaging device described in Patent Document 1, with respect to the gap between the pixel side electrodes 18, the gap between the pixel side electrodes 18 is 3 μm so that signal charges can be efficiently read out. It is set as follows. In this way, the pixel-side electrodes 18 are arranged with a gap between each other so as to suppress the afterimage as a solid-state imaging device.

特開2009−147147号公報JP 2009-147147 A

しかしながら、前記従来の有機光導電型固体撮像素子のように、画素側電極18同士の間に隙間をあけると、光電変換膜19で吸収されなかった入射光20が画素側電極18の隙間を通して回折される。回折光は、隣接画素の配線領域に侵入し、配線17を伝播してシリコン基板10に形成された読み出し拡散領域12に入り込む。入り込んだ回折光によって、読み出し拡散領域12に光電変換が生じることにより色再現性が悪化し、すなわち隣接画素への光の漏れ込み、カラー撮像素子の場合は混色が生じるという問題がある。   However, when a gap is formed between the pixel side electrodes 18 as in the conventional organic photoconductive solid-state imaging device, the incident light 20 that has not been absorbed by the photoelectric conversion film 19 is diffracted through the gap between the pixel side electrodes 18. Is done. The diffracted light enters the wiring region of the adjacent pixel, propagates through the wiring 17, and enters the readout diffusion region 12 formed in the silicon substrate 10. The incident diffracted light causes photoelectric conversion in the readout diffusion region 12 to deteriorate the color reproducibility. That is, there is a problem that light leaks to adjacent pixels and color mixing occurs in the case of a color image sensor.

本発明は、前記の問題を解決し、固体撮像素子の画素特性に対する高画質化と微細化とを向上できるようにすることを目的とする。   SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described problems and improve the image quality and the miniaturization of the pixel characteristics of a solid-state imaging device.

前記の目的を達成するため、本発明は、固体撮像素子を、画素側電極(下部電極)同士の間に設けられた隙間に遮光膜を設ける構成とする。   In order to achieve the above object, according to the present invention, the solid-state imaging device has a configuration in which a light shielding film is provided in a gap provided between pixel side electrodes (lower electrodes).

具体的に、本発明に係る固体撮像素子は、画素領域と周辺領域とを有する半導体基板と、半導体基板の画素領域に形成され、行列状に配置された複数の拡散層と、半導体基板の上に形成された複数の配線層と、複数の配線層の上に、複数の拡散層とそれぞれ接続されると共に互いに間隔をおいて形成された複数の下部電極と、複数の下部電極のそれぞれの間に形成された遮光膜と、複数の下部電極及び遮光膜を覆うように形成された光電変換膜と、光電変換膜の上に形成され、可視光を透過する上部電極とを備えている。   Specifically, a solid-state imaging device according to the present invention includes a semiconductor substrate having a pixel region and a peripheral region, a plurality of diffusion layers formed in a pixel region of the semiconductor substrate and arranged in a matrix, and an upper surface of the semiconductor substrate. A plurality of lower electrodes formed on the plurality of wiring layers, connected to the plurality of diffusion layers and spaced apart from each other, and between the plurality of lower electrodes A photoelectric conversion film formed so as to cover the plurality of lower electrodes and the light shielding film, and an upper electrode formed on the photoelectric conversion film and transmitting visible light.

本発明の固体撮像素子によると、光電変換膜は、複数の下部電極と該下部電極のそれぞれの間に形成された遮光膜とを覆うように形成されているため、下部電極同士の間の隙間から入射光の回折光が半導体基板にまで入り込むことがない。これにより、隣接画素への光の漏れ込みが防止されるので、固体撮像素子における画素特性の高画質化と微細化とを両立できる。   According to the solid-state imaging device of the present invention, the photoelectric conversion film is formed so as to cover the plurality of lower electrodes and the light shielding film formed between each of the lower electrodes. Diffracted light of incident light does not enter the semiconductor substrate. This prevents light from leaking into adjacent pixels, so that both high image quality and miniaturization of pixel characteristics in the solid-state imaging device can be achieved.

本発明の固体撮像素子において、遮光膜は、ブラックレジスト材からなっていてもよい。   In the solid-state imaging device of the present invention, the light shielding film may be made of a black resist material.

この場合に、ブラックレジスト材の膜厚は、500nm以上且つ2000nm以下であることが好ましい。   In this case, the film thickness of the black resist material is preferably 500 nm or more and 2000 nm or less.

本発明の固体撮像素子において、光電変換膜は、有機材料からなっていてもよい。   In the solid-state imaging device of the present invention, the photoelectric conversion film may be made of an organic material.

本発明の固体撮像素子において、下部電極は、アルミニウムが主成分であってもよい。   In the solid-state imaging device of the present invention, the lower electrode may be mainly composed of aluminum.

本発明の固体撮像素子において、下部電極の膜厚は、500nm以上且つ2000nm以下であってよい。   In the solid-state imaging device of the present invention, the film thickness of the lower electrode may be 500 nm or more and 2000 nm or less.

本発明の固体撮像素子は、半導体基板における周辺領域の上で、且つ、複数の配線層の上に形成された遮光層及び接続パッドをさらに備え、遮光層及び接続パッドは、下部電極と同一の材料により形成されていてもよい。   The solid-state imaging device of the present invention further includes a light shielding layer and connection pads formed on the peripheral region of the semiconductor substrate and on the plurality of wiring layers, and the light shielding layer and the connection pads are the same as the lower electrode. It may be formed of a material.

本発明の固体撮像素子は、上部電極の上に、複数の下部電極とそれぞれ対応して形成された複数のカラーフィルタ層をさらに備えていてもよい。   The solid-state imaging device of the present invention may further include a plurality of color filter layers formed on the upper electrode so as to correspond to the plurality of lower electrodes, respectively.

この場合に、本発明の固体撮像素子は、カラーフィルタ層の上に、複数の下部電極とそれぞれ対応して形成された複数のマイクロレンズをさらに備えていてもよい。   In this case, the solid-state imaging device of the present invention may further include a plurality of microlenses formed on the color filter layer so as to correspond to the plurality of lower electrodes, respectively.

本発明に係る固体撮像素子の製造方法は、画素領域と周辺回路領域とを有する半導体基板の画素領域に、複数の拡散層を行列状に形成する工程と、半導体基板の上に複数の配線層を形成する工程と、配線層の上に、複数の拡散層とそれぞれ接続された複数の下部電極を互いに間隔をおいて形成する工程と、複数の下部電極のそれぞれの間に遮光膜を形成する工程と、下部電極及び遮光膜を覆うように光電変換膜を形成する工程と、光電変換膜の上に、可視光を透過する上部電極を形成する工程とを備えている。   A method for manufacturing a solid-state imaging device according to the present invention includes: a step of forming a plurality of diffusion layers in a pixel region of a semiconductor substrate having a pixel region and a peripheral circuit region; and a plurality of wiring layers on the semiconductor substrate. Forming a plurality of lower electrodes connected to the plurality of diffusion layers on the wiring layer, and forming a light shielding film between the plurality of lower electrodes, respectively. A step, a step of forming a photoelectric conversion film so as to cover the lower electrode and the light-shielding film, and a step of forming an upper electrode that transmits visible light on the photoelectric conversion film.

本発明の固体撮像素子の製造方法によると、複数の下部電極のそれぞれの間に遮光膜を形成する工程を備えているため、下部電極同士の間の隙間から入射光の回折光が半導体基板にまで入り込むことがない。これにより、隣接画素への光の漏れ込みが防止されるので、固体撮像素子における画素特性の高画質化と微細化とを両立できる。   According to the method for manufacturing a solid-state imaging device of the present invention, the method includes the step of forming a light shielding film between each of the plurality of lower electrodes, so that the diffracted light of the incident light enters the semiconductor substrate from the gap between the lower electrodes. Never get into. This prevents light from leaking into adjacent pixels, so that both high image quality and miniaturization of pixel characteristics in the solid-state imaging device can be achieved.

本発明の固体撮像素子の製造方法は、上部電極を形成する工程よりも後に、上部電極の上に、複数の下部電極とそれぞれ対応した複数のカラーフィルタ層を形成する工程をさらに備えていてもよい。   The solid-state imaging device manufacturing method of the present invention may further include a step of forming a plurality of color filter layers respectively corresponding to the plurality of lower electrodes on the upper electrode after the step of forming the upper electrode. Good.

本発明に係る固体撮像素子によると、隣接画素への光の漏れ込みが防止されるため、固体撮像素子における画素特性の高画質化と微細化とを両立できる。   According to the solid-state imaging device according to the present invention, light leakage to adjacent pixels is prevented, so that both high image quality and miniaturization of pixel characteristics in the solid-state imaging device can be achieved.

図1は本発明の一実施形態に係る固体撮像素子の画素部を示す模式的な断面図である。FIG. 1 is a schematic cross-sectional view showing a pixel portion of a solid-state imaging device according to an embodiment of the present invention. 図2は本発明の一実施形態に係る固体撮像素子における画素側電極(下部電極)と遮光膜とを示す平面図である。FIG. 2 is a plan view showing a pixel side electrode (lower electrode) and a light shielding film in the solid-state imaging device according to the embodiment of the present invention. 図3(a)〜図3(d)は本発明の一実施形態に係る固体撮像素子の製造方法を示す工程順の断面図である。FIG. 3A to FIG. 3D are cross-sectional views in order of steps showing a method for manufacturing a solid-state imaging device according to an embodiment of the present invention. 図4(a)〜図4(c)は本発明の一実施形態に係る固体撮像素子の製造方法を示す工程順の断面図である。FIG. 4A to FIG. 4C are cross-sectional views in order of steps showing a method for manufacturing a solid-state imaging device according to an embodiment of the present invention. 図5は本発明の一実施形態の第1変形例に係る固体撮像素子の画素部を示す模式的な断面図である。FIG. 5 is a schematic cross-sectional view showing a pixel portion of a solid-state imaging device according to a first modification of one embodiment of the present invention. 図6は本発明の一実施形態の第2変形例に係る固体撮像素子の画素部を示す模式的な断面図である。FIG. 6 is a schematic cross-sectional view showing a pixel portion of a solid-state imaging device according to a second modification of one embodiment of the present invention. 図7は従来例に係る固体撮像素子の画素部を示す模式的な断面図である。FIG. 7 is a schematic cross-sectional view showing a pixel portion of a solid-state imaging device according to a conventional example.

(一実施形態)
本発明の一実施形態に係る固体撮像素子について図面を参照しながら説明する。
(One embodiment)
A solid-state imaging device according to an embodiment of the present invention will be described with reference to the drawings.

図1に示すように、例えば、p型シリコン(Si)からなる半導体基板100の上部には、各画素部を電気的に絶縁する素子分離領域101が行方向又は列方向に形成されている。さらに、半導体基板100の上部には、有機光電変換膜109に発生した信号電荷を蓄積する複数のn型の高濃度不純物領域(以下、n領域という)102が形成されている。なお、光電変換膜は、必ずしも有機材料を用いる必要はなく、無機材料であってもよい。 As shown in FIG. 1, for example, element isolation regions 101 that electrically insulate each pixel portion are formed in a row direction or a column direction on a semiconductor substrate 100 made of p-type silicon (Si). Furthermore, a plurality of n-type high concentration impurity regions (hereinafter referred to as n + regions) 102 for accumulating signal charges generated in the organic photoelectric conversion film 109 are formed on the semiconductor substrate 100. Note that an organic material is not necessarily used for the photoelectric conversion film, and an inorganic material may be used.

半導体基板100の上には積層された絶縁膜105が形成されており、各n領域102は、絶縁膜105に設けられた複数の開口部に形成された銅(Cu)、アルミニウム(Al)又はタングステン(W)等の金属からなる第2の接続部106Bを介して下部電極である画素側電極108とそれぞれ電気的に接続されている。 A laminated insulating film 105 is formed on the semiconductor substrate 100, and each n + region 102 has copper (Cu) and aluminum (Al) formed in a plurality of openings provided in the insulating film 105. Alternatively, the pixel-side electrode 108 which is a lower electrode is electrically connected through a second connection portion 106B made of a metal such as tungsten (W).

第2の接続部106Bの下側には、銅又はアルミニウム等の金属からなる積層された複数の配線層107が形成されている。これら複数の配線層107は、画素部から周辺回路(図示せず)に信号電荷を伝送したり、逆に、周辺回路から画素部のゲート電極104又はドレイン部に電圧を印加するのに用いられる。   A plurality of stacked wiring layers 107 made of metal such as copper or aluminum are formed below the second connection portion 106B. The plurality of wiring layers 107 are used to transmit a signal charge from the pixel portion to a peripheral circuit (not shown), or to apply a voltage from the peripheral circuit to the gate electrode 104 or the drain portion of the pixel portion. .

領域102には、絶縁膜105上の画素側電極108の上に形成された有機光電変換膜109に発生し、画素側電極108に移動した電子が、第2の接続部106B、配線層107及び第1の接続部106Aを介して蓄積される。n領域102に蓄積された電子は、ゲート電極104に印加される電圧によりフローティングディフュージョン(FD)領域103に転送される。FD領域103に転送された電荷は、半導体基板100に形成されたnチャネルMOSトランジスタからなるCMOS回路(図示せず)によって、その電荷量に応じた信号に変換され、外部に出力される。CMOS回路は配線層107によって信号読み出しパッド(図示せず)と接続される。なお、信号読出し部の回路構成は、CMOS回路に限られず、CCDとアンプとによって構成してもよい。具体的には、n領域102に蓄積された電子を半導体基板100に形成された電荷転送チャネルに読み出し、読み出された電子をアンプに転送して、その電子の量に応じた信号をアンプから出力させてもよい。このように、信号読み出し部の回路構成は、CCD又はCMOS回路が挙げられるが、消費電力、高速読出し、画素加算及び部分読出し等の観点から、CMOS回路の方が好ましい。また、CMOS回路の場合、取り扱いが可能な信号電荷として電子及び正孔があり、電荷移動度に由来する信号読み出しの高速性及び製造におけるプロセス条件の完成度等の点から電子の方が優れているため、電子取り出し用の電極をn領域と接続するのが好ましい。 In the n + region 102, electrons generated in the organic photoelectric conversion film 109 formed on the pixel side electrode 108 on the insulating film 105 and moved to the pixel side electrode 108 are transferred to the second connection portion 106B and the wiring layer. 107 and the first connection unit 106A. Electrons accumulated in the n + region 102 are transferred to the floating diffusion (FD) region 103 by a voltage applied to the gate electrode 104. The charge transferred to the FD region 103 is converted into a signal corresponding to the amount of charge by a CMOS circuit (not shown) formed of an n-channel MOS transistor formed on the semiconductor substrate 100 and output to the outside. The CMOS circuit is connected to a signal readout pad (not shown) by a wiring layer 107. The circuit configuration of the signal reading unit is not limited to the CMOS circuit, and may be configured by a CCD and an amplifier. Specifically, the electrons accumulated in the n + region 102 are read to the charge transfer channel formed in the semiconductor substrate 100, the read electrons are transferred to the amplifier, and a signal corresponding to the amount of the electrons is amplified. May be output. As described above, the circuit configuration of the signal readout unit may be a CCD or a CMOS circuit, but the CMOS circuit is preferable from the viewpoint of power consumption, high-speed readout, pixel addition, partial readout, and the like. In addition, in the case of a CMOS circuit, there are electrons and holes as signal charges that can be handled, and electrons are superior in terms of high-speed signal readout derived from charge mobility and completeness of process conditions in manufacturing. Therefore, it is preferable to connect the electrode for extracting electrons to the n + region.

各第2の接続部106Bの上には、アルミニウム(Al)を主成分とする画素側電極108、オプティカルブラック(OB)部(図示せず)及びパッド部(図示せず)が形成されている。ここで、OB部は、有効画素の外側に設けられた暗電流補正用の画素(光学的黒画素)であって、有効画素の信号との差分を取ることにより、暗電流の直流成分を除去できる機能を持つ。画素側電極108は、有機光電変換膜109で発生した電子を各色ごとに分離するため、R領域、G領域及びB領域の各画素領域で分離されている。また、各画素側電極108とOB部、及びOB部とパッド部も互いに分離されている。   On each second connection portion 106B, a pixel-side electrode 108 mainly composed of aluminum (Al), an optical black (OB) portion (not shown), and a pad portion (not shown) are formed. . Here, the OB unit is a dark current correction pixel (optical black pixel) provided outside the effective pixel, and removes the direct current component of the dark current by taking a difference from the signal of the effective pixel. Has a function that can. The pixel side electrode 108 is separated in each pixel region of the R region, the G region, and the B region in order to separate electrons generated in the organic photoelectric conversion film 109 for each color. Also, each pixel side electrode 108 and the OB portion, and the OB portion and the pad portion are separated from each other.

各画素側電極108の間には、ブラックレジスト材からなり可視光を遮断する遮光膜111が形成されている。ブラックレジスト材は、主に樹脂としてアクリル樹脂(Acrylic resin)と、溶媒としてプロピレングリコールモノメチルエーテルアセテート(PGMEA:C12)と添加材とからなり、回転塗布法によって成膜される。ここでは、遮光膜111を、波長が400nm〜600nmの領域における光の透過率が15%以下である膜と定義する。なお、遮光膜111の膜厚は厚ければ、可視光の吸収が増大して好ましく、さらに、その上に形成される有機光電変換膜109の色分離のためによい。但し、画素側電極108の間隔が小さくなると、遮光膜111の膜厚が厚い場合にはパターン倒れ等を引き起こす。このパターン倒れとなったブラックレジスト材が、ウェハ処理工程中にパーティクルの要因となるため、遮光膜111は最適な膜厚を選ぶ必要がある。ここでは、遮光膜111の膜厚は、500nm以上且つ2000nm以下が好ましく、さらには、700nm以上且つ1000nm以下がより好ましい。 A light shielding film 111 made of a black resist material and blocking visible light is formed between the pixel side electrodes 108. The black resist material mainly includes an acrylic resin as a resin, propylene glycol monomethyl ether acetate (PGMEA: C 6 H 12 O 3 ) and an additive as a solvent, and is formed by a spin coating method. Here, the light shielding film 111 is defined as a film having a light transmittance of 15% or less in a wavelength region of 400 nm to 600 nm. In addition, if the film thickness of the light shielding film 111 is large, absorption of visible light increases, and it is preferable for color separation of the organic photoelectric conversion film 109 formed thereon. However, when the interval between the pixel-side electrodes 108 is reduced, pattern collapse or the like is caused when the light shielding film 111 is thick. Since the black resist material having the pattern collapse causes particles during the wafer processing process, it is necessary to select an optimum film thickness for the light shielding film 111. Here, the thickness of the light-shielding film 111 is preferably 500 nm or more and 2000 nm or less, and more preferably 700 nm or more and 1000 nm or less.

また、遮光膜111の断面形状は、方形状又は順テーパ(台形)状が望ましく、逆テーパ(逆台形)状は適さない。   Further, the cross-sectional shape of the light shielding film 111 is preferably a square shape or a forward taper (trapezoidal) shape, and a reverse taper (reverse trapezoidal) shape is not suitable.

なお、本実施形態においては、遮光膜111に有機材料であるブラックレジスト材を用いたが、有機材料には限られず無機材料であってもよい。例えば、遮光膜111に無機材料を用いる場合には、互いに屈折率が異なる複数の材料を積層して形成し、リソグラフィ法及びエッチング法によりパターニングすれば形成できる。また、遮光膜111に絶縁材料を用いる場合には、シリコン酸化膜(SiO)とシリコン窒化膜(SiN)との積層構造を用いることができ、絶縁材料と金属材料とを用いる場合には、シリコン酸化膜(SiO)と酸化チタン(TiO)等との積層構造を用いることができる。なお、積層構造の各膜厚は、公知の設定値で構わない。 In the present embodiment, a black resist material, which is an organic material, is used for the light shielding film 111. However, the material is not limited to an organic material, and may be an inorganic material. For example, in the case where an inorganic material is used for the light-shielding film 111, the light-shielding film 111 can be formed by stacking a plurality of materials having different refractive indexes and patterning the materials by lithography and etching. Further, when an insulating material is used for the light shielding film 111, a laminated structure of a silicon oxide film (SiO 2 ) and a silicon nitride film (SiN) can be used, and when an insulating material and a metal material are used, A stacked structure of a silicon oxide film (SiO 2 ) and titanium oxide (TiO 2 ) can be used. Each film thickness of the laminated structure may be a known set value.

有機光電変換膜109は、特定の波長の光を吸収し、吸収した光に応じた電荷を発生する光電変換材料により構成される。有機光電変換膜109は、単層構造でも多層構造でもよく、色再現性の観点から単層構造の方が望ましい。なお、単層構造の場合には、カラーフィルタ及びマイクロレンズが不要となる場合があり、多層構造の場合には、カラーフィルタ及びマイクロレンズが必要となる。また、光電変換性能の高さから、有機光電変換膜は結晶性が高い有機材料がさらに好ましい。以下に、有機光電変換膜109が単層構造を採る場合を記載する。   The organic photoelectric conversion film 109 is composed of a photoelectric conversion material that absorbs light of a specific wavelength and generates charges according to the absorbed light. The organic photoelectric conversion film 109 may have a single layer structure or a multilayer structure, and a single layer structure is desirable from the viewpoint of color reproducibility. In the case of a single layer structure, a color filter and a microlens may be unnecessary, and in the case of a multilayer structure, a color filter and a microlens are required. Moreover, the organic photoelectric conversion film is more preferably an organic material having high crystallinity because of high photoelectric conversion performance. Hereinafter, a case where the organic photoelectric conversion film 109 has a single layer structure will be described.

有機光電変換膜109を構成する材料には、例えば、キナクリドン骨格、フタロシアニン骨格及びアントラキノン骨格を含む材料が挙げられる。有機光電変換膜109として、以下の[化1]で示されるキナクリドンを用いた場合には、有機光電変換膜109で緑色の波長域の光を吸収してこれに応じた電荷を発生することが可能となる。有機光電変換膜109として、以下の[化2]で示される亜鉛フタロシアニンを用いた場合には、有機光電変換膜109で赤色の波長域の光を吸収してこれに応じた電荷を発生することが可能となる。また、有機光電変換膜109として、以下の[化3]で示されるアントラキノンAを用いた場合には、有機光電変換膜109で青色の波長域の光を吸収してこれに応じた電荷を発生することが可能となる。   Examples of the material constituting the organic photoelectric conversion film 109 include a material containing a quinacridone skeleton, a phthalocyanine skeleton, and an anthraquinone skeleton. When quinacridone represented by the following [Chemical Formula 1] is used as the organic photoelectric conversion film 109, the organic photoelectric conversion film 109 may absorb light in the green wavelength region and generate a charge corresponding thereto. It becomes possible. In the case where zinc phthalocyanine represented by the following [Chemical Formula 2] is used as the organic photoelectric conversion film 109, the organic photoelectric conversion film 109 absorbs light in the red wavelength region and generates a charge corresponding thereto. Is possible. In addition, when anthraquinone A represented by the following [Chemical Formula 3] is used as the organic photoelectric conversion film 109, the organic photoelectric conversion film 109 absorbs light in the blue wavelength region and generates a charge corresponding thereto. It becomes possible to do.

Figure 2011238781
Figure 2011238781

Figure 2011238781
Figure 2011238781

Figure 2011238781
Figure 2011238781

上部電極である透明電極110は、有機光電変換膜109に光を入射する必要があるため、少なくとも有機光電変換膜109に吸収される380nm〜780nmの波長に対して透明な導電性材料によって構成される。透明電極110の材料としては、可視光に対する透過率が高く且つ抵抗値が小さい透明導電性酸化物(TCO:Transparent Conducting Oxide)を用いることができる。なお、透明電極110には、金(Au)等からなる金属薄膜も用いることができるが、金属薄膜は90%以上の透過率を得ようとすると抵抗値が極端に増大するため、TCOが好ましい。特にTCOには、ITO(Indium Tin Oxide)、IZO(Indium Zinc Oxide)、AZO(Al-doped Zinc Oxide)、FTO(F-doped-SnO2)、SnO(酸化錫)、TiO(酸化チタン)又はZnO(酸化亜鉛)等を好ましく用いることができる。なかでも、プロセスの簡易性、低抵抗性及び透明性の観点からは、ITOが最も好ましい。また、透明電極110は、全画素部で共有される一枚構成としているが、画素部ごとに分割された複数枚の構成としてもよい。 The transparent electrode 110 that is the upper electrode needs to make light incident on the organic photoelectric conversion film 109, and thus is made of a conductive material that is transparent to at least a wavelength of 380 nm to 780 nm absorbed by the organic photoelectric conversion film 109. The As a material of the transparent electrode 110, a transparent conductive oxide (TCO) having a high visible light transmittance and a small resistance value can be used. Note that a metal thin film made of gold (Au) or the like can be used for the transparent electrode 110. However, when the metal thin film tries to obtain a transmittance of 90% or more, the resistance value is extremely increased, and therefore TCO is preferable. . In particular, TCO includes ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), AZO (Al-doped Zinc Oxide), FTO (F-doped-SnO 2 ), SnO 2 (tin oxide), TiO 2 (titanium oxide). ) Or ZnO 2 (zinc oxide) or the like can be preferably used. Among these, ITO is most preferable from the viewpoints of process simplicity, low resistance, and transparency. In addition, the transparent electrode 110 is configured as a single sheet shared by all the pixel units, but may be configured as a plurality of sheets divided for each pixel unit.

ここで、透明電極110の上にはマイクロレンズ115を形成し、望ましい構成としているが、マイクロレンズ115は必ずしも形成する必要はない。   Here, a microlens 115 is formed on the transparent electrode 110 to have a desirable structure, but the microlens 115 is not necessarily formed.

図2に本実施形態に係る固体撮像素子の平面構成を示す。ここでは、マイクロレンズ115及び透明電極110を省略している。   FIG. 2 shows a planar configuration of the solid-state imaging device according to the present embodiment. Here, the microlens 115 and the transparent electrode 110 are omitted.

図2に示すように、画素側電極108の平面形状は、製造上及び寸法管理上等の観点から、正方形状又は長方形状が望ましい。ここでは、1辺が1400nmの正方形セルである画素側電極108を例に説明する。1400nmのセルピッチで形成された各画素側電極108は、200nm〜300nm程度の間隔をおいて形成されている。この間隔は、小さいほど有機光電変換膜109からの透過光を遮断できるため良好ではあるが、リソグラフィ技術とエッチング技術との性能により、互いに隣接する画素側電極108同士が繋がってしまうことによる特性の悪化を防止するために、上記の間隔を設けることが望ましい。   As shown in FIG. 2, the planar shape of the pixel-side electrode 108 is desirably a square shape or a rectangular shape from the viewpoint of manufacturing, dimensional control, and the like. Here, the pixel side electrode 108 which is a square cell with one side of 1400 nm will be described as an example. The pixel-side electrodes 108 formed at a cell pitch of 1400 nm are formed with an interval of about 200 nm to 300 nm. The smaller this interval is, the better because the transmitted light from the organic photoelectric conversion film 109 can be blocked. However, the characteristics of the adjacent pixel-side electrodes 108 are connected to each other due to the performance of the lithography technique and the etching technique. In order to prevent deterioration, it is desirable to provide the above-mentioned interval.

ブラックレジスト材からなる遮光膜111は、成膜時の縮小投影露光装置の性能にもよるが、各画素側電極108とのオーバラップ量(被覆される領域)が、50nm〜100nm程度が望ましい。   Although the light shielding film 111 made of a black resist material depends on the performance of the reduction projection exposure apparatus at the time of film formation, the overlap amount (covered area) with each pixel side electrode 108 is desirably about 50 nm to 100 nm.

以下に、本実施形態に係る固体撮像素子の製造方法について図3及び図4を用いて説明する。なかでも、高画質化と高速化とに適した増幅型固体撮像素子(CMOSセンサ)を例に挙げる。   Below, the manufacturing method of the solid-state image sensor which concerns on this embodiment is demonstrated using FIG.3 and FIG.4. In particular, an amplification type solid-state imaging device (CMOS sensor) suitable for high image quality and high speed is given as an example.

まず、図3(a)に示すように、p型シリコンからなる半導体基板100の上部に、公知の方法により、絶縁体からなる素子分離領域101を選択的に形成して、半導体基板100を各画素(R領域、G領域及びB領域)領域に区画する。ここで、各素子分離領域101の幅は100nm〜200nm程度であり、その深さは100nm〜400nm程度である。その後、例えば熱酸化法により、半導体基板100の主面上に、膜厚が5nm〜10nm程度の酸化シリコンからなるゲート絶縁膜113を形成する。続いて、化学気相堆積(CVD:Chemical Vapor Deposition)法により、ゲート絶縁膜113の上に、成膜温度が600℃〜700℃で膜厚が150nm〜200nmのポリシリコン膜を成膜する。その後、リソグラフィ法及びエッチング法により、成膜されたポリシリコン膜から複数のゲート電極104を所定の形状に形成する。続いて、イオン注入法により、各ゲート電極104をマスクとしてイオン注入を行って、半導体基板100に信号蓄積部であるn領域102と、FD領域103とを形成する。 First, as shown in FIG. 3A, an element isolation region 101 made of an insulator is selectively formed on a semiconductor substrate 100 made of p-type silicon by a known method. It is divided into pixel (R region, G region and B region) regions. Here, the width of each element isolation region 101 is about 100 nm to 200 nm, and the depth is about 100 nm to 400 nm. Thereafter, a gate insulating film 113 made of silicon oxide having a thickness of about 5 nm to 10 nm is formed on the main surface of the semiconductor substrate 100 by, for example, thermal oxidation. Subsequently, a polysilicon film having a film formation temperature of 600 ° C. to 700 ° C. and a film thickness of 150 nm to 200 nm is formed on the gate insulating film 113 by a chemical vapor deposition (CVD) method. Thereafter, a plurality of gate electrodes 104 are formed in a predetermined shape from the formed polysilicon film by lithography and etching. Subsequently, ion implantation is performed by ion implantation using each gate electrode 104 as a mask to form an n + region 102 which is a signal storage portion and an FD region 103 in the semiconductor substrate 100.

このときのイオン種は、As(砒素)及びP(燐)のうちのいずれか一方を用いた単一種による注入でもよく、また両方のイオン種を用いてもよい。すなわち、n領域102とFD領域103とは、後工程でコンタクトプラグの形成材料である金属タングステン(W)と電気的に接続されるため、オーミック接続が可能な濃度を持つようにイオン注入されればよい。そのためには、n領域102及びFD領域103の不純物濃度は、1.0×1015cm−3以上の高濃度であることが好ましい。例えば、本実施形態においては、加速エネルギーが20keVでドーズ量が3.0×1014cm−2の砒素(As)イオンと、加速エネルギーが70keVでドーズ量が1.0×1015cm−2の砒素(As)イオンと、加速エネルギーが40keVでドーズ量が5.0×1013cm−2の燐(P)イオンとを半導体基板100の上部に順次注入している。なお、このとき、半導体基板100の表面から、0.1μm〜0.5μm程度の深さにわたって拡散領域が形成されていることが好ましい。 The ion species at this time may be implantation by a single species using any one of As (arsenic) and P (phosphorus), or both ion species may be used. That is, since the n + region 102 and the FD region 103 are electrically connected to metal tungsten (W), which is a contact plug forming material, in a later process, ions are implanted so as to have a concentration capable of ohmic connection. Just do it. For that purpose, it is preferable that the impurity concentration of the n + region 102 and the FD region 103 is a high concentration of 1.0 × 10 15 cm −3 or more. For example, in this embodiment, arsenic (As + ) ions having an acceleration energy of 20 keV and a dose of 3.0 × 10 14 cm −2 , an acceleration energy of 70 keV and a dose of 1.0 × 10 15 cm and 2 of arsenic (as +) ions, the acceleration energy of the dose is successively injected and 5.0 × the 10 13 cm -2 phosphorus (P +) ions in the upper portion of the semiconductor substrate 100 at 40 keV. At this time, it is preferable that a diffusion region is formed from the surface of the semiconductor substrate 100 to a depth of about 0.1 μm to 0.5 μm.

次に、図3(b)に示すように、半導体基板100の上にゲート絶縁膜113及び各ゲート電極104を覆うように全面にわたって、膜厚が400nm〜500nmのBPSG(Boron-Phospho-Silicate-Glass)からなるプリメタル層間絶縁膜105Aを成膜する。その後、成膜されたプリメタル層間絶縁膜105Aに対して温度が900℃で30秒間のアニールを行ってリフロー処理を行う。その後、リフローされたプリメタル層間絶縁膜105Aを化学機械研磨(CMP:Chemical Mechanical Polishing)法により研磨して平坦化する。続いて、プリメタル層間絶縁膜105Aにおけるn領域102、FD領域103、ゲート電極104、並びに画素及び周辺回路の各トランジスタを構成するソースドレイン領域のそれぞれの上に第1接続孔(図示せず)を形成する。第1接続孔は、プリメタル層間絶縁膜105Aにドライエッチングによって各コンタクトホールを形成し、その後、例えば金属材料であるタングステン(W)を各コンタクトホールに埋め込み、CMP法により平坦化して形成する。なお、図3(b)に示す第1の接続部106Aは第1接続孔の一部である。 Next, as shown in FIG. 3B, a BPSG (Boron-Phospho-Silicate-) having a film thickness of 400 nm to 500 nm over the entire surface so as to cover the gate insulating film 113 and each gate electrode 104 on the semiconductor substrate 100. A premetal interlayer insulating film 105A made of glass is formed. Thereafter, the pre-metal interlayer insulating film 105A formed is annealed at a temperature of 900 ° C. for 30 seconds to perform a reflow process. Thereafter, the reflowed premetal interlayer insulating film 105A is polished and planarized by a chemical mechanical polishing (CMP) method. Subsequently, a first connection hole (not shown) is formed on each of the n + region 102, the FD region 103, the gate electrode 104, and the source / drain regions constituting the transistors of the pixel and the peripheral circuit in the premetal interlayer insulating film 105A. Form. The first connection holes are formed by forming each contact hole in the pre-metal interlayer insulating film 105A by dry etching, and then, for example, filling tungsten (W), which is a metal material, into each contact hole and planarizing it by CMP. Note that the first connection portion 106A shown in FIG. 3B is a part of the first connection hole.

次に、図3(c)に示すように、プリメタル層間絶縁膜105Aの上に、例えば酸化シリコンからなる第1層間絶縁膜105aを形成する。その後、シングルダマシン法により、第1層間絶縁膜105aに複数の第1の銅配線107aを形成する。このとき、第1層間絶縁膜105aと第1銅配線107aとの間には、CVD法又はスパッタ法により、タンタル(Ta)と窒化タンタル(TaN)の積層膜からなるバリアメタル膜(図示せず)を形成する。その後、第1層間絶縁膜105a及び第1銅配線107aの上に、膜厚が50nmの窒化シリコンからなる第1拡散防止膜(図示せず)を成膜する。ここで、第1層間絶縁膜105aと第1銅配線107aとの膜厚は、例えば260nmである。   Next, as shown in FIG. 3C, a first interlayer insulating film 105a made of, for example, silicon oxide is formed on the premetal interlayer insulating film 105A. Thereafter, a plurality of first copper wirings 107a are formed in the first interlayer insulating film 105a by a single damascene method. At this time, a barrier metal film (not shown) made of a laminated film of tantalum (Ta) and tantalum nitride (TaN) is formed between the first interlayer insulating film 105a and the first copper wiring 107a by CVD or sputtering. ). Thereafter, a first diffusion prevention film (not shown) made of silicon nitride having a thickness of 50 nm is formed on the first interlayer insulating film 105a and the first copper wiring 107a. Here, the film thickness of the first interlayer insulating film 105a and the first copper wiring 107a is, for example, 260 nm.

続いて、第1層間絶縁膜105a及び第1の銅配線107aの上に、酸化シリコンからなる第2層間絶縁膜105bを成膜し、成膜した第2層間絶縁膜105bの上面をCMP法により平坦化する。その後、例えばビアファースト法又はデュアルダマシン法により、バリアメタル膜(図示せず)で被覆された第2の銅配線107bを形成する。続いて、第2層間絶縁膜105b及び第2の銅配線107bの上に、膜厚が50nmの窒化シリコンからなる第2拡散防止膜(図示せず)を成膜する。なお、第2層間絶縁膜105bの膜厚は565nmであり、第2の銅配線107bの膜厚は335nmである。このとき、接続部106は、第2の銅配線107bと同様に形成される。   Subsequently, a second interlayer insulating film 105b made of silicon oxide is formed on the first interlayer insulating film 105a and the first copper wiring 107a, and the upper surface of the formed second interlayer insulating film 105b is formed by CMP. Flatten. Thereafter, a second copper wiring 107b covered with a barrier metal film (not shown) is formed by, for example, a via first method or a dual damascene method. Subsequently, a second diffusion prevention film (not shown) made of silicon nitride having a thickness of 50 nm is formed on the second interlayer insulating film 105b and the second copper wiring 107b. The film thickness of the second interlayer insulating film 105b is 565 nm, and the film thickness of the second copper wiring 107b is 335 nm. At this time, the connecting portion 106 is formed in the same manner as the second copper wiring 107b.

同様に、第2層間絶縁膜105b及び第2の銅配線107bの上に、酸化シリコンからなる第3層間絶縁膜105cを成膜し、成膜した第3層間絶縁膜105cの上面をCMP法により平坦化する。その後、例えばビアファースト法又はデュアルダマシン法により、バリアメタル膜(図示せず)で被覆された第3の銅配線107cを形成する。続いて、第3層間絶縁膜105c及び第3の銅配線107cの上に、膜厚が300nmの窒化シリコンからなる第3拡散防止膜(図示せず)を成膜する。なお、第3層間絶縁膜105cの膜厚は565nmであり、第3の銅配線107cの膜厚は335nmである。このとき、接続部106は、第3の銅配線107cと同様に形成される。   Similarly, a third interlayer insulating film 105c made of silicon oxide is formed on the second interlayer insulating film 105b and the second copper wiring 107b, and the upper surface of the formed third interlayer insulating film 105c is formed by CMP. Flatten. Thereafter, a third copper wiring 107c covered with a barrier metal film (not shown) is formed by, for example, a via first method or a dual damascene method. Subsequently, a third diffusion prevention film (not shown) made of silicon nitride having a film thickness of 300 nm is formed on the third interlayer insulating film 105c and the third copper wiring 107c. The film thickness of the third interlayer insulating film 105c is 565 nm, and the film thickness of the third copper wiring 107c is 335 nm. At this time, the connecting portion 106 is formed in the same manner as the third copper wiring 107c.

上述した例では、配線層107を3層構造としたが、この構成に限られず、本実施形態に係る固体撮像素子は、配線層107が1層構造又は2層構造であってもよく、また4層以上に積層された構造であってもよい。   In the example described above, the wiring layer 107 has a three-layer structure. However, the present invention is not limited to this configuration. In the solid-state imaging device according to the present embodiment, the wiring layer 107 may have a one-layer structure or a two-layer structure. A structure in which four or more layers are stacked may be used.

また、各配線層107の材料には銅(Cu)を用いたが、これに限られず、アルミニウム(Al)を用いてもよい。   Further, although copper (Cu) is used as the material of each wiring layer 107, the present invention is not limited to this, and aluminum (Al) may be used.

また、各接続部106はタングステンでも構わない。なお、各接続部106は、配線層107と同様に、スタックトビア構造によって形成される。   Further, each connection portion 106 may be tungsten. Each connection portion 106 is formed by a stacked via structure, like the wiring layer 107.

次に、図3(d)に示すように、リソグラフィ法及びドライエッチング法により、第3拡散防止膜及び第3層間絶縁膜105cに対して、各n領域102と接続された第3の銅配線107cを露出する複数のコンタクトホールを形成する。その後、形成された各コンタクトホールにタングステン等を充填して、第2の接続部106Bを形成する。続いて、図示はしていないが、リソグラフィ法及びドライエッチング法により、第3拡散防止膜における、それぞれ第2の接続部106Bを含む複数の画素側電極形成領域を選択的に除去することにより、複数のパッド形成部を形成する。続いて、例えばスパッタ法により、第3拡散防止膜及び第3層間絶縁膜105cの上に、画素側電極を構成する膜厚が30nmのチタン(Ti)膜、膜厚が100nmの窒化チタン(TiN)膜及び膜厚が800nmのアルミニウム(Al)膜を順次成膜する。このとき、Al膜の膜厚は、可視光を遮断するのに十分な膜厚であり、且つOB部及びパッド部の段差を、後工程の有機光電変換膜を回転塗布法により成膜する際の塗布むら不良が生じない程度の段差にすることが必要であることから、Ti/TiN/Alの総膜厚は、500nm〜2000nmであることが望ましい。続いて、リソグラフィ法及びドライエッチング法により、Ti/TiN/Alの積層膜に対して、画素側電極108同士の間、画素側電極108とOB部との間、及びOB部とパッド部との間の各領域を選択的に除去することにより、図2に示した複数の画素側電極108を得る。このとき、前述したように、画素セルのサイズが1400nmの正方形のセルとすると、画素側電極108同士の間は、200nm〜300nmの間隔を設けることが望ましい。ここで、図示はしていないが、半導体基板100における周辺領域の上には、配線層を覆う遮光層と配線層と接続される接続パッドが形成されており、該遮光層及び接続パッドは、画素側電極108と同一の材料であるTi/TiN/Alの積層膜により形成される。 Next, as shown in FIG. 3D, the third copper connected to each n + region 102 is connected to the third diffusion prevention film and the third interlayer insulating film 105c by lithography and dry etching. A plurality of contact holes exposing the wiring 107c are formed. After that, each formed contact hole is filled with tungsten or the like to form the second connection portion 106B. Subsequently, although not shown, by selectively removing a plurality of pixel side electrode formation regions each including the second connection portion 106B in the third diffusion prevention film by a lithography method and a dry etching method, A plurality of pad forming portions are formed. Subsequently, for example, by sputtering, a titanium (Ti) film having a film thickness of 30 nm and a titanium nitride (TiN film having a thickness of 100 nm) constituting the pixel side electrode are formed on the third diffusion prevention film and the third interlayer insulating film 105c. ) An aluminum (Al) film having a film thickness of 800 nm is sequentially formed. At this time, the film thickness of the Al film is sufficient to block visible light, and the step between the OB part and the pad part is formed by forming the organic photoelectric conversion film in the subsequent process by spin coating. Therefore, the total thickness of Ti / TiN / Al is preferably 500 nm to 2000 nm. Subsequently, by the lithography method and the dry etching method, the pixel-side electrodes 108, the pixel-side electrodes 108 and the OB part, and the OB part and the pad part are formed on the Ti / TiN / Al laminated film. A plurality of pixel side electrodes 108 shown in FIG. 2 are obtained by selectively removing the respective regions therebetween. At this time, as described above, when the pixel cell is a square cell having a size of 1400 nm, it is desirable to provide an interval of 200 nm to 300 nm between the pixel side electrodes 108. Here, although not illustrated, a light shielding layer covering the wiring layer and a connection pad connected to the wiring layer are formed on the peripheral region of the semiconductor substrate 100, and the light shielding layer and the connection pad are It is formed of a laminated film of Ti / TiN / Al which is the same material as the pixel side electrode 108.

次に、図4(a)に示すように、例えば、回転塗布法により、膜厚が1000nmのブラックレジスト膜を第3層間絶縁膜105cを含む画素側電極108の上に塗布する。その後、ブラックレジスト膜に所定の露光及び現像を行って、画素側電極108同士の間に遮光膜111を形成する。このとき、図2に示したように、画素側電極108における周縁部がブラックレジスト膜に覆われることが望ましい。リソグラフィ装置の性能にもよるが、アライメントの余裕度を考慮すると、前述したように画素側電極108と遮光膜111とのオーバラップ量は50nm〜100nm程度が望ましい。遮光膜111は、膜厚が1000nmの場合には、400nm〜600nmの波長領域の透過率は15%以下である。仮に、画素の微細化を図るべく、Ti/TiN/Alからなる画素側電極108の総膜厚を薄くすることによって、画素側電極108同士の隙間を小さくすることは可能である。但し、この場合、遮光膜111の膜厚を600nm程度に薄くすると、光の透過率が20%程度となるため、該遮光膜111の遮光性が悪化する。   Next, as shown in FIG. 4A, a black resist film having a film thickness of 1000 nm is applied on the pixel-side electrode 108 including the third interlayer insulating film 105c by, for example, spin coating. Thereafter, the black resist film is subjected to predetermined exposure and development to form a light shielding film 111 between the pixel side electrodes 108. At this time, as shown in FIG. 2, it is desirable that the peripheral portion of the pixel side electrode 108 is covered with the black resist film. Although depending on the performance of the lithography apparatus, in consideration of the alignment margin, as described above, the overlap amount between the pixel-side electrode 108 and the light shielding film 111 is desirably about 50 nm to 100 nm. When the film thickness is 1000 nm, the light shielding film 111 has a transmittance of 15% or less in the wavelength region of 400 nm to 600 nm. If the total film thickness of the pixel side electrode 108 made of Ti / TiN / Al is reduced in order to reduce the pixel size, the gap between the pixel side electrodes 108 can be reduced. However, in this case, if the thickness of the light shielding film 111 is reduced to about 600 nm, the light transmittance becomes about 20%, so that the light shielding property of the light shielding film 111 is deteriorated.

なお、遮光膜111の膜厚を1200nm以上とした場合は、次工程で形成する有機光電変換膜109の膜厚が、遮光膜111と画素側電極108との段差によってばらつくことにより、有機光電変換膜109の光電変換効率が変動する。この変動を防止するため、画素側電極108の周縁部を覆う遮光膜111による段差は50nm以下に抑えることが望ましい。従って、遮光膜111は、画素側電極108同士の隙間を埋めて、画素側電極108の周縁部上ではその膜厚が薄くなることが望ましい。すなわち、遮光膜111を構成するブラックレジスト材は、その粘度が低いことが望ましく、10cP以下の粘度を有する材料がさらに望ましい。なお、ブラックレジスト材の粘度では、画素側電極108上の段差の低減に十分に対応できない場合には、ブラックレジスト材を複数回に分けて塗布することによっても所望の形状を得ることは可能である。   When the thickness of the light shielding film 111 is 1200 nm or more, the organic photoelectric conversion film 109 formed in the next step varies in thickness due to the step between the light shielding film 111 and the pixel-side electrode 108, thereby causing organic photoelectric conversion. The photoelectric conversion efficiency of the film 109 varies. In order to prevent this variation, it is desirable that the step due to the light shielding film 111 covering the peripheral edge of the pixel side electrode 108 is suppressed to 50 nm or less. Therefore, it is desirable that the light-shielding film 111 fills the gap between the pixel-side electrodes 108 and has a thin film thickness on the periphery of the pixel-side electrodes 108. That is, the black resist material constituting the light shielding film 111 preferably has a low viscosity, and more preferably a material having a viscosity of 10 cP or less. If the viscosity of the black resist material cannot sufficiently cope with the reduction in the level difference on the pixel side electrode 108, it is possible to obtain a desired shape also by applying the black resist material in a plurality of times. is there.

次に、図4(b)に示すように、乾式成膜法又は湿式成膜法により、有機光電変換膜109を、遮光膜111及び複数の画素側電極108を覆うように成膜する。乾式成膜法の具体例としては、真空蒸着法、スパッタ法、イオンプレーティング法若しくはMBE(分子線エピタキシ)法等の物理気相成長法又はプラズマ重合等のCVD法が挙げられる。湿式成膜法の具体例としては、キャスト法、スピンコート法、ディッピング法又はラングミュア-ブロジェット(LB:Langmuir-Blodgett)法等が挙げられる。また、インクジェット印刷又はスクリーン印刷等の印刷法、熱転写又はレーザ転写等の転写法を用いてもよい。   Next, as illustrated in FIG. 4B, the organic photoelectric conversion film 109 is formed so as to cover the light shielding film 111 and the plurality of pixel-side electrodes 108 by a dry film forming method or a wet film forming method. Specific examples of the dry film forming method include a physical vapor deposition method such as a vacuum deposition method, a sputtering method, an ion plating method or an MBE (molecular beam epitaxy) method, or a CVD method such as plasma polymerization. Specific examples of the wet film forming method include a casting method, a spin coating method, a dipping method, a Langmuir-Blodgett (LB) method, and the like. Further, a printing method such as ink jet printing or screen printing, or a transfer method such as thermal transfer or laser transfer may be used.

有機光電変換膜109に高分子化合物を用いる場合は、作製が容易な湿式成膜法、印刷法又は転写法により成膜することが好ましい。また、蒸着等の乾式成膜法を用いる場合は、高分子化合物を用いると分解のおそれがあるため難しい。低分子化合物を用いる場合は、乾式成膜法が好ましく用いられ、特に真空蒸着法が好ましく用いられる。真空蒸着法は、抵抗加熱蒸着法又は電子線加熱蒸着法等の化合物の加熱方法、るつぼ又はボ−ト等の蒸着源の形状、真空度、蒸着温度、基板温度及び蒸着速度等が基本的なパラメ−タとなる。均一な蒸着を可能とするため、半導体基板100を回転させて蒸着することは好ましい。真空度は高い方が好ましく、133.32×10−4Pa以下、好ましくは133.32×10−6Pa以下、特に好ましくは133.32×10−8Pa以下である。蒸着の全工程は真空中で行われることが好ましく、基本的には化合物が外気の酸素及び水分等と直接に接触しないようにする。また、真空蒸着における上述の条件は、有機膜の結晶性、アモルファス性、密度及び緻密度等に影響するため、厳密に制御する必要がある。 When a high molecular compound is used for the organic photoelectric conversion film 109, it is preferable to form the film by a wet film formation method, a printing method, or a transfer method that is easy to manufacture. Moreover, when using a dry film-forming method such as vapor deposition, it is difficult to use a polymer compound because it may be decomposed. When using a low molecular weight compound, a dry film forming method is preferably used, and a vacuum deposition method is particularly preferably used. The vacuum deposition method is basically based on a compound heating method such as resistance heating deposition or electron beam heating deposition, the shape of a deposition source such as a crucible or a boat, a degree of vacuum, a deposition temperature, a substrate temperature and a deposition rate. It becomes a parameter. In order to enable uniform vapor deposition, it is preferable to perform vapor deposition by rotating the semiconductor substrate 100. The degree of vacuum is preferably higher, and it is 133.32 × 10 −4 Pa or less, preferably 133.32 × 10 −6 Pa or less, particularly preferably 133.32 × 10 −8 Pa or less. The entire deposition process is preferably performed in a vacuum, and basically the compound is not directly in contact with oxygen and moisture in the outside air. In addition, the above-described conditions in the vacuum deposition need to be strictly controlled because they affect the crystallinity, amorphousness, density, and density of the organic film.

以下に、有機光電変換膜109の具体的な成膜例を説明する。   Hereinafter, a specific film formation example of the organic photoelectric conversion film 109 will be described.

光電変換膜109は、主として赤色の波長領域の光に感度を有し、入射光のうちの赤色の光量に応じたR信号電荷を発生する複数のR光電変換膜(R膜)109rと、主として緑色の波長領域の光に感度を有し、入射光のうちの緑色の光量に応じたG信号電荷を発生する複数のG光電変換膜(G膜)109gと、主として青色の波長領域の光に感度を有し、入射光のうちの青色の光量に応じたB信号電荷を発生する複数のB光電変換膜(B膜)109bとを含む複数の光電変換膜が、同一平面上の行方向とこれに直交する列方向に正方格子状に配列する。本実施形態においては、2次元アレイ状に並ぶ複数のR光電変換膜109rとG光電変換膜109gとB光電変換膜109bとがベイヤ配列される。   The photoelectric conversion film 109 is mainly sensitive to light in the red wavelength region, and mainly includes a plurality of R photoelectric conversion films (R films) 109r that generate an R signal charge corresponding to the amount of red light in the incident light. A plurality of G photoelectric conversion films (G films) 109g that are sensitive to light in the green wavelength region and generate a G signal charge corresponding to the amount of green light in the incident light, and mainly light in the blue wavelength region A plurality of photoelectric conversion films including a plurality of B photoelectric conversion films (B films) 109b having sensitivity and generating a B signal charge according to the blue light amount of incident light are arranged in a row direction on the same plane. They are arranged in a square lattice pattern in a column direction orthogonal to the above. In the present embodiment, a plurality of R photoelectric conversion films 109r, G photoelectric conversion films 109g, and B photoelectric conversion films 109b arranged in a two-dimensional array are arranged in a Bayer array.

ここで、R光電変換膜109rには、例えば、ZnPc(亜鉛フタロシアニン)/Alq3(キノリノールアルミ錯体)等を用いる。G光電変換膜109gには、例えば、R6G/PMPS(rhodamine 6G (R6G)-doped polymethylphenylsilane)等を用いる。また、B光電変換膜109bには、例えば、C6/PHPPS(coumarin 6 (C6)-doped poly(m-hexoxyphenyl)phenylsilane)等を用いる。   Here, for example, ZnPc (zinc phthalocyanine) / Alq3 (quinolinol aluminum complex) is used for the R photoelectric conversion film 109r. For example, R6G / PMPS (rhodamine 6G (R6G) -doped polymethylphenylsilane) is used for the G photoelectric conversion film 109g. For the B photoelectric conversion film 109b, for example, C6 / PHPPS (coumarin 6 (C6) -doped poly (m-hexoxyphenyl) phenylsilane) is used.

R、G、Bの各光電変換膜109r、109g及び109bは、上述した塗布法又は真空蒸着法により、例えば50nm〜200nmの膜厚で形成される。有機光電変換膜はキャリアの輸送可能な距離が短く、膜厚を大きくすると、キャリアが電極まで到達することができずに電子と正孔とが再結合して消滅してしまう確率が増えるため、変換効率の低下を招く。逆に、膜厚を小さくすると、光吸収が不足して高い変換効率を望むことができなくなる。このため、各光電変換膜109r、109g及び109bには、最適な膜厚設定が必要となる。R、G、Bの色の分離は、リソグラフィ及びエッチング法により、3回に分けて形成する。または、成膜時に装置内のメタルマスクにより分離されるシャドウーマスクマスク法により形成してもよい。必要により、有機光電変換膜109の上又は下に有機材料からなるホール輸送層を設けたり、電子注入輸送層等を設けたりしてもよい。   The R, G, and B photoelectric conversion films 109r, 109g, and 109b are formed with a film thickness of, for example, 50 nm to 200 nm by the above-described coating method or vacuum deposition method. The organic photoelectric conversion film has a short carrier transportable distance, and when the film thickness is increased, the probability that the carriers cannot reach the electrode and the electrons and holes recombine and disappear, This leads to a decrease in conversion efficiency. Conversely, if the film thickness is reduced, light absorption is insufficient and high conversion efficiency cannot be desired. For this reason, it is necessary to set an optimum film thickness for each of the photoelectric conversion films 109r, 109g, and 109b. The separation of R, G, and B colors is formed in three steps by lithography and etching methods. Or you may form by the shadow mask mask method separated by the metal mask in an apparatus at the time of film-forming. If necessary, a hole transport layer made of an organic material may be provided above or below the organic photoelectric conversion film 109, or an electron injection / transport layer may be provided.

なお、R、G、Bの各光電変換膜109r、109g及び109bは、ベイヤ配列のように画素ごとに分けて形成することが望ましい。   Note that the R, G, and B photoelectric conversion films 109r, 109g, and 109b are desirably formed separately for each pixel as in a Bayer array.

次に、図4(c)に示すように、有機光電変換膜109の上に、透明電極110を形成する。透明電極110の形成には、該透明電極110の構成材料によって種々の方法が用いられる。例えば、透明電極110にITO(Indiumu Tin Oxide)を用いる場合は、電子ビーム法、スパッタ法、抵抗加熱蒸着法、化学反応法(ゾルゲル法等)又は酸化インジウムスズの分散物の塗布等の方法で形成される。ここで、透明電極110の成膜条件を説明する。透明電極110の成膜時における半導体基板100の温度は150℃以下が好ましい。また、透明電極110の成膜中に炉中にガスを導入してもよい。基本的にガス種は制限されないが、アルゴン(Ar)、ヘリウム(He)、酸素(O)又は窒素(N)等を用いることができる。また、これらのガスの混合ガスを用いてもよい。特に酸化物の材料の場合は、酸素欠陥が入ることが多いため、酸素を用いることが好ましい。 Next, as illustrated in FIG. 4C, the transparent electrode 110 is formed on the organic photoelectric conversion film 109. Various methods are used for forming the transparent electrode 110 depending on the constituent material of the transparent electrode 110. For example, when ITO (Indiumu Tin Oxide) is used for the transparent electrode 110, an electron beam method, a sputtering method, a resistance heating vapor deposition method, a chemical reaction method (such as a sol-gel method), or a method of applying a dispersion of indium tin oxide is used. It is formed. Here, the film forming conditions of the transparent electrode 110 will be described. The temperature of the semiconductor substrate 100 during film formation of the transparent electrode 110 is preferably 150 ° C. or lower. Further, a gas may be introduced into the furnace during the film formation of the transparent electrode 110. Basically, the gas species is not limited, but argon (Ar), helium (He), oxygen (O 2 ), nitrogen (N 2 ), or the like can be used. Further, a mixed gas of these gases may be used. In particular, in the case of an oxide material, oxygen defects are often introduced, so that oxygen is preferably used.

また、透明電極110は、有機光電変換膜109に物理的ダメージを与えないためにもプラズマフリーで作製することが好ましい。プラズマフリーで透明電極110を作成することにより、プラズマが有機光電変換膜109等に与える影響を抑えることができ、光電変換特性を良好にすることができる。ここで、プラズマフリーとは、透明電極110の成膜中にプラズマが発生しないか、又はプラズマ発生源から半導体基板100までの距離が2cm以上、好ましくは10cm以上、さらに好ましくは20cm以上であり、基体(ここでは有機光電変換膜109)に到達するプラズマが減ずるような状態を意味する。有機光電変換膜109に光を入射させる必要があるため、透明電極110が可視光に対して透明な電極であることが好ましい。ここで、透明とは、波長が約420nm〜約660nmの範囲の可視光を80%以上透過することをいう。   Further, it is preferable that the transparent electrode 110 is made plasma-free so as not to physically damage the organic photoelectric conversion film 109. By creating the transparent electrode 110 free from plasma, the influence of plasma on the organic photoelectric conversion film 109 and the like can be suppressed, and the photoelectric conversion characteristics can be improved. Here, plasma free means that plasma is not generated during the film formation of the transparent electrode 110, or the distance from the plasma generation source to the semiconductor substrate 100 is 2 cm or more, preferably 10 cm or more, more preferably 20 cm or more, This means a state in which the plasma reaching the substrate (here, the organic photoelectric conversion film 109) is reduced. Since light needs to be incident on the organic photoelectric conversion film 109, the transparent electrode 110 is preferably an electrode transparent to visible light. Here, the term “transparent” means that 80% or more of visible light having a wavelength in the range of about 420 nm to about 660 nm is transmitted.

また、透明電極110の形成にスパッタ法を用いる場合には、RF電源を用いた高周波スパッタ法、又はDCスパッタ法等を用いることができる。スパッタ装置の電力としては、好ましくはRFスパッタであり、0.1W/cm〜10W/cmの範囲が好ましい。この場合の成膜レートは0.5nm/min〜10nm/min、特に1nm/min〜5nm/min の範囲が好ましい。また、透明電極110の膜厚は、10nm〜200nmとする。透明電極110を形成する理由は、有機光電変換膜109を水分及び酸素から保護する役割と、光電変換効率向上及び応答速度向上を図るべく、有機光電変換膜109と画素側電極108との間に電圧を印加するためである。 In addition, when a sputtering method is used for forming the transparent electrode 110, a high-frequency sputtering method using an RF power source, a DC sputtering method, or the like can be used. The power of the sputtering device, preferably a RF sputtering, the range of 0.1W / cm 2 ~10W / cm 2 is preferred. In this case, the film forming rate is preferably in the range of 0.5 nm / min to 10 nm / min, particularly 1 nm / min to 5 nm / min. The film thickness of the transparent electrode 110 is 10 nm to 200 nm. The reason for forming the transparent electrode 110 is that the organic photoelectric conversion film 109 is protected from moisture and oxygen, and between the organic photoelectric conversion film 109 and the pixel side electrode 108 in order to improve the photoelectric conversion efficiency and the response speed. This is because a voltage is applied.

続いて、図1に示すように、透明電極110の上に、画素ごとに対応した、公知のマイクロレンズ115を形成する。また、マイクロレンズ115は、焦点が有機光電変換膜109の内部に結ばれるような形状が好ましく、さらには、焦点が透明電極110よりも画素側電極108に近くなるように形成することが好ましい。このようにすると、マイクロレンズ115によって集光された光を、隣接する画素の画素側電極108から最も離れた位置に集光できるため、混色を防止することができる。また、単層構造の固体撮像素子の場合は、カラーフィルタを設けなくても済むため、マイクロレンズ115と有機光電変換膜109との距離が短くなる。従って、この場合には、マイクロレンズ115の曲率半径を大きくすることにより、各マイクロレンズ115の焦点が有機光電変換膜109の内部に結ばれるようにすることが好ましい。なお、マイクロレンズ115を設けない構造でも構わない。   Subsequently, as shown in FIG. 1, a known microlens 115 corresponding to each pixel is formed on the transparent electrode 110. In addition, the microlens 115 preferably has a shape such that the focal point is connected to the inside of the organic photoelectric conversion film 109, and is preferably formed so that the focal point is closer to the pixel side electrode 108 than the transparent electrode 110. In this way, since the light condensed by the microlens 115 can be condensed at a position farthest from the pixel-side electrode 108 of the adjacent pixel, color mixing can be prevented. Further, in the case of a solid-state imaging device having a single layer structure, since it is not necessary to provide a color filter, the distance between the microlens 115 and the organic photoelectric conversion film 109 is shortened. Therefore, in this case, it is preferable to increase the radius of curvature of the microlens 115 so that the focal point of each microlens 115 is connected to the inside of the organic photoelectric conversion film 109. A structure without the microlens 115 may be used.

(一実施形態の第1変形例)
以下、本実施形態の第1変形例として、有機光電変換膜109が多層構造である場合を図5に示す。遮光膜111を形成する工程までは単層構造と同様である。
(First Modification of One Embodiment)
Hereinafter, as a first modification of the present embodiment, a case where the organic photoelectric conversion film 109 has a multilayer structure is shown in FIG. The process up to the formation of the light shielding film 111 is the same as that of the single layer structure.

図5に示すように、本変形例においては、有機光電変換膜109を、R領域、G領域及びB領域にまたがる3層の積層構造で形成する。具体的には、複数の画素側電極108及び遮光膜111の上に、R光電変換膜109r、G光電変換膜109g及びB光電変換膜109bを順次成膜する。なお、赤色光は他の色の光よりも焦点距離が長いため、本変形例のように、赤色の光電変換膜であるR光電変換膜109rをカラーフィルタ112及びマイクロレンズ115から最も離れた位置に形成することが好ましい。また、各光電変換膜109r、109g及び109bの膜厚は、上述したように50nm〜200nmとする。   As shown in FIG. 5, in this modification, the organic photoelectric conversion film 109 is formed in a three-layer stacked structure that spans the R region, the G region, and the B region. Specifically, an R photoelectric conversion film 109r, a G photoelectric conversion film 109g, and a B photoelectric conversion film 109b are sequentially formed on the plurality of pixel side electrodes 108 and the light shielding film 111. Since red light has a longer focal length than other colors of light, the R photoelectric conversion film 109r, which is a red photoelectric conversion film, is located farthest from the color filter 112 and the microlens 115 as in this modification. It is preferable to form. Moreover, the film thickness of each photoelectric conversion film 109r, 109g, and 109b shall be 50 nm-200 nm as above-mentioned.

続いて、有機光電変換膜109の上に、透明電極110を形成する。透明電極110の作製方法は、単層構造の場合と同様である。有機光電変換膜109が多層構造を採る場合は、カラーフィルタ112及びマイクロレンズ115が必要となる。   Subsequently, the transparent electrode 110 is formed on the organic photoelectric conversion film 109. The manufacturing method of the transparent electrode 110 is the same as that in the case of the single layer structure. When the organic photoelectric conversion film 109 has a multilayer structure, the color filter 112 and the microlens 115 are necessary.

従って、図5に示すように、形成された透明電極110の上に画素ごとに対応した、公知のG、R、Bのカラーフィルタ112を形成する。その後、各カラーフィルタ112の上に透明平坦化膜114を形成して、各カラーフィルタ112の上面を平坦化する。   Therefore, as shown in FIG. 5, a known G, R, B color filter 112 corresponding to each pixel is formed on the formed transparent electrode 110. Thereafter, a transparent planarizing film 114 is formed on each color filter 112, and the upper surface of each color filter 112 is planarized.

続いて、各カラーフィルタ112の上に、画素ごとに対応した、公知のマイクロレンズ115をそれぞれ形成する。なお、カラーフィルタ112を設けることにより、有機光電変換膜109は可視領域に対して感度を持つ材料を全画素に一括に形成できるため、製造工程を簡略化でき、膜厚及び膜の均一性が向上する。   Subsequently, a known microlens 115 corresponding to each pixel is formed on each color filter 112. Note that by providing the color filter 112, the organic photoelectric conversion film 109 can collectively form a material having sensitivity to the visible region in all pixels, so that the manufacturing process can be simplified and the film thickness and film uniformity can be improved. improves.

(一実施形態の第2変形例)
以下、本実施形態の第2変形例として、有機光電変換膜109Aが単層構造であっても、各画素ごとに分光特性を有さない場合の固体撮像素子を図6に示す。
(Second Modification of One Embodiment)
Hereinafter, as a second modification of the present embodiment, FIG. 6 illustrates a solid-state imaging device in which each pixel has no spectral characteristics even if the organic photoelectric conversion film 109A has a single-layer structure.

図6に示すように、第2変形例に係る固体撮像素子は、全画素にわたって単一の材料からなる1層の有機光電変換膜109Aが画素側電極108の上に形成される構成を有している。有機光電変換膜109Aは、分光特性を有さないことから、カラーフィルタ112及びマイクロレンズ115を設ける必要がある。   As shown in FIG. 6, the solid-state imaging device according to the second modified example has a configuration in which a single layer organic photoelectric conversion film 109A made of a single material is formed on the pixel-side electrode 108 over all pixels. ing. Since the organic photoelectric conversion film 109 </ b> A does not have spectral characteristics, it is necessary to provide the color filter 112 and the microlens 115.

ここで、分光特性を有さない有機光電変換膜109Aの構成材料には、例えばポリ(N−ビニルカルバゾール:PVK)を用いることができ、その膜厚は、50nm〜150nmが好ましい。   Here, for example, poly (N-vinylcarbazole: PVK) can be used as a constituent material of the organic photoelectric conversion film 109A having no spectral characteristics, and the film thickness is preferably 50 nm to 150 nm.

なお、第2変形例に係る固体撮像素子は、単層の有機光電変換膜109Aを形成する以外は第1変形例と同等の構成であり、第1変形例と同様に作製することができる。   Note that the solid-state imaging device according to the second modification has the same configuration as that of the first modification except that the single-layer organic photoelectric conversion film 109A is formed, and can be manufactured in the same manner as the first modification.

以上説明したように、本実施形態及びその変形例に係る固体撮像素子によると、複数の配線層107の上に、光電変換素子である有機光電変換膜109を形成しているため、半導体基板100に光電変換素子を形成する場合と比べて、受光部の面積が拡大できる。このため、感度及び飽和特性等の基本特性の向上が望めるだけではなく、隣接画素への光の漏れ込み(例えば混色)が生じない。   As described above, according to the solid-state imaging device according to the present embodiment and the modification thereof, the organic photoelectric conversion film 109 that is a photoelectric conversion device is formed on the plurality of wiring layers 107. Compared with the case where a photoelectric conversion element is formed, the area of the light receiving portion can be enlarged. For this reason, not only the improvement of basic characteristics such as sensitivity and saturation characteristics can be expected, but also light leakage (for example, color mixing) to adjacent pixels does not occur.

その上、半導体基板100の上に形成する複数の配線層107は、従来構造と同様のMOSセンサプロセスと同様な手法で製造できるため、従来のプロセスと親和性が高い。これにより、画素特性を向上できると共に、新規の工程を追加することなく、コストを抑えた固体撮像素子を得ることができる。   In addition, since the plurality of wiring layers 107 formed on the semiconductor substrate 100 can be manufactured by the same technique as the MOS sensor process similar to the conventional structure, the compatibility with the conventional process is high. Thereby, the pixel characteristics can be improved, and a solid-state imaging device with reduced cost can be obtained without adding a new process.

本発明に係る固体撮像素子は、隣接画素への光の漏れ込みが防止されて、固体撮像素子における画素特性の高画質化と微細化とを両立でき、入射光を光電変換して信号電荷を生成する光電変換膜を備えた固体撮像素子及びその製造方法等に有用である。   The solid-state imaging device according to the present invention prevents light from leaking into adjacent pixels, and can achieve both high image quality and miniaturization of pixel characteristics in the solid-state imaging device. It is useful for a solid-state imaging device having a photoelectric conversion film to be generated, a manufacturing method thereof, and the like.

100 半導体基板
101 素子分離領域
102 n領域(n型の高濃度不純物領域)
103 フローティングディフージョン拡散領域(FD領域)
104 ゲート電極(転送ゲート電極)
105 絶縁膜
105A プリメタル層間絶縁膜
105a 第1層間絶縁膜
105b 第2層間絶縁膜
105c 第3層間絶縁膜
106 接続部
106A 第1の接続部
106B 第2の接続部
107 配線層
107a 第1の銅配線
107b 第2の銅配線
107c 第3の銅配線
108 画素側電極(下部電極)
109 有機光電変換膜
109A 有機光電変換膜
110 透明電極(上部電極)
111 遮光膜
112 カラーフィルタ
113 ゲート絶縁膜
114 透明平坦化膜
115 マイクロレンズ
100 Semiconductor substrate 101 Element isolation region 102 n + region (n-type high concentration impurity region)
103 Floating diffusion diffusion region (FD region)
104 Gate electrode (transfer gate electrode)
105 Insulating film 105A Pre-metal interlayer insulating film 105a First interlayer insulating film 105b Second interlayer insulating film 105c Third interlayer insulating film 106 Connection part 106A First connection part 106B Second connection part 107 Wiring layer 107a First copper wiring 107b Second copper wiring 107c Third copper wiring 108 Pixel side electrode (lower electrode)
109 Organic photoelectric conversion film 109A Organic photoelectric conversion film 110 Transparent electrode (upper electrode)
111 Light-shielding film 112 Color filter 113 Gate insulating film 114 Transparent planarization film 115 Microlens

Claims (11)

画素領域と周辺領域とを有する半導体基板と、
前記半導体基板の画素領域に形成され、行列状に配置された複数の拡散層と、
前記半導体基板の上に形成された複数の配線層と、
前記複数の配線層の上に、前記複数の拡散層とそれぞれ接続されると共に互いに間隔をおいて形成された複数の下部電極と、
前記複数の下部電極のそれぞれの間に形成された遮光膜と、
前記複数の下部電極及び遮光膜を覆うように形成された光電変換膜と、
前記光電変換膜の上に形成され、可視光を透過する上部電極とを備えていることを特徴とする固体撮像素子。
A semiconductor substrate having a pixel region and a peripheral region;
A plurality of diffusion layers formed in a pixel region of the semiconductor substrate and arranged in a matrix;
A plurality of wiring layers formed on the semiconductor substrate;
A plurality of lower electrodes connected to the plurality of diffusion layers and spaced apart from each other on the plurality of wiring layers;
A light shielding film formed between each of the plurality of lower electrodes;
A photoelectric conversion film formed to cover the plurality of lower electrodes and the light shielding film;
A solid-state imaging device comprising an upper electrode formed on the photoelectric conversion film and transmitting visible light.
前記遮光膜は、ブラックレジスト材からなることを特徴とする請求項1に記載の固体撮像素子。   The solid-state imaging device according to claim 1, wherein the light shielding film is made of a black resist material. 前記ブラックレジスト材の膜厚は、500nm以上且つ2000nm以下であることを特徴とする請求項2に記載の固体撮像素子。   The solid-state imaging device according to claim 2, wherein the black resist material has a film thickness of 500 nm or more and 2000 nm or less. 前記光電変換膜は、有機材料からなることを特徴とする請求項1〜3のいずれか1項に記載の固体撮像素子。   The solid-state imaging device according to claim 1, wherein the photoelectric conversion film is made of an organic material. 前記下部電極は、アルミニウムを主成分とすることを特徴とする請求項1〜4のいずれか1項に記載の固体撮像素子。   The solid-state imaging device according to claim 1, wherein the lower electrode contains aluminum as a main component. 前記下部電極の膜厚は、500nm以上且つ2000nm以下であることを特徴とする請求項1〜5のいずれか1項に記載の固体撮像素子。   6. The solid-state imaging device according to claim 1, wherein a film thickness of the lower electrode is not less than 500 nm and not more than 2000 nm. 前記半導体基板における前記周辺領域の上で、且つ、前記複数の配線層の上に形成された遮光層及び接続パッドをさらに備え、
前記遮光層及び接続パッドは、前記下部電極と同一の材料により形成されていることを特徴とする請求項1〜6のいずれか1項に記載の固体撮像素子。
A light shielding layer and connection pads formed on the peripheral region of the semiconductor substrate and on the plurality of wiring layers;
The solid-state imaging device according to claim 1, wherein the light shielding layer and the connection pad are made of the same material as the lower electrode.
前記上部電極の上に、前記複数の下部電極とそれぞれ対応して形成された複数のカラーフィルタ層をさらに備えていることを特徴とする請求項1〜7のいずれか1項に記載の固体撮像素子。   8. The solid-state imaging according to claim 1, further comprising a plurality of color filter layers formed on the upper electrode so as to correspond to the plurality of lower electrodes, respectively. 9. element. 前記カラーフィルタ層の上に、前記複数の下部電極とそれぞれ対応して形成された複数のマイクロレンズをさらに備えていることを特徴とする請求項8に記載の固体撮像素子。   The solid-state imaging device according to claim 8, further comprising a plurality of microlenses formed on the color filter layer so as to correspond to the plurality of lower electrodes, respectively. 画素領域と周辺回路領域とを有する半導体基板の前記画素領域に、複数の拡散層を行列状に形成する工程と、
前記半導体基板の上に複数の配線層を形成する工程と、
前記配線層の上に、前記複数の拡散層とそれぞれ接続された複数の下部電極を互いに間隔をおいて形成する工程と、
前記複数の下部電極のそれぞれの間に遮光膜を形成する工程と、
前記下部電極及び遮光膜を覆うように光電変換膜を形成する工程と、
前記光電変換膜の上に、可視光を透過する上部電極を形成する工程とを備えていることを特徴とする固体撮像素子の製造方法。
Forming a plurality of diffusion layers in a matrix in the pixel region of the semiconductor substrate having a pixel region and a peripheral circuit region;
Forming a plurality of wiring layers on the semiconductor substrate;
Forming a plurality of lower electrodes respectively connected to the plurality of diffusion layers on the wiring layer, spaced apart from each other;
Forming a light shielding film between each of the plurality of lower electrodes;
Forming a photoelectric conversion film so as to cover the lower electrode and the light shielding film;
And a step of forming an upper electrode that transmits visible light on the photoelectric conversion film.
前記上部電極を形成する工程よりも後に、
前記上部電極の上に、前記複数の下部電極とそれぞれ対応した複数のカラーフィルタ層を形成する工程をさらに備えていることを特徴とする請求項10に記載の固体撮像素子の製造方法。
After the step of forming the upper electrode,
The method of manufacturing a solid-state imaging device according to claim 10, further comprising forming a plurality of color filter layers respectively corresponding to the plurality of lower electrodes on the upper electrode.
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