JP2011213337A - On-vehicle ecu - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an on-vehicle ECU for minimizing electric power consumption when requiring no operation of an internal microcomputer.SOLUTION: The microcomputer 1 switches to the intermittent operation mode setting by setting a power source control terminal PV (a microcomputer output signal S1) to "L", and setting a switching circuit control terminal PC to "H", when recognizing that an internal power source OFF condition is satisfied when setting an ordinary operation mode. When setting an intermittent operation mode, supply of an operating power source V4 from a power source IC4 to the microcomputer 1 when requiring no operation, is completely cut off under the control of an intermittent operation clock generating part 2 and a switching circuit 3. The microcomputer 1 returns a mode to the ordinary operation mode from the intermittent operation mode by setting the power source control terminal PV to "H", and setting the switching circuit control terminal PC to "L", when detecting a starting factor in intermittent operation.

Description

  The present invention relates to an in-vehicle ECU (Electronic Control Unit) mounted on a vehicle.

  2. Description of the Related Art Conventionally, a vehicle has a plurality of electronic devices called vehicle-mounted ECUs. Each vehicle-mounted ECU exchanges information via a network such as a CAN (Controller Area Network) so that the vehicle travels. And the control related to the comfort of the passenger compartment. Each on-vehicle ECU is connected to a power source such as a battery or an alternator of the vehicle via a power line and is operated by power supplied from the power source. In recent years, since the number of in-vehicle ECUs mounted on a vehicle is increasing, power saving is required.

  Along with the enhancement of the functions of vehicles, a large number of high-performance microcomputers (hereinafter abbreviated as “microcomputers”) have been mounted on in-vehicle ECUs. Driving these microcomputers increases power consumption and dark current, contributing to battery drain and fuel consumption reduction. Therefore, the microcomputer mode is changed to the HALT mode (mode for interrupting CPU instruction execution) or STOP mode (mode for stopping the operation of the CPU and peripheral circuits), and the above-described HALT mode (STOP mode) is inserted into the normal mode. The normal mode operation by the microcomputer is generally performed intermittently.

  Moreover, as a vehicle-mounted ECU that can reduce power consumption, for example, a drive control device for a vehicle-mounted device disclosed in Patent Document 1 can be cited. The control device is provided with an approach sensor for detecting an object approaching the vehicle, and the controller intermittently turns on the switch to drive the approach sensor intermittently. When the controller detects the object approaching the vehicle by the proximity sensor when the proximity sensor is intermittently driven, the controller starts driving the intrusion sensor to be driven that has been stopped until then.

Japanese Patent No. 4149879

  However, in the microcomputer HALT mode or STOP mode, the main operation of the microcomputer is stopped, but since power is always supplied to the microcomputer itself, non-zero power is consumed even during the HALT mode and the STOP mode. There was a problem that it would be.

  The same applies to the control device disclosed in Patent Document 1. That is, the controller (equivalent to the microcomputer) that drives the proximity sensor and the intrusion sensor and the security ECU that controls the controller are always supplied with power, and there is a problem that power consumption cannot be suppressed in this respect. .

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain an in-vehicle ECU that minimizes power consumption when the operation of an internal microcomputer is unnecessary.

  According to a first aspect of the present invention, an in-vehicle ECU is in an operating state when operating power is supplied, and is configured to set an intermittent operation mode when a predetermined condition is satisfied during operation, and to turn off the power when the intermittent operation mode is set. An intermittent operation power control unit that generates a power supply control signal that alternately indicates a period and a power ON period, and supplies the operation power to the microcomputer when the normal mode is set, and the power supply control when the intermittent operation mode is set A power supply unit that supplies the operating power to the microcomputer only when a signal indicates a power-on period, and the microcomputer has an activation factor related to the vehicle in the operating state when the intermittent operation mode is set. When intermittent operation is performed to detect occurrence of the activation factor, the normal mode setting is changed from the intermittent operation mode setting. Revised to.

  The present invention according to claim 2 is the in-vehicle ECU according to claim 1, further comprising a communication unit capable of transmitting and receiving with an external communication line, and the microcomputer is capable of transmitting and receiving data to and from the communication unit. And the predetermined condition includes a combination condition of a first condition related to the received content of the communication unit and a second condition inside the microcomputer, and the communication unit changes the power supply unit from the intermittent operation mode setting to the It has a mode conversion function that can be changed to normal operation mode setting.

  A third aspect of the present invention is the in-vehicle ECU according to the first or second aspect, wherein the intermittent operation power supply control unit generates an intermittent operation clock in an operating state; At the time of setting the intermittent operation mode by the microcomputer, the intermittent operation clock generation unit is set to an operation state, and the first switching setting for supplying the intermittent operation clock to the power supply unit as the power supply control signal is performed. And a switching circuit for performing a second switching setting for setting the intermittent operation clock to a non-operating state when the microcomputer sets the normal mode.

  The present invention according to claim 4 is the in-vehicle ECU according to claim 3, wherein the microcomputer is not detected when the activation factor is detected by the intermittent operation performed when the intermittent operation mode is set. A clock reset function for resetting the intermittent operation clock generation unit, and the intermittent operation clock generation unit generates the intermittent operation clock instructed in the order of the power OFF period and the power ON period after the reset; .

  The present invention according to claim 5 is the in-vehicle ECU according to any one of claims 1 to 4, wherein the microcomputer has a nonvolatile memory therein, and the intermittent operation mode setting is performed. Sometimes the determination data for instructing the intermittent operation mode is written to the nonvolatile memory, and the microcomputer refers to the determination data in the nonvolatile memory when the operation power supply starts, and sets the intermittent operation mode. Recognize the presence or absence of

  The present invention according to claim 6 is the in-vehicle ECU according to claim 5, wherein the microcomputer writes, as terminal information, information indicating a state related to a vehicle in the nonvolatile memory when the intermittent operation mode is set. Include.

  The present invention according to claim 7 is the in-vehicle ECU according to claim 6, wherein the microcomputer compares the terminal information read from the nonvolatile memory with the terminal information acquired during the intermittent operation. The intermittent operation is performed by detecting the presence or absence of the activation factor based on the result.

  In the on-vehicle ECU of the present invention according to claim 1, since the power supply unit supplies operating power to the microcomputer only when the power supply control signal indicates the power-on period when the intermittent operation mode is set, the operation of the microcomputer When not required, it is possible to cause the microcomputer to execute an intermittent operation while cutting off the supply of operating power and minimizing the power consumption of the microcomputer when the intermittent operation mode is set.

  In addition, in the vehicle-mounted ECU according to the first aspect of the present invention, in the intermittent operation mode setting, when the microcomputer performs the intermittent operation and detects the occurrence of the activation factor, the microcomputer changes from the intermittent operation mode setting to the normal mode setting. The end control of the intermittent operation can be performed independently without depending on other on-vehicle ECUs.

  The present invention according to claim 2 sets the intermittent operation mode according to external information (first condition) in addition to the internal factor (second condition) of the microcomputer, and from the intermittent operation mode setting to the normal mode setting. Can be set to cancel.

  The present invention according to claim 3 can be realized as the intermittent operation power supply control unit for controlling the operation power supply of the power supply unit at the time of setting the intermittent operation mode, with a minimum necessary configuration including an intermittent operation clock generation unit and a switching circuit. .

  In the present invention of claim 4, after the intermittent operation by the microcomputer is executed, the intermittent operation clock generator is reset to quickly cut off the power supply to the microcomputer, thereby further reducing power consumption. be able to.

  According to the fifth aspect of the present invention, when the operation power supply to the microcomputer is started, the microcomputer correctly executes the intermittent operation when the intermittent operation mode is set by referring to the determination data in the internal nonvolatile memory. be able to.

  According to the sixth aspect of the present invention, the terminal information before the intermittent operation mode is set can be utilized by writing the terminal information into the nonvolatile memory.

  The microcomputer of the on-vehicle ECU according to claim 7 is configured to operate intermittently by detecting presence or absence of an activation factor based on a comparison result between the terminal information read from the nonvolatile memory and the terminal information acquired during the intermittent operation. It is carried out.

  Therefore, the present invention according to claim 7 has an effect that the microcomputer can be surely activated by using a change with time of the state related to the vehicle as an activation factor.

It is a block diagram which shows the internal structure of vehicle-mounted ECU which is Embodiment 1 of this invention. 3 is a flowchart showing a series of processes related to an intermittent operation of the in-vehicle ECU according to the first embodiment. 3 is a flowchart showing a series of processes related to an intermittent operation of the in-vehicle ECU according to the first embodiment. It is a block diagram which shows the internal structure of vehicle-mounted ECU which is Embodiment 2 of this invention. 6 is a flowchart showing a series of processes related to an intermittent operation of the in-vehicle ECU according to the second embodiment. 6 is a flowchart showing a series of processes related to an intermittent operation of the in-vehicle ECU according to the second embodiment. It is a block diagram which shows the internal structure of in-vehicle ECU which is Embodiment 3 of this invention. 10 is a flowchart illustrating a series of processes related to intermittent operation of the in-vehicle ECU according to the third embodiment. 10 is a flowchart illustrating a series of processes related to intermittent operation of the in-vehicle ECU according to the third embodiment.

<Embodiment 1>
FIG. 1 is a block diagram showing the internal configuration of an in-vehicle ECU that is Embodiment 1 of the present invention. The in-vehicle ECU 10 according to the first embodiment includes a microcomputer 1, an intermittent operation clock generation unit 2, a switching circuit 3, a power supply IC 4, a logic circuit 5, and a resistance unit 8.

  The microcomputer 1 is in an operating state when the operating power supply V4 is supplied to the power input unit VCC, operates with a clock generated by the internal oscillator 11 in the operating state, and monitors external inputs relating to the vehicle detected by the switch groups SW1 to SWn. When an external input is detected from any one of the switch groups SW1 to SWn, predetermined operation control is performed according to the detected external input content. It should be noted that the switch groups SW1 to SWn only need to capture environmental changes in the vehicle as external inputs, and include sensors as well as general switches such as power window switch inputs.

  Further, the microcomputer 1 has a built-in nonvolatile RAM 1m. When the power is turned on from the power-off state, the microcomputer 1 performs a normal reset operation based on the contents of the determination data CD stored in the nonvolatile RAM 1m. Performs intermittent operation when the intermittent operation mode is set.

  In addition, the microcomputer 1 performs a write operation for setting the determination data CD to the set state in the nonvolatile RAM 1m when the power-off condition is established.

  Further, when the microcomputer 1 detects an external input from any of the switch groups SW1 to SWn during the intermittent operation, the microcomputer 1 determines that there is an activation factor and performs a process for returning to the normal mode.

  When the external power supply EVC is supplied to the power input unit VCC, the intermittent operation clock generation unit 2 enters an operation state, and generates an intermittent control clock C2 during the operation state. The intermittent control clock C2 starts from “L” and repeats “H” / “L” at a predetermined cycle when the power is turned on or reset. Note that the frequency of the intermittent control clock C2 is set to be smaller than the operating frequency of the internal oscillator 11 of the microcomputer 1.

  The switching circuit 3 has terminals P31 to P36, the terminal P31 is connected to the power supply line LVC supplied with the external power supply EVC, the terminal P32 is connected to the power supply input section VCC of the intermittent operation clock generation section 2, and the terminal P33 is grounded through the resistance unit 8. The terminal P34 of the switching circuit 3 receives the intermittent control clock C2, and outputs a signal obtained from the terminal P35 to the logic circuit 5 as the switching circuit output signal S3. Further, the control terminal P36 of the switching circuit 3 is connected to the switching circuit control terminal PC of the microcomputer 1. The switching circuit 3 is in an operating state in both a normal mode setting and an intermittent operation mode setting described later by receiving the external power supply EVC from the terminal P31.

  The switching circuit 3 having such a configuration electrically connects the terminals P31 and P32 and the terminals P34 and P35 when the switching circuit control terminal PC connected to the control terminal P36 is “H” (in FIG. 1). First switching setting (indicated by a solid line) (intermittent operation mode setting) is performed.

  On the other hand, when the switching circuit control terminal PC is “L”, the switching circuit 3 electrically connects between the terminals P32 and P33 and between the terminals P33 and P35 (shown by a broken line in FIG. 1). Normal operation mode setting).

  The logic circuit 5 receives the switching circuit output signal S3 from the switching circuit 3 and the microcomputer output signal S1 obtained from the power supply control terminal PV of the microcomputer 1, and at least one of the microcomputer output signal S1 and the switching circuit output signal S3 is “H”. At this time, the logic circuit output signal S5 of “H” is output. When both the microcomputer output signal S1 and the switching circuit output signal S3 are “L”, the logic circuit output signal S5 of “L” is output. Although not shown, the logic circuit 5 is always supplied with power.

  The power supply IC4 receives the logic circuit output signal S5 at the control input section VC. When the logic circuit output signal S5 is “H”, the power supply line VIVC converts the power supply voltage from the power supply input section VI and operates from the power supply output section VO. V4 is supplied to the power input unit VCC of the microcomputer 1 and the switch groups SW1 to SWn.

  2 and 3 are flowcharts showing a series of processes related to the intermittent operation of the in-vehicle ECU 10 according to the first embodiment.

  When the microcomputer 1 is performing a normal operation when the normal mode is set, the switching circuit 3 is fixed at the switching circuit control terminal PC = “L” and the power supply control terminal PV = “H”. The external power supply EVC is not supplied to the intermittent operation clock generator 2 and the intermittent operation clock generator 2 is in a non-operating state. The switching circuit output signal S3 is fixed to “L”.

  Hereinafter, with reference to FIG. 2 and FIG. 3, a series of processing procedures relating to the intermittent operation of the in-vehicle ECU 10 according to the first embodiment will be described.

  First, in step ST23, when the microcomputer 1 recognizes that a predetermined power-off condition that is an unnecessary determination condition of the microcomputer 1 is satisfied (Yes), the microcomputer 1 shifts to a process after step ST24 to shift from the normal operation to the intermittent operation. On the other hand, when the predetermined power-off condition is not satisfied (No), step ST23 is repeated and the vehicle-mounted ECU 10 continues normal operation.

  In step ST24, which is executed in the case of Yes in step ST23, the microcomputer 1 sets the determination data CD to be written in the nonvolatile RAM 1m in a set state (indicating the intermittent operation mode) as a preparation process for moving to the intermittent operation.

  In step ST25, the microcomputer 1 sets the power supply control terminal PV (microcomputer output signal S1) to “L”, and the logic circuit output signal S5 of the logic circuit 5 becomes “H” of the switching circuit output signal S3 (intermittent control clock C2). "," L ".

  Thereafter, in step ST26, the microcomputer 1 sets the switching circuit control terminal PC to “H”.

  Then, in step ST27, the switching circuit 3 switches from the second switching setting to the first switching setting (intermittent operation mode setting). As a result, the intermittent operation clock generation unit 2 to which the external power supply EVC is supplied to the power input unit VCC enters an operation state and generates an intermittent control clock C2. This intermittent control clock C2 is generated from the switching circuit 3 as a switching circuit output signal S3. Is output.

  In step ST28, the intermittent control clock C2 is reset by the power-on return, and the intermittent control clock C2 starting from the initial state “L” is generated. At this time, since the microcomputer output signal S1 and the switching circuit output signal S3 (intermittent control clock C2) are both “L”, the logic circuit output signal S5 is “L”.

  As a result, in step ST29, the power supply IC4 stops generating the operation power supply V4, so the supply of the operation power supply V4 to the power supply input unit VCC of the microcomputer 1 is stopped, and the microcomputer 1 is completely turned off. At this time, the supply of the operating power supply V4 to the switch groups SW1 to SWn is also stopped.

  And in step ST30, step ST29 and step ST30 are repeated until progress of predetermined power supply OFF time is confirmed (Yes). The predetermined power OFF time means a time (half cycle) during which the intermittent control clock C2 (switching circuit output signal S3) maintains “L” after reset.

  In step ST30, when it is confirmed that the predetermined power OFF time has elapsed (Yes), the process proceeds to step ST31, and the intermittent control clock C2 changes to “H”.

  As a result, in step ST32, the logic circuit output signal S5 changes from “L” to “H”, and the power supply IC4 resumes the generation of the operation power supply V4, so that the operation power supply V4 to the power supply input unit VCC of the microcomputer 1 is restored. Supply is resumed, and the microcomputer 1 returns to the power-on return state. At the same time, the supply of the operating power source V4 to the switch groups SW1 to SWn starts, and the switch groups SW1 to SWn can also perform their respective operations.

  In step ST33, the microcomputer 1 reads the determination data CD in the nonvolatile RAM 1m. If the determination data CD is in the set state (Yes), the microcomputer 1 proceeds to the processing after step ST35. On the other hand, if the determination data CD is not in the set state in step ST33 (No), a normal reset operation is performed in step ST34. That is, the microcomputer 1 refers to the determination data CD stored in the non-volatile RAM 1m at the time of power-on recovery when the power is switched from power-off to power-on. Can be recognized accurately.

  In step ST35, which is executed in the case of Yes in step ST33, the microcomputer 1 performs an intermittent operation with the operation clock of the internal oscillator 11. This intermittent operation is continued by repeating steps ST35 and ST36 until the completion is confirmed in step ST36. Here, the intermittent operation means a minimum necessary operation in which the presence or absence of an external input obtained from the switch groups SW1 to SWn can be recognized.

  In step ST35, the external clock (not shown) obtained from the outside instead of the internal oscillator 11 is used to suppress the external clock to a frequency lower than the internal clock generated from the internal oscillator 11, thereby reducing the power consumption. Reduction can be achieved.

  In step ST37, the presence / absence of the activation factor of the microcomputer 1 is determined based on the presence / absence of any external input from the switch group SW1 to SWn. That is, if any external input of the switch group SW1 to SWn is recognized, it is determined that there is an activation factor (Yes), and if any external input of the switch group SW1 to SWn is not recognized, there is no activation factor (No). to decide.

  In the case of No in step ST37, the process returns to step ST28 again, the intermittent control clock C2 is reset, and the process returns to the process of completely shutting off the supply of the operating power supply V4 to the microcomputer 1.

  When returning to step ST28 again, the intermittent operation clock generator 2 can be reset, for example, by applying a reset signal from the microcomputer 1 to the intermittent operation clock generator 2. At this time, it is necessary to provide a reset signal supply line between the microcomputer 1 and the intermittent operation clock generator 2 as indicated by a solid arrow in FIG.

  On the other hand, in the case of Yes in step ST37, the microcomputer 1 performs the processing after step ST38 in order to return to the normal mode.

  First, in step ST38, the microcomputer 1 sets the power control terminal PV to “H”, fixes the logic circuit output signal S5 to “H”, and the operation power V4 is always supplied from the power IC 4 to the power input unit VCC. To.

  Thereafter, in step ST39, the microcomputer 1 sets the switching circuit control terminal PC to “L”.

  Then, in step ST40, the switching circuit 3 switches from the first switching setting to the second switching setting (normal operation mode setting). As a result, the intermittent operation clock generator 2 is deactivated, the generation of the intermittent control clock C2 is terminated, and the switching circuit output signal S3 is fixed to “L”.

  Finally, in step ST41, the microcomputer 1 clears the determination data CD written in the nonvolatile RAM 1m and completely returns to the normal operation.

  As described above, the power supply IC 4 operates the microcomputer 1 only when the logic circuit output signal S5 (= intermittent control clock C2) serving as the power supply control signal when setting the intermittent operation mode indicates “H” indicating the power-on period. In order to supply V4, the operation at the time of intermittent detection which detects the presence or absence of the activation factor related to the vehicle using the switch groups SW1 to SWn in the microcomputer 1 while minimizing the power consumption of the microcomputer 1 at the time of setting the intermittent operation mode. Can be executed.

  That is, the in-vehicle ECU 10 according to the first embodiment reduces the power consumption of the microcomputer 1 by completely stopping the supply of the operation power supply V4 to the power supply input unit VCC when the operation of the microcomputer 1 is unnecessary when the intermittent operation mode is set. It can be suppressed to “0”. Since the power consumption of the microcomputer 1 occupies a major proportion of the power consumption of the entire in-vehicle ECU 10, the power consumption of the entire in-vehicle ECU 10 is effectively reduced by suppressing the power consumption to “0” when the operation of the microcomputer 1 is unnecessary. Can be aimed at.

  In addition, the in-vehicle ECU 10 according to the first embodiment executes the steps ST38 to ST41 independently when the generation of the activation factor is detected after the operation during the intermittent operation when the intermittent operation mode is set by the microcomputer 1, thereby independently operating the intermittent operation mode. It is possible to return from the setting to the normal mode setting.

  Returning to step ST28 (see FIG. 3), the supply of the operating power supply V4 to the microcomputer 1 is immediately cut off in step ST29, so that the power consumption when the intermittent operation mode is set can be further suppressed.

  In addition, the intermittent operation power supply control unit that controls the operation power supply V4 of the power supply IC 4 when the intermittent operation mode is set can be realized with the minimum necessary configuration including the intermittent operation clock generation unit 2 and the switching circuit 3.

  Furthermore, when the activation factor is not detected after the intermittent operation mode is set by the microcomputer 1, the process returns to step ST28 (see FIG. 3), and the supply of the operating power supply V4 to the microcomputer 1 is immediately cut off in step ST29. Therefore, the power consumption when the intermittent operation mode is set can be further suppressed.

  Hereinafter, this point will be described in detail. Steps ST32 to ST37 are executed during the “H” period of the intermittent control clock C2, but when the result is No in step ST37 for determining the presence or absence of the activation factor, the intermittent control clock C2 is immediately reset in step ST28. The supply period of the operating power supply V4 to the microcomputer 1 can be set to a necessary minimum period shorter than a half cycle of the intermittent control clock C2 (a period in which “H” is maintained). For this reason, the power consumption of the microcomputer 1 in the intermittent operation mode can be minimized.

  In addition, the microcomputer 1 refers to the discrimination data CD in the internal non-volatile RAM 1m at the time of the power-on return when the supply of the operating power V4 to the microcomputer 1 is resumed. The intermittent operation can be correctly executed in the data CD set state.

  Furthermore, under the control of the intermittent operation clock generator 2 and the switching circuit 3, the supply control of the operation power supply V4 of the switch groups SW1 to SWn is performed in the same manner as the microcomputer 1, so that the intermittent operation mode setting in the switch groups SW1 to SWn is performed. The power consumption at the time can be effectively suppressed.

<Embodiment 2>
FIG. 4 is a block diagram showing an internal configuration of an in-vehicle ECU according to Embodiment 2 of the present invention. The in-vehicle ECU 20 according to the second embodiment includes a microcomputer 1, an intermittent operation clock generation unit 2, a switching circuit 3, a power supply IC 4, a communication unit 6, a logic circuit 7, and a resistance unit 8. The same components as those of the in-vehicle ECU 10 shown in FIG.

  The communication unit 6 can communicate with other external vehicle-mounted ECUs and the like via the communication line 9. As the communication unit 6 and the communication line 9, for example, a CAN (Controller Area Network) IC and a CAN communication line (CAN-H, CAN-L) can be considered. The communication unit 6 can transmit and receive data to and from the communication terminal PT of the microcomputer 1. In addition, the external power supply EVC is supplied to the power input unit VCC of the communication unit 6 through the power line LVC.

  The communication unit 6 detects whether or not a sleep condition such as “no signal is input from the communication line 9 for a predetermined period” is established. When the establishment of the sleep condition is detected, communication unit information D6 instructing the establishment of the sleep condition is transmitted to the microcomputer 1. While outputting to the communication terminal PT, the communication unit output signal S6 of “H” is usually changed to “L”.

  Further, when the communication unit 6 detects a communication unit activation factor (first condition) during operation, the communication unit 6 outputs communication unit information D6 instructing the generation of the communication unit activation factor to the communication terminal PT of the microcomputer 1, The communication unit output signal S6 of “H” is output.

  The logic circuit 7 receives the switching circuit output signal S3 from the switching circuit 3, the microcomputer output signal S1 obtained from the power supply control terminal PV of the microcomputer 1 and the communication unit output signal S6 from the communication unit 6, and receives the microcomputer output signal S1 and the switching circuit. When at least one of the output signal S3 and the communication unit output signal S6 is “H”, the logic circuit output signal S5 of “H” is output, and all of the microcomputer output signal S1, the switching circuit output signal S3, and the communication unit output signal S6 are output. When “L”, the logic circuit output signal S5 of “L” is output. Although not shown, the logic circuit 7 is always supplied with power.

  5 and 6 are flowcharts showing a series of processes relating to the intermittent operation of the in-vehicle ECU 20 according to the second embodiment. 2 and 3 are denoted by the same reference numerals, and the description thereof is omitted as appropriate.

  Hereinafter, with reference to FIG. 5 and FIG. 6, a series of processing procedures regarding the intermittent operation of the in-vehicle ECU 20 of the second embodiment will be described.

  First, when the establishment of the sleep condition on the communication line 9 is detected in step ST21 (Yes), the process proceeds to step ST22. On the other hand, when the sleep condition is not satisfied (No), step ST21 is repeated, and the vehicle-mounted ECU 20 continues normal operation.

  In step ST22, which is executed in the case of Yes in step ST21, the communication unit 6 sets the communication unit output signal S6 to “L”, and sets communication unit information D6 instructing the establishment of the sleep condition to the communication terminal PT of the microcomputer 1. Output to.

  In step ST23, when the microcomputer 1 recognizes that a predetermined power-off condition (second condition) is established (Yes), the microcomputer 1 shifts to processing after step ST24 in order to shift from the normal operation to the intermittent operation. On the other hand, when the predetermined power-off condition is not satisfied (No), the process returns to step ST21.

  Therefore, Yes is determined in step ST23 when the sleep condition on the communication line 9 is satisfied (Yes in step ST21) and the same power OFF condition as in the first embodiment is satisfied.

  That is, in the in-vehicle ECU 20, the condition (predetermined condition) for shifting from the normal mode setting to the intermittent operation mode setting is the first condition (sleep condition) regarding the content received from the communication line 9 of the communication unit 6 and the microcomputer 1 internal. This is a combination condition with the second condition (power OFF condition).

  After step ST24 as in the first embodiment, in step ST25, the microcomputer 1 sets the power supply control terminal PV (microcomputer output signal S1) to “L”, and the logic circuit output signal S7 of the logic circuit 7 is switched. The circuit output signal S3 (intermittent control clock C2) is determined by “H” and “L”.

  Thereafter, after step ST26 and step ST27, as in the first embodiment, in step ST28, the intermittent control clock C2 is reset by power-on return, and the intermittent control clock C2 starting from the initial state “L” is generated. At this time, since the microcomputer output signal S1, the communication unit output signal S6, and the switching circuit output signal S3 (intermittent control clock C2) all become “L”, the logic circuit output signal S7 becomes “L”.

  As a result, in step ST29, the power supply IC4 stops generating the operation power supply V4, so the supply of the operation power supply V4 to the power supply input unit VCC of the microcomputer 1 is stopped, and the microcomputer 1 is completely turned off. At this time, the supply of the operating power supply V4 to the switch groups SW1 to SWn is also stopped.

  And in step ST30, step ST29 and step ST30 are repeated until progress of predetermined power supply OFF time is confirmed (Yes).

  In step ST30, when it is confirmed that the predetermined power OFF time has elapsed (Yes), the process proceeds to step ST31, and the intermittent control clock C2 changes to “H”.

  As a result, in step ST32, the logic circuit output signal S7 changes from “L” to “H”, and the power supply IC4 resumes the generation of the operation power supply V4. Therefore, the operation power supply V4 to the power supply input VCC of the microcomputer 1 is resumed. Supply is resumed, and the microcomputer 1 and the communication unit 6 are in a power-on return state.

  Thereafter, similarly to the first embodiment, steps ST33 and ST34 are executed, and in step ST35 executed in the case of Yes in step ST33, the microcomputer 1 executes an intermittent operation with the operation clock of the internal oscillator 11. This intermittent operation is continued by repeating steps ST35 and ST36 until the completion is confirmed in step ST36.

  On the other hand, the communication unit 6 to which the external power supply EVC is constantly supplied determines whether or not there is a communication unit activation factor based on a signal obtained from the communication line 9 alone.

  In step ST37, the presence / absence of an internal activation factor of the microcomputer 1 is determined based on the presence / absence of any external input of any of the switch groups SW1 to SWn. Furthermore, the presence / absence of the communication unit activation factor is recognized based on the communication unit information D6 obtained from the communication terminal PT. When at least one of the internal activation factor and the communication unit activation factor is detected, it is determined that there is an activation factor.

  That is, if any external input of the switch group SW1 to SWn is recognized or the communication unit information D6 indicates a communication unit activation factor, it is determined that there is an activation factor (Yes), otherwise there is no dynamic factor ( No).

  In the case of No in step ST37, the process returns to step ST28 again, the intermittent control clock C2 is reset, and the process returns to the process of completely shutting off the supply of the operating power supply V4 to the microcomputer 1.

  On the other hand, in the case of Yes in step ST37, the processes of steps ST38 to ST41 are performed as in the first embodiment.

  Thus, the power supply IC 4 in the in-vehicle ECU 20 is a microcomputer only when the logic circuit output signal S7 (= intermittent control clock C2) serving as the power supply control signal when the intermittent operation mode is set indicates “H” indicating the power-on period. Since the operation power supply V4 is supplied to the microcomputer 1, the microcomputer 1 can execute the intermittent operation for detecting the presence or absence of the internal activation factor while minimizing the power consumption of the microcomputer 1 when the intermittent operation mode is set.

  That is, the in-vehicle ECU 20 according to the second embodiment reduces the power consumption of the microcomputer 1 by completely stopping the supply of the operation power supply V4 to the power supply input unit VCC when the operation of the microcomputer 1 is unnecessary when the intermittent operation mode is set. It can be suppressed to “0”. Since the power consumption of the microcomputer 1 occupies a major proportion of the power consumption of the entire in-vehicle ECU 20, the power consumption of the entire in-vehicle ECU 20 is effectively reduced by suppressing the power consumption to “0” when the operation of the microcomputer 1 is unnecessary. Can be aimed at.

  Further, the in-vehicle ECU 20 according to the second embodiment also exhibits the same effect as described in the in-vehicle ECU 10 according to the first embodiment.

  Further, the in-vehicle ECU 20 according to the second embodiment can set the intermittent operation mode based on external information obtained from the communication line 9 in addition to the internal factors of the microcomputer 1.

  In addition, since the communication unit 6 has a mode conversion function for returning from the intermittent operation mode to the normal mode, there is an effect that the power supply IC 4 can be returned to the ON state by the communication unit 6 alone without using the microcomputer 1.

<Embodiment 3>
FIG. 7 is a block diagram showing an internal configuration of an in-vehicle ECU that is Embodiment 3 of the present invention. The in-vehicle ECU 30 according to the third embodiment includes a microcomputer 1X, an intermittent operation clock generation unit 2, a switching circuit 3, a power supply IC 4, a logic circuit 5, and a resistance unit 8 as in the in-vehicle ECU 10 according to the first embodiment. Have. The same components as those of the in-vehicle ECU 10 shown in FIG.

  The microcomputer 1X is in an operating state when the operating power supply V4 is supplied to the power input unit VCC, operates with a clock generated by the internal oscillator 11 in the operating state, and changes over time of external inputs relating to the vehicle detected by the switch groups SW1 to SWn. When a change with time in one of the states of the switch groups SW1 to SWn (a state related to the vehicle) is detected, predetermined operation control is performed according to the external input content in which the change is detected. For example, when the switch SW1 is a sensor provided on the door and the switch SW1 is turned ON / OFF to indicate the “open” / “closed” state of the door, the microcomputer 1X indicates that the switch SW1 is ON (the door “open”). A switch that has detected a change when a change from time to time (door "closed" state) is detected or when a change from OFF (door "closed") state to ON (door "open" state) is detected Predetermined operation control is performed according to the contents of SW1 over time.

  Furthermore, the microcomputer 1X can recognize the state of the switch groups SW1 to SWn by converting them into the detection voltages V11 to V1n. For example, as described above, when the switch SW1 is a sensor provided on the door, the microcomputer 1X sets the detection voltage V11 to “H” when the switch SW1 is ON (when the door “open” state is detected). When it is OFF (when the door “closed” state is detected), the detection voltage V11 is set to “L”. Hereinafter, the detection voltages V11 to V1n corresponding to the switch groups SW1 to SWn are collectively referred to as terminal information IP. Accordingly, the microcomputer 1X recognizes the change with time of the detection voltages V11 to V1n by periodically storing the terminal information IP in an internal volatile memory, a register or the like (all not shown) during normal operation. Can do.

  Then, the microcomputer 1X performs the write operation of setting the determination data CD in the nonvolatile RAM 1m and writing the terminal information IP to the nonvolatile RAM 1m when the power-off condition is satisfied.

  Further, the microcomputer 1X compares the terminal information IP (detection voltages V11 to V1n) stored in the nonvolatile RAM 1m with the terminal information IP acquired from the current switch groups SW1 to SWn during the intermittent operation, and the comparison result is different. Is detected, there is an activation factor, and processing for returning to the normal mode is performed.

  In addition, when the microcomputer 1X returns from the power-off state when the power is turned on, based on the content of the determination data CD stored in the non-volatile RAM 1m, the microcomputer 1X performs intermittent operation during normal reset operation or intermittent operation mode setting. Execute the hour action.

  8 and 9 are flowcharts showing a series of processes related to the intermittent operation of the in-vehicle ECU 30 of the third embodiment. 2 and 3 are denoted by the same reference numerals, and the description thereof is omitted as appropriate.

  Hereinafter, with reference to FIG. 8 and FIG. 9, a series of processing procedures related to the intermittent operation of the in-vehicle ECU 30 of the third embodiment will be described.

  First, in step ST23, when the microcomputer 1X recognizes that a predetermined power-off condition is satisfied (Yes), the microcomputer 1X shifts to the processing after step ST24X to shift from the normal operation to the intermittent operation. On the other hand, when the predetermined power-off condition is not satisfied (No), the process returns to step ST23.

  In step ST24X performed after the power-off condition is established, the microcomputer 1X sets the determination data CD in the non-volatile RAM 1m and writes the terminal information IP in the non-volatile RAM 1m.

  After step ST24X, in step ST25, the microcomputer 1X sets the power control terminal PV (microcomputer output signal S1) to “L”, and the logic circuit output signal S5 of the logic circuit 7 changes to the switching circuit output signal S3 (intermittent control). It is determined by “H” and “L” of the clock C2).

  Thereafter, after step ST26 and step ST27, as in the first embodiment, in step ST28, the intermittent control clock C2 is reset by power-on return, and the intermittent control clock C2 starting from the initial state “L” is generated.

  As a result, in step ST29, since the power supply IC4 stops generating the operation power supply V4, the supply of the operation power supply V4 to the power supply input unit VCC of the microcomputer 1X is stopped, and the microcomputer 1X is completely turned off. At this time, the supply of the operating power supply V4 to the switch groups SW1 to SWn is also stopped.

  And in step ST30, step ST29 and step ST30 are repeated until progress of predetermined power supply OFF time is confirmed (Yes).

  In step ST30, when it is confirmed that the predetermined power OFF time has elapsed (Yes), the process proceeds to step ST31, and the intermittent control clock C2 changes to “H”.

  As a result, in step ST32, the logic circuit output signal S5 changes from “L” to “H”, and the power supply IC4 restarts the generation of the operation power supply V4. Therefore, the operation power supply V4 to the power supply input unit VCC of the microcomputer 1X The supply resumes, and the microcomputer 1X returns to the power-on return state.

  In step ST33a, the microcomputer 1X executes a process of reading the discrimination data CD and the terminal information IP stored in the nonvolatile RAM 1m.

  Next, when the determination data CD is in the set state in step ST33b (Yes), the process proceeds to step ST35 and subsequent steps. On the other hand, if the determination data CD is not in the set state in step ST33b (No), a normal reset operation is performed in step ST34.

  On the other hand, in step ST35, which is executed in the case of Yes in step ST33b, the microcomputer 1X performs an intermittent operation using the operation clock of the internal oscillator 11. This intermittent operation is continued by repeating steps ST35 and ST36 until the completion is confirmed in step ST36. In the third embodiment, the intermittent operation means an operation of recognizing the current state of the switch groups SW1 to SWn as terminal information IP including the detection voltages V11 to V1n.

  In step ST37X, the internal activation factor of the microcomputer 1X based on the comparison result between the terminal information IP read from the nonvolatile RAM 1m in step ST33a and the terminal information IP obtained from the switch groups SW1 to SWn in step ST35. Judgment is made.

  That is, in the above comparison result, if any of the detection voltages V11 to V1n in the terminal information IP is changed, it is determined that there is an activation factor (Yes), and any of the detection voltages V11 to V1n must be changed. If it is determined that there is no activation factor (No).

  If No in step ST37X, the process returns again to step ST28, the intermittent control clock C2 is reset, and the process returns to the process of completely shutting off the supply of the operating power supply V4 to the microcomputer 1X. On the other hand, in the case of Yes in step ST37X, the processes in steps ST38 to ST41 are performed as in the first embodiment.

  As in the case of the on-vehicle ECU 10 of the first embodiment, the on-vehicle ECU 30 of the third embodiment completely stops the supply of the operating power V4 to the power input unit VCC when the operation of the microcomputer 1X is not necessary when the intermittent operation mode is set. As a result, the power consumption of the microcomputer 1X can be suppressed to “0”.

  In addition, the vehicle-mounted ECU 30 according to the third embodiment, like the vehicle-mounted ECU 10 according to the first embodiment, detects an activation factor after execution of an intermittent operation when the intermittent operation mode is set by the microcomputer 1X, steps ST38 to ST41. By executing this, it is possible to independently return from the intermittent operation mode setting to the normal mode setting.

  Then, the microcomputer 1X in the in-vehicle ECU 30 writes the terminal information IP in the nonvolatile RAM 1m, and then shifts to the intermittent operation mode setting. Is recognized. For example, when the switch SW1 is a door open / close switch, it can be recognized that there is an activation factor only when the door changes from an open state to a closed state, or when the door changes from a closed state to an open state.

  In other words, the microcomputer 1X in the in-vehicle ECU 30 according to the third embodiment activates the change over time of the state related to the vehicle by utilizing the terminal information IP of the nonvolatile RAM 1m even during the intermittent operation executed after the power is turned off. As a factor, it is possible to reliably return to the normal mode setting.

<Others>
The present invention can be applied to a single vehicle-mounted ECU, and can be applied to all vehicle-mounted ECUs that require the microcomputer 1 (1X) to operate intermittently. In other words, the present invention can be applied regardless of the type of vehicle-mounted ECU that is used during traveling or used while the vehicle is stopped.

  In the configuration of the second embodiment shown in FIG. 4, the communication unit output signal S6 of the communication unit 6 is input to the logic circuit 7. However, the communication unit information D6 instructing whether there is a sleep condition or a communication unit activation factor. The microcomputer 1 sets the power supply control terminal PV (microcomputer output signal S1) and the switching circuit control terminal PC, so that an ECU equivalent to the in-vehicle ECU 20 can be realized without using the communication unit output signal S6. .

  Further, the intermittent operation clock generator 2 can be replaced by another microcomputer (CPU). That is, by using the other microcomputer, which consumes less power than the microcomputer 1, as the intermittent operation clock generator 2, it is possible to suppress the power consumption when the intermittent operation mode is set. In this case, the other microcomputer can be used not only when setting the intermittent operation mode but also when setting the normal mode.

  In the configuration shown in FIG. 7, the microcomputer 1X itself sets the detection voltages V11 to V1n based on the states of the switch groups SW1 to SWn. In addition to this configuration, a detection voltage generation circuit that generates the detection voltages V11 to V1n based on the states of the switch groups SW1 to SWn may be provided between the switch groups SW1 to SWn and the microcomputer 1X. It is.

1,1X Microcomputer 2 Intermittent operation clock generator 3 Switching circuit 4 Power supply IC
DESCRIPTION OF SYMBOLS 5 Logic circuit 6 Communication part 7 Logic circuit 8 Resistor part 9 Communication line 10, 20, 30 ECU for vehicle-mounted

Claims (7)

A microcomputer that is in an operating state when an operating power supply is supplied and that sets an intermittent operation mode when a predetermined condition is satisfied during operation;
When the intermittent operation mode is set, an intermittent operation power control unit that generates a power supply control signal that alternately indicates a power OFF period and a power ON period;
A power supply unit that supplies the operating power to the microcomputer only when the operating power is supplied to the microcomputer when the normal mode is set and the power supply control signal indicates a power-on period when the intermittent operation mode is set; With
In the intermittent operation mode setting, the microcomputer performs an intermittent operation for detecting the presence or absence of an activation factor related to the vehicle in the operation state, and when the occurrence of the activation factor is detected, from the intermittent operation mode setting to the normal mode Change to settings,
In-vehicle ECU. An in-vehicle ECU according to claim 1,
It further includes a communication unit capable of transmitting and receiving with an external communication line,
The microcomputer can exchange data with the communication unit,
The predetermined condition includes a combination condition of a first condition related to the received content of the communication unit and a second condition inside the microcomputer,
The communication unit has a mode conversion function capable of changing the power supply unit from the intermittent operation mode setting to the normal operation mode setting.
In-vehicle ECU. An in-vehicle ECU according to claim 1 or claim 2,
The intermittent operation power supply controller is
An intermittent operation clock generator for generating an intermittent operation clock during operation;
At the time of setting the intermittent operation mode by the microcomputer, the intermittent operation clock generation unit is set to an operation state, and the first switching setting for supplying the intermittent operation clock to the power supply unit as the power supply control signal is performed. A switching circuit for performing a second switching setting for setting the intermittent operation clock to a non-operating state when the normal mode is set by the microcomputer.
In-vehicle ECU. An in-vehicle ECU according to claim 3,
The microcomputer has a clock reset function for resetting the intermittent operation clock generation unit when the occurrence of the activation factor is not detected by the intermittent operation performed when the intermittent operation mode is set.
The intermittent operation clock generation unit generates the intermittent operation clock instructed in the order of the power OFF period and the power ON period after the reset.
In-vehicle ECU. The on-vehicle ECU according to any one of claims 1 to 4,
The microcomputer has a non-volatile memory inside, and when the intermittent operation mode is set, the determination data for instructing the intermittent operation mode is written to the non-volatile memory,
The microcomputer recognizes the presence or absence of the intermittent operation mode setting with reference to the determination data in the nonvolatile memory at the start of supply of the operation power.
In-vehicle ECU. An in-vehicle ECU according to claim 5,
The microcomputer writes information indicating a state related to a vehicle as terminal information in the nonvolatile memory when the intermittent operation mode is set.
In-vehicle ECU. An in-vehicle ECU according to claim 6,
The microcomputer performs the intermittent operation by detecting the presence or absence of the activation factor based on a comparison result between the terminal information read from the nonvolatile memory and the terminal information acquired during the intermittent operation. ,
In-vehicle ECU.

Images