JP2011196939A - Image target detector and method of detecting image target - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stably detect both of a minute target having a small pixel area and a small luminance value and a target having a large pixel area and a large luminance value.SOLUTION: A target detection circuit (30) includes: a surrounding region noise amount measurement circuit (31) for measuring the amount of noise equivalent to dispersion of the luminance value of a surrounding region; a feature region dividing circuit (32) for dividing into first and second feature regions according to a value of a noise ratio calculated for each pixel based on comparison of the amount of noise; a first binarization circuit (33) for generating a first binarization image by extracting a pixel having a luminance value larger than a first threshold for a pixel in the first feature region; a second binarization circuit (34) for generating a second binarization image by extracting a pixel having a luminance value larger than a second threshold for a pixel in the second feature region; and a binarization image integration circuit (35) for generating an integrated binarization image by OR operation of the first and second binarization images.

Description

  The present invention relates to an image target detection apparatus for automatically detecting an aircraft and flying objects in a monitoring area by combining an infrared imaging device and a position detection circuit in a monitoring system using an infrared imaging device, and displaying a detection position on a display. And an image target detection method.

  FIG. 13 is a configuration diagram of a conventional image target detection apparatus (see, for example, Patent Document 1). The conventional image target detection apparatus shown in FIG. 13 includes an infrared imaging device 10, an A / D converter 20, a target detection circuit 30, a position detection circuit 40, and a display 50. The target detection circuit 30 includes a minute target detection circuit 39.

  The A / D converter 20 converts the signal output from the infrared imaging device 10 into a digital image signal. The minute target detection circuit 39 in the target detection circuit 30 detects a minute target from the digital image signal output from the A / D converter 20 by detecting a minute pixel group formed with a luminance value higher than the surroundings. Extract and output a minute target binarized image showing significant pixels.

  The position detection circuit 40 determines the connection state of significant pixels of the minute target binarized image, detects the screen position, and outputs detected position information. The display 50 receives the digital image signal output from the A / D converter 20 and the detected position information output from the position detection circuit 40, and displays the detected position on the captured image.

  In the conventional image target detection apparatus in Patent Document 1, the minute target detection circuit 39 in the target detection circuit 30 calculates the luminance standard deviation of the local area for each pixel, calculates the threshold for each pixel in the local space, A minute target is detected by applying a binarizing filter to the entire image.

JP-A-7-209402

However, the prior art has the following problems.
Patent Document 1 is configured so that a binarized image is generated by a filter limited to a minute target, and detects an aircraft and a flying object that are minute targets. However, when such a small target is mixed with a target having a large pixel area, only the small target is extracted, and a target having a large pixel area cannot be detected. In addition, even when only a target having a large pixel area exists, there is a problem that the target cannot be detected.

  The present invention has been made to solve the above-described problems, and stably detects both a minute target with a small pixel area and a low luminance value and a target with a large pixel area and a high luminance value. An object of the present invention is to obtain an image target detection apparatus and an image target detection method.

  An image target detection apparatus according to the present invention performs a binarization process on each pixel of a digital signal image acquired using an infrared imaging device, thereby detecting a target formed with a luminance value higher than the surroundings. In the image target detection apparatus including the detection circuit, the target detection circuit includes a plurality of surrounding areas for each pixel, and each of the plurality of surrounding areas corresponds to variations in luminance values of a plurality of pixels constituting the surrounding area. A noise ratio is calculated for each pixel based on a comparison of the noise amounts measured for a plurality of surrounding areas by the surrounding area noise amount measuring circuit that measures the noise amount and the surrounding area noise amount measuring circuit. When the value exceeds a predetermined threshold value, the pixel is defined as the first feature region. When the calculated noise ratio is equal to or less than the predetermined threshold value, the pixel is defined as the second feature region. And a feature region dividing circuit that divides each pixel of the digital signal image into any one of the feature regions, and a luminance value that is greater than the first threshold value for the pixel defined as the first feature region by the feature region dividing circuit. The first binarization circuit that generates the first binarized image by extracting the pixels having, and the pixel defined as the second feature region by the feature region dividing circuit is more than the second threshold value. A second binarization circuit that generates a second binarized image by extracting pixels having a large luminance value; a first binarized image generated by the first binarization circuit; A binarized image integration circuit that generates an integrated binarized image for detecting a target by calculating a logical sum with the second binarized image generated by the second binarization circuit; Is included.

  In addition, the image target detection method according to the present invention detects a target formed with a luminance value higher than the surroundings by performing binarization processing on each pixel of a digital signal image acquired using an infrared imaging device. In the image target detection method including the target detection process, the target detection process is performed by providing a plurality of surrounding areas for each pixel, and for each of the plurality of surrounding areas, variation in luminance values of a plurality of pixels constituting the surrounding area. A noise ratio is calculated for each pixel based on a comparison of the respective noise amounts measured for a plurality of surrounding areas by the surrounding area noise amount measuring process step for measuring the corresponding noise amount and the surrounding area noise amount measuring process step, If the calculated noise ratio exceeds a predetermined threshold, the pixel is defined as the first feature region. If the calculated noise ratio is less than the predetermined threshold, the pixel is By defining the feature region of the digital signal image, the feature region division processing step for dividing each pixel of the digital signal image into any one of the feature regions, and the pixel defined as the first feature region by the feature region division processing step A first binarization processing step for generating a first binarized image by extracting pixels having a luminance value larger than a threshold value of 1 and a feature region division processing step define the second feature region. A second binarization processing step for generating a second binarized image by extracting a pixel having a luminance value larger than the second threshold for the obtained pixels, and a first binarization processing step. Integrated binary for detecting a target by calculating a logical sum of the generated first binarized image and the second binarized image generated in the second binarization processing step Binary image generation to generate a digitized image It is intended to include the processing steps.

  According to the image target detection apparatus and the image target detection method according to the present invention, by performing feature region division for each pixel based on the degree of variation in the luminance value of the surrounding region, the image target detection method and the image target detection method are appropriate according to the target size and luminance. By making it possible to perform binarization detection processing using a simple threshold, it is possible to stably detect both a small target with a small pixel area and a low luminance value and a target with a large pixel area and a high luminance value. An image target detection device and an image target detection method that can be performed can be obtained.

It is a block diagram of the image target detection apparatus in Embodiment 1 of this invention. It is explanatory drawing which shows the mode of operation | movement of the surrounding area noise amount measurement circuit in Embodiment 1 of this invention. It is a figure which shows the operation | use form of the image target detection apparatus in Embodiment 1 of this invention. It is an illustration figure of the digital signal image after image-capturing with the infrared imaging device in Embodiment 1 of this invention, and A / D-converting with an A / D converter. It is explanatory drawing regarding calculation of the noise ratio by the characteristic area division circuit in Embodiment 1 of this invention. It is explanatory drawing regarding the production | generation of the flag signal by the feature area division circuit in Embodiment 1 of this invention. It is a figure which shows a mode that the 1st feature area and the 2nd feature area were identified by the flag signal output by the feature area division circuit in Embodiment 1 of this invention. It is an internal block diagram of the 1st binarization circuit in Embodiment 1 of this invention. It is an internal block diagram of the 2nd binarization circuit in Embodiment 1 of this invention. It is a figure which shows the binarized image output from the 1st binarization circuit and the 2nd binarization circuit 34 in Embodiment 1 of this invention. It is the figure which showed the binary image output from the binarized image integration circuit in Embodiment 1 of this invention. It is a block diagram of the image target detection apparatus in Embodiment 2 of this invention. It is a block diagram of the conventional image target detection apparatus.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram of an image target detection apparatus according to Embodiment 1 of the present invention. The image target detection apparatus according to the first embodiment shown in FIG. 1 includes an infrared imaging device 10, an A / D converter 20, a target detection circuit 30, a position detection circuit 40, and a display 50. The target detection circuit 30 includes a surrounding area noise amount measurement circuit 31, a feature area division circuit 32, a first binarization circuit 33, a second binarization circuit 34, and a binarized image integration circuit 35. Yes.

  Compared to the configuration of the conventional image target detection apparatus in FIG. 13, the image target detection apparatus in the first embodiment is different in the internal configuration of the target detection circuit 30. Therefore, the function of the target detection circuit 30 of FIG. 1 in the first embodiment will be mainly described below.

  The surrounding area noise amount measurement circuit 31 in the target detection circuit 30 provides a plurality of surrounding areas for each pixel, and measures a noise amount corresponding to variations in luminance values of a plurality of pixels constituting the area for each surrounding area. To do. The feature region dividing circuit 32 calculates a noise ratio (noise amount ratio) between the surrounding regions based on the noise amount measured for each of the plurality of surrounding regions by the surrounding region noise amount measuring circuit 31, and based on the calculation result. By assigning each pixel to either the first feature region or the second feature region, the feature region is divided.

  The feature region dividing circuit 32 outputs a flag signal for identifying the feature region including the pixel for each pixel based on the result of the feature region division. At this time, the feature region dividing circuit 32 outputs “1” as the flag signal for the pixel corresponding to the first feature region, and outputs “2” as the flag signal for the pixel corresponding to the second feature region. To do.

  The first binarization circuit 33 detects a significant pixel by applying a first binarization process to the digital image signal that is the output of the A / D converter 20 using the first threshold value. Further, the first binarization circuit 33 passes only the pixels having the flag signal “1” from the detected significant pixels, and performs mask processing on the pixels having the other flag signals, thereby performing the first processing. Only significant pixels in one feature region are extracted and output as a first binarized image. Note that the first binarization circuit 33 can also perform the first binarization process after performing the mask process.

Similarly,
The second binarization circuit 34 detects a significant pixel by applying a second binarization process to the digital image signal that is the output of the A / D converter 20 using the second threshold value. Further, the second binarization circuit 34 passes only the pixels having the flag signal “2” from the detected significant pixels, and performs the mask process on the pixels having the other flag signals, Only significant pixels in the two feature regions are extracted and output as a second binarized image. Note that the second binarization circuit 34 can also perform the second binarization process after performing the mask process.

  The binarized image integration circuit 35 includes a first binarized image output from the first binarization circuit 33 and a second binarized image output from the second binarization circuit 34. By calculating each logical sum, an integrated binary image is output.

  In this manner, the target detection circuit 30 in FIG. 1 according to the first embodiment identifies the first feature region and the second feature region based on the comparison result of the noise amount, and the individual feature region corresponding to the region. Binarization processing can be performed using a threshold value. As a result, it is possible to stably detect both a minute target having a small pixel area and a low luminance value and a target having a large pixel area and a high luminance value.

  Next, detailed processing contents of the target detection circuit 30 of FIG. 1 in the first embodiment will be specifically described with reference to the drawings. FIG. 2 is an explanatory diagram showing an operation state of the surrounding area noise amount measurement circuit 31 according to the first embodiment of the present invention. FIG. 2 shows a state in which the region 2 centered on the target pixel 1 is divided into nine parts to include a predetermined number of pixels, and eight surrounding regions 2a to 2h are defined. Note that the target pixel 1 moves for each pixel, and eight different surrounding areas 2a to 2h are defined according to the position of the target pixel 1.

  As shown in FIG. 2, the surrounding area noise amount measurement circuit 31 defines eight surrounding areas 2 a to 2 h for each target pixel 1 of the digital image signal that is the output of the A / D converter 20. Furthermore, the surrounding area noise amount measurement circuit 31 calculates the noise amount of the plurality of surrounding areas 2a to 2h with respect to the target pixel 1 for each target pixel.

  For example, the surrounding area noise amount measurement circuit 31 obtains the noise amount for the first surrounding area 2a using the following expression (1).

Each code | symbol in said Formula (1) means the following contents.
(X, y): Image coordinates of the target pixel 1 Na: Number of pixels constituting the first surrounding area 2a Ba _i : Among the pixels constituted by Na in the first surrounding area 2a, i (i is (Integer greater than or equal to 1 and less than Na) luminance value of the 1st pixel Ba (￣): average value of luminance values of Na constituent pixels in the first surrounding area 2a Note that the notation (￣) is the character preceding the parenthesis It means the average value with a bar at the top of the column.

  The surrounding area noise amount measurement circuit 31 uses the following equations (2) to (8) to calculate the noise amounts for the second surrounding area 2b to the eighth surrounding area 2h as well as the first surrounding area 2a. Can be sought. Note that the subscripts a to h in the expressions (1) to (8) correspond to the subscripts of the first peripheral region 2a to the eighth peripheral region 2h.

  Next, the operation of the feature region dividing circuit 32 will be described. The feature region dividing circuit 32 according to the first embodiment is located 2 diagonally across the target pixel 1 based on the noise amounts of the eight surrounding regions calculated by the surrounding region noise amount measuring circuit 31. The noise ratio is calculated from the amount of noise in two surrounding areas. Therefore, first, the calculation of the noise ratio between the second surrounding area 2b and the seventh surrounding area 2g located diagonally thereof will be specifically described.

  The feature region dividing circuit 32 obtains a noise ratio Noise Rate 0 (x, y) between the noise amount SDb of the second surrounding region 2b and the noise amount SDg of the seventh surrounding region 2g by the following equation (9). .

  That is, in the above equation (9), the feature region dividing circuit 32 uses the second noise region 2b and the seventh noise region 2g with the larger noise amount as the numerator and the smaller noise amount as the denominator. Seeking the noise ratio. When both noise amounts are equal, the noise ratio is obtained as 1. Therefore, the calculated noise ratio becomes a value of 1 or more.

  The feature region dividing circuit 32 compares the noise ratio Noise Rate 0 (x, y) calculated by the above equation (9) with the constant Const0, and sets the flag signal (0) to “1” according to the following equation (10). ”Or“ 2 ”.

  That is, in the above equation (10), the feature region dividing circuit 32 flags “1” indicating the first feature region when the value of the noise ratio Noise Rate 0 (x, y) is larger than the constant Const0. Set to signal (0). On the other hand, when the value of the noise ratio Noise Rate 0 (x, y) is equal to or smaller than the constant Const0, the feature region dividing circuit 32 sets “2” indicating the second feature region to the flag signal (0).

  Similarly, the feature area dividing circuit 32 generates noise ratios Noise Rate1 (x, y), “third surrounding area” regarding “first surrounding area 2a and eighth surrounding area 2h” located diagonally in FIG. The noise ratio Noise Rate2 (x, y) regarding “2c and the sixth surrounding area 2f” and the noise ratio Noise Rate3 (x, y) regarding “the fourth surrounding area 2d and the fifth surrounding area 2e” are expressed by the following equations: It calculates | requires by (11)-(13).

  Further, the feature region dividing circuit 32 sets the flag signal (1) to the flag signal (3) according to the following equations (14) to (16).

  When any one of the flag signal (0) to flag signal (3) is set to “1”, the feature region dividing circuit 32 finally outputs the flag signal as “1”. . On the other hand, if any of the flag signals (0) to (3) is set to “2”, the feature region dividing circuit 32 finally outputs the flag signal as “2”. That is, if any one of the four noise ratios calculated for the peripheral region located diagonally is larger than the constant Const0, the flag signal is output as “1”.

FIG. 3 is a diagram showing an operation mode of the image target detection apparatus according to Embodiment 1 of the present invention. Each code | symbol in FIG. 3 means the following contents.
Reference numeral 61: Distant aircraft Reference numeral 62: Distant flying object Reference numeral 63: Takeoff aircraft Reference numeral 64: Building and monitoring tower in which the infrared imaging device 10 of the image target detection device is installed to monitor the airfield sky Reference numeral 65 : Monitoring area of the infrared imaging device 10 Reference numeral 66: Runway such as an airfield

FIG. 4 is an exemplary view of a digital signal image after being imaged by the infrared imaging device 10 according to Embodiment 1 of the present invention and A / D converted by the A / D converter 20. In the digital signal image in FIG. 4, the respective symbols mean the following contents.
71, 72: Infrared images of a distant aircraft 61 and a distant projectile 62 (corresponding to a minute target having a small pixel area and a low luminance value)
73: Infrared image of aircraft 63 accelerating immediately after takeoff (corresponding to a target with a large pixel area and high luminance value)

Next, the operation of the feature region dividing circuit 32 will be described using the digital signal image shown in FIG. FIG. 5 is an explanatory diagram relating to the calculation of the noise ratio by the feature region dividing circuit 32 according to the first embodiment of the present invention. Specifically, FIG. 5A to FIG. 5F are diagrams showing the following contents, respectively.
FIG. 5A is a diagram showing a cross section 73a set in the infrared image portion of the aircraft 63 in the digital signal image of FIG.
FIG. 5B is a diagram showing the luminance value distribution of the cross section 73a in the infrared image 73 of the aircraft 63 being accelerated immediately after takeoff, which is a target with a large pixel area and a high luminance value.
FIG. 5C is a diagram showing a noise amount distribution corresponding to the luminance value distribution of FIG.
FIG. 5D is a diagram showing the noise ratio corresponding to the noise amount distribution of FIG.
FIG. 5E is a diagram showing a maximum value distribution of luminance values when the digital signal image of FIG. 5A is projected in the y direction.
FIG. 5F is a diagram showing a noise ratio calculated for a distant aircraft 61 and a flying object 62 corresponding to a minute target having a small pixel area and a low luminance value.

  As shown in FIG. 5B, the luminance value distribution in the vicinity of the infrared image 73 of the aircraft 63 that is accelerating immediately after takeoff, which is a target with a large pixel area, is roughly divided into a background portion and a high luminance portion. Compared with the background portion having a low luminance value distribution, the luminance value distribution near the apex of the high luminance portion surrounded by a dotted line is undulated due to the influence of combustion in the afterburner of the aircraft 63.

  As shown in FIG. 5C, the noise amount calculated by the surrounding area noise amount measurement circuit 31 using the above equations (1) to (8) is small in the portion corresponding to the background portion, but corresponds to the high luminance portion. In the portion, it becomes larger than the noise amount in the background due to the influence of the undulation of the luminance value distribution as shown in FIG.

  Further, in the edge portion in the luminance value distribution of FIG. 5B, both the background portion and the high luminance portion are included in the eight peripheral regions 2a to 2h as shown in FIG. The calculated amount of noise increases.

  For the noise amount distribution as shown in FIG. 5C, the noise ratio (Noise Rate0 (x) calculated by the feature region dividing circuit 32 using the above equations (9) and (11) to (13). , Y) to Noise Rate3 (x, y)) are as shown in FIG. In the above formula (9) and the above formulas (11) to (13), the noise ratio is obtained using the peripheral areas 2a to 2h located diagonally, and therefore the noise ratio of the background portion becomes small. On the other hand, the noise ratio in the vicinity of the edge portion of the high luminance portion is increased, and the noise ratio in the vicinity of the apex of the high luminance portion is larger than the noise undulation in the background portion and smaller than the noise ratio in the edge portion.

  On the other hand, as shown in FIG. 5 (e), a distant aircraft 61 and a flying object 62 corresponding to a minute target having a small pixel area and a low luminance value have a higher luminance portion than the aircraft 63. The luminance value is low, and the luminance value near the apex is stable without undulations. Therefore, as shown in FIG. 5F, the noise ratio calculated for such a minute target is a value in which the noise ratio near the apex of the high luminance part is as low as the noise ratio of the background part. It becomes.

FIG. 6 is an explanatory diagram regarding generation of flag signals by the feature region dividing circuit 32 according to the first embodiment of the present invention. Specifically, FIG. 6A to FIG. 6D are diagrams showing the following contents, respectively.
FIG. 6A: Noise ratio distribution (corresponding to FIG. 5D) calculated for the aircraft 63 that is accelerated immediately after takeoff, which is a target with a large pixel area and a high luminance value, and a constant Const0 (FIG. 6 ( It is a figure which shows the relationship with the equivalent of the broken line in a).
FIG. 6B is a diagram showing a flag signal output from the feature region dividing circuit 32 based on the above equation (10) and the above equations (14) to (16) with respect to FIG.
FIG. 6C: Noise ratio distribution (corresponding to FIG. 5F) calculated for the distant aircraft 61 and the flying object 62, which are minute targets with a small pixel area and a low luminance value, and a constant Const0 (FIG. 6 (a) is a diagram showing a relationship with a broken line in FIG.
FIG. 6D is a diagram showing a flag signal output from the feature region dividing circuit 32 based on the above equation (10) and the above equations (14) to (16) with respect to FIG.

  As shown in FIGS. 6A and 6B, when the noise ratio distribution is larger than the constant Const0, the feature region dividing circuit 32 sets the flag signal to “1” and the noise ratio distribution is the constant Const0. In the following cases, the flag signal is set to “2”. In FIG. 6B, the region where the flag signal is “1” corresponds to the first feature region, and the region where the flag signal is “2” corresponds to the second feature region. In this way, the feature region dividing circuit 32 can extract a target portion having a large pixel area and a high luminance value as the first feature region.

  Similarly, as shown in FIGS. 6C and 6D, when the noise ratio distribution is larger than the constant Const0, the feature area dividing circuit 32 sets the flag signal to “1” and the noise ratio distribution. Is equal to or less than the constant Const0, the flag signal is set to “2”. In FIG. 6D, the region where the flag signal is “1” corresponds to the first feature region, and the region where the flag signal is “2” corresponds to the second feature region. In this way, the feature region dividing circuit 32 extracts the edge portion of the minute target portion having a small pixel area and a low luminance value as the first feature region, and the portion inside the edge portion as the second target portion. It can be extracted as a feature region.

  FIG. 7 is a diagram showing a state in which the first feature region and the second feature region are identified by the flag signal output by the feature region dividing circuit 32 according to the first embodiment of the present invention. Specifically, FIG. 7A shows a digital signal image after A / D conversion, and FIG. 7B shows a distribution of flag signals for each pixel.

  Next, operations of the first binarization circuit 33 and the second binarization circuit 34 will be described. FIG. 8 is an internal configuration diagram of the first binarization circuit 33 in the first embodiment of the present invention. The first binarization circuit 33 includes a comparison circuit 33a and a first mask circuit 33b. The comparison circuit 33a performs a first binarization process with a global threshold value on each pixel of the digital image signal that is the output of the A / D converter 20. Specifically, the comparison circuit 33a outputs a binary image in which a pixel larger than the global threshold is a logical value “1” and the other is a logical value “0”.

  Next, the first mask circuit 33b reads the flag signal that is the output of the feature region dividing circuit 32, and among the first binarization processing results by the comparison circuit 33a, the second flag signal is “2”. Only the binarization processing result of the first feature region whose flag signal is “1” is output.

  On the other hand, FIG. 9 is an internal configuration diagram of the second binarization circuit 34 in the first embodiment of the present invention. The second binarization circuit 34 includes a minute target detection circuit 34a and a second mask circuit 34b. The micro target detection circuit 34a corresponds to the conventional micro target detection circuit 39 in FIG. 13, and for extracting a micro target for each pixel of the digital image signal that is the output of the A / D converter 20. A second binarization process is performed. Specifically, the minute target detection circuit 34a outputs a binary image having a logical value “1” for pixels larger than a threshold for detecting a minute target and a logical value “0” for the other pixels.

  Next, the second mask circuit 34b reads the flag signal that is the output of the feature region dividing circuit 32, and the flag signal is “1” in the second binarization processing result by the minute target detection circuit 34a. By masking the first feature region, only the binarization processing result of the second feature region whose flag signal is “2” is output.

FIG. 10 is a diagram showing a binarized image output from the first binarization circuit 33 and the second binarization circuit 34 in Embodiment 1 of the present invention. Specifically, FIG. 10A to FIG. 10C are diagrams showing the following contents, respectively.
FIG. 10A: a digital signal image (multi-valued image) that is the output of the A / D converter 20
10B: A binary image obtained by the first binarization process performed to extract a target having a large pixel area and a high luminance value by the first binarization circuit 33. c): a binary image obtained by the second binarization process performed by the second binarization circuit 34 to extract a minute target having a small pixel area and a low luminance value.

  The global threshold used for the first binarization process for extracting a target having a large pixel area and a high luminance value is, for example, the average luminance in the digital signal image in the luminance portion as shown in FIG. And based on the amount of noise, it can be calculated by the following equation (17).

In the above equation (17), B _{Image max} is an average luminance value in the digital signal image, C is a constant, and σ _image is a standard deviation in the digital signal image.

  The first binarization circuit 33 shown in FIG. 8 is the first binary using the global threshold for the first feature region shown as white in the flag signal image of FIG. 7B. Will be processed. Here, the first feature region includes a target region having a large pixel area and a high luminance value, as well as a peripheral portion of a minute target having a small pixel area and a low luminance value (see FIG. 7B).

  However, as shown in FIG. 5 (e) above, the brightness value distribution of the distant aircraft 61 and the brightness value distribution of the flying object 62 are smaller than the brightness distribution of the aircraft 63 that touches the afterburner, and The pixel area occupying the screen in the digital image signal is also small. For this reason, the aircraft 61 and the flying object 62 are not extracted by the binarization process using the global threshold value obtained from the comparison circuit 33a shown in FIG. 8, and only the aircraft 63 can be detected. (See FIG. 10B).

  On the other hand, the second binarization circuit 34 shown in FIG. 9 has a threshold value for extracting a minute target for the second feature region shown as black in the flag signal image of FIG. 7B. The second binarization process using is performed. Here, the aircraft 63 that is accelerating immediately after takeoff is not extracted by the second binarization process because the region is identified as the first feature region. In addition, a micro target area having a small pixel area and a low luminance value is identified as a second feature area surrounded by the first feature area (see FIG. 7B), and is used to extract a micro target. By performing the second binarization process using an appropriate threshold, it is possible to detect only a minute target (see FIG. 10C).

  Next, the operation of the binarized image integration circuit 35 will be described. FIG. 11 is a diagram showing an integrated binarized image output from the binarized image integration circuit 35 in Embodiment 1 of the present invention. In the binarized image integration circuit 35, the binarized image in the first feature region output from the first binarization circuit 33 and the second feature region output from the second binarization circuit 34. A logical sum with the binarized image is obtained, and an integrated binarized image is generated.

  As described above, according to the first embodiment, the ambient area noise amount measurement circuit, the feature area division circuit, the first binarization circuit, the second binarization circuit, and the binarized image integration circuit are configured. The target detection circuit is provided. As a result, the binarization detection process can be performed using an appropriate threshold value according to the target size and luminance by performing feature region division for each pixel based on variations in luminance values of surrounding regions. . Therefore, it is possible to obtain an image target detection apparatus and an image target detection method that can stably detect both a minute target having a small pixel area and a low luminance value and a target having a large pixel area and a high luminance value.

Embodiment 2. FIG.
The feature area dividing circuit 32 in the first embodiment calculates the four noise ratios calculated for the peripheral areas located diagonally, and obtains the flag signal. On the other hand, the feature area dividing circuit 32 according to the second embodiment calculates a noise ratio by a method different from that of the first embodiment.

  FIG. 12 is a configuration diagram of the image target detection apparatus according to the second embodiment of the present invention. The image target detection apparatus according to the second embodiment shown in FIG. 12 includes an infrared imaging device 10, an A / D converter 20, a target detection circuit 30, a position detection circuit 40, and a display 50. The target detection circuit 30 includes a surrounding area noise amount measurement circuit 31, a feature area division circuit 32, a first binarization circuit 33, a second binarization circuit 34, and a binarized image integration circuit 35. ing.

  Further, the feature region dividing circuit 32 in the second embodiment includes a noise amount ordering circuit 32a, a noise amount ratio calculation circuit 32b, and a ratio comparison circuit 32c. The noise amount ordering circuit 32a receives the output of the surrounding area noise amount measuring circuit 31, and orders the eight surrounding areas 2a to 2h according to the amount of noise. For example, as shown in the following equation (18), the noise amounts in the respective peripheral areas calculated by the above equations (1) to (8) are ordered.

  In the above equation (18), “*” in the subscript rank * indicates an ordering number, which is a number when ordering in ascending order. For example, rank1 indicates that the noise amount has a minimum value.

  Next, the noise amount ratio calculation circuit 32b calculates the ratio between rank8 indicating the maximum noise value calculated by the noise amount ordering circuit 32a and rank1 indicating the minimum noise value by the following equation (19).

  Then, the ratio comparison circuit 32c sets the flag signal to “1” or “2” according to the following equation (20).

  Specifically, the ratio comparison circuit 32c sets the flag signal to “1” when the ratio between the maximum noise amount and the minimum noise amount calculated by the above equation (19) is larger than the constant Const0. In other cases, the flag signal is set to “2”.

  The feature region dividing circuit 32 according to the second embodiment extracts the region having a high noise ratio in the peripheral region for each pixel by ordering the noise amounts in the peripheral region and taking the ratio between the maximum value and the minimum value. Can do. As a result, it is possible to obtain an image similar to the binary image of the flav signal shown in FIG.

  As described above, according to the second embodiment, it is possible to extract a region having a high noise ratio in the peripheral region for each pixel by ordering the amount of noise in the peripheral region, which is the same as in the first embodiment. An effect can be obtained.

Embodiment 3 FIG.
The noise amount ordering circuit 32a in the feature region dividing circuit 32 in the previous second embodiment outputs the maximum noise value and the minimum noise value. On the other hand, in the third embodiment, the noise amount ordering circuit 32a in the feature area dividing circuit 32 outputs the second smallest value and the second largest value of the ordered noise amount. The configuration of the image target detection apparatus in the third embodiment is the same as the configuration in FIG. 12 in the second embodiment.

  The noise amount ratio calculation circuit 32b according to the third embodiment calculates the ratio of rank 7 indicating the second largest noise value calculated by the noise amount ordering circuit 32a and rank 2 indicating the second smallest noise value by the following formula ( 21).

  Then, the ratio comparison circuit 32c sets the flag signal to “1” or “2” according to the above equation (20) as in the second embodiment. Specifically, the ratio comparison circuit 32c outputs the flag signal when the ratio between the second largest noise amount and the second smallest noise amount calculated by the above equation (21) is larger than the constant Const0. Set to “1”, otherwise set the flag signal to “2”.

  The feature area dividing circuit 32 according to the third embodiment orders the noise amount of the surrounding area and takes the ratio between the second largest value and the second smallest value, thereby obtaining the noise ratio of the surrounding area for each pixel. Can be extracted. As a result, when an indeterminate noise pixel is included in the surrounding area for each pixel and fluctuates, the noise ratio can be obtained by removing the maximum value and the minimum value of the noise amount. As a result, it is possible to improve the robustness.

  As described above, according to the third embodiment, the amount of noise in the surrounding area can be ordered to extract a region having a high noise ratio in the surrounding area for each pixel. Similar effects can be obtained. Further, by extracting a region having a high noise ratio without using the maximum and minimum values of the noise amount, it is possible to improve the robustness as compared with the second embodiment.

  DESCRIPTION OF SYMBOLS 10 Infrared imaging device, 20 A / D converter, 30 Target detection circuit, 31 Ambient area noise amount measurement circuit, 32 Feature area division circuit, 32a Noise amount ordering circuit, 32b Noise amount ratio calculation circuit, 32c Ratio comparison circuit, 33 First binarization circuit, 33a comparison circuit, 33b first mask circuit, 34 second binarization circuit, 34a minute target detection circuit, 34b second mask circuit, 35 binarized image integration circuit, 40 Position detection circuit, 50 display.

Claims (4)

In an image target detection apparatus having a target detection circuit for detecting a target formed with a luminance value higher than the surrounding by performing binarization processing on each pixel of a digital signal image acquired using an infrared imaging device ,
The target detection circuit includes:
A plurality of surrounding areas are provided for each pixel, and for each of the plurality of surrounding areas, a surrounding area noise amount measurement circuit that measures a noise amount corresponding to variations in luminance values of a plurality of pixels constituting the surrounding area;
A noise ratio is calculated for each pixel based on a comparison of the respective noise amounts measured for the plurality of surrounding areas by the surrounding area noise amount measurement circuit, and when the calculated noise ratio exceeds a predetermined threshold, If the pixel is defined as a first feature area and the calculated noise ratio is less than or equal to a predetermined threshold value, the pixel is defined as a second feature area, whereby each pixel of the digital signal image is selected. A feature region dividing circuit that divides into feature regions;
For a pixel defined as the first feature region by the feature region dividing circuit, a pixel having a luminance value greater than a first threshold is extracted to generate a first binarized image. A value circuit;
A second binarized image is generated by extracting a pixel having a luminance value larger than a second threshold for the pixel defined as the second feature region by the feature region dividing circuit. A value circuit;
Calculating a logical sum of the first binarized image generated by the first binarization circuit and the second binarized image generated by the second binarization circuit; An image target detection apparatus comprising: a binarized image integration circuit that generates an integrated binarized image for detecting the target. The image target detection apparatus according to claim 1,
The feature region dividing circuit orders the respective noise amounts measured for the plurality of surrounding regions by the surrounding region noise amount measuring circuit in descending order, and sets a ratio between the minimum value and the maximum value of the ordered noise amounts. An image target detection apparatus characterized by having a noise ratio. The image target detection apparatus according to claim 1,
The feature region dividing circuit orders the noise amounts measured for the plurality of surrounding regions by the surrounding region noise amount measuring circuit in descending order, and the second smallest value and second largest of the ordered noise amount An image target detection apparatus characterized in that a ratio with a value is the noise ratio. In an image target detection method including a target detection process for detecting a target formed with a luminance value higher than the surrounding by performing binarization processing on each pixel of a digital signal image acquired using an infrared imaging device ,
The target detection process includes
A plurality of surrounding areas are provided for each pixel, and for each of the plurality of surrounding areas, a surrounding area noise amount measurement processing step for measuring a noise amount corresponding to variations in luminance values of a plurality of pixels constituting the surrounding area;
When a noise ratio is calculated for each of the pixels based on a comparison of the respective noise amounts measured for the plurality of surrounding areas in the surrounding area noise amount measurement processing step, and the calculated noise ratio exceeds a predetermined threshold value If the pixel is defined as a first feature area and the calculated noise ratio is less than or equal to a predetermined threshold value, the pixel is defined as a second feature area, so that each pixel of the digital signal image is A feature region dividing process step of dividing the feature region into
A first binarized image is generated by extracting a pixel having a luminance value larger than a first threshold for the pixel defined as the first feature region by the feature region dividing processing step. Binarization processing steps;
A second binarized image is generated by extracting a pixel having a luminance value larger than a second threshold for the pixel defined as the second feature region by the feature region dividing processing step. Binarization processing steps;
Calculating the logical sum of the first binarized image generated in the first binarization processing step and the second binarized image generated in the second binarization processing step Then, a binarized image integration processing step for generating an integrated binarized image for detecting the target is provided.

Images