JP2011188140A - Infrared solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-sensitivity infrared solid-state imaging element reduced in noise. <P>SOLUTION: The infrared solid-state imaging element including an infrared detection pixel array 250 formed on a substrate and a detection circuit part 260 formed on the substrate is provided. The infrared detection pixel array includes a plurality of row wires 210; a plurality of column wires 220; and a plurality of infrared detection pixels 110, each having one end connected to any of the plurality of row wires and the other end connected to any of the plurality of column wires for generating a first electric signal sg1, based on the received infrared ray. The detection circuit part includes: a plurality of integrating amplifier circuits 40, each connected to the corresponding one of the column wires for generating a second electric signal sg2, by integrating and amplifying the first electric signal; and a plurality of comparison circuits 50 each connected to the corresponding one of the plurality of respective integrating amplifier circuits, and comparing the second electric signal with a predetermined reference voltage Vref to output a third electric signal sg3. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an infrared solid-state imaging device.

  Infrared rays have the feature of being more permeable to smoke and fog than visible light, so infrared imaging is applied to a wide range of fields such as the defense field, surveillance cameras, and fire detection cameras.

  For example, in an uncooled infrared solid-state imaging device, infrared light having a wavelength of about 10 μm (micrometer) is converted into heat, and a temperature change caused by the weak heat is converted into an electric signal. Infrared image information is obtained by reading out the electrical signal. An example of such an infrared solid-state imaging device is an infrared sensor using a silicon pn junction that converts a temperature change into a voltage change by applying a constant forward current.

  For example, in a conventional infrared solid-state image sensor, an analog voltage signal based on the output voltage from the infrared detector is output from the chip of the infrared solid-state image sensor, and the analog voltage signal is converted into a digital signal on the substrate on which the chip is mounted. Converted. Since the change of the electrical signal due to infrared rays is very small, the effective sensitivity is likely to be reduced due to the influence of noise in the analog voltage signal transmission path.

In Patent Document 1, as an AD converter connected to a sensing element, a signal of the sensing element is held in a storage unit as an initial value, and the storage unit is charged by a first fixed signal and a second fixed signal thereafter. Alternatively, a technique is disclosed in which discharge is performed and the time change of the electrical signal in the storage unit is measured.
However, even if this method is used, there is a limit to noise reduction and there is room for improvement.

JP 2005-348325 A

  The present invention provides a highly sensitive infrared solid-state imaging device with reduced noise.

  According to one aspect of the present invention, an infrared detection pixel array provided on a substrate and a detection circuit unit provided on the substrate are provided, the infrared detection pixel array with respect to a main surface of the substrate. A plurality of row wirings extending in a first direction parallel to the main surface, a plurality of column wirings extending in a second direction parallel to the main surface and non-parallel to the first direction, At the intersection between the row wiring and the plurality of column wirings, one end is connected to any of the plurality of row wirings and the other end is connected to any of the plurality of column wirings. A plurality of infrared detection pixels that generate a first electric signal based on the detection signal, and the detection circuit unit is connected to the column wiring and integrates and amplifies the first electric signal to generate a second electric signal. Connected to each of a plurality of integral amplifier circuits and the plurality of integral amplifier circuits; A serial second electrical signals, compares the reference voltage to a predetermined, the infrared solid-state imaging device is provided, characterized in that it comprises a plurality of comparator circuit for outputting a third electrical signal.

  According to the present invention, a highly sensitive infrared solid-state imaging device with reduced noise is provided.

It is a schematic diagram which shows an infrared solid-state image sensor. It is a schematic diagram which shows operation | movement of an infrared solid-state image sensor. It is a schematic diagram which shows the infrared solid-state image sensor of a comparative example. It is a schematic diagram which shows operation | movement of the infrared solid-state image sensor of a comparative example. It is a top view which shows the infrared detection pixel of an infrared solid-state image sensor. It is typical sectional drawing which shows the infrared detection pixel of an infrared solid-state image sensor. It is a schematic diagram which shows an infrared solid-state image sensor. It is a schematic diagram which shows operation | movement of an infrared solid-state image sensor. It is a schematic diagram which shows an infrared solid-state image sensor. It is a schematic diagram which shows operation | movement of an infrared solid-state image sensor. It is typical sectional drawing which shows the infrared detection pixel of an infrared solid-state image sensor. It is typical sectional drawing which shows the infrared detection pixel of an infrared solid-state image sensor.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratios may be represented differently depending on the drawings.
Note that, in the present specification and each drawing, the same elements as those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate.

(First embodiment)
FIG. 1 is a schematic view illustrating the configuration of an infrared solid-state imaging device according to the first embodiment of the invention.
As shown in FIG. 1, the infrared solid-state imaging device 310 according to the present embodiment includes an infrared detection pixel array 250 provided on the substrate 301 and a detection circuit unit 260 provided on the substrate 301.

For example, a silicon substrate is used as the substrate 301.
In the infrared solid-state imaging device 310, an infrared detection pixel array 250 that receives infrared rays and generates an analog voltage signal, and a detection circuit unit 260 that converts the generated analog voltage signals into digital signals are on the same substrate 301. Is provided. That is, analog-digital conversion (hereinafter referred to as AD conversion) is performed in the detection circuit unit 260 formed monolithically with the infrared detection pixel array 250.

  The infrared detection pixel array 250 includes a plurality of row wirings 210, a plurality of column wirings 220, and a plurality of infrared detection pixels 110.

The plurality of row wirings 210 extend in a first direction parallel to the main surface of the substrate 301.
The plurality of column wirings 220 are parallel to the main surface of the substrate 301 and extend in a second direction that is not parallel to the first direction. For example, the second direction is orthogonal to the first direction.

  The plurality of infrared detection pixels 110 are provided at intersections between the plurality of row wirings 210 and the plurality of column wirings 220. One end of each of the plurality of infrared detection pixels 110 is connected to one of the plurality of row wirings 210. The other end of each of the plurality of infrared detection pixels 110 is connected to one of the plurality of column wirings 220. The plurality of infrared detection pixels 110 generate the first electrical signal sg1 based on the received infrared light. An example of the infrared detection pixel 110 will be described later.

  The detection circuit unit 260 includes a plurality of integration amplifier circuits 40 and a plurality of comparison circuits 50. The plurality of integral amplifier circuits 40 are connected to each of the column wirings 220. The plurality of integrating amplifier circuits 40 integrate and amplify the first electric signal sg1 to generate the second electric signal sg2.

  The plurality of comparison circuits 50 are connected to each of the plurality of integral amplification circuits 40. Each of the plurality of comparison circuits 50 compares the second electric signal sg2 with a predetermined reference voltage Vref and outputs a third electric signal sg3.

  As described above, in the infrared solid-state imaging device 310 according to the present embodiment, the combination of the integrating amplifier circuit 40 and the comparison circuit 50 is used as the detection circuit unit 260, so that the first analog voltage signal of the infrared detection pixel 110 is obtained. The electric signal sg1 is AD changed while reducing noise. Thereby, a highly sensitive infrared solid-state image sensor can be provided.

  In FIG. 1, two row wirings 210 are drawn and two column wirings 220 are drawn, but the number of row wirings 210 and the number of column wirings 220 are arbitrary.

A specific example of the configuration of the infrared solid-state image sensor 310 will be further described.
As shown in FIG. 1, each of the plurality of row wirings 210 is connected to one end of the infrared detection pixel 110 arranged along the row direction (first direction). Each of the plurality of column wirings 220 is connected to the other end of the infrared detection pixel 110 arranged along the column direction (second direction). In this specific example, a pn junction element having a pn junction is used as the infrared detection pixel 110. The row wiring 210 is connected to one end (anode) of the pn junction element, and the column wiring 220 is connected to the other end (cathode) of the pn junction element.

Each of the plurality of row wirings 210 is connected to a row selection circuit 305 (for example, a vertical shift register).
The row selection circuit 305 sequentially selects the infrared detection pixels 110 row by row via the row wiring 210, and sequentially applies the bias voltage Vd to the infrared detection pixels 110 as the row selection signal sgs.

  On the other hand, one end of each of the plurality of column wirings 220 is connected to the integrating amplifier circuit 40. The other end of each of the plurality of column wirings 220 is connected to each of the plurality of load transistors 31. That is, the cathode side of the pn junction element of the infrared detection pixel 110 is connected to the drain of the load transistor 31 via the column wiring 220.

  An output of the integrating amplifier circuit 40 connected to one end of the column wiring 220 is connected to the comparison circuit 50. In this specific example, the output of the comparison circuit 50 is connected to the edge detection circuit 63, and the output of the edge detection circuit 63 is further input to the latch circuit 64. A counter circuit 65 is connected to the latch circuit 64, and the latch circuit 64 outputs a digital output 64D.

  A column selection circuit 306 (for example, a horizontal shift register) is connected to the latch circuit 64. Each column wiring 220 is selected by the column selection circuit 306, and an electric signal (for example, the first electric signal sg1) based on the infrared rays detected by the infrared detection pixels 110 connected to the respective column wirings 220 is AD converted. Is done.

A specific example of the integrating amplifier circuit 40 will be described.
As shown in FIG. 1, each of the plurality of integral amplifier circuits 40 includes a first transistor Tr1, a connection portion Cp, a storage capacitor Cs, and a second transistor Tr2.

  The first gate Tr1g of the first transistor Tr1 is electrically connected to any of the plurality of column wirings 220. The first source Tr1s of the first transistor Tr1 is electrically connected to the set voltage line SSL. A set voltage SS is applied to the set voltage wiring SSL.

  One end of the connection portion Cp is electrically connected to the first drain Tr1d of the first transistor Tr1. The other end of the connection portion Cp is connected to one end of the storage capacitor Cs. In this specific example, the connection portion Cp is a simple wiring, and the connection portion Cp always connects the first drain Tr1d and one end of the storage capacitor Cs. However, as will be described later, the connection portion Cp may have a switching function, and the connection portion Cp may switch the first drain Tr1d and one end of the storage capacitor Cs to a connected state or a non-connected state. . In the following specific example, a description will be given on the assumption that the connecting portion Cp always connects the first drain Tr1d and one end of the storage capacitor Cs.

  One end of the storage capacitor Cs is electrically connected to the other end of the connection portion Cp. The other end of the storage capacitor Cs is electrically connected to the fixed potential wiring GL1. The fixed potential wiring GL1 is set to a ground potential, for example. However, the potential of the fixed potential wiring GL1 may be any potential lower than a reset voltage Vrs described later.

  The second gate Tr2g of the second transistor Tr2 is electrically connected to the reset gate line RGL. A reset gate signal RS is input to the reset gate line RGL. The reset gate signal RS has a period of a reset gate voltage VRS (first reset gate voltage VRS1) and a period of, for example, 0 volts (ground potential).

  The second source Tr2s of the second transistor Tr2 is electrically connected to the reset voltage line VRSL. The reset source signal VS is input to the reset voltage wiring VRSL. The reset source signal VS has a period of the reset voltage Vrs and a period of 0 volt (ground potential), for example.

  The second drain Tr2d of the second transistor Tr2 is electrically connected to the one end of the storage capacitor Cs and one of the plurality of comparison circuits 50.

  The integration amplifier circuit 40 having such a configuration integrates and amplifies the first electric signal sg1 input to the first gate Tr1g to generate the second electric signal sg2, and outputs the second electric signal sg2 to the comparison circuit 50. To do.

  The second electric signal sg2 is input to one input terminal of each of the plurality of comparison circuits 50. A reference voltage wiring VREFL is connected to the other input terminal of each of the plurality of comparison circuits 50. A reference voltage Vref is applied to the reference voltage wiring VREFL. Accordingly, the comparison circuit 50 compares the second electric signal sg2 with the predetermined reference voltage Vref, and generates the third electric signal sg3. The third electric signal sg3 is input to the edge detection circuit 63, and the output of the edge detection circuit 63 is input to the latch circuit 64. The latch circuit 64 further receives the fourth electric signal sg4 that is the output of the counter circuit 65, and the latch circuit 64 outputs a digital output 64D.

An example of the operation of the infrared solid-state imaging device 310 having such a configuration will be described.
FIG. 2 is a schematic view illustrating the operation of the infrared solid-state imaging device according to the first embodiment of the invention.
FIG. 2A illustrates the second electric signal sg <b> 2 that is the output of the integrating amplifier circuit 40. FIG. 2B illustrates the third electric signal sg3 that is the output of the comparison circuit 50. FIG. 2C illustrates the fourth electric signal sg4 that is the output of the counter circuit 65. FIG. 2D illustrates the reset gate signal RS, and FIG. 2E illustrates the row selection signal sgs. In these figures, the horizontal axis is time t.

  As shown in FIG. 2E, the row selection circuit 305 applies the bias voltage Vd as the row selection signal sgs to the selected infrared detection pixel 110 via the row wiring 210 at the first time ta1. . That is, the bias voltage Vd is applied to the selected row wiring 210 from the first time ta1 to the fourth time ta4.

  The load transistor 31 operates in the saturation region. The column wiring 220 is selected according to the gate voltage applied to the gate of the load transistor 31. A constant current is supplied from the load transistor 31 to the infrared detection pixel 110 at the intersection of the selected column wiring 220 and the selected row wiring 210. That is, the load transistor 31 functions as a constant current source.

  When the row selection circuit 305 applies the bias voltage Vd to the pn junction element corresponding to the selected row (one of the row wirings 210), the series voltage Vf is applied to the pn junction element of the selected row.

  On the other hand, all pn junction elements corresponding to non-selected rows (row wires 210 other than the above-described selected row among the row wires 210) are reverse-biased. That is, the non-selected row wiring 210 is separated from the column wiring 220. That is, it can be said that the pn junction element has a pixel selection function.

  The potential of the column wiring 220 when the infrared detection pixel 110 (pn junction element) is not receiving infrared rays is set to a dark state potential Vs10.

When the infrared detection pixel 110 receives infrared rays, the temperature of the infrared detection pixel 110 rises. Thereby, the first potential Vsl1 of the row wiring becomes higher than the dark state potential Vsl0.
For example, when the temperature of the imaging target imaged by the infrared solid-state imaging device 310 changes by 1K (Kelvin), the temperature of the infrared detection pixel 110 changes by about 5 mK (millikelvin). At this time, for example, if the thermoelectric conversion efficiency in the infrared detection pixel 110 is 10 mV (millivolt) / K, the first potential Vsl1 of the column wiring 220 increases by about 50 μV (microvolt). The change in the first potential Vsl1 is very small compared to the bias voltage Vd.

  The first potential Vsl1 of the row wiring is amplified by the first transistor Tr1.

In the first transistor Tr1, the drain-source current Ids flowing between the first source Tr1s and the first drain Tr1d is expressed by the following equation (1).

Ids ∝ (Vsl1-Vth) ² (1)

Here, Vth is a threshold value of the first transistor Tr1.

  On the other hand, before the row wiring 210 to which the target infrared detection pixel 110 is connected is selected by the row selection circuit 305 (before the first time ta1), the storage capacitor Cs is reset.

  That is, as shown in FIG. 2D, the reset gate voltage is applied to the second gate Tr2g of the second transistor Tr2 before the row wiring 210 is selected by the row selection circuit 305 (before the first time ta1). VRS is applied, and the second transistor Tr2 is turned on.

  The reset voltage Vrs is applied to the second source Tr2s of the second transistor Tr2, and as a result, the reset voltage Vrs is applied between one end and the other end of the storage capacitor Cs.

  As a result, charges corresponding to the reset voltage Vrs are stored in the storage capacitor Cs. When the storage capacitor Cs has the capacitor Cint, the charge Q stored in the storage capacitor Cs is Cint × Vrs.

  When the row selection circuit 305 selects the row wiring 210, the drain-source current Ids flows through the first transistor Tr1 connected to the row wiring 210 via the infrared detection pixel 110. The drain-source current Ids is a current that causes the charge Q (that is, Cint × Vrs) stored in the storage capacitor Cs to flow out to the first source Tr1s of the first transistor Tr1.

At this time, the storage capacitor voltage Vint between one end and the other end of the storage capacitor Cs is expressed by the following equation (2).

Vint = Vrs−Ids × t / Cint (2)

Here, t is the time from the start of the first drain-source current Ids. That is, t is an elapsed time after the first time ta1. The storage capacitor voltage Vint monotonously decreases from the reset voltage Vrs with the passage of time t.

  As shown in FIG. 2A, the second electric signal sg2 corresponding to the potential of the storage capacitor voltage Vint is the reset voltage Vrs before the first time ta1, and after the first time ta1, the time t Decreases with the passage of time. Here, in FIG. 2A, the first state S1 in which the potential (first potential Vsl1) of the infrared detection pixel 110 is high, and the potential (first potential Vsl1) of the infrared detection pixel 110 is higher than that in the first state S1. The characteristics of the low second state S2 are illustrated.

  As shown in FIG. 2A, after the first time ta1, in the first state S1 where the potential of the infrared detection pixel 110 is high, the slope of the change (decrease) in the voltage of the second electric signal sg2 is large. The second electric signal sg2 changes (decreases) abruptly. On the other hand, in the second state S2 where the potential of the infrared detection pixel 110 is low, the slope of the change (decrease) in the voltage of the second electric signal sg2 is small, and the second electric signal sg2 changes (decreases) gradually.

  The second electric signal sg2 (that is, the storage capacitor voltage Vint) is compared with a predetermined reference voltage Vref by the comparison circuit 50. The reference voltage Vref is a constant voltage that is lower than the reset voltage Vrs and higher than the fixed potential wiring GL1 (in this example, 0 volt which is the ground potential).

  As shown in FIG. 2A, the time at which the second electric signal sg2 (that is, the storage capacitor voltage Vint) intersects the reference voltage Vref is different between the first state S1 and the second state S2. The time at which the storage capacitor voltage Vint intersects the reference voltage Vref in the first state S1 is the second time ta2, and the time at which the storage capacitor voltage Vint intersects the reference voltage Vref in the second state S2 is the third time. Time ta3 is assumed. The time from the first time ta1 to the second time ta2 is shorter than the time from the first time ta1 to the third time ta3.

  That is, when the infrared signal received by the infrared detection pixel 110 (the first potential Vsl1 of the first electric signal sg1) is higher, the time at which the storage capacitor voltage Vint crosses the reference voltage Vref is earlier.

If the time from when the drain-source current Ids starts to flow (first time ta1) until the storage capacitor voltage Vint crosses the reference voltage Vref is the elapsed time tsig, the elapsed time tsig is expressed by the following equation (3 ).

tsig = (Vrs−Vref) ÷ Ids × Cint
∝ (Vrs−Vref) ÷ (Vsl1−Vth) ² (3)

2B, for example, the comparison circuit 50 outputs the low voltage VL when the storage capacitor voltage Vint is higher than the reference voltage Vref, and when the storage capacitor voltage Vint is lower than the reference voltage Vref. Outputs a high voltage VH. That is, the third electric signal sg3 that is the output of the third comparison circuit 50 is the low voltage VL when the storage capacitor voltage Vint is higher than the reference voltage Vref, and when the storage capacitor voltage Vint is lower than the reference voltage Vref. High voltage VH. However, the present embodiment is not limited to this, and the comparison circuit 50 outputs the high voltage VH when the storage capacitor voltage Vint is lower than the reference voltage Vref, and the low voltage when the storage capacitor voltage Vint is higher than the reference voltage Vref. VL may be output.

  Here, as shown in FIG. 2C, the counter circuit 65 starts from the time when the row selection circuit 305 selects the infrared detection pixel 110 and the drain-source current Ids starts to flow (first time ta1). The count pulse (fourth electric signal sg4) starts to be supplied to the latch circuit 64.

  The latch circuit 64 can memorize the number of count pulses input up to a certain time. The edge detection circuit 63 detects the edge of the third electrical signal sg3, that is, the transition timing from the low voltage VL to the high voltage VH in the third electrical signal sg3. At this transition timing, the latch circuit 64 detects the count pulse. It has a role to stop memorizing the number of inputs.

  With this method, a digital value corresponding to the infrared signal received by the infrared detection pixel 110 is stored in the latch circuit 64. This operation is performed simultaneously for all the column wirings 220.

  Subsequently, the signal of each bit is sequentially read from the latch circuits 64 of all columns. This selection is performed by the column selection circuit 306. Then, the above operations are sequentially performed on all the row wirings 210.

  Thus, according to the infrared solid-state imaging device 310 according to the present embodiment, the infrared signal (first electrical signal sg1) detected by the infrared detection pixel 110 is integrated and amplified by the integration amplifier circuit 40, whereby the infrared signal of the infrared signal is detected. Noise can be reduced.

(Comparative example)
FIG. 3 is a schematic view illustrating the configuration of an infrared solid-state imaging device of a comparative example.
As shown in FIG. 3, the infrared solid-state imaging device 319 of the comparative example also includes an infrared detection pixel array 250 and a detection circuit unit 269. In the comparative example, the configuration of the detection circuit unit 269 is different from the detection circuit unit 260 of the infrared solid-state imaging device 310 according to the present embodiment.

The detection circuit unit 269 of the comparative example is provided with a storage unit 49.
In the storage unit 49, the first electric signal sg1 that is the output of the infrared detection pixel 110 is input to the CDS circuit 49a, the output of the CDS circuit 49a is input to the sample hold circuit 49b, and the output of the sample hold circuit 49b is The output from the buffer 49c is connected to the output terminal 49f of the integrator via the switch 49e. Further, a switch 49d is connected to the integrator. The output terminal 49f of the integrator is connected to one input terminal of the comparator 49g, and the reference voltage 49h is input to the other input terminal of the comparator 49g.

  The output of the comparator 49g is input to the sequential circuit 49i, and the output of the sequential circuit 49i is input to the m-bit memory unit 49j and the n-bit memory unit 49k. The output of the common counter 49l is input to the m-bit memory unit 49j and the n-bit memory unit 49k. A digital output 49m is output from the m-bit memory unit 49j and the n-bit memory unit 49k.

  In the infrared solid-state imaging device 319 of the comparative example having such a configuration, in the AD converter connected to the sensing element, the signal of the sensing element is held in the storage unit as an initial value, and the first fixed signal and the subsequent The storage unit is charged or discharged by the second fixed signal, and the time change of the electrical signal of the storage unit is measured.

FIG. 4 is a schematic view illustrating the operation of the infrared solid-state imaging device of the comparative example.
That is, the vertical axis in the figure is the voltage V49f of the output terminal 49f of the integrator, and the horizontal axis is the time t. In the same figure, the operations of the first state S1 where the first potential Vsl1 of the infrared detection pixel 110 is high and the second state S2 where the first potential Vsl1 is low are illustrated.

  As shown in FIG. 4, in the infrared solid-state imaging device 319 of the comparative example, the voltage V49f at the output terminal 49f of the integrator is changed between the first state S1 and the second state S2 before the first time ta1. Different. The voltage V49f decreases after the first time ta1. At this time, the slope of decrease of the voltage V49f is the same in the first state S1 and the second state S2. Then, the voltage V49f is compared with the reference voltage V49h to obtain a second time ta2 corresponding to the first state S1 and a third time ta3 corresponding to the second state S2, and the second time ta2 and the third time. Based on ta3, a digital output 49m is obtained.

  As illustrated in FIG. 4, in the comparative example, the slope of decrease of the voltage V49f in the first state S1 is the same as the slope of decrease of the voltage V49f in the second state S2. The difference between the first state S1 and the second state S2 is a voltage difference before the first time ta1, and the voltage difference is small. For this reason, the comparative example is susceptible to noise. That is, if the voltage V49f includes noise in the first state S1 and the second state S2 before the first time ta1, the noise is directly applied to the second time ta2 and the third time ta3. To affect.

  On the other hand, as illustrated in FIG. 2, in the infrared solid-state imaging device 310 according to the present embodiment, the second electric signal sg2 (that is, the storage capacitor voltage Vint) before the time ta1 is the first state S1. This is the same as in the second state S2. Then, after the first time ta1, the slope of decrease of the second electric signal sg2 (that is, the storage capacitor voltage Vint) is different between the first state S1 and the second state S2.

  As described above, in the present embodiment, by performing integral amplification, if the first electric signal sg1 includes noise, the influence of noise is averaged in the process of integral amplification, and noise is reduced. The influence of is suppressed. Thereby, a highly sensitive infrared solid-state imaging device with reduced noise is obtained.

  In addition, as illustrated in FIG. 1, the infrared solid-state imaging device 310 may further include a control unit 270. The control unit 270 may be provided on the substrate 301 or may be provided separately from the substrate 301. When the row selection signal sgs is supplied to each of the plurality of row wirings 210, the control unit 270 supplies the reset gate voltage VRS to the reset gate wiring RGL. Thus, the above operation can be performed. Further, the control unit 270 can further supply the reset voltage Vrs to the reset voltage wiring VRSL. Such a control unit may be provided outside the infrared solid-state image sensor 310. In this case, the infrared solid-state image sensor 310 receives a desired signal from the control unit provided outside the infrared solid-state image sensor 310. Upon receipt, the desired action is performed.

Hereinafter, an example of the configuration of the infrared detection pixel 110 of the infrared solid-state imaging device 310 according to the present embodiment will be described.
FIG. 5 is a plan view illustrating the configuration of the infrared detection pixel of the infrared solid-state imaging device according to the first embodiment of the invention.
FIG. 6 is a schematic cross-sectional view illustrating the configuration of the infrared detection pixel of the infrared solid-state imaging device according to the first embodiment of the invention.
That is, FIG. 6 is a cross-sectional view taken along line AA ′ of FIG.

  As illustrated in FIGS. 5 and 6, the infrared detection pixel 110 includes a detection unit 130, a first support beam 121, and a second support beam 122.

The detection unit 130 includes an infrared absorption unit 134 and a thermoelectric conversion unit 135. The detection unit 130 is provided on the substrate 301 so as to be separated from the substrate 301.
That is, the infrared absorption unit 134 is provided on the substrate 301 so as to be separated from the substrate 301. The infrared absorbing unit 134 absorbs infrared rays.

  The thermoelectric conversion unit 135 is provided between the infrared absorption unit 134 and the substrate 301. The thermoelectric converter 135 is also separated from the substrate 301. The thermoelectric conversion unit 135 is thermally connected to the infrared absorption unit 134. The thermoelectric conversion unit 135 converts a temperature change due to infrared rays absorbed by the infrared absorption unit 134 into an electrical signal. The electrical signal obtained by conversion by the thermoelectric conversion unit 135 corresponds to the first electrical signal sg1.

  In this specific example, the thermoelectric conversion unit 135 includes two pn junction elements, that is, a first pn junction element 131 and a second pn junction element 132. The first pn junction element 131 includes a first p-type semiconductor layer 131p and a first n-type semiconductor layer 131n joined to the first p-type semiconductor layer 131p. The second pn junction element 132 includes a second p-type semiconductor layer 132p and a second n-type semiconductor layer 132n joined to the second p-type semiconductor layer 132p.

  The first p-type semiconductor layer 131p is connected to the first p-type semiconductor layer electrode 131b through a contact 131a. The second n-type semiconductor layer 132n is connected to the second n-type semiconductor layer electrode 132b through the contact 132a. The first n-type semiconductor layer 131n is connected to the connection electrode 131bc through a contact 131c. The second p-type semiconductor layer 132p is connected to the connection electrode 131bc through the contact 132c. That is, the first n-type semiconductor layer 131n is connected to the second p-type semiconductor layer 132p.

  For example, an SOI (Silicon-On-Insulator) single crystal silicon layer is used for the first pn junction element 131 and the second pn junction element 132.

  An insulating layer 133 is provided around the first pn junction element 131 and the second pn junction element 132. For example, a buried silicon oxide layer is used for the insulating layer 133.

  The first support beam 121 is connected to one end of the detection unit 130 and supports the detection unit 130 above the substrate 301. The second support beam 122 is connected to the other end of the detection unit 130 and supports the detection unit 130 above the substrate 301.

  The first support beam 121 is provided with a first conductive portion 121c. One end of the first conductive portion 121c is electrically connected to one end (for example, the first p-type semiconductor layer electrode 131b) of the thermoelectric conversion portion 135, and the other end of the first conductive portion 121c is, for example, a plurality of row wirings 210. It is electrically connected to either of them.

  The second support beam 122 is provided with a second conductive portion 122c. One end of the second conductive portion 122c is electrically connected to the other end (for example, the second n-type semiconductor layer electrode 132b) of the thermoelectric conversion portion 135, and the other end of the second conductive portion 122c is, for example, a plurality of column wirings. 220 is electrically connected to any one of 220.

  A hollow structure 138 is provided between the detection unit 130, the first support beam 121 and the second support beam 122, and the substrate 301. The hollow structure 138 is formed by removing a part of the substrate 301.

  The first support beam 121 and the second support beam 122 are formed so as to surround the detection unit 130. The first support beam 121 and the second support beam 122 have an elongated shape.

  An electric signal (first electric signal sg1) is generated in the thermoelectric conversion unit 135 based on the heat generated according to the infrared rays incident on the infrared absorption unit 134.

  The bias voltage Vd is supplied from the row wiring 210 to the thermoelectric conversion unit 135 via the first conductive portion 121 c of the first support beam 121. The electrical signal that has passed through the thermoelectric conversion unit 135 is transmitted to the column wiring 220 via the second conductive portion 122 c of the second support beam 122.

  In addition, said structure is an example and in embodiment of this invention, the structure of the infrared detection pixel 110 is arbitrary.

(Second Embodiment)
FIG. 7 is a schematic view illustrating the configuration of an infrared solid-state imaging device according to the second embodiment of the invention.
As illustrated in FIG. 7, in the infrared solid-state imaging device 311 according to the present embodiment, the connection portion Cp includes a third transistor Tr3.

  The third source Tr3s of the third transistor Tr3 is electrically connected to the first drain Tr1d of the first transistor Tr1. The third drain Tr3d of the third transistor Tr3 is connected to one end of the storage capacitor Cs. The drive pulse signal HASEL is input to the third gate Tr3g of the third transistor Tr3.

  That is, the drive pulse signal HASEL for controlling the electrical connection state between the first drain Tr1d and the one end of the storage capacitor Cs is input to the third gate Tr3g of the third transistor Tr3. Thereby, in the infrared solid-state imaging device 311 according to the present embodiment, the first drain Tr1d and one end of the storage capacitor Cs are switched to a connected state or a non-connected state.

FIG. 8 is a schematic view illustrating the operation of the infrared solid-state imaging device according to the second embodiment of the invention.
8A illustrates the second electrical signal sg2, FIG. 8B illustrates the third electrical signal sg3, FIG. 8C illustrates the fourth electrical signal sg4, and FIG. 8 illustrates the reset gate signal RS, FIG. 8E illustrates the row selection signal sgs, and FIG. 8F illustrates the drive pulse signal HASEL. In these figures, the horizontal axis is time t.

  As shown in FIG. 8D, in the period before the first time tb1, the reset gate signal RS applied to the second gate Tr2g of the second transistor Tr2 is set to the first reset gate voltage VRS1. . As a result, the reset voltage Vrs is applied to the storage capacitor Cs, and the storage capacitor Cs is charged.

  As shown in FIG. 8E, the row selection circuit 305 applies the bias voltage Vd as the row selection signal sgs to the selected infrared detection pixel 110 via the row wiring 210 at the first time ta1. . That is, the bias voltage Vd is applied to the infrared detection pixel 110 connected to the selected row wiring 210.

  As a result, as shown in FIG. 8A, the drain-source current Ids flows through the first transistor Tr1 as in the first embodiment, and the storage capacitor voltage Vint (second electrical signal sg2) is It changes with Formula (2). The storage capacitor voltage Vint monotonously decreases from the reset voltage Vrs with the passage of time t.

In the present embodiment, at the second time tb2, the third transistor Tr3 of the connection unit Cp is turned off.
That is, as shown in FIG. 8F, at the second time tb2, the drive pulse signal HASEL input to the third gate Tr3g of the third transistor Tr3 is in a low voltage state. As a result, the storage capacitor Cs is disconnected from the first transistor Tr1. When the storage capacitor voltage Vint at this time is the second time storage capacitor voltage Vint2, the second time storage capacitor voltage Vint2 is expressed by the following equation (4).

Vint2 = Vrs−Ids × (tb2−tb1) ÷ Cint (4)

Then, as shown in FIG. 8D, the reset gate signal RS applied to the second gate Tr2g of the second transistor Tr2 is set to the second reset gate voltage VRS2 at the second time tb2. Thereby, charging of the storage capacitor Cs is started. For example, it is desirable that the second reset gate voltage VRS2 is lower than the first reset gate voltage VRS1. Thereby, the storage capacitor Cs is slowly charged after the second time ta2, and the detection accuracy is increased.

The storage capacitor voltage Vint after the second time ta2 is expressed by the following equation (5).

Vint = Vint2 + Irs × tsig (5)

Here, tsig is an elapsed time after the second time ta2. The current Irs is a drain-source current flowing through the second source Tr2s and the second drain Tr2d of the second transistor Tr2.

From the above equations (4) and (5), the elapsed time tsig until the storage capacitor voltage Vint becomes equal to the reference voltage Vref is expressed by the following relationship.

Vrs−Ids · t ÷ Cint + Irs × tsig = Vref

That is, the following formula (6) is established.

tsig = (Vref−Vrs + Ids · t ÷ Cint) ÷ Irs
= (Vref−Vrs + α × (Vsl−Vth) ² ) ÷ Irs (6)

Here, α is a constant.

  That is, as shown in FIG. 8A, when the first potential Vsl1 is low (in the second state S2), the storage capacitor voltage Vint becomes the same value as the reference voltage Vref at the third time tb3. . When the first potential Vsl1 is high (in the first state S1), the storage capacitor voltage Vint becomes the same value as the reference voltage Vref at the fourth time tb4 after the third time tb3. That is, when the infrared signal is high (when the first potential Vsl1 is high), the storage capacitor voltage Vint is the same as the reference voltage Vref when the infrared signal is low (when the first potential Vsl1 is low). Become.

  Then, as shown in FIG. 8B, the storage capacitor voltage Vint is compared with the reference voltage Vref by the comparison circuit 50 after the second time tb2. The comparison circuit 50 outputs the low voltage VL or the high voltage VH as the third electric signal sg3 based on the relationship between the storage capacitor voltage Vint and the reference voltage Vref.

  As shown in FIG. 8C, the counter circuit 65 starts from the time when the row selection circuit 305 selects the infrared detection pixel 110 and the drain-source current Ids starts to flow (first time tb1). The count pulse (fourth electric signal sg4) is supplied to the latch circuit 64.

  The edge detection circuit 63 detects the transition timing from the low voltage VL to the high voltage VH in the third electrical signal sg3. At this transition timing, the latch circuit 64 stops storing the number of input count pulses.

  Such an operation is performed simultaneously on all the column wirings 220 and sequentially on all the row wirings 210.

  In the equation (3) related to the first embodiment, the elapsed time tsig is proportional to the −2 power of the first potential Vsl1, whereas in the equation (6) related to the second embodiment, the elapsed time tsig2 is , Which is proportional to the square of the first potential Vsl1. The change in elapsed time when the first potential Vsl1 is slightly changed to (Vsl1 + ΔVsl) is proportional to the −3rd power of the first potential Vsl1 in the equation (3), but in the equation (6), This is proportional to the first power of the first potential Vsl1.

  That is, in the infrared solid-state imaging device 311 according to this embodiment to which the formula (6) is applied, small signal characteristics are excellent. In the infrared solid-state imaging device 311, the conversion rate of thermoelectric conversion changes linearly depending on the first potential Vsl 1, which is more desirable in terms of linearity of the AD conversion characteristic circuit.

  According to the infrared solid-state image sensor 311, noise can be reduced, and a high-sensitivity infrared solid-state image sensor with linear characteristics can be provided.

  The above operation can be performed by the control unit 270. That is, as illustrated in FIG. 7, the control unit 270 in the infrared solid-state imaging device 311 can further supply the drive pulse signal HASEL to the third transistor Tr3. Note that the control unit that performs such an operation may be provided outside the infrared solid-state image sensor 311. In this case, the infrared solid-state image sensor 311 is a control provided outside the infrared solid-state image sensor 311. A desired signal is received from the unit, and a desired operation is executed.

(Third embodiment)
FIG. 9 is a schematic view illustrating the configuration of an infrared solid-state imaging device according to the third embodiment of the invention.
As shown in FIG. 9, in the infrared solid-state imaging device 312 according to the present embodiment, the infrared detection pixel array 250 includes low-sensitivity pixels 110 a having a lower infrared sensitivity than the infrared sensitivity of the plurality of infrared detection pixels 110. In addition. Then, a signal based on the low-sensitivity pixel electric signal sg1a of the low-sensitivity pixel 110a is input to the input unit to which the second electric signal sg2 of the comparison circuit 50 is input.

  That is, the detection circuit unit 260 further includes a plurality of constant current sources 41. Each of the plurality of constant current sources 41 is connected to each of a plurality of wirings that respectively connect the plurality of integration amplifier circuits 40 and the plurality of comparison circuits 50.

  The low-sensitivity pixel electric signal sg1a of the low-sensitivity pixel 110a is input to each of the plurality of constant current sources 41. Each of the plurality of constant current sources 41 supplies a signal based on the low-sensitivity pixel electric signal sg1a of the low-sensitivity pixel 110a to each of the one ends of the plurality of storage capacitors Cs.

  For the low-sensitivity pixel 110a, for example, a pn junction element can be used. The low-sensitivity pixel 110a has a configuration similar to that of the infrared detection pixel 110, for example. However, the low-sensitivity pixel 110a is provided with, for example, a reflective film that reflects infrared rays. Is lower than the infrared sensitivity of the infrared detection pixel 110. The low-sensitivity pixel 110a is, for example, an insensitive pixel that has substantially no sensitivity with respect to received infrared rays. However, the present embodiment is not limited to this, and it is sufficient that the infrared sensitivity of the low-sensitivity pixel 110 a is lower than the infrared sensitivity of the infrared detection pixel 110.

  A low sensitivity pixel driving circuit 42 is connected to one end of the low sensitivity pixel 110a. The low sensitivity pixel drive circuit 42 applies the low sensitivity pixel drive signal sgsa to the low sensitivity pixel 110a. The low sensitivity pixel drive signal sgsa becomes the low sensitivity pixel bias voltage Vda for a predetermined period.

  The other end of the low sensitivity pixel 110a is connected to the drain of the low sensitivity pixel load transistor 31a. In the low-sensitivity pixel 110a, a low-sensitivity pixel electric signal sg1a that is not related to the received infrared light, for example, a signal reflecting the temperature of the infrared solid-state imaging device 312 is generated. That is, the low-sensitivity pixel bias voltage Vda is applied to the anode of the low-sensitivity pixel 110a by the low-sensitivity pixel drive circuit 42, and the current value flowing through the low-sensitivity pixel 110a is determined by the low-sensitivity pixel load transistor 31a. Thereby, the low sensitivity pixel electric signal sg1a is generated.

  The low sensitivity pixel electrical signal sg1a is supplied to each of the plurality of constant current sources 41. Each of the constant current sources 41 supplies a current based on the low sensitivity pixel electric signal sg1a of the low sensitivity pixel 110a to one end of the plurality of storage capacitors Cs (that is, the other end of the connection portion Cp).

  In the constant current source 41, when the second potential Vsl2 of the low sensitivity pixel electrical signal sg1a that is the output of the low sensitivity pixel 110a is equal to the first potential Vsl1 of the first electrical signal sg1 that is the output of the infrared detection pixel 110. The same current (drain-source current Ids) as that of the first transistor Tr1 is adjusted.

  In this specific example, the third transistor Tr3 is used as the connection portion Cp. However, the connection portion Cp may be a simple wiring illustrated in FIG.

FIG. 10 is a schematic view illustrating the operation of the infrared solid-state imaging device according to the third embodiment of the invention.
10A illustrates the second electrical signal sg2, FIG. 10B illustrates the third electrical signal sg3, FIG. 10C illustrates the fourth electrical signal sg4, and FIG. 10 illustrates the reset gate signal RS, FIG. 10E illustrates the row selection signal sgs, FIG. 10F illustrates the drive pulse signal HASEL, and FIG. 10G illustrates the low-sensitivity pixel drive signal sgsa. Is illustrated.

  In FIG. 10A, when the offset voltage at the infrared detection pixel 110 is small, the characteristics of the first state S1 when the infrared detection pixel 110 is irradiated with high-intensity infrared light and the offset voltage at the infrared detection pixel 110 are as follows. The characteristics of the second state S2 when the infrared detection pixel 110 is irradiated with an infrared ray having a low intensity when it is small are illustrated. Furthermore, when the offset voltage in the infrared detection pixel 110 is large, the characteristics of the third state S3 when the infrared detection pixel 110 is irradiated with high-intensity infrared light, and when the offset voltage in the infrared detection pixel 110 is large, infrared detection is performed. The characteristics of the fourth state S4 when the pixel 110 is irradiated with infrared rays with low intensity are illustrated.

  As shown in FIG. 10D, the reset gate signal RS is the reset gate voltage VRS (first reset gate voltage VRS1) before the first time tc1, and the storage capacitor Cs includes the reset voltage Vrs. Applied.

  As shown in FIG. 10E, at the first time tc1, the bias voltage Vd is applied as the row selection signal sgs, and the storage capacitor voltage Vint of the storage capacitor Cs decreases with time t. As shown in FIG. 10F, a high voltage is applied to the drive pulse signal HASEL, and the third transistor Tr3 is in an on state.

  As shown in FIG. 10G, at the second time tc2, the low sensitivity pixel driving signal sgsa is set to the low sensitivity pixel bias voltage Vda. As a result, the storage capacitor Cs is charged.

  At this time, as shown in FIG. 10A, when the offset voltage in the infrared detection pixel 110 is small, the third time in the second state S2 when the infrared detection pixel 110 is irradiated with infrared light having a low intensity. At tc3, the storage capacitor voltage Vint reaches the value of the reference voltage Vref. Even in the fourth state S4 when the infrared detection pixel 110 is irradiated with infrared light with low intensity when the offset voltage in the infrared detection pixel 110 is large, the storage capacitor voltage Vint is the reference voltage Vref at the third time tc3. Reach value. That is, regardless of the magnitude of the offset voltage, when the intensity of infrared light is low, the storage capacitor voltage Vint reaches the value of the reference voltage Vref at the third time tc3.

  On the other hand, when the offset voltage in the infrared detection pixel 110 is small, in the first state S1 when the infrared detection pixel 110 is irradiated with high-intensity infrared light, the storage capacitor voltage Vint is the reference voltage Vref at the fourth time tc4. Reach value. Even in the third state S3 when the infrared detection pixel 110 is irradiated with high-infrared infrared rays when the offset voltage in the infrared detection pixel 110 is large, the storage capacitor voltage Vint is the reference voltage Vref at the fourth time tc4. Reach value. That is, regardless of the magnitude of the offset voltage, when the intensity of infrared rays is high, the storage capacitor voltage Vint reaches the value of the reference voltage Vref at the fourth time tc4.

  As shown in FIG. 10B, the comparison circuit 50 detects the third time tc3 and the fourth time tc4, and as shown in FIG. 10C, the third time tc3 and the fourth time tc4. Is counted as the number of pulses, and a digital output 64D is obtained.

  According to the infrared solid-state imaging device 312 according to the present embodiment, infrared detection is performed by using the low-sensitivity pixel 110a that is lower in sensitivity to infrared rays than the infrared detection pixel 110 (for example, has substantially no sensitivity to infrared rays). A digital value that does not depend on the offset voltage of the pixel 110 is obtained. That is, a stable operation can be obtained by compensating for the offset voltage that changes due to a change in the environment around the infrared solid-state imaging device 312. According to the infrared solid-state image sensor 312, it is possible to obtain a high-sensitivity infrared solid-state image sensor with reduced noise, high stability, and high sensitivity.

FIG. 11 is a schematic cross-sectional view illustrating the configuration of the infrared detection pixel of the infrared solid-state imaging device according to the third embodiment of the invention.
As shown in FIG. 11, in the low-sensitivity pixel 110 a, in the structure of the infrared detection pixel 110 illustrated in FIG. 6, the infrared reflection film 136 is disposed on the infrared absorption unit 134 (on the side opposite to the substrate 301). Is provided. In this specific example, an insulating film 137 is further provided on the infrared reflecting film 136.

  That is, in the infrared solid-state imaging device 312, each of the infrared detection pixels 110 includes a detection unit 130 that is provided apart from the substrate 301. The detection unit 130 includes an infrared absorption unit 134 that absorbs infrared rays, and an infrared ray. Thermoelectric conversion is provided between the absorption unit 134 and the substrate 301, is separated from the substrate 301, is thermally connected to the infrared absorption unit 134, and converts a temperature change due to infrared rays absorbed by the infrared absorption unit 134 into an electrical signal. The low-sensitivity pixel 110a includes an infrared reflection film 136 that reflects infrared rays.

  Thereby, the infrared sensitivity of the low-sensitivity pixel 110 a is lower than the infrared sensitivity of the infrared detection pixel 110. For example, the low sensitivity pixel 110a is substantially insensitive to infrared rays.

FIG. 12 is a schematic cross-sectional view illustrating the configuration of an infrared detection pixel of another infrared solid-state imaging device according to the third embodiment of the invention.
As shown in FIG. 12, in the low-sensitivity pixel 110 a of the infrared solid-state imaging device 313, the thermoelectric conversion unit (low-sensitivity thermoelectric conversion unit 135 a) is in contact with the substrate 301.
That is, in the infrared solid-state imaging device 313, each of the infrared detection pixels 110 includes a detection unit 130 provided apart from the substrate 301. The detection unit 130 includes an infrared absorption unit 134 that absorbs infrared rays, and an infrared ray. Thermoelectric conversion is provided between the absorption unit 134 and the substrate 301, is separated from the substrate 301, is thermally connected to the infrared absorption unit 134, and converts a temperature change due to infrared rays absorbed by the infrared absorption unit 134 into an electrical signal. The low-sensitivity pixel 110 a includes a low-sensitivity thermoelectric conversion unit 135 a provided in contact with the substrate 301.

  Thereby, the infrared sensitivity of the low-sensitivity pixel 110 a is lower than the infrared sensitivity of the infrared detection pixel 110. For example, the low sensitivity pixel 110a is substantially insensitive to infrared rays.

  In the infrared solid-state imaging device according to the above-described embodiment, a silicon pn junction element that converts a temperature change into a voltage change by applying a constant forward current is used as the infrared detection pixel 110. Such an infrared solid-state imaging device has a feature that it can be mass-produced using a silicon LSI manufacturing process by using an SOI substrate. Another advantage is that the pixel structure is extremely simple because the row selection function is realized by utilizing the rectification characteristics of the silicon pn junction element. However, the embodiment of the present invention is not limited to this, and the configuration of the thermoelectric conversion unit 135 used in the infrared detection pixel 110 is arbitrary.

  According to the infrared solid-state imaging device according to the embodiment of the present invention, it is possible to reduce noise and reduce NETD (Noise Equivalent Temperature Difference) representing the temperature resolution of the infrared sensor, that is, The temperature difference of the infrared sensor corresponding to noise can be reduced.

The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, infrared detection pixel array, detection circuit unit, control unit, substrate, row wiring, column wiring, infrared detection pixel, detection unit, infrared absorption unit, thermoelectric conversion unit, support beam, infrared reflection film included in the infrared solid-state imaging device , Load transistors, low-sensitivity pixels, integral amplification circuits, comparison circuits, storage capacitors, transistors, etc., with various modifications made by those skilled in the art regarding the specific configuration of each element, such as shape, size, material, and arrangement However, the present invention is included in the scope of the present invention as long as the present invention can be carried out in the same manner by appropriately selecting from a known range and similar effects can be obtained.
Moreover, what combined any two or more elements of each specific example in the technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

  In addition, all infrared solid-state image sensors that can be implemented by those skilled in the art based on the above-described infrared solid-state image sensor as an embodiment of the present invention are included in the present invention as long as they include the gist of the present invention. Belongs to the range.

  In addition, in the category of the idea of the present invention, those skilled in the art can conceive of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. .

  DESCRIPTION OF SYMBOLS 31 ... Load transistor 31a ... Low sensitivity pixel load transistor 40 ... Integration amplifier circuit 41 ... Constant low current source 42 ... Low sensitivity pixel drive circuit 49 ... Memory | storage part 49a ... CDS circuit, 49b ... Sample hold circuit 49c ... buffer, 49d, 49e ... switch, 49f ... output terminal, 49g ... comparator, 49h ... reference voltage, 49i ... sequential circuit, 49j ... m bit memory unit, 49k ... n bit memory unit, 49l ... common counter, 49m ... Digital output, 50 ... Comparison circuit, 63 ... Edge detection circuit, 64 ... Latch circuit, 64D ... Digital output, 65 ... Counter circuit, 110 ... Infrared detection pixel, 110a ... Low sensitivity pixel, 121 ... First support beam, 121c ... 1st electroconductive part, 122 ... 2nd support beam, 122c ... 2 conductive parts, 130 ... detection part, 131 ... first pn junction element, 131a ... contact, 131b ... first p-type semiconductor layer electrode, 131bc ... connection electrode, 131c ... contact, 131n ... first n-type semiconductor layer, 131p ... first p Type semiconductor layer, 132 ... second pn junction element, 132a ... contact, 132b ... second n type semiconductor layer electrode, 132c ... contact, 132n ... second n type semiconductor layer, 132p ... second p type semiconductor layer, 133 ... insulating layer, 134 DESCRIPTION OF SYMBOLS ... Infrared absorption part, 135 ... Thermoelectric conversion part, 135a ... Low sensitivity thermoelectric conversion part, 136 ... Infrared reflecting film, 137 ... Insulating film, 138 ... Hollow structure, 210 ... Row wiring, 220 ... Column wiring, 250 ... Infrared detection pixel Array, 260, 269 ... detection circuit unit, 270 ... control unit, 301 ... substrate, 3 DESCRIPTION OF SYMBOLS 5 ... Row selection circuit, 306 ... Column selection circuit, 310, 311, 312, 313, 319 ... Infrared solid-state image sensor, Cp ... Connection part, Cs ... Storage capacity, GL1 ... Fixed potential wiring, HASEL ... Drive pulse signal, RGL ... reset gate wiring, RS ... reset gate signal, S1 to S4 ... first to fourth states, SS ... set voltage, SSL ... set voltage wiring, Tr1 to Tr3 ... first to third transistors, Tr1d to Tr3d ... first To third drain, Tr1g to Tr3g, first to third gates, Tr1s to Tr3s, first to third sources, V49f, voltage, V49h, reference voltage, VH, high voltage, VL, low voltage, VREFL, reference voltage. Wiring, VRS ... reset gate voltage, VRS1, VRS2 ... first and second reset gate voltages, VRSL Reset gate wiring, VS ... Reset source signal, Vd ... Bias voltage, Vda ... Low-sensitivity pixel bias voltage, Vf ... Series voltage, Vint ... Storage capacitor voltage, Vint2: Second time storage capacitor voltage, Vref ... Reference voltage, Vrs ... reset voltage, Vsl0 ... dark state potential, Vsl1, Vsl2 ... first and second potentials, sg1 to sg4 ... first to fourth electrical signals, sg1a ... low sensitivity pixel electrical signal, sgs ... row selection signal, sgsa ... low Sensitivity pixel drive signal, t ... time, ta1, tb1, tc1 ... first time, ta2, tb2, tc2 ... second time, ta3, tb3, tc3 ... third time, ta4, tb4, tc4 ... fourth time

Claims (8)

An infrared detection pixel array provided on the substrate;
A detection circuit unit provided on the substrate;
With
The infrared detection pixel array is
A plurality of row wirings extending in a first direction parallel to the main surface of the substrate;
A plurality of column wirings extending in a second direction parallel to the main surface and non-parallel to the first direction;
At the intersection between the plurality of row wirings and the plurality of column wirings, one end is connected to any of the plurality of row wirings, and the other end is connected to any of the plurality of column wirings. A plurality of infrared detection pixels that generate a first electrical signal based on the infrared rays
Have
The detection circuit unit includes:
A plurality of integral amplifier circuits connected to the column wiring and generating a second electrical signal by integrating and amplifying the first electrical signal;
A plurality of comparison circuits connected to the plurality of integrating amplifier circuits, comparing the second electric signal with a predetermined reference voltage, and outputting a third electric signal;
An infrared solid-state imaging device characterized by comprising: Each of the plurality of integral amplifier circuits is
A first transistor;
A connection,
Storage capacity,
A second transistor;
Have
A first gate of the first transistor is electrically connected to the one of the plurality of column wirings;
A first source of the first transistor is electrically connected to a set voltage wiring;
One end of the connection part is electrically connected to the first drain of the first transistor,
One end of the storage capacitor is electrically connected to the other end of the connection part,
The other end of the storage capacitor is electrically connected to the first fixed potential wiring,
A second gate of the second transistor is electrically connected to a reset gate line;
A second source of the second transistor is electrically connected to a reset voltage wiring;
2. The infrared solid-state imaging device according to claim 1, wherein the second drain of the second transistor is electrically connected to the one end of the storage capacitor and one of the plurality of comparison circuits. The connection portion includes a third transistor,
A third source of the third transistor is electrically connected to the first drain;
A third drain of the third transistor is connected to the one end of the storage capacitor;
3. The infrared ray according to claim 2, wherein a drive pulse signal for controlling an electrical connection state between the first drain and the one end of the storage capacitor is input to a third gate of the third transistor. Solid-state image sensor. The infrared detection pixel array is
The low-sensitivity pixel having a lower infrared sensitivity than the infrared sensitivity of the plurality of infrared detection pixels,
The signal based on the low-sensitivity pixel electric signal of the low-sensitivity pixel is input to an input unit to which the second electric signal of the comparison circuit is input. The infrared solid-state imaging device described. The detection circuit unit further includes a plurality of constant current sources respectively connected to a plurality of wirings connecting the plurality of integration amplifier circuits and the plurality of comparison circuits.
The low-sensitivity pixel electrical signals of the low-sensitivity pixels are input to the plurality of constant-current sources, and the plurality of constant-current sources receive a plurality of signals based on the low-sensitivity pixel electrical signals of the low-sensitivity pixels. The infrared solid-state imaging device according to claim 4, wherein the infrared solid-state imaging device is supplied to the plurality of ends of the storage capacitor. The infrared detection pixel has a detection unit provided apart from the substrate,
The detector is
An infrared absorber that absorbs infrared rays;
It is provided between the infrared absorption part and the substrate, is separated from the substrate, is thermally connected to the infrared absorption part, and converts a temperature change due to the infrared ray absorbed by the infrared absorption part into an electrical signal. A thermoelectric converter,
Have
The infrared solid-state imaging device according to claim 4, wherein the low-sensitivity pixel includes a low-sensitivity thermoelectric conversion unit provided in contact with the substrate. The infrared detection pixel has a detection unit provided apart from the substrate,
The detector is
An infrared absorber that absorbs infrared rays;
It is provided between the infrared absorption part and the substrate, is separated from the substrate, is thermally connected to the infrared absorption part, and converts a temperature change due to the infrared ray absorbed by the infrared absorption part into an electrical signal. A thermoelectric converter,
Have
The infrared solid-state imaging device according to any one of claims 4 to 6, wherein the low-sensitivity pixel includes an infrared reflecting film that reflects infrared rays.   The control unit according to claim 2, further comprising a control unit that supplies a reset gate voltage to the reset gate wiring when a row selection signal is supplied to each of the plurality of row wirings. The infrared solid-state image sensor described in 1.

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