JP2011186990A - Communication device and communication system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a communication device and a communication system which prevent generation of an error by erroneous recognition in connection of a communication device to a communication host. <P>SOLUTION: The communication device is connected to a communication host via a first terminal which is a first reference voltage terminal, a second terminal which is a second reference voltage terminal, and a third terminal and a fourth terminal which are signal terminals, and solves the problem by being provided with: a driver which drives the third and fourth terminals; a detection circuit which detects the connection with the communication host by monitoring voltage of the second terminal on the basis of voltage of the first terminal; and a control circuit which controls the driver to drive the third and fourth terminals at a predetermined level, respectively, only for a predetermined period when the detection circuit detects the connection with the communication host. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a communication device and a communication system having a power line and at least two signal lines and capable of hot-swapping that perform differential transmission.

  A communication system that consists of a communication host and a communication device and performs differential transmission. USB (Universal Serial Bus) is a type of interface system that supports plug-and-play and hot plug (also called hot-swapping). ) Is widely used. In a communication system (USB system) using USB, between a USB device (communication device) and a USB host (communication host), a power line VBUS, a ground line GND, and a differential signal line directly or via a cable or the like. Connected by D + and D-. The USB 2.0 standard has three transfer modes: high speed (480 Mbps: hereinafter referred to as HS), full speed (12 Mbps: hereinafter referred to as FS), and low speed (1.5 Mbps: hereinafter referred to as LS). .

  For example, when a USB device is connected (attached) to a USB host, these modes are identified by the USB host depending on which of the two signal lines of the USB device, D + terminal or D- terminal, is pulled up. Is done. Specifically, in the USB device, the D + terminal is pulled up in the HS or FS mode, and the D− terminal is pulled up in the LS (see Patent Document 1).

Here, FIG. 4 shows an example of connection between a USB host and a USB device (HS or FS mode).
The USB device 100 includes a pull-up resistor 104 that pulls up a D + terminal, a VBUS, a D +, a D−, and a GND in a physical layer (physical layer, hereinafter also referred to as PHY) 102 that transmits and receives a differential signal. The USB connector 106 is provided.
The USB host 110 includes pull-down resistors 114 and 116 for pulling down the D + terminal and the D− terminal and a USB connector 118 in the physical layer 112.
USB connectors 106 and 118 are connected to the USB device 100 and the USB host 110 via a USB cable 120.
As described above, in the connection example shown in FIG. 4, the D + terminal of the USB device is pulled up by the pull-up resistor 104, and the HS / FS mode is set.

Here, FIG. 5 shows a timing chart at the time of connection in the normal operation. The GND terminal is omitted because it is 0 V in all timing charts.
When connecting the USB device 100, first, in order to realize hot-swap, the connector is longer than the D + terminal and the D- terminal (that is, contacts first), and the VBUS and GND terminals are connected to the USB host and the USB. Connected to and from the device.
When the VBUS terminal and the GND terminal are connected between the USB host and the USB device, the USB device 100 undergoes a power-on (bus-powered device) or VBUS detection (self-powered device) sequence to identify the transfer mode. The D + terminal is pulled up by a pull-up resistor 104 (1.5 kΩ).
Thereafter, the D + terminal and the D− terminal are connected between the USB host and the USB device, and pulled down by the pull-down resistors 114 and 116 (15 kΩ) of the USB host 110. Accordingly, the D + terminal becomes “H” level and the D− terminal becomes “L” level, and the USB host identifies the transfer mode as the HS / FS mode.

  Here, focusing on the D-terminal of the USB device, the period from when the VBUS and GND terminals are connected between the USB host and the USB device to when the D-terminal is connected and pulled down on the USB host side is , D-terminals are in a floating state.

  By the way, when connecting a USB device to a USB host, the USB host may not be able to recognize the connected USB device. Such a phenomenon may occur, for example, when a USB cable to which a USB device is connected is connected to the USB host, a USB device with a USB cable is connected to the USB host, or a USB device such as a USB memory is directly connected to the USB host. It may occur when connecting.

The reason why such a phenomenon occurs will be described with reference to a timing chart in the case where erroneous recognition occurs when a conventional USB device is connected as shown in FIG.
When the USB device is connected, the VBUS and GND terminals are connected between the USB host and the USB device, and the D + terminal is pulled up as in the case of the normal operation described above. At this time, until the D-terminal of the USB device was connected to the D-terminal of the USB host, the other three terminals (VBUS, GND, D +) were already connected between the USB host and the USB device. However, it is in a floating state.
As described above, in the USB device, when the signal transition (floating → “H” level (3.3 V)) occurs by pulling up the D + terminal when the D− terminal is in the floating state, the USB device Due to capacitive coupling between adjacent signal lines (D +, D−) on the board or USB cable, the signal level of the floating D− terminal changes as shown in FIG. Signal transition (floating → “H” level) may occur.

When this phenomenon occurs, at the moment when the D + and D− terminals are connected between the USB host and the USB device, a voltage close to the D + terminal (about approximately) is applied to the D− terminal of the USB host as indicated by Y in FIG. 3.0V) appears.
Further, since connection noise is generated when the terminals are connected, a period in which the voltages of the D + and D− terminals transiently satisfy D + <D− may appear when the D− terminals are connected. As a result, as shown in the timing chart of FIG. 6, when there is a time difference between the D + terminal and the D− terminal and the D + terminal is connected first, the signal logic “JKK” is input to the USB host. There is a possibility. Here, “J” and “K” represent logic states of the differential signal lines D + and D− for each operation clock, “J” is a high level (D +> D−), and “K” is a low level (D +). <D-).
Specifically, “J” logic is obtained when the D + terminal is connected first, and after that, the D− terminal is connected and becomes “K” logic, so that three clocks of the differential signal lines D + and D− can be obtained. The logical state of the period is “JKK”.

Since the signal logic “JKK” matches the end of the SYNC pattern (“KJKJKJKK”), which is the head data of the communication packet in the FS mode, the USB host erroneously recognizes the above “JKK” as a received packet. A reception error occurs in the USB host PHY.
There is no problem as long as the USB host can move to the next sequence even if this reception error occurs, but depending on the specifications of the controller of the USB host, the occurrence of a reception error is not transmitted from the PHY to the controller, and what Some of them have not been recognized or the controller has stopped in the initial state.
In this case, it is necessary to recover by some means, for example, by artificially restarting the USB host, or by connecting and disconnecting the USB cable from the USB connector of the USB host.

  For example, in Patent Document 2, a SOF packet included in a frame of transfer data is monitored, and a pull-up resistor connected to two data lines and a connection / disconnection of a termination resistor are switched to simulate a pseudo There has been disclosed a printer that creates a disconnected state, automatically resets communication between a USB host and a USB device without connecting or disconnecting a cable, and automatically recovers communication.

JP 2000-330926 A JP 2006-171868 A

However, restarting the USB host or plugging / unplugging the USB cable requires an inefficient operation with extra time and effort.
In addition, the printer described in Patent Document 2 does not consider an error when connecting a USB device to a USB host, and cannot recognize what is connected, or the controller stops in an initial state. Is not assumed. In addition, a pull-up resistor connected to the two data lines, a switch for switching connection / disconnection of the termination resistor, a control circuit, and the like are necessary, and the configuration is complicated.

  An object of the present invention is to provide a communication device and a communication system that prevent the occurrence of an error due to erroneous recognition when the communication device is connected to a communication host.

  In order to solve the above problems, the present invention provides a first terminal that is a first reference voltage terminal, a second terminal that is a second reference voltage terminal, and a third terminal and a fourth terminal that are signal terminals. A communication device connected to a communication host via a terminal, the driver driving the third terminal and the fourth terminal, and the voltage of the second terminal with reference to the voltage of the first terminal And detecting the connection with the communication host, and when the detection circuit detects the connection with the communication host, the third terminal and the fourth terminal are connected for a predetermined period. And a control circuit for controlling the driver so as to drive to each predetermined level.

  In order to solve the above problem, the present invention provides a communication system having the communication device described above and the communication host described above, wherein the communication host is connected to the communication device. In addition, a predetermined voltage is supplied from the second terminal to the second terminal of the communication device with reference to the voltage of the first terminal of the communication host, and the potentials of the third terminal and the fourth terminal are changed. A communication system characterized by detecting

  The communication system is a USB system, the communication host is a USB host, and the communication device is a USB device. The first terminal is a ground terminal, the second terminal is a power supply terminal, the third terminal, and the third terminal. The 4 terminals are preferably differential signal terminals.

According to the present invention, by actively driving (driving) a signal line for a certain period to stabilize a signal when a communication device is connected to a communication host, the probability of occurrence of erroneous recognition occurring at the time of the connection is drastically reduced. Can be made.
Furthermore, an inefficient operation with extra time and effort for recovering communication can be made unnecessary.

It is a block diagram which shows the USB device which concerns on this invention. FIG. 2 is a circuit diagram showing a part of the block diagram of FIG. 1 in more detail. 4 is a timing chart when the USB device according to the present invention is connected. It is a figure which shows the general connection example of a USB host and a USB device. It is a normal timing chart at the time of the connection of the conventional USB device. It is a timing chart when misrecognition occurs at the time of connection of a conventional USB device.

  A USB system, which is a communication system according to the present invention, will be described in detail below based on a preferred embodiment shown in the accompanying drawings.

Although not shown, the USB system according to this embodiment includes a USB host and a USB device, as in the case of the USB system shown in FIG. The USB host and the USB device respectively have a VBUS terminal (second terminal that is a second reference voltage terminal), a GND terminal (first terminal that is a first reference voltage terminal), and D + and D− terminals (signal terminals). And a USB connector having a third terminal and a fourth terminal), and corresponding terminals are connected to each other directly or via a USB cable or the like.
In the USB host, as shown in FIG. 4, the D + terminal and the D- terminal are respectively pulled down by a pull-down resistor (15 kΩ).
On the other hand, in the USB device, either the D + terminal or the D− terminal is pulled up by a pull-up resistor (1.5 kΩ) according to the transfer mode. Hereinafter, a USB device that is pulled up to the D + terminal and set to the HS / FS mode will be described as an example.

FIG. 1 is a block diagram of an embodiment showing a configuration of a USB device according to the present invention.
The USB device 10 shown in FIG. 1 includes a VBUS detector 12, a differential driver control circuit 16, and a differential driver / receiver 18. The differential driver control circuit 16 and the differential driver / receiver 18 are implemented by a PHY (physical layer) 14.

  The VBUS detector 12 is a detection circuit that detects connection with a communication host. When the USB device 10 is connected to a USB host (not shown), the voltage of the VBUS terminal 20 is specified in the case of a self-powered device. When it is detected that the voltage has reached 5 V, a VBUS detection signal (“H” level) is generated and output. In a bus powered device, power is supplied from the VBUS, and after entering an operating state, a VBUS detection signal (“H” level) is generated and output.

When the VBUS detector 12 detects the connection with the USB host and the “H” level VBUS detection signal is output, the differential driver control circuit 16 connects the D + and D− terminals for a predetermined time respectively. In the case of this embodiment, for example, in this embodiment, the driver of the differential driver / receiver 18 described later is controlled so as to drive to the “H” level and the “L” level, respectively.
As shown in FIG. 2, the differential driver control circuit 16 includes a delay circuit 30, AND gates 32 and 36, an inverter 34, and an OR gate 38.
The differential driver control circuit 16 receives the VBUS detection signal output from the VBUS detector 12. The input VBUS detection signal is input to the AND gate 32 and the delay circuit 30. From the delay circuit 30, a signal obtained by inverting and inverting the VBUS detection signal by a predetermined time is output to the AND gate 32. That is, the delay circuit 30 and the AND gate 32 are rise detection circuits that detect the rise of the VBUS detection signal, and the output of the AND gate 32 is the VBUS detection signal when the differential driver control circuit 16 receives the VBUS detection signal. From the rise timing of the signal, it becomes “H” level by the delay time in the delay circuit 30.

  The output of the AND gate 32 is inverted by the inverter 34 and input to the AND gate 36 and also input to the OR gate 38. The AND gate 36 receives an enable signal (normal ENL signal) during normal operation. When at least one of the output of the inverter 34 and the normal ENL signal is “L” level, the output of the AND gate 36 is output. Becomes “L” level. That is, the enable signal (ENL signal) is output from the differential driver control circuit 16.

  The OR gate 38 receives an A signal during normal operation (normal A signal). When at least one of the output of the AND gate 32 and the normal A signal is at “H” level, the OR gate 38 The output becomes “H” level. That is, output data (A signal) is output from the differential driver control circuit 16.

The differential driver / receiver 18 includes a driver 40, a receiver 42, and a pull-up resistor 44, as shown in FIG.
The driver 40 receives an ENL signal and output data (A signal) from the differential driver control circuit 16. When the input ENL signal is “L” level, the driver 40 transmits the A signal as a differential signal. For example, if the A signal is at “H” level, the D + terminal 22 outputs the “H” level as the D + signal and the D− terminal 24 outputs the “L” level when the ENL signal is at the “L” level. Is done.

  The receiver 42 outputs the differential signal input (received) from the D + terminal 22 and the D− terminal 24 as input data.

The pull-up resistor 44 is for identifying the transfer mode of the USB device. By pulling up the D + terminal 22 with 1.5 kΩ, the pull-up resistor 44 notifies the USB host side that the HS / FS mode is set.
In the HS mode, the USB host is first connected in the FS mode, and then the pull-up resistor 44 is disconnected from the D + terminal 22 (D + signal line) by a switch (not shown) to shift to the HS mode. .

  Next, the operation of the USB device 10 according to the present invention will be described.

FIG. 3 shows a timing chart when the USB device according to the present invention is connected.
As shown in FIG. 3, before the USB device 10 is connected to the USB host, the VBUS terminal is pulled down by the “H” level (5V), and the D + and D− terminals are pulled down by the pull-down resistor of 15 kΩ to “L”. "The level. Each terminal of the USB device 10 is 0 V (floating (Hi-Z)).

  When the USB device 10 is connected to the USB host, as described above, the VBUS terminal 20 and the GND terminal are first connected between the USB host and the USB device due to the difference in terminal length of the USB connector. When the VBUS terminal 20 and the GND terminal are connected between the USB host and the USB device, the VBUS detector 12 of the USB device 10 detects that the VBUS terminal 20 has become a specified voltage (5 V). , VBUS detection signal (“H” level) is output. Further, in order to identify the transfer mode, the D + terminal 22 is pulled up by the pull-up resistor 44 (1.5 kΩ) and becomes “H” level.

  When the VBUS detection signal is input to the differential driver control circuit 16, the ENL signal output from the differential driver control circuit 16 is “L” for a predetermined time set by the delay circuit 30 from the rising timing of the VBUS detection signal. "A" level, and the A signal becomes "H" level.

Here, the predetermined time is determined in the following range.
The minimum value is the time required for the signal lines (D +, D−) to transition to a desired voltage (from the USB standard, 20 ns in the FS mode and 300 ns in the LS mode), that is, the USB device in the HS / FS mode. 10 is the time (20 ns) required for the D + terminal 22 to transition to the desired voltage (3.3 V).
The maximum value is a waiting time (100 ms from the USB standard) until the USB host 10 detects the USB device 10 and issues a reset command.

  When the ENL signal and the A signal are input to the differential driver / receiver 18, the driver 40 outputs the “H” level from the D + terminal 22 and the “L” level from the D− terminal 24. At this time, the D + terminal 22 has already been pulled up by the pull-up resistor 44. That is, the D + terminal 22 is set to “H” level by the drive by the pull-up resistor 44 and the driver 40, and the D− terminal 24 is set to “L” level by the drive by the driver 40.

  After a predetermined time set by the delay circuit 30 has elapsed, that is, there is almost a possibility that a transient “H” level appears at the D− terminal 24 due to capacitive coupling of the signal lines (D +, D−). When the voltage disappears (that is, when the voltages at the D + terminal 22 and the D− terminal 24 are stabilized), the driving of the D + terminal 22 and the D− terminal 24 by the driver 40 is finished.

  Next, when the D + terminal 22 and the D− terminal 24 are connected between the USB host and the USB device, the D + terminal 22 includes a pull-up resistor 44 (1.5 kΩ) and a pull-down resistor 114 on the USB host side. Due to the resistance division ratio of (15 kΩ), it becomes “H” level (3.0 V). Further, the D-terminal 24 becomes “L” level (0 V) by the pull-down resistor 116 (15 kΩ) on the USB host side.

  Thereafter, the D + terminal 22 is maintained at the “H” level (3.0 V) by the pull-up resistor 44 and the USB host-side pull-down resistor 114 (15 kΩ), and the D-terminal 24 is connected to the USB host-side pull-down resistor 116. The “L” level (0 V) is maintained by (15 kΩ), and the transfer mode is identified on the USB host side.

  As described above, the D + terminal 22 is driven to the “H” level and the D− terminal 24 is driven to the “L” level before the D + terminal 22 and the D− terminal 24 are connected to the USB host. Even when the D + terminal 22 is connected before the D− terminal 24, the signal when the USB device is connected to the USB host is stabilized and the signal logic “JKK” is input to the USB host. It is possible to prevent the USB host controller from being stopped in the initial state. That is, the indefinite state of the D + and D− signals generated at the time of connection can be eliminated, and the probability of occurrence of erroneous recognition can be drastically reduced.

In the above embodiment, the drive of the D + and D− terminals is finished before the D + and D− terminals of the USB device are connected to the USB host. However, the D + and D− terminals of the USB device are connected to the USB host. After the connected USB host detects the USB device and before the USB host issues a USB standard reset command (both D + and D− are “L” level), that is, in a time less than the maximum value, D +, You may make it complete | finish the drive of D- terminal.
In the LS mode, the logic may be reversed so that the “H” level is output to the D-terminal.

Furthermore, in the above-described embodiment, the case where the USB device and the USB host are directly connected (including the case via a cable) has been described. However, the USB device and the USB host are connected via a USB hub. It can also be applied to cases.
In addition, the present invention can be similarly applied to a USB device having both functions of a USB host and a USB device, which supports the USB On-the-Go standard.

  In addition, the present invention can also be applied to a communication system that performs differential transmission (differential transmission) that can be hot-plugged, such as a standard that adopts a connection form similar to USB or a standard that is an extension of USB.

  As described above, the USB device which is a communication device according to the present invention has been described in detail. However, the present invention is not limited to the above embodiment, and various improvements and modifications can be made without departing from the gist of the present invention. You may go.

10 USB device 12 VBUS detector 14 PHY (physical layer)
16 Differential Driver Control Circuit 18 Differential Driver / Receiver 20 VBUS Terminal 22 D + Terminal 24 D- Terminal 30 Delay Circuit 32, 36 AND Gate 34 Inverter 38 OR Gate 40 Driver 42 Receiver 44 Pull-up Resistor

Claims (3)

Communication connected to the communication host via the first terminal that is the first reference voltage terminal, the second terminal that is the second reference voltage terminal, and the third terminal and the fourth terminal that are signal terminals A device,
A driver for driving the third terminal and the fourth terminal;
A detection circuit for detecting connection with the communication host by monitoring the voltage of the second terminal with reference to the voltage of the first terminal;
A control circuit for controlling the driver to drive the third terminal and the fourth terminal to respective predetermined levels only for a predetermined period when the detection circuit detects connection with the communication host; A communication device comprising: A communication system having the communication device according to claim 1 and the communication host according to claim 1,
The communication host supplies a predetermined voltage from the second terminal to the second terminal of the communication device based on the voltage of the first terminal of the communication host when the communication device is connected; A communication system that detects a change in potential of a third terminal and a fourth terminal. The communication system is a USB system, the communication host is a USB host, the communication device is a USB device,
The communication system according to claim 2, wherein the first terminal is a ground terminal, the second terminal is a power supply terminal, and the third terminal and the fourth terminal are differential signal terminals.

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