JP2011174757A - Defect inspection method, program, computer storage medium, and defect inspection device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To update efficiently an inspection recipe, when inspecting a defect of a substrate. <P>SOLUTION: A wafer is imaged to acquire a reference image (step S1), and an inspection recipe including the reference image is stored in a storage part (step S3). The wafer is imaged based on the inspection recipe to acquire an inspection object image (step S4), and a defect of the wafer is inspected based on the inspection recipe and the inspection object image (step S10). A recipe including the inspection object image, an inspection result or the like is stored in the storage part (step S11). The step S4 to step S11 are repeated, and when an inspection object image satisfying a prescribed condition is stored in the storage part, the inspection recipe stored in the storage part is updated based on the recipe including the inspection object image (step S12). Thereafter, the step S4 to step S11 are performed based on the updated inspection recipe, so that a defect of the wafer is detected. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for inspecting a defect of a substrate, a program, a computer storage medium, and a defect inspection apparatus.

  For example, in a photolithography process in the manufacture of a semiconductor device, for example, a resist coating process for forming a resist film by applying a resist solution on a semiconductor wafer (hereinafter referred to as “wafer”), and exposing a predetermined pattern on the resist film An exposure process, a development process for developing the exposed resist film, and the like are sequentially performed to form a predetermined resist pattern on the wafer.

  For wafers that have undergone a series of photolithography processes, whether or not a predetermined resist film has been formed on the wafer surface by an inspection device, or whether or not appropriate exposure processing has been performed, as well as scratches and foreign matter A so-called macro defect inspection for inspecting whether or not there is adhesion is performed.

  In such a macro defect inspection, while moving the mounting table on which the wafer is mounted, the wafer on the mounting table is illuminated, and an image of the wafer is captured by, for example, an imaging device of a CCD line sensor. Image processing is performed to determine the presence or absence of defects (Patent Document 1).

JP 2007-240519 A

  By the way, the macro defect inspection described in Patent Document 1 is performed based on, for example, an inspection recipe including a reference image of a reference wafer. The inspection recipe is set by an inspector who performs macro defect inspection, for example.

  However, when the macro defect inspection is repeatedly performed based on the inspection recipe described above, the inspector may find a defect in the inspection recipe depending on the inspection result. In some cases, the inspection recipe needs to be updated due to factors such as changes in members in the inspection apparatus over time. In such a case, if the inspector tries to update the inspection recipe each time, it takes a long time to update the inspection recipe.

  The present invention has been made in view of such a point, and an object thereof is to efficiently update an inspection recipe when inspecting a defect of a substrate.

  In order to achieve the above object, the present invention is a method for inspecting a defect of a substrate, wherein the substrate is imaged to acquire a reference image, and a recipe setting step of storing an inspection recipe including the reference image in a storage unit And an image acquisition step of capturing an image of the substrate based on the inspection recipe to acquire an inspection target image, and storing a recipe including the inspection target image in the storage unit, and the inspection recipe and the inspection target image. When the inspection target image satisfying a predetermined condition is stored in the storage unit, the recipe including the inspection target image is repeatedly performed by inspecting the substrate for defects, the image acquisition step, and the inspection step. And a recipe update process for updating the inspection recipe stored in the storage unit on the basis of, and thereafter performing the image acquisition process and the inspection process with the updated inspection recipe. It is a symptom. The predetermined condition can be arbitrarily set on the inspector side inspecting the substrate for defects.

  According to the present invention, when an inspection target image satisfying a predetermined condition is stored in the storage unit, the inspection recipe stored in the storage unit can be updated based on a recipe including the inspection target image. That is, when a predetermined condition is satisfied, the inspection recipe can be automatically updated based on the recipe including the inspection target image stored in the storage unit. Therefore, it is not necessary for the inspector who inspects the defect of the substrate to update the inspection recipe every time, and the inspection recipe can be updated efficiently.

  The predetermined condition includes a condition based on the number of substrates, a condition based on the number of substrate lots, a condition based on a period during which the image acquisition process and the inspection process are performed, and a plurality of defect inspection apparatuses that perform the defect inspection method. Among the conditions based on the number of the defect inspection apparatuses, at least one condition may be included. A lot refers to a series of substrates that are subjected to a predetermined process.

  In the recipe update step, the inspection recipe may be updated based on an average image indicating an average value of the luminance of the reference image and the luminance of the inspection target image stored in the storage unit.

  In the recipe update step, the inspection recipe is based on the average image and a standard deviation image indicating a standard deviation between the luminance of the reference image and the luminance of the inspection target image stored in the storage unit. It may be updated.

  In the recipe update step, the inspection recipe may be replaced with a recipe including the inspection target image that satisfies the predetermined condition.

  In the recipe updating step, when the inspection target image satisfying a predetermined condition is stored in the storage unit, an inspector inspecting a defect of the substrate is notified, and the inspection recipe is updated based on an instruction of the inspector May be.

  The defect inspection method may be performed after a resist coating process and before an exposure process in a photolithography process.

  The defect inspection method may be performed after development processing in photolithography processing.

  In the recipe setting step, images of a plurality of substrates may be acquired, and an image showing an average value of luminances of the plurality of images may be used as the reference image.

  In the recipe setting step, images of a plurality of chips on the substrate are acquired, the images of the plurality of chips are compared to inspect the substrate for defects, and the image of the substrate determined to be free of defects in the inspection is A reference image may be used.

  According to another aspect of the present invention, there is provided a program that operates on a computer of the defect inspection apparatus in order to cause the defect inspection method to be executed by the defect inspection apparatus.

  According to another aspect of the present invention, a readable computer storage medium storing the program is provided.

  The present invention according to still another aspect is an apparatus for inspecting a defect of a substrate, based on an imaging unit that images a substrate, a recipe setting unit that sets an inspection recipe including a reference image of the substrate, and the inspection recipe An inspection unit that acquires an inspection target image of the substrate imaged by the imaging unit and inspects a defect of the substrate based on the inspection recipe and the inspection target image, and the recipe setting unit includes the inspection recipe and When the storage unit that stores the recipe including the inspection target image and the defect inspection of the substrate in the inspection unit are repeatedly performed and the inspection target image satisfying a predetermined condition is stored in the storage unit, the inspection target image And an update unit that updates the inspection recipe stored in the storage unit based on a recipe including

  The predetermined condition includes a condition based on the number of substrates, a condition based on the number of substrate lots, a condition based on a period during which a substrate is inspected in the defect inspection apparatus, and the defect inspection apparatus when there are a plurality of defect inspection apparatuses. You may have at least 1 or more conditions among the conditions based on a number.

  The update unit may update the inspection recipe based on an average image indicating an average value of the luminance of the reference image and the luminance of the inspection target image stored in the storage unit.

  The updating unit updates the inspection recipe based on the average image and a standard deviation image indicating a standard deviation between the luminance of the reference image and the luminance of the inspection target image stored in the storage unit. May be.

  The update unit may replace the inspection recipe with a recipe including the inspection target image that satisfies the predetermined condition.

  The recipe setting unit may include a notification unit that notifies an inspector who inspects a substrate for a defect when the inspection target image satisfying a predetermined condition is stored in the storage unit.

  The recipe setting unit may acquire images of a plurality of substrates, and an image indicating an average value of luminances of the plurality of images may be used as the reference image.

  The recipe setting means obtains images of a plurality of chips on a substrate, compares the images of the plurality of chips, inspects for defects in the substrate, and determines an image of the substrate determined to have no defects in the inspection. A reference image may be used.

  According to the present invention, an inspection recipe can be efficiently updated when inspecting a substrate for defects.

It is a top view which shows the outline of a structure of the coating and developing processing system provided with the defect inspection apparatus concerning this Embodiment. It is a front view of a coating and developing treatment system. It is a rear view of a coating and developing treatment system. It is a cross-sectional view which shows the outline of a structure of an imaging unit. It is a longitudinal cross-sectional view which shows the outline of a structure of an imaging unit. It is a top view which shows the outline of a structure of a buffer arm. It is a schematic diagram which shows the outline of a structure of a test | inspection unit. It is the flowchart which showed each process of the defect inspection process. It is a schematic diagram which shows the outline of a structure of the test | inspection unit concerning other embodiment.

  Embodiments of the present invention will be described below. FIG. 1 is a plan view showing an outline of a configuration of a coating and developing treatment system 1 including a defect inspection apparatus according to the present embodiment. 2 is a front view of the coating and developing treatment system 1, and FIG. 3 is a rear view of the coating and developing treatment system 1.

  As shown in FIG. 1, the coating and developing treatment system 1 carries out, for example, 25 wafers W in the cassette unit (lot unit) from the outside to the coating and developing treatment system 1 or carries the wafers W into the cassette C. A cassette station 2 for taking out, a processing station 3 in which a plurality of various processing apparatuses for performing predetermined processing in a single wafer type in the photolithography process are arranged in multiple stages, and a processing station 3 are provided adjacent to the processing station 3. The interface station 5 that transfers the wafer W to and from the exposure apparatus 4 is integrally connected.

  The cassette station 2 is provided with a cassette mounting table 6. The cassette mounting table 6 can mount a plurality of cassettes C in a row in the X direction (vertical direction in FIG. 1). The cassette station 2 is provided with a wafer transfer body 8 that can move in the X direction on the transfer path 7. The wafer carrier 8 is also movable in the wafer arrangement direction (Z direction; vertical direction) of the wafers W accommodated in the cassette C, and is selective to the wafers W in each cassette C arranged in the X direction. Is accessible.

  The wafer transport body 8 is rotatable in the θ direction around the Z axis, and a temperature control device 60 belonging to a third processing device group G3 on the processing station 3 side, which will be described later, and a transition device 61 for delivering the wafer W. Is also accessible.

  The processing station 3 adjacent to the cassette station 2 includes, for example, five processing device groups G1 to G5 in which a plurality of processing devices are arranged in multiple stages. A first processing device group G1 and a second processing device group G2 are arranged in this order from the cassette station 2 side on the X direction negative direction (downward direction in FIG. 1) side of the processing station 3. A third processing device group G3, a fourth processing device group G4, and a fifth processing device group G5 are sequentially arranged from the cassette station 2 side on the X direction positive direction (upward direction in FIG. 1) side of the processing station 3. Has been placed. A first transfer device A1 is provided between the third processing device group G3 and the fourth processing device group G4, and the wafer W is supported and transferred inside the first transfer device A1. A first transfer arm 10 is provided. The first transfer arm 10 can selectively access each processing unit in the first processing unit group G1, the third processing unit group G3, and the fourth processing unit group G4 to transfer the wafer W. it can. A second transfer device A2 is provided between the fourth processing device group G4 and the fifth processing device group G5, and the wafer W is supported and transferred inside the second transfer device A2. A second transfer arm 11 is provided. The second transfer arm 11 can selectively access each processing apparatus in the second processing apparatus group G2, the fourth processing apparatus group G4, and the fifth processing apparatus group G5 to transfer the wafer W. it can.

  As shown in FIG. 2, in the first processing unit group G1, a liquid processing apparatus that performs processing by supplying a predetermined liquid to the wafer W, for example, resist coating apparatuses 20, 21, and 22 that apply a resist solution to the wafer W. Bottom coating devices 23 and 24 for forming an antireflection film for preventing reflection of light during the exposure process are stacked in five stages in order from the bottom. In the second processing unit group G2, liquid processing units, for example, development processing units 30 to 34 for supplying a developing solution to the wafer W and performing development processing are stacked in five stages in order from the bottom. In addition, chemical chambers 40 and 41 for supplying various processing liquids to the liquid processing apparatuses in the processing apparatus groups G1 and G2 are provided at the bottom of the first processing apparatus group G1 and the second processing apparatus group G2. Each is provided.

  As shown in FIG. 3, the third processing unit group G3 includes a temperature control unit 60, a transition unit 61, high-precision temperature control units 62 to 64 that control the temperature of the wafer W under high-precision temperature control, and a defect inspection unit. 65 and 66 are stacked in seven steps from the bottom.

  As shown in FIG. 3, the fourth processing unit group G4 includes, for example, a high-precision temperature control unit 70, pre-baking units 71 to 74 that heat-treat the wafer W after the resist coating process, and a wafer W that has been developed. Post baking apparatuses 75 to 79 to be processed are stacked in 10 stages in order from the bottom.

  In the fifth processing unit group G5, a plurality of heat processing devices for heat-treating the wafer W, for example, high-precision temperature control devices 80 to 83, and post-exposure baking devices 84 to 89 for heat-processing the exposed wafer W are sequentially arranged from the bottom. It is stacked in 10 steps.

  As shown in FIG. 1, a plurality of processing devices are arranged on the positive side in the X direction of the first transfer device A1, and for example, an adhesion device 90 for hydrophobizing the wafer W as shown in FIG. 91, and heating devices 92 and 93 for heating the wafer W are stacked in four stages in order from the bottom. As shown in FIG. 1, a peripheral exposure device 94 that selectively exposes only the edge portion of the wafer W, for example, is disposed on the positive side in the X direction of the second transfer device A2.

  For example, as shown in FIG. 1, the interface station 5 is provided with a wafer transfer body 101 that moves on a transfer path 100 extending in the X direction, and a buffer cassette 102. The wafer transfer body 101 can move in the Z direction and can also rotate in the θ direction, and accesses the exposure apparatus 4 adjacent to the interface station 5, the buffer cassette 102, and the fifth processing apparatus group G5. The wafer W can be transferred.

  Next, the configuration of the defect inspection apparatuses 65 and 66 described above will be described. As shown in FIGS. 4 and 5, the defect inspection apparatus 65 acquires an image of the wafer W captured by the imaging unit 110 by capturing an image of the wafer W and acquiring the image, and the defect of the wafer W is acquired. And an inspection unit 111 for inspecting.

  The imaging unit 110 has a casing 112 as shown in FIG. A loading / unloading port 113 for loading / unloading the wafer W is formed on one end side of the casing 112 (X direction negative direction side in FIG. 4) on both side surfaces of the casing 112 facing the short direction. At the loading / unloading port 113, an opening / closing shutter 114 is provided.

  In the casing 112, a mounting table 120 on which the wafer W is mounted is provided as shown in FIG. The mounting table 120 can be freely rotated and stopped by a rotation drive unit 121 such as a motor, and has an alignment function for adjusting the position of the wafer W. A guide rail 122 extending from one end side (X direction negative direction side in FIG. 5) to the other end side (X direction positive direction side in FIG. 5) is provided on the bottom surface of the casing 112. . The mounting table 120 and the rotation driving unit 121 are provided on the guide rail 122 and can be moved along the guide rail 122 by a driving unit 123 such as a pulse motor.

  A buffer arm 124 that temporarily supports the wafer W is provided at a position P1 (a position indicated by a solid line in FIG. 5) at one end side in the casing 112 where the wafer W is carried into and out of the casing 112. . As shown in FIG. 6, the buffer arm 124 has a support portion 124a for the wafer W at the tip. The support portion 124a is formed in, for example, a 3/4 annular shape. The diameter of the 3/4 circular ring of the support part 124a is larger than the diameter of the mounting table 120, and the mounting table 120 can be accommodated inside the support part 124a. The 3/4 circular notch portion of the support portion 124a is formed on the other end side in the casing 112 (the X direction positive direction side in FIG. 6), and the mounting table 120 interferes with the support portion 124a. Without moving to the other end. A plurality of support pins 124b are provided on the support portion 124a, and the wafer W is supported on the support pins 124b. The base 124 c of the buffer arm 124 is attached to an elevating drive unit 125 such as a cylinder, and the buffer arm 124 can be moved up and down the mounting table 120.

  As shown in FIG. 5, at the other end side of the casing 112 and at the alignment position P2 (position indicated by the dotted line in FIG. 5) for adjusting the position of the notch portion of the wafer W, the wafer W on the mounting table 120 is placed. A sensor 126 for detecting the position of the notch portion is provided. The position of the notch portion of the wafer W can be adjusted by rotating the mounting table 120 by the rotation driving unit 121 while detecting the position of the notch portion by the sensor 126.

  An imaging unit 130 is provided on the side surface on the other end side in the casing 112 (positive side in the X direction in FIG. 5). For the imaging unit 130, for example, a wide-angle CCD camera is used. Near the upper center of the casing 112, a half mirror 131 is provided. The half mirror 131 is provided at a position facing the imaging unit 130 and is inclined by 45 degrees from the vertical direction. An illumination unit 132 that can change the illuminance is provided above the half mirror 131, and the half mirror 131 and the illumination unit 132 are fixed to the upper surface of the casing 112. In addition, the imaging unit 130, the half mirror 131, and the illumination unit 132 are respectively provided above the wafer W placed on the mounting table 120. The illumination from the illumination unit 132 passes through the half mirror 131 and is illuminated downward. Therefore, the reflected light of the object in this irradiation area is reflected by the half mirror 131 and taken into the imaging unit 130. That is, the imaging unit 130 can image an object in the irradiation area. Then, the reference image and the inspection target image of the wafer W imaged by the imaging unit 130 are output to the inspection unit 111.

  As shown in FIG. 7, the inspection unit 111 includes a recipe setting unit 140 for setting an inspection recipe including a reference image of the wafer W, and a wafer imaged by the imaging unit 130 based on the inspection recipe set by the recipe setting unit 140. An inspection unit 141 that acquires an inspection target image of W and inspects a defect of the wafer W based on the inspection recipe and the inspection target image is provided.

  The recipe setting unit 140 includes a reference image input unit 150, a preprocessing unit 151, a storage unit 152, an update unit 153, and a condition input unit 154.

  The reference image input unit 150 receives a reference image of the wafer W captured by the imaging unit 130 of the imaging unit 110 before the inspection target image is captured. As the reference image, for example, an image of the wafer W processed first in the coating and developing processing system 1 can be arbitrarily set.

  In the preprocessing unit 151, various adjustments such as adjustment of the optimum illuminance of the illumination unit 132, setting of the inspection region of the wafer W, extraction of the wafer region in the reference image, and the like are performed based on the reference image input to the reference image input unit 150. Processing is performed.

  When the optimum illuminance of the illumination unit 132 is adjusted in the preprocessing unit 151, a plurality of measurement areas are set in advance on the wafer W, and the wafer W is moved from the wafer loading / unloading position P1 to the alignment position P2 in the imaging unit 110. Let At this time, the illumination unit 132 illuminates each measurement region with illumination having different illuminance, and the imaging unit 130 captures an image. The captured image of each measurement region is output to the preprocessing unit 151 via the reference image input unit 150. The preprocessing unit 151 extracts an RGB histogram of the luminance of the image in each measurement region, and obtains a reference luminance for each of R (Red), G (Green), and B (Blue). Then, a graph in which each measurement area is plotted with respect to each reference luminance of the RGB color system is created, and the illumination unit 132 determines the illuminance at which any reference luminance of the RGB color system reaches a predetermined luminance. Set with the optimal illuminance. That is, the smallest illuminance is set as the optimum illuminance among the illuminances whose predetermined luminance matches any reference luminance of the RGB color system. The predetermined luminance is a luminance within a predetermined range from the luminance of an image acquired by imaging a reference wafer having no defect, for example. Thereafter, when the wafer W is moved from the alignment position P <b> 2 to the wafer carry-in / out position P <b> 1, the illumination unit 132 illuminates the wafer W with the illumination having the optimum illuminance set by the preprocessing unit 151, and images the image. The captured image is output to the reference image input unit 150 as a reference image.

  In the preprocessing unit 151, the inspection area of the wafer W is divided and set for each chip on the wafer W, for example. The inspection area is not limited to the chip area, and can be arbitrarily set by the inspector.

  Further, in the preprocessing unit 151, for example, when the imaging unit 130 captures an image of the wafer region and the outer region thereof, the reference image is converted into the wafer by using the brightness of the image of the wafer region and the threshold value of the luminance of the outer region. Binarize into W and outer area. Then, only the image of the wafer area is extracted from the reference image.

  The storage unit 152 stores a reference image of the wafer W processed by the preprocessing unit 151. At this time, for example, the optimum illuminance of the illumination unit 132 when acquiring the reference image of the wafer W is also stored as an inspection recipe. An alignment model that has positional information and pattern information of the notch portion of the wafer W and performs image alignment is also stored in the storage unit 152 as an inspection recipe. Further, the storage unit 152 also stores a recipe including an inspection target image of the wafer W described later.

  The update unit 153 repeatedly performs defect inspection of the wafer W in the inspection unit 141 as described later, and when an inspection target image satisfying a predetermined condition is stored in the storage unit 152, based on a recipe including the inspection target image. The inspection recipe stored in the storage unit 152 is updated.

  Specifically, an average image indicating the average value of the luminance of the reference image and the luminance of the inspection target image stored in the storage unit 152 is calculated. Then, the inspection recipe is updated by replacing the reference image with the average image. At this time, a standard deviation image indicating the standard deviation between the luminance of the reference image and the luminance of the inspection target image stored in the storage unit 152 is calculated, and the inspection recipe is updated based on the above average image and standard deviation image. May be.

  The predetermined condition described above can be arbitrarily set by the inspector. The inspector inputs the condition to the condition input unit 154 provided in the recipe setting unit 140. The predetermined input predetermined condition input to the condition input unit 154 is output to the storage unit 152. Examples of the predetermined condition include a condition based on the number of wafers, a condition based on the number of lots of the wafer W, a condition based on a period during which the inspection of the wafer W is performed in the defect inspection apparatus 65, and the number of defect inspection apparatuses 65 and 66. Conditions etc. are mentioned. When the condition based on the number of wafers is set, for example, the inspection recipe is updated when the tenth wafer W is inspected. When conditions based on the number of lots of wafers W are set, for example, the inspection recipe is updated when the wafer W of the third lot is inspected. When the condition based on the period during which the wafer W is inspected in the defect inspection apparatus 65 is set, for example, the inspection recipe is updated after one week has elapsed from the start of the inspection of the wafer W. When conditions based on the number of defect inspection apparatuses 65 and 66 are set, for example, when the wafer W is inspected by the two defect inspection apparatuses 65 and 66, the inspection recipe is updated. The inspector may set the predetermined conditions in combination.

  The inspection unit 141 includes an inspection object image input unit 160, a preprocessing unit 161, an alignment unit 162, a defect detection unit 163, a feature amount calculation unit 164, a classification unit 165, and a determination unit 166.

  The inspection target image input unit 160 receives the inspection target image of the wafer W captured by the imaging unit 130 of the imaging unit 110 based on the inspection recipe stored in the storage unit 152.

  In the pre-processing unit 161, for example, processing such as extraction of a wafer region in the inspection target image is performed based on the inspection target image input to the inspection target image input unit 150. The extraction of the wafer area in the pre-processing unit 161 is the same as the extraction of the wafer area in the pre-processing unit 151 of the recipe setting unit 140 described above, and a description thereof will be omitted. Further, the inspection target image is divided into inspection areas set by the preprocessing unit 151, for example, areas for each chip.

  An inspection target image processed by the preprocessing unit 161 is input to the alignment unit 162. The alignment unit 162 aligns the inspection target image based on the alignment model of the inspection recipe stored in the storage unit 151.

  The inspection object image aligned by the alignment unit 162 is input to the defect detection unit 163. In the defect detection unit 163, based on the reference image or the average image and the standard deviation image stored in the storage unit 151, the defect of the wafer W in the inspection target image is detected for each inspection area, for example, for each chip area.

  The feature amount calculation unit 164 calculates the feature amount of the defect detected by the defect detection unit 163. As the feature amount of the defect, for example, a feature such as the density of the defect, a color feature, a spatial feature such as a texture, or a geometric feature such as a shape feature (defect size, shape, length, width) is calculated. .

  The classification unit 165 stores in advance a classification class for classifying defects and a relationship between the feature amount of the defect and the classification class. Then, the classification unit 165 classifies the defect into a classification class based on the defect feature amount calculated by the feature amount calculation unit 164. For classification of defects, for example, a neural network, a learning type classification method such as k-NN (k-Nearest Neighbor) or TFC (Test Feature Classifier) may be used.

  In the determination unit 166, based on the defect classification class classified by the classification unit 165, the inspector determines whether the wafer W is appropriate, that is, whether the wafer W is appropriate as a product. At this time, the defect classified for each inspection region may be visualized on the wafer W in order to facilitate determination by the inspector.

  Note that the recipe including the inspection target image and the inspection result in the inspection unit 141 is output and stored in the storage unit 152 of the recipe setting unit 140.

  The inspection unit 111 including the recipe setting unit 140 and the inspection unit 141 described above is a computer, for example, and has a program for executing the defect inspection of the wafer W described above. The program is recorded on a computer-readable storage medium such as a hard disk (HD), a compact disk (CD), a magnetic optical disk (MO), a memory card, and the like. 111 may be installed.

  The configuration of the defect inspection apparatus 66 is the same as that of the above-described defect inspection apparatus 65, and thus the description thereof is omitted.

  Next, the defect inspection of the wafer W performed by the defect inspection apparatuses 65 and 66 configured as described above will be described together with the wafer processing process performed by the entire coating and developing treatment system 1.

  First, one wafer W is taken out from the cassette C on the cassette mounting table 6 by the wafer transfer body 8 and transferred to the temperature adjustment device 60 of the third processing unit group G3. The wafer W transferred to the temperature adjusting device 60 is adjusted to a predetermined temperature, and then transferred to the bottom coating device 23 by the first transfer arm 10 to form an antireflection film. The wafer W on which the antireflection film is formed is sequentially transferred to the heating device 92 and the high-precision temperature control device 70 by the first transfer arm 10 and subjected to predetermined processing in each device. Thereafter, the wafer W is transferred to the resist coating apparatus 20, and a resist film is formed on the wafer W.

  When a resist film is formed on the wafer W in the resist coating apparatus 20, the wafer W is transferred to the pre-baking apparatus 71 by the first transfer arm 10, and then the peripheral exposure apparatus 94 and the high exposure apparatus 94 are moved by the second transfer arm 11. It is sequentially conveyed to the precision temperature control device 83, and predetermined processing is performed in each device. Thereafter, the wafer is transferred to the exposure device 4 by the wafer transfer body 101 of the interface station 5, and a predetermined pattern is exposed on the resist film on the wafer W. The wafer W that has been subjected to the exposure process is transferred to the post-exposure baking apparatus 84 by the wafer transfer body 101 and subjected to a predetermined process.

  When the heat treatment in the post-exposure baking apparatus 84 is completed, the wafer W is transferred to the high-accuracy temperature adjustment apparatus 81 by the second transfer arm 11 and the temperature is adjusted, and then transferred to the development processing apparatus 30 and developed on the wafer W. Is applied to form a pattern on the resist film. Thereafter, the wafer W is transferred to the post-baking device 75 by the second transfer arm 11 and subjected to heat treatment, and then transferred to the high-accuracy temperature controller 63 by the first transfer arm 10 and the temperature is adjusted. Then, the wafer W is transferred to the defect inspection apparatus 65 by the first transfer arm 10 and the defect inspection of the wafer W is performed. Details of this defect inspection will be described later. Thereafter, the wafer W is transferred to the transition device 61 by the first transfer arm 10 and returned to the cassette C by the wafer transfer body 8 to complete a series of photolithography steps.

  Next, a defect inspection method for the wafer W in the defect inspection apparatus 65 will be described. FIG. 8 shows a flowchart of the main steps of the defect inspection process.

  First, in the defect inspection apparatus 65, an inspection recipe including a reference image of the wafer W is set. Parameters in the image pickup unit 110 for picking up the reference image, such as the position of the notch portion of the wafer W and the moving speed of the wafer W, are set in advance by an inspector.

  In the imaging unit 110 of the defect inspection apparatus 65, the wafer W transferred into the casing 112 by the first transfer arm 10 is mounted on the mounting table 120. At this time, in order to adjust the optimum illuminance of the illuminating unit 132, a plurality of measurement regions are set on the wafer W so as to be aligned along the moving direction of the wafer W, for example.

  After that, when the wafer W passes under the half mirror 131 while moving the mounting table 120 from the wafer loading / unloading position P1 to the alignment position P2 side, the illumination unit 132 applies to each measurement region of the wafer W. Illuminate lights with different illuminance. Then, each measurement region is imaged by the imaging unit 130. Each captured image of the measurement area is output to the preprocessing unit 151 via the reference image input unit 150 of the recipe setting unit 140. In the preprocessing unit 151, as described above, the RGB histogram of the luminance of the image of each measurement region is extracted, the reference luminance for each RGB is obtained, and any reference luminance in the RGB color system is determined in advance. Is set as the optimum illuminance of the illumination unit 132.

  Thus, while setting the optimal illumination intensity of the illumination part 132, the position of the notch part of the wafer W is adjusted by the sensor 126 in the alignment position P2.

  After that, when the wafer W passes under the half mirror 131 while moving the mounting table 120 from the alignment position P2 to the wafer loading / unloading position P1 side, a pre-processing unit is applied to the wafer W from the illumination unit 132. Illuminate the illumination with the optimum illuminance set at 151. Then, the wafer W is imaged by the imaging unit 130. The captured image is output as a reference image to the reference image input unit 150 (step S1 in FIG. 8). The wafer W on which the reference image has been taken is moved to the loading / unloading port 113 side, then transferred from the buffer arm 124 to the wafer carrier 8 and unloaded from the defect inspection apparatus 65 by the wafer carrier 8.

  The reference image input to the reference image input unit 150 is output to the preprocessing unit 151. In the preprocessing unit 151, setting of the inspection area of the wafer W, extraction of the wafer area from the reference image, and the like are performed (step S2 in FIG. 8).

  The reference image processed by the preprocessing unit 152 is stored in the storage unit 152. At this time, for example, the optimum illumination intensity and alignment model of the illumination unit 132 are also stored as the inspection recipe. Thus, an inspection recipe in the defect inspection apparatus 65 is set (step S3 in FIG. 8).

  Next, the subsequent wafer W is transferred to the imaging unit 110. In the imaging unit 110, the mounting table 120 on which the wafer W is mounted is moved from the wafer loading / unloading position P1 to the alignment position P2 side. Then, the position of the notch portion of the wafer W is adjusted by the sensor 126 at the alignment position P2. Thereafter, when the wafer W passes under the half mirror 131 while moving the mounting table 120 from the alignment position P2 to the wafer carry-in / out position P1, the pre-processing unit 151 transfers the wafer W from the illumination unit 132 to the wafer W. Illuminate the illumination with the optimal illumination. Then, the wafer W is imaged by the imaging unit 130. The captured image is output as an inspection target image to the inspection target image input unit 160 of the inspection unit 141 (step S4 in FIG. 8). The imaging of the wafer W is performed based on the inspection recipe stored in the storage unit 152. In addition, the wafer W on which the inspection target image is captured is moved to the loading / unloading port 113 side, then transferred from the buffer arm 124 to the wafer carrier 8 and unloaded from the defect inspection apparatus 65 by the wafer carrier 8. .

  The reference image input to the inspection target image input unit 160 is output to the preprocessing unit 161. In the preprocessing unit 161, extraction of a wafer region in the inspection target image is performed (step S5 in FIG. 8).

  The inspection target image processed by the preprocessing unit 161 is output to the alignment unit 162. The alignment unit 162 aligns the inspection target image based on the alignment model of the inspection recipe stored in the storage unit 151 (step S6 in FIG. 8).

  The inspection target image aligned by the alignment unit 162 is output to the defect detection unit 163. In the defect detection unit 163, the defect of the wafer W in the inspection target image is detected for each inspection region, for example, for each chip region, based on the reference image stored in the storage unit 151 (step S7 in FIG. 8).

  The defects detected by the defect detection unit 163 are output to the feature amount calculation unit 164. The feature amount calculation unit 164 calculates the feature amount of the defect detected by the defect detection unit 163 (step S8 in FIG. 8).

  The defect feature amount calculated by the feature amount calculation unit 164 is output to the classification unit 165. The classification unit 165 classifies the defect into a classification class based on the defect feature amount calculated by the feature amount calculation unit (step S9 in FIG. 8).

  The defect classification result in the classification unit 165 is output to the determination unit 166. In the determination unit 166, based on the defect classification class, the inspector determines whether the wafer W is appropriate, that is, whether the wafer W is appropriate as a product (step S10 in FIG. 8).

  The recipe including the inspection target image and the inspection result acquired in the above steps S4 to S10 is output and stored in the storage unit 152 of the recipe setting unit 140 (step S11 in FIG. 8). In addition, you may memorize | store the test object image, a test result, etc. in the memory | storage part 152 each time after completion | finish of process S4, S10, respectively.

  The above steps S4 to S11 (portion surrounded by a dotted line in FIG. 8) are repeatedly performed, and a plurality of recipes including the inspection target image are stored in the storage unit 152. On the other hand, a predetermined condition is input to the condition input unit 154 by the inspector. When the inspection target image satisfying the predetermined condition is stored in the storage unit 152, the update unit 153 updates the inspection recipe stored in the storage unit 152 based on the recipe including the inspection target image (FIG. 8). Step S12). Specifically, as described above, an average image indicating the average value of the luminance of the reference image and the luminances of the plurality of inspection target images is calculated, and the inspection recipe is updated by replacing the reference image with the average image. At this time, a standard deviation image indicating the standard deviation between the luminance of the reference image and the luminance of the inspection target image stored in the storage unit 152 is calculated, and the inspection recipe is updated based on the above average image and standard deviation image. May be.

  When the inspection recipe is updated by the updating unit 153, the subsequent wafers W are subjected to steps S4 to S11 based on the updated inspection recipe, and defects of the wafer W are inspected. At this time, in step S7, the defect of the wafer W in the inspection target image is detected for each inspection area, for example, for each chip area, based on the updated reference image, that is, the above-described average image and standard deviation image.

  In FIG. 8, steps S1 to S3, S11, and S12 (left side in FIG. 8) are processes performed by the recipe setting unit 140, and steps S4 to S10 are processes performed by the inspection unit 141.

  According to the above embodiment, when an inspection target image satisfying a predetermined condition is stored in the storage unit 152 of the recipe setting unit 140 in step S12, the storage unit 152 stores the inspection target image including the inspection target image. The stored inspection recipe can be updated. That is, when a predetermined condition is satisfied, the inspection recipe can be automatically updated based on the recipe including the inspection target image stored in the storage unit 152. Therefore, the inspector who inspects the defect of the wafer W does not need to update the inspection recipe each time, and the inspection recipe can be updated efficiently.

  Further, the inspector can arbitrarily set the predetermined condition in step S12. For example, when a condition based on the number of wafers, a condition based on the number of lots of wafers W, or a condition based on a period in which the inspection of the wafers W is performed in the defect inspection apparatus 65 is set as the predetermined conditions, Variations can be absorbed. In addition, when a condition based on the number of defect inspection devices 65 and 66 is set as the predetermined condition, an inspection error between the defect inspection devices 65 and 66 can be absorbed. The number of defect inspection apparatuses is not limited to this embodiment, and any number of defect inspection apparatuses can be provided in the coating and developing treatment system 1.

  In step S12, the inspection recipe is updated based on the average image of the luminance of the reference image and the luminance of the inspection target image stored in the storage unit 152. Since the average image is an average image of a plurality of wafers W, the accuracy is higher than that of the reference image of one wafer W. For the subsequent wafer W, since the average image and the inspection target image of the wafer W are compared in step S12, the defect inspection of the subsequent wafer W can be performed with high accuracy. Further, when the standard deviation image showing the standard deviation of the luminance of the reference image and the luminance of the inspection target image stored in the storage unit 152 when the inspection recipe is updated is used, the accuracy of the defect inspection is further increased. it can.

  The recipe setting means 140 of the inspection unit 111 according to the above embodiment may be provided with a notification unit 170 as shown in FIG. When the inspection target image satisfying the predetermined condition is stored in the storage unit 152 in step S12 described above, the notification unit 170 notifies the inspector accordingly. The inspector can select whether or not to update the inspection recipe stored in the storage unit 152. When the inspector selects to update the inspection recipe, the inspection recipe is updated by the same method as in step S12 described above, and the defect inspection of the subsequent wafer W is performed based on the updated inspection recipe. Is called. On the other hand, when the inspector selects not to update the inspection recipe, the inspection recipe is not updated, and the defect inspection of the subsequent wafer W is performed based on the inspection recipe. In such a case, since the inspector can arbitrarily select to update the inspection recipe, the degree of freedom for defect inspection of the wafer W is improved.

  In the above embodiment, the inspection recipe stored in the storage unit 152 is updated based on the average image and the standard deviation image in step S12. However, the inspection target image satisfying a predetermined condition is stored in the storage unit 152. When done, the inspection recipe may be updated by replacing the recipe including the inspection object image with the inspection recipe. Specifically, as the predetermined condition, for example, when the inspection recipe is set to be updated when the tenth wafer W is inspected, the inspection recipe includes a recipe including the inspection target image of the tenth wafer W. Is replaced by In such a case, the inspection recipe can be updated by a simpler method.

  In the above embodiment, the defect inspection of the wafer W in the defect inspection apparatus 65 is performed after the development process. However, the defect inspection of the wafer W may be performed after the resist coating process and before the exposure process. In such a case, a resist film is formed on the wafer W in the resist coating apparatus 20, and the wafer W is heated in the pre-baking apparatus 71, and then the defect inspection apparatus 65 performs defect inspection on the wafer W. After that, predetermined processing is sequentially performed on the wafer W in the peripheral exposure device 94 and the high-precision temperature control device 83, and then the exposure processing is performed on the wafer W in the exposure device 4. According to the present embodiment, since the defect inspection of the wafer W is performed before the exposure processing, when a defect is detected in the wafer W in the defect inspection, it is not necessary to transport the wafer W to the exposure apparatus 4. Therefore, the throughput of wafer processing can be improved.

  In the above embodiment, the image of the wafer W that is first processed by the coating and developing treatment system 1 is used as the reference in step S1, but the images of the plurality of wafers W are acquired, and the average of the luminances of the plurality of images is obtained. An image indicating a value may be used as a reference image. In such a case, a reference image with higher accuracy can be acquired.

  Further, in step S1, images of a plurality of chips on the wafer W are acquired, the images of the plurality of chips are compared, and the wafer W is inspected for defects. The image may be a reference image. Even in such a case, a reference image with higher accuracy can be acquired.

  The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to such examples. It is obvious for those skilled in the art that various modifications or modifications can be conceived within the scope of the idea described in the claims, and these naturally belong to the technical scope of the present invention. It is understood. The present invention is not limited to this example and can take various forms. The present invention can also be applied to a case where the substrate is another substrate such as an FPD (flat panel display) other than a wafer or a mask reticle for a photomask.

  The present invention is useful when inspecting a substrate such as a semiconductor wafer for defects.

DESCRIPTION OF SYMBOLS 1 Coating | development processing system 4 Exposure apparatus 20-22 Resist coating apparatus 30-34 Development processing apparatus 65, 66 Defect inspection apparatus 110 Imaging unit 111 Inspection unit 126 Sensor 130 Imaging part 132 Illumination part 140 Recipe setting means 141 Inspection means 150 Reference image Input unit 151 Preprocessing unit 152 Storage unit 153 Update unit 154 Condition input unit 160 Inspection target image input unit 161 Preprocessing unit 162 Alignment unit 163 Defect detection unit 164 Feature amount calculation unit 165 Classification unit 166 Determination unit 170 Notification unit W Wafer

Claims (20)

A method for inspecting a substrate for defects,
Recipe setting step of capturing a reference image by imaging a substrate and storing an inspection recipe including the reference image in a storage unit;
An image acquisition step of capturing a substrate based on the inspection recipe to acquire an inspection target image, and storing a recipe including the inspection target image in the storage unit;
Based on the inspection recipe and the inspection target image, an inspection process for inspecting a substrate for defects,
When the inspection target image satisfying a predetermined condition is stored in the storage unit by repeatedly performing the image acquisition step and the inspection step, the inspection stored in the storage unit based on a recipe including the inspection target image A recipe update process for updating the recipe,
Thereafter, the defect acquisition method is characterized in that the image acquisition step and the inspection step are performed with the updated inspection recipe. The predetermined condition is:
Conditions based on the number of substrates,
Conditions based on the number of substrate lots,
Conditions based on a period of performing the image acquisition step and the inspection step;
Among the conditions based on the number of defect inspection devices when there are a plurality of defect inspection devices on which the defect inspection method is performed,
The defect inspection method according to claim 1, wherein the defect inspection method has at least one condition. In the recipe update step, the inspection recipe is updated based on an average image indicating an average value of the luminance of the reference image and the luminance of the inspection target image stored in the storage unit. The defect inspection method according to claim 1 or 2. In the recipe update step, the inspection recipe is based on the average image and a standard deviation image indicating a standard deviation between the luminance of the reference image and the luminance of the inspection target image stored in the storage unit. The defect inspection method according to claim 3, wherein the defect inspection method is updated. The defect inspection method according to claim 1, wherein, in the recipe update step, the inspection recipe is replaced with a recipe including the inspection target image that satisfies the predetermined condition. In the recipe updating step, when the inspection target image satisfying a predetermined condition is stored in the storage unit, an inspector inspecting a defect of the substrate is notified, and the inspection recipe is updated based on an instruction of the inspector The defect inspection method according to claim 1, wherein the defect inspection method is performed. The defect inspection method according to claim 1, wherein the defect inspection method is performed after a resist coating process and before an exposure process in a photolithography process. The defect inspection method according to claim 1, wherein the defect inspection method is performed after a development process in a photolithography process. In the recipe setting step, images of a plurality of substrates are acquired, and an image showing an average value of luminances of the plurality of images is used as the reference image. Described defect inspection method. In the recipe setting step, images of a plurality of chips on the substrate are acquired, the images of the plurality of chips are compared to inspect the substrate for defects, and the image of the substrate determined to be free of defects in the inspection is The defect inspection method according to claim 1, wherein the defect inspection method is a reference image. A program that operates on a computer of a defect inspection apparatus in order to cause the defect inspection apparatus to execute the defect inspection method according to claim 1. A readable computer storage medium storing the program according to claim 11. An apparatus for inspecting a substrate for defects,
An imaging unit for imaging the substrate;
A recipe setting means for setting an inspection recipe including a reference image of the substrate;
An inspection unit that acquires an inspection target image of the substrate imaged by the imaging unit based on the inspection recipe, and inspects a defect of the substrate based on the inspection recipe and the inspection target image; and
The recipe setting means
A storage unit for storing the inspection recipe and a recipe including the inspection target image;
The inspection stored in the storage unit based on a recipe including the inspection target image when the inspection target image satisfying a predetermined condition is stored in the storage unit by repeatedly performing defect inspection of the substrate in the inspection unit A defect inspection apparatus comprising: an updating unit that updates a recipe. The predetermined condition is:
Conditions based on the number of substrates,
Conditions based on the number of substrate lots,
A condition based on a period during which the substrate is inspected in the defect inspection apparatus;
Among the conditions based on the number of defect inspection devices when there are a plurality of the defect inspection devices,
The defect inspection apparatus according to claim 13, wherein the defect inspection apparatus has at least one condition. The update unit updates the inspection recipe based on an average image indicating an average value of the luminance of the reference image and the luminance of the inspection target image stored in the storage unit, The defect inspection apparatus according to claim 13 or 14. The updating unit updates the inspection recipe based on the average image and a standard deviation image indicating a standard deviation between the luminance of the reference image and the luminance of the inspection target image stored in the storage unit. The defect inspection apparatus according to claim 15, wherein: 15. The defect inspection apparatus according to claim 13 or 14, wherein the updating unit replaces the inspection recipe with a recipe including the inspection target image that satisfies the predetermined condition. The said recipe setting means has a notification part which notifies the inspector who test | inspects the defect of a board | substrate, when the said test object image which satisfy | fills predetermined conditions is memorize | stored in the said memory | storage part. The defect inspection apparatus according to any one of 17. The said recipe setting means acquires the image of several board | substrates, The image in which the average value of the brightness | luminance of the said several image was shown is made into the said reference image, The any one of Claims 13-18 characterized by the above-mentioned. Defect inspection apparatus as described. The recipe setting means obtains images of a plurality of chips on a substrate, compares the images of the plurality of chips, inspects for defects in the substrate, and determines an image of the substrate determined to have no defects in the inspection. The defect inspection apparatus according to claim 13, wherein the defect inspection apparatus is a reference image.

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