JP2011146364A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve a plasma display panel in which high brightness and high reliability are secured even in high precision display, and which is low in energy consumption in consideration of global warming prevention and environmental problem solving. <P>SOLUTION: In the plasma display panel, by opposedly arranging the front face plate in which a plurality of display electrode pairs and a dielectric layer are formed on a glass substrate and the rear face plate in which a plurality of electrodes and a phosphor layer are formed on a substrate, and by sealing the surrounding, a plurality of discharge cells are formed, and by generating the main discharge in a gap of the display electrode pairs, images are displayed. The rear face plate has a vertical barrier rib formed parallel to the plurality of electrodes and a lateral barrier rib formed perpendicularly, there are a plurality of places different in thickness of the dielectric layer respectively in the discharge cells, and the thickness D<SB>2</SB>of the dielectric layer which is neither on a gap side nor at a position corresponding to the vertical barrier rib and the lateral barrier rib is thinner than the thickness D<SB>1</SB>of the dielectric layer on the gap. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a plasma display panel used for a display device or the like.

  Since plasma display panels (hereinafter referred to as PDP) can achieve high definition and large screen, 65-inch class televisions have been commercialized. In recent years, PDP has been applied to high-definition televisions having more than twice the number of scanning lines as compared with the conventional NTSC system, and PDP containing no lead component is required in consideration of environmental problems.

  A PDP basically includes a front plate and a back plate. The front plate is a glass substrate made of sodium borosilicate glass by a float method, a display electrode composed of a striped transparent electrode and a bus electrode formed on one main surface of the glass substrate, and a display electrode A dielectric layer that covers and acts as a capacitor, and a protective layer made of magnesium oxide (MgO) formed on the dielectric layer. On the other hand, the back plate is a glass substrate, stripe-shaped address electrodes formed on one main surface thereof, a base dielectric layer covering the address electrodes, a partition formed on the base dielectric layer, It is comprised with the fluorescent substance layer which light-emits each of red, green, and blue formed between the partition walls.

  The front plate and the back plate are hermetically sealed with their electrode forming surfaces facing each other, and Ne—Xe discharge gas is sealed at a pressure of 53000 Pa to 80000 Pa in a discharge space partitioned by a partition wall. PDP discharges by selectively applying a video signal voltage to the display electrodes, and the ultraviolet rays generated by the discharge excite each color phosphor layer to emit red, green, and blue light, thereby realizing color image display is doing.

  Silver electrodes for ensuring conductivity are used for the bus electrodes of the display electrodes, and low-melting glass mainly composed of lead oxide is used for the dielectric layer. However, due to recent environmental concerns An example in which a lead component is not included as a dielectric layer is disclosed (for example, see Patent Document 1).

JP 2003-128430 A

  In recent years, PDP has been increasingly applied to high-definition televisions having twice or more scanning lines as compared with the conventional NTSC system. By such high definition, the number of scanning lines is increased, the number of display electrodes is increased, and the pixel size is further reduced. For this reason, the luminous efficiency of one pixel of the plasma display tends to be lower than that of the conventional one, and it is necessary to increase the power per unit area in order to maintain the conventional luminance.

  Needless to say, improvement is essential from the viewpoint of power saving as a television set. In recent years, there has been a need to reduce the power consumption of electrical products in Japan and overseas, such as certification systems such as Eco Point in Japan and Energy Star in the United States. Rather, it is an issue that must be realized urgently.

  In addition, attempts have been made to use a dielectric having a low dielectric constant. In such a case, a discharge applied within a period called a selective discharge for selecting lighting or non-lighting of each pixel. The tendency of the voltage to rise in principle is widely known, and both improvement of luminous efficiency and reduction of selective discharge are one issue.

  Under such circumstances, the present invention solves the problem of reducing the size of the pixel and reducing the power consumption, and further reducing the selective discharge voltage, and achieves high brightness and low power consumption performance even in high-definition display. The goal is to realize a PDP that secures and considers environmental issues.

For such a problem, the PDP of the present invention has a front plate in which a plurality of display electrode pairs and a dielectric layer are formed on a glass substrate, and a plurality of electrodes and a phosphor layer on the substrate. A PDP that is arranged opposite to a back plate and seals the periphery to form a plurality of discharge cells, and generates a main discharge in the gap between the pair of display electrodes to display an image. The back plate is parallel to the plurality of electrodes. Each of the discharge cells has a plurality of portions having different thicknesses of the dielectric layer, and the thickness D ₁ of the dielectric layer above the gap is present. However, the thickness D ₂ of the dielectric layer which is not on the gap side and which is not in the position corresponding to the vertical partition wall and the horizontal partition wall is thin. According to such a configuration, unlike a conventional discharge cell, even if the pixel size is small due to the difference in the thickness of the dielectric, the plasma generation state is changed and the discharge excitation efficiency in the pixel is changed. It becomes possible to control the luminous efficiency.

Here, it is desirable that the relationship between the thickness D ₁ of the dielectric layer and D ₂ is 0.1D ₁ ≦ D ₂ <0.6D ₁ . Thus, by changing the plasma generation state so as to improve the excitation efficiency of the discharge in the pixel, it is possible to improve the excitation efficiency, that is, to improve the light emission efficiency even by making the PDP high-definition. .

Further, in each discharge cell, the distance from the center of the gap to the end on the side of the horizontal barrier rib in the region where the thickness of the dielectric layer is D ₂ with respect to the distance from the center of the gap to the top end of the horizontal barrier rib is It is desirable that it is 0.6 or more. Further, it is desirable that the length L in the direction parallel to the display electrode of the region having the thickness D ₂ of the dielectric layer is larger than D ₂ .

The display electrode includes a metal bus electrode, and an overlapping portion between the projection image of the electrode on the back plate on the front plate and the metal bus electrode is a region where the thickness D _{2 of} the dielectric layer is formed. It is desirable that the length Wd in the direction of the bus electrode of the region having the thickness D ₂ is within twice the width Wa of the electrode on the back plate. In this way, consideration is given to the fact that the above effects can be practiced more reliably.

Further, each discharge cell has a plurality of portions with different thicknesses of the phosphor layer, and the projected image of the region where the thickness of the dielectric layer is D ₂ may coincide with the region where the phosphor layer becomes thinner. desirable. The relationship between the thickness D ₃ of the thinned region of the phosphor layer and the thickness D ₄ of the phosphor layer is preferably 0 ≦ D ₃ ≦ 0.4D ₄ , and the thickness of the phosphor layer is D ₃ . vertical partition wall length of the region made it is desirable thickness of the dielectric layer is not less than 1 times the vertical barrier rib length of the region to be D _2.

  As described above, according to the present invention, it is possible to realize a low power consumption PDP that secures high luminance and high reliability even in high-definition display, and further considers global warming prevention and environmental issues.

The perspective view which shows the structure of PDP in embodiment of this invention Cross-sectional view of the front and back plates of the PDP Diagram showing the presence or absence of through-holes in dielectric layer and changes in excitation efficiency Diagram showing change in excitation efficiency with respect to relative value of W ₂ Graph showing changes in excitation efficiency with respect to the relative values of D ₂ Sectional drawing of the front plate and back plate of PDP in another embodiment of the present invention Cross-sectional view of the front and back plates of the PDP Cross-sectional view of the front and back plates of the PDP A plan view and a cross-sectional view of the front plate and the back plate of the PDP Cross-sectional view of the front and back plates of the PDP Diagram showing the relationship between the phosphor thin film and the discharge voltage The figure which shows the relationship between the thickness of the phosphor thin film part and the discharge voltage

  Hereinafter, a PDP according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is a perspective view showing the structure of a PDP according to an embodiment of the present invention. The basic structure of the PDP is the same as that of a general AC surface discharge type PDP. FIG. 2 is a sectional view of the PDP in the embodiment of the present invention. As shown in FIG. 1, the PDP 1 has a front plate 2 made of a front glass substrate 3 and a back plate 10 made of a back glass substrate 11 facing each other, and its outer peripheral portion is sealed with a glass frit or the like. The material is hermetically sealed. A discharge gas such as Ne and Xe is sealed at a pressure of 53000 Pa to 80000 Pa in the discharge space 16 inside the sealed PDP 1.

  On the front glass substrate 3 of the front plate 2, a pair of strip-like display electrodes 6 made up of scanning electrodes 4 and sustain electrodes 5 and black stripes (light-shielding layers) 7 are arranged in a plurality of rows in parallel with each other. A dielectric layer 8 serving as a capacitor is formed on the front glass substrate 3 so as to cover the display electrode 6 and the light shielding layer 7, and a protective layer 9 made of magnesium oxide (MgO) is formed on the surface. Has been.

  On the back glass substrate 11 of the back plate 10, a plurality of strip-like address electrodes 12 are arranged in parallel to each other in a direction orthogonal to the scanning electrodes 4 and the sustain electrodes 5 of the front plate 2. Layer 13 is covering. Further, a partition wall 14 having a predetermined height is formed on the base dielectric layer 13 between the address electrodes 12 to divide the discharge space 16. For each address electrode 12, a phosphor layer 15 that emits red, green, and blue light by ultraviolet rays is sequentially applied to the grooves between the barrier ribs 14 and formed. A discharge cell is formed at a position where the scan electrode 4 and the sustain electrode 5 intersect with the address electrode 12, and the discharge cell having the red, green and blue phosphor layers 15 arranged in the direction of the display electrode 6 is used for color display. Become a pixel.

FIG. 2 is a cross-sectional view of the front plate 2 and the back plate 10 showing the configuration of the dielectric layer 8 of the PDP 1 in the embodiment of the present invention, and FIG. As shown in FIG. 2, a display electrode 6 and a light shielding layer 7 including scanning electrodes 4 and sustain electrodes 5 are formed in a pattern on a front glass substrate 3 manufactured by a float method or the like. Scan electrode 4 and sustain electrode 5 are made of transparent electrodes 4a and 5a made of indium tin oxide (ITO), tin oxide (SnO ₂ ), etc., and metal bus electrodes 4b and 5b formed on transparent electrodes 4a and 5a, respectively. It is comprised by. The metal bus electrodes 4b and 5b are used for the purpose of imparting conductivity in the longitudinal direction of the transparent electrodes 4a and 5a, and are formed of a conductive material whose main component is a silver (Ag) material.

  The dielectric layer 8 includes a first dielectric layer 81 provided on the front glass substrate 3 so as to cover the transparent electrodes 4a and 5a, the metal bus electrodes 4b and 5b, and the light shielding layer 7, and a first dielectric. The second dielectric layer 82 formed on the layer 81 has at least two layers, and the protective layer 9 is formed on the second dielectric layer 82.

  Next, a method for manufacturing a PDP will be described. First, the scan electrode 4, the sustain electrode 5, and the light shielding layer 7 are formed on the front glass substrate 3. The transparent electrodes 4a and 5a and the metal bus electrodes 4b and 5b are formed by patterning using a photolithography method or the like. The transparent electrodes 4a and 5a are formed using a thin film process or the like, and the metal bus electrodes 4b and 5b are solidified by baking a paste containing a silver (Ag) material at a desired temperature. Similarly, the light shielding layer 7 is also formed by screen printing a paste containing a black pigment or by forming a black pigment on the entire surface of the glass substrate and then patterning and baking using a photolithography method.

  Next, a dielectric paste is applied on the front glass substrate 3 by a die coating method or the like so as to cover the scan electrode 4, the sustain electrode 5, and the light shielding layer 7, thereby forming a dielectric paste layer (dielectric material layer). After the dielectric paste is applied, the surface of the applied dielectric paste is leveled by leaving it to stand for a predetermined time, so that a flat surface is obtained. Thereafter, the dielectric paste layer is baked and solidified to form the dielectric layer 8 that covers the scan electrode 4, the sustain electrode 5, and the light shielding layer 7. The dielectric paste is a paint containing a dielectric material such as glass powder, a binder and a solvent. Next, a protective layer 9 made of magnesium oxide (MgO) is formed on the dielectric layer 8 by a vacuum deposition method. Through the above steps, predetermined components (scanning electrode 4, sustaining electrode 5, light shielding layer 7, dielectric layer 8, and protective layer 9) are formed on front glass substrate 3, and front plate 2 is completed.

  On the other hand, the back plate 10 is formed as follows. First, the structure for the address electrode 12 is formed by a method of screen printing a paste containing silver (Ag) material on the rear glass substrate 11 or a method of patterning using a photolithography method after forming a metal film on the entire surface. An address electrode 12 is formed by forming a material layer to be an object and firing it at a desired temperature. Next, a dielectric paste is applied on the rear glass substrate 11 on which the address electrodes 12 are formed by a die coating method so as to cover the address electrodes 12 to form a dielectric paste layer. Thereafter, the base dielectric layer 13 is formed by firing the dielectric paste layer. The dielectric paste is a paint containing a dielectric material such as glass powder, a binder and a solvent.

  Next, a partition wall forming paste including a partition wall material is applied on the base dielectric layer 13 and patterned into a predetermined shape to form a partition wall material layer and then fired to form the partition walls 14. Here, as a method of patterning the partition wall paste applied on the base dielectric layer 13, a photolithography method or a sand blast method can be used. Next, the phosphor layer 15 is formed by applying a phosphor paste containing a phosphor material on the base dielectric layer 13 between the adjacent barrier ribs 14 and on the side surfaces of the barrier ribs 14 and baking it. Through the above steps, the back plate 10 having predetermined components on the back glass substrate 11 is completed.

  In this way, the front plate 2 and the back plate 10 having predetermined constituent members are arranged to face each other so that the scanning electrodes 4 and the address electrodes 12 are orthogonal to each other, and the periphery thereof is sealed with a glass frit, so that the discharge space 16 is filled with a discharge gas containing Ne, Xe or the like, thereby completing the PDP 1.

The material composition of the first dielectric layer 81 and the second dielectric layer 82 constituting the dielectric layer 8 of the front plate 2 will be described in detail. The dielectric material is composed of the following material composition. That is, it contains 20 wt% to 40 wt% of bismuth oxide (Bi ₂ O ₃ ), and 0.5 wt% to at least one selected from calcium oxide (CaO), strontium oxide (SrO), and barium oxide (BaO) 12 wt%, 0.1 wt% to 7 wt% of at least one selected from molybdenum oxide (MoO ₃ ), tungsten oxide (WO ₃ ), cerium oxide (CeO ₂ ), and manganese dioxide (MnO ₂ ). Yes.

In place of molybdenum oxide (MoO ₃ ), tungsten oxide (WO ₃ ), cerium oxide (CeO ₂ ), manganese dioxide (MnO ₂ ), copper oxide (CuO), chromium oxide (Cr ₂ O ₃ ), cobalt oxide At least one selected from (Co ₂ O ₃ ), vanadium oxide (V ₂ O ₇ ), and antimony oxide (Sb ₂ O ₃ ) may be contained in an amount of 0.1 wt% to 7 wt%.

Further, as components other than the above, zinc oxide (ZnO) is 0 wt% to 40 wt%, boron oxide (B ₂ O ₃ ) is 0 wt% to 35 wt%, and silicon oxide (SiO ₂ ) is 0 wt% to A material composition that does not include a lead component, such as 15% by weight and aluminum oxide (Al ₂ O ₃ ), such as 0% by weight to 10% by weight, may be included, and the content of these material compositions is not particularly limited, It is the content range of the material composition of the prior art level.

  A dielectric material powder is produced by pulverizing a dielectric material composed of these composition components with a wet jet mill or a ball mill so that the average particle size is 0.5 μm to 2.5 μm. Next, 55 wt% to 70 wt% of the dielectric material powder and 30 wt% to 45 wt% of the binder component are well kneaded with three rolls to obtain a first dielectric layer paste for die coating or printing. Make it.

  The binder component is ethyl cellulose, terpineol containing 1% to 20% by weight of acrylic resin, or butyl carbitol acetate. In addition, dioctyl phthalate, dibutyl phthalate, triphenyl phosphate and tributyl phosphate are added to the paste as needed, and glycerol monooleate, sorbitan sesquioleate, homogenol (Kao Corporation) as a dispersant. The printability may be improved by adding a phosphoric ester of an alkyl allyl group or the like.

  Next, using this first dielectric layer paste, the front glass substrate 3 is printed by a die coat method or a screen printing method so as to cover the display electrode 6 and dried, and then slightly higher than the softening point of the dielectric material. Bake at a temperature of 575 ° C to 590 ° C.

  For the second dielectric layer 82, a glass material similar to that of the first dielectric layer 81 is mixed with a photosensitive paste to create a photo-sensitive dielectric material. As shown in the cross-sectional view of FIG. 1 shown in FIG. 2, the through hole 20 of the second dielectric layer 82 can be provided at a desired position by lithography.

As a result, the entire thickness of the dielectric layer 8 is reduced (thickness is D ₂ ) in the through hole 20 of the second dielectric layer 82, and the portion of the second dielectric layer 82 in which no hole is opened. Then, when the thickness of the dielectric layer 8 as a whole is increased (the film thickness is D ₁ ), it is possible to provide portions where the thickness of the dielectric layer 8 is different.

  From here, embodiments of the present invention will be described. The cross-sectional view shown in FIG. 2 corresponds to the embodiment of the present invention. Through the through hole 20 provided in the second dielectric layer 82, the thin film portion 21 formed in the dielectric layer 8 is above each of the display electrodes 6. In the embodiment of the present invention, the back plate 10 has vertical partition walls 14A (not shown) and horizontal partition walls 14B.

Then, the distance from the center of the main gap (MG) 22 that is the gap between the display electrodes 6 to the top end of the horizontal partition wall 14B is W ₁ , and from the center of the MG 22 to the side of the thin film portion 21 having a film thickness D _2. the distance to the end closer to the partition wall 14B and W _2.

In FIG. 2, W ₂ is 50 μm, and the thickness D ₂ of the through hole 20, that is, the thin film portion 21 is 6 μm. The width of the thin film portion 21 that is the region of the film thickness D ₂ is about 40 μm in the horizontal direction of the drawing. The total thickness D ₁ of the dielectric layer 8 is 20 μm so as to cover the MG 22 of the display electrode 6 by overlapping the first dielectric layer 81 and the second dielectric layer 82.

  Here, FIG. 3 shows the relationship between the presence / absence of the through hole 20 and the excitation efficiency. Thus, by adopting this structure, the excitation efficiency is improved by 10% or more compared to the case where there is no through-hole 20 as in the conventional case, that is, the thickness of the dielectric layer 8 is all uniform at 20 μm. I understand that I can do it. The relative excitation efficiency in FIG. 3 shows the excitation efficiency when the excitation efficiency without the thin film portion 21 of the dielectric layer is used as a reference, and can be viewed as a measure of the improvement.

  By the way, this excitation efficiency indicates the ratio of the energy used for the emission of ultraviolet light, which is the source of the phosphor emission of the PDP, in the total energy consumption of the PDP. It is thought that it leads to. The fact that the excitation efficiency is improved by 10% or more is nothing but the fact that the improvement degree of the luminous efficiency is 10% or more.

FIG. 4 is a diagram showing the relationship between the position of the through hole 20 in each discharge cell and the excitation efficiency. The horizontal axis represents the relative value of W ₂ to W ₁ shown in FIG. As shown here, it can be seen that the excitation efficiency is improved when W ₂ is 0.6 or more when W ₁ is 1. Further, as a result of repeated detailed studies, the length (through the direction perpendicular to the paper in FIG. 2) L of the through-hole 20 is set to be at least greater than the thickness D _{2 of} the first dielectric layer 81, thereby further improving excitation efficiency. Was found to be done.

FIG. 5 shows the relationship between the thickness D ₂ of the thin film portion 21 of the dielectric layer 8 and the excitation efficiency. The film thickness D ₂ of the thin film portion 21 is expressed as a relative value with respect to the film thickness D ₁ of the dielectric layer 8. As is apparent from FIG. 5, when the film thickness D ₁ is 1, there is no effect when the film thickness D ₂ of the thin film portion 21 is 0.8 or more, and the excitation efficiency gradually decreases as it decreases to 0.6 or less. Can be seen to improve. Then, it can be seen that DomakuAtsu D ₂ is rapidly excitation efficiency is less than 0.3 rises above 20%. However, when the dielectric strength of the dielectric layer 8 is taken into consideration, the thickness is required to be about 0.1 or more. Therefore, it can be seen that the condition that the thin film portion 21 that can improve the excitation efficiency satisfies 0.1D ₁ ≦ D ₂ <0.6D ₁ .

  6 to 9 show other embodiments of the present invention. As shown in FIG. 6, the bus electrodes 4 b and 5 b do not have to be directly below the through hole 20 in order to achieve the effect of the present invention. By doing so, the thickness of the dielectric layer 8 on the bus electrodes 4b and 5b is increased, and it is possible to sufficiently ensure the dielectric breakdown voltage of the dielectric layer. Further, as shown in FIG. 7, the through hole 20 is not perpendicular to the cross section and has a gentle taper shape, and the thin film portion 21 of the dielectric layer 8 is formed at the bottom of the through hole 20. Also good.

  Also, as shown in FIG. 8, the bus electrodes 4b and 5b are installed on the line-shaped raised portions 23 on the glass substrate, and the electrical connection points between the transparent electrodes 4a and 5a and the bus electrodes 4b and 5b. Is present in this ridge. Due to the presence of the raised portion 23, the dielectric thin film portion 21 on the bus electrodes 4b and 5b can be made sufficiently thin even if the metal bus electrodes 4b and 5b are thin due to process limitations and the like. It becomes.

  In addition, you may form this protruding part 23 by making comparatively thin parts other than this protruding part 23 by an etching process. Further, the raised portion 23 may be formed of the same material as that of the dielectric layer 8 by a photolithography method or the like. And also in the form which provides such a protruding part 23, it confirmed that the effect equivalent to the through-hole 20 was acquired.

  Further, as an incidental effect of the embodiment of the present invention, it has been found that the selective discharge voltage applied to the display electrode 6 and the like during image display can be effectively reduced. That is, due to the presence of the thin film portion 21 of the dielectric layer 8, the voltage to be applied between the address electrode 12 and the scan electrode 4 for selective discharge is increased because the dielectric is thin, so that the capacitance is increased. Compared to the case where the portion 21 does not exist, the number can be reduced.

  Next, the desirable positional relationship between the front plate 2 and the back plate 10 in the embodiment of the present invention will be shown. FIG. 9 is a plan view and a sectional view showing the positional relationship between the front plate 2 and the back plate 10. FIG. 9B is a cross-sectional view taken along the line aa in FIG. 9A, and the components such as the protective layer 9 are not shown.

  In the embodiment of the present invention, the area of the thin film portion 21 of the dielectric layer 8 covers all the projected images 30 on the front plate 2 of the address electrodes 12, thereby effectively reducing the selective discharge voltage. Is possible. However, in order to suppress interference with adjacent cells, the following settings are further required.

  That is, the length Wd of the portion of the dielectric layer 8 along the metal bus electrode 4b (or 5b) of the thin film portion 21 is substantially equal to the width Wa of the projected image 30 on the front plate 2 of the address electrode 12. , And keeping it within about twice the maximum of Wa. Thereby, the capacitance between the address electrode 12 of the selected cell and the bus electrode 4b (or 5b) is sufficiently larger than the capacitance between the address electrode 12 of the selected cell and the bus electrode 4b (or 5b) of the adjacent cell. This is because it can be kept large.

  Next, FIG. 10 shows another embodiment of the present invention. As shown in the figure, in the embodiment of the present invention, the phosphor layer 15 has a plurality of portions having different thicknesses, and in particular, the phosphor layer thin film portion 24 exists. It is confirmed by simulation that the selective discharge voltage can be reduced most when the region of the phosphor layer thin film portion 24 matches the projected image of the region of the dielectric thin film portion 21 on the scanning electrode 4 side. It was. The result is shown in FIG. Here, the case where the phosphor layer thin film portion 24 is not formed (conventional technology), the case where it is formed directly below the sustain electrode, the case where it is formed directly below the main gap (MG), and the case where it is formed directly below the scan electrode are compared. The results are shown as relative values of the discharge voltage with respect to the prior art.

Further, when the length of the phosphor layer thin film portion 24 in the vertical barrier rib direction is one or more times the length of the dielectric layer thin film portion 21 in the vertical barrier rib direction, a relatively large effect is recognized. There was found. FIG. 12 shows the result. Further, when the thickness of the phosphor layer thin film portion 24 is D ₃ and the thickness of the phosphor layer 15 at other locations is D ₄ , a great effect is recognized in the range of 0 ≦ D ₃ ≦ 0.4D _4. Was also confirmed. In FIG. 12, the thickness D ₃ of the phosphor layer thin film portion is shown as a relative value to D ₄ .

  As described above, a plurality of portions having different thicknesses are present in the dielectric layer 8 regardless of the formation structure of the portion where the film thickness of the dielectric layer 8 is reduced. It turned out to improve.

  A technique has been disclosed which has a structure in which a groove is formed in the dielectric layer 8 and aims at effects such as preventing an adjacent discharge cell from causing an erroneous discharge. However, in the embodiment of the present invention, the groove of the dielectric layer 8 is formed at a location completely different from the inside of the MG 22 of the display electrode pair. Has improved. This is a significant difference from the prior art.

  Further, in the embodiment of the present invention, unlike the technique of simply providing a recess in the dielectric layer, the horizontal partition wall 14B and the through hole 20 coexist, and the improvement of the light emission efficiency is required by the relationship between the two.

  As described above, according to the present invention, it is possible to realize a low power consumption PDP that secures high luminance and high reliability even in high-definition display, and further considers global warming prevention and environmental issues.

  As described above, the PDP of the present invention realizes a PDP that is environmentally friendly and excellent in display quality, and is useful for a display device with a large screen.

1 PDP
2 Front plate 3 Front glass substrate 4 Scan electrode 4a, 5a Transparent electrode 4b, 5b Metal bus electrode 5 Sustain electrode 6 Display electrode 7 Black stripe (light shielding layer)
8 Dielectric layer 9 Protective layer 10 Back plate 11 Rear glass substrate 12 Address electrode 13 Base dielectric layer 14 Partition 14A Vertical partition 14B Horizontal partition 15 Phosphor layer 16 Discharge space 20 Through hole 21 Thin film portion 22 MG
23 Raised part

Claims (8)

A front plate having a plurality of display electrode pairs and a dielectric layer formed on a glass substrate and a back plate having a plurality of electrodes and a phosphor layer formed on the substrate are opposed to each other and the periphery is sealed. A plurality of discharge cells, a plasma display panel for displaying an image by generating a main discharge in the gap between the pair of display electrodes,
The back plate has vertical barrier ribs formed in parallel to the plurality of electrodes and horizontal barrier ribs formed perpendicular to the plurality of electrodes,
Each of the discharge cells has a plurality of portions having different thicknesses of the dielectric layer,
The dielectric layer that is not on the gap side than the thickness D ₁ of the dielectric layer on the gap side, and the thickness D ₂ of the dielectric layer that is not at a position corresponding to the vertical barrier rib and the horizontal barrier rib is smaller. A plasma display panel characterized by The relationship between the thickness D ₁ of the dielectric layer and the thickness D ₂ of the dielectric layer is 0.1D ₁ ≦ D ₂ <0.6D ₁
The plasma display panel according to claim 1, wherein: In each of the discharge cells, with respect to the distance from the center of the gap to the end of the top of the horizontal barrier rib, the end on the side of the horizontal barrier rib in the region where the thickness of the dielectric layer is D ₂ from the center of the gap The plasma display panel according to claim 1, wherein the distance to the plasma display panel is 0.6 or more. 4. The plasma display panel according to claim 3, wherein a length L in a direction parallel to the display electrode of a region having a thickness D ₂ of the dielectric layer is larger than the D ₂ . The display electrode has a metal bus electrode,
The overlapping portion between the projected image of the electrode on the back plate on the front plate and the metal bus electrode is a region having the thickness D _{2 of the} dielectric layer,
_2. The plasma display according to claim 1, wherein a length Wd in a direction of the bus electrode of a region having a thickness D ₂ of the dielectric layer is within twice a width Wa of an electrode on the back plate. panel. Each of the discharge cells has a plurality of portions having different thicknesses of the phosphor layer,
_2. The plasma display panel according to claim 1, wherein a projection image of a region where the thickness of the dielectric layer is D ₂ and a region where the phosphor layer is thinned match each other. The relationship between the thickness D ₃ of the thinned region of the phosphor layer and the thickness D ₄ of the phosphor layer is 0 ≦ D ₃ ≦ 0.4D ₄
The plasma display panel according to claim 6, wherein: That said vertical partition wall length of the region where the thickness of the phosphor layer becomes D ₃ is the thickness of the dielectric layer is not less than 1 times the vertical barrier rib length of the region to be the D ₂ The plasma display panel according to claim 6.

Images