JP2011128720A - Image processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image processor which performs various kinds of the spatial filtering of input image data at high speed. <P>SOLUTION: The image processor 1 which performs the spatial filtering of the input image data includes: a mask 11 for defining pixels extracted to perform the spatial filtering in an image defined by the input image data; an extraction means 12 for extracting the pixels to which the spatial filtering is applied from the image defined by the input image data using the mask 11 to store them in a memory 10; and a computing means 13 for performing computation for the spatial filtering of the pixels stored in the memory 10. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an image processing apparatus that performs spatial filter processing on input image data.

  In an image processing apparatus, a mask called a spatial filter is used when various types of images are processed. Spatial filters include average (smoothing) and medium (median) filters that reduce noise, a maximum filter that dilates bright areas and dark areas, and a minimum that dilates bright areas and dark areas. There are a value filter and a Laplacian filter for extracting an edge. The averaging filter is also called a linear filter, and the other filters are also called statistical filters or non-linear filters. In the spatial filter process, a product-sum operation is performed on a certain pixel of interest in the image and a pixel adjacent thereto, and the obtained result is replaced with the luminance of the pixel of interest.

  14A and 14B are diagrams for explaining the operation principle of the averaging filter processing, where FIG. 14A is a diagram illustrating an image of a captured wiring board, and FIG. 14B is a diagram using a “3 × 3” mask. It is a figure explaining the averaged filter process which was written. A case will be described in which an averaging filter is applied to an image Q obtained by imaging a wiring board as shown in FIG. In the averaging filter processing, when the mask size of the averaging filter is set to “3 × 3”, for example, as shown in FIG. 14B, for a certain pixel of interest and eight pixels adjacent thereto, The product-sum operation is executed using the mask shown in FIG. In this specification, the brightness of each element of RGB is expressed by 256 numerical values from 0 to 255 as an example. In FIG. 14B, as an example, the luminance of the pixel of interest is “207”, and the luminance of the eight pixels adjacent to the pixel of interest is “128”, “240”, “202”, “105”. , “197”, “150”, “194”, and “210”. Specifically, when the luminance of the “3 × 3” pixel area corresponding to the mask is given as the numerical value shown in FIG. 14B, the coordinates of the target pixel on the image are (i, j). Since the size of the mask is “3 × 3” as described above, “1 / (3 × 3), that is, 1/9” is set to all the pixels in the pixel region of “3 × 3”. Multiply and add all of them to obtain the result “181”. That is, “181” is replaced with the luminance of the pixel of interest (i, j) by the averaging filter processing. The above processing is executed after setting all the pixels on the image Q shown in FIG. 14A as the target pixel, and the averaging filter processing is executed over the entire image Q shown in FIG.

FIG. 15 is a diagram for explaining a memory array of pixels on an image, (a) is a diagram illustrating pixels on a captured image, and (b) is an array of pixels held in a memory. It is a figure explaining. In the figure, P (1,1) to P (w, w) indicate pixel coordinates on the image, and A0 to Aw ² −1 indicate addresses (addresses) on the memory (where w is an integer). In the spatial filter processing, each pixel data on the image is held as a one-dimensional array on the memory. On the image shown in FIG. 15A, the leftmost pixel P (1,1) in the bottom row is first scanned in the direction indicated by the thick line arrow Y0 in FIG. As shown in FIG. When the scanning of the rightmost pixel P (1, w) in the bottom row is completed, the pixel P (2, 1) in the next row is scanned in the direction indicated by the arrow Y1, and the bottom row pixel in the memory. It is held following the address where P (1, w) was held. Thereafter, such scanning is sequentially repeated, and finally the pixels are scanned (scanned) in the direction indicated by the arrow Yw and held in the memory. For example, when there are “w × w” pixels on the image as shown in FIG. 15A, the pixel P (1,1) shown in FIG. 15A is as shown in FIG. In the memory, the address “A0” is held, and the pixel P (1,2) is held in the memory at the address “Aw−1” as shown in FIG. 15B. Further, the pixel P (2,1) located above the pixel P (1,1) in FIG. 15A follows the address “Aw−1” on the memory as shown in FIG. 15B. It is held at the address “Aw”. Further, the pixel P (3, 1) located above the pixel P (2, 1) in FIG. 15A follows the address “A2w−1” on the memory as shown in FIG. 15B. It is held at the address “A2w”. In FIG. 15A, the leftmost pixel P (w, w) in the uppermost column is held at the address “Aw ² −1” on the memory as shown in FIG. 15B.

  16A and 16B are diagrams for explaining memory access in the averaging filter process. FIG. 16A is a diagram illustrating a part of the image shown in FIG. 15A, and FIG. 16B is held in the memory. It is a figure explaining the arrangement | sequence of a pixel. As shown in FIG. 16A, the pixel of the coordinate P (2, 2) is the target pixel in the image shown in FIG. 15A, and the averaging filter process is executed using the “3 × 3” mask. In this case, the target pixel P (2, 2) and the eight pixels P (1, 1), P (1, 2), P (1, 3), P (2, 1), P ( 2,3), P (3,1), P (3,2) and P (3,3) are executed. In this case, in the memory, as shown in FIG. 16B, the pixel P (1,1) is at the address “A0”, the pixel P (1,2) is at the address “A1”, and the pixel P (1,3 ) At address “A2”, pixel P (2,1) at address “Aw”, pixel P (2,2) at address “Aw + 1”, pixel P (2,3) at address “Aw + 2”, The pixel P (3, 1) is held at the address “A2w”, the pixel P (3, 2) is held at the address “A2w + 1”, and the pixel P (3, 3) is held at the address “A2w + 2”. That is, for example, the pixel P (1,1) and the pixel P (2,1) are adjacent to each other on the screen, but on the memory, the pixel P (1,1) has the address “A0” and the pixel P (2,1). ) Is held at addresses separated by the number of pixels w corresponding to the width of the image, such as an address “Aw”. In other words, in the averaging filter process, even in the product-sum operation for one target pixel, the memory access to the addresses separated from each other in the memory as described above is required. Memory access to such so-called “flying addresses” is inefficient and is one factor that reduces the processing speed. In particular, as the mask size of the averaging filter increases, the number of times of memory access to addresses that are far from the memory increases, and the calculation processing speed decreases significantly.

  In order to prevent such a decrease in calculation processing speed, a method of executing an averaging filter process after reducing an image has been proposed (see, for example, Patent Document 1). According to the invention described in Patent Document 1, an image to be subjected to the averaging filter process is reduced at a predetermined reduction rate, and an averaging filter mask is created according to the reduction rate, and then applied to the reduced image. Then, the product-sum operation is performed, and the obtained image is enlarged using the reciprocal of the reduction ratio as the enlargement ratio to obtain an image after the averaging filter processing. Since the averaging process is performed on the reduced image, the time required for memory access is shortened, and accordingly, the time required for the arithmetic process can be shortened.

In order to prevent a reduction in the calculation processing speed, a method of executing an averaging filter process by using a bit shift for a division process has been proposed (for example, see Patent Document 2). According to the invention described in Patent Document 2, for example, the pixels P (1,1), P (1,2), P (1,3), and P (2,1) shown in FIG. , P (2,2), P (2,3), P (3,1), P (3,2) and P (3,3) are averaged when the luminance is a _{1 to} a ₉ , respectively. The product-sum operation in the filter processing can be modified as shown in Equation 1.

Equation 1 gives an approximate calculation result of the averaging filter processing by dividing the result of product sum “Σ7 × a _i (where i = 1 to 9)” by 64, that is, the sixth power of 2. It shows that you can. “Division by 2 to the sixth power” means “shift left by 6 bits” on the memory. That is, according to the invention described in Patent Document 2, since division can be handled by bit shift, the time required for division in the averaging filter processing can be shortened.

JP 2009-054130 A JP 2004-147168 A

  As described above, improvement in calculation processing speed is required in the spatial filter processing. However, according to the invention described in Patent Document 1 (Japanese Patent Laid-Open No. 2009-054130), a mask corresponding to the reduction ratio must be created. The invention described in Patent Document 1 can be applied only to the averaging filter process, and is applied to statistical filters such as an intermediate value filter, a maximum value filter, a minimum value filter, and a Laplacian filter. Can not do it.

  Further, the invention described in Patent Document 2 (Japanese Patent Application Laid-Open No. 2004-147168) can also be applied only to the averaging filter process, and includes an intermediate value filter, a maximum value filter, a minimum value filter, and a Laplacian filter. It cannot be applied to statistical filters such as. Further, unlike the invention described in Patent Document 1, the invention described in Patent Document 2 does not directly reduce the time required for memory access, so the mask for averaging filter processing can be increased. The longer the time required for a series of processing, the greater the proportion of time required for memory access, and eventually the time reduction effect cannot be expected. Similarly, the larger the mask for the averaging filter process, the greater the proportion of time required for the multiplication process in Equation 1, and the time reduction effect cannot be expected.

  Accordingly, in view of the above problems, an object of the present invention is to provide an image processing apparatus capable of executing various types of spatial filter processing on input image data at high speed.

  In order to achieve the above object, in the present invention, an image processing apparatus that performs spatial filtering on input image data is subjected to spatial filtering on an image defined in the input image data. A mask in which pixels to be extracted are defined, an extraction unit that extracts pixels to be spatially filtered from an image defined in the input image data using the mask, and stores the extracted pixels in a memory; and a memory Calculating means for executing calculation of spatial filter processing on the pixels stored in.

  In addition, an image processing apparatus according to the present invention includes image reduction means for reducing an image defined in image data with an image reduction ratio, and mask reduction means for reducing the mask with a mask reduction ratio. Here, the extraction means extracts the pixel to be subjected to the spatial filter processing from the image reduced by the image reduction means using the mask reduced by the mask reduction means, and stores this in the memory. The calculation means executes a spatial filter process calculation for the pixels stored in the memory. The arrangement of pixels to be extracted to be spatially filtered as defined in the mask can be arbitrarily set.

  In the image processing apparatus according to the present invention, the result image obtained by the calculation means performing the spatial filtering process over the entire area of the reduced image has the size of the image defined in the input image data. Image enlarging means for enlarging is provided.

  Also, the image processing apparatus according to the present invention divides a value approximating the width of the temporary reduction mask obtained by reducing the mask with the image reduction ratio by an odd multiple of 1 pixel width by the number of pixels of the mask width. There is provided a reduction rate setting means for setting a value obtained by doing as a mask reduction rate. The image reduction rate is set to a value that can reproduce the image before reduction when the reduced image obtained by reducing the image at the reduction rate is enlarged again.

  The mask in the image processing apparatus and each of the above means can be realized in the form of a computer program that can be executed by an arithmetic processing apparatus such as a computer. Creating an apparatus for performing the above processing and a computer program for causing a computer to execute the above processing can be easily implemented by those skilled in the art who understand the following description. Further, it is obvious to those skilled in the art that a computer program that causes a computer to execute the above processing is stored in a recording medium.

  According to the present invention, it is possible to execute spatial filter processing on input image data at high speed.

  In the present invention, a mask that defines pixels to be extracted for spatial filtering in an image defined in the input image data is set. According to the present invention, the pixels to be subjected to the spatial filter processing are extracted from the image defined in the input image data using this mask, and the calculation of the spatial filter processing main body is executed for these pixels. The present invention can be easily applied to various types of spatial filter processing simply by appropriately setting a calculation formula related to the product-sum operation of the spatial filter processing. For example, the present invention can be applied to linear filters such as averaging filter processing, and statistical filters such as intermediate value filters, maximum value filters, minimum value filters, and Laplacian filters.

  Further, according to the present invention, the arrangement of pixels to be extracted for spatial filtering, which is defined in the mask, can be arbitrarily set, so that the image defined by the input image data can be set. Any spatial filtering process can be performed without being limited by the content. That is, since the spatial filter process can be flexibly executed according to the content of the image defined by the input image data, the accuracy of the image obtained by the spatial filter process can be increased.

1 is a basic block diagram of an image processing apparatus according to an embodiment of the present invention. It is a flowchart which shows the operation | movement flow of the image processing apparatus by the Example of this invention. It is a figure explaining the image reduction rate in the Example of this invention. It is a figure explaining the mask in the Example of this invention. It is a flowchart which shows the operation | movement flow of the reduction ratio setting means which sets the mask reduction ratio in the Example of this invention. It is a figure which shows an example of reduction of the mask in the Example of this invention. It is a figure which illustrates extraction of the pixel using the reduction mask in the Example of this invention. It is a figure which shows the actual calculation process result at the time of applying the image processing apparatus by the Example of this invention as an averaging filter. It is a figure which shows the actual arithmetic processing result at the time of applying the image processing apparatus by the Example of this invention as a maximum value filter. It is a figure which illustrates the calculation processing result of the effect of the setting of the pixel in a mask. It is a figure which shows reduction of the mask shown in FIG.4 (b). It is a figure which shows the actual arithmetic processing result at the time of applying the image processing apparatus by the Example of this invention as a maximum value filter using the mask shown to (b). It is a block diagram which shows the structure of the image processing apparatus of the Example of this invention which operate | moves with the computer program stored in the recording medium. It is a figure explaining the operation | movement principle of an averaging filter process, Comprising: (a) is a figure which illustrates the image of the imaged wiring board, (b) is an averaging filter using a "3x3" mask It is a figure explaining a process. 2A and 2B are diagrams illustrating a memory array of pixels on an image, where FIG. 2A illustrates a pixel on a captured image, and FIG. 2B illustrates a pixel array held in a memory. is there. It is a figure explaining the memory access in an averaging filter process, Comprising: (a) is a figure which illustrates a part of image shown to Fig.15 (a), (b) is the arrangement | sequence of the pixel hold | maintained at memory FIG.

  FIG. 1 is a basic block diagram of an image processing apparatus according to an embodiment of the present invention. An image processing apparatus 1 that performs spatial filtering on input image data includes a mask 11, an extraction unit 12, a calculation unit 13, an image reduction unit 14, a mask reduction unit 15, and an image enlargement unit 16. A reduction rate setting means 17 and a memory 10. The mask 11 and the units 12 to 17 in the image processing apparatus 1 are realized in the form of a computer program that can be executed by a computer. Therefore, the image processing apparatus 1 is configured as a computer in which the computer program is installed. . In addition, the memory 10 is realized by a working memory for arithmetic processing that a computer generally has, a hard disk or a solid state drive for data storage. The computer program can be stored in a recording medium or distributed to the market via a communication line such as the Internet.

  FIG. 2 is a flowchart showing an operation flow of the image processing apparatus according to the embodiment of the present invention. Hereinafter, the operation principle of the mask 11 and the units 12 to 17 in the image processing apparatus 1 will be described with reference to FIGS.

  First, in step S201, image data is input to the image processing apparatus 1, which is a computer in which a computer program for image processing according to the present invention is installed.

  In step S101, the image reduction unit 14 in the image processing apparatus 1 reduces the image defined in the image data at a certain image reduction rate. As an image reduction method, for example, a nearest neighbor method, a bilinear method, a bicubic method, or an average pixel method may be used.

  Here, the image reduction rate is set to a value that can reproduce the image before reduction when the reduced image obtained by reducing the image at the reduction rate is enlarged again. For example, the user inputs and sets the image reduction ratio to a computer constituting the image processing apparatus 1 using a keyboard or a mouse. The set image reduction ratio is stored in a memory in a computer constituting the image processing apparatus 1. FIG. 3 is a diagram for explaining the image reduction ratio in the embodiment of the present invention. For example, as shown in FIG. 3A, consider a case where an image Q defined by input image data is an image of a printed circuit board. In the figure, white portions represent wiring on the printed circuit board, and black portions other than that represent printed circuit board portions where wiring is not laid. For example, as shown in FIG. 3A, when the width of the wiring on the printed circuit board is 4 pixels, when the image Q is reduced at the reduction ratio “r = 0.6”, in the reduced image R, The width of the wiring is 2.4 pixels. However, as shown in FIG. 3B, when the width of the wiring on the printed circuit board is equivalent to 4 pixels and the image Q is reduced at the reduction ratio “r ′ = 0.2”, the reduced image R The width of the wiring is less than 1 pixel, that is, the wiring of this portion is lost. Even if the disappearing line or point is enlarged again, the wiring (or the width of the wiring) in the image Q before the reduction cannot be reproduced. That is, excessive reduction of the image Q is not suitable in terms of accuracy. Therefore, in the embodiment of the present invention, the image reduction ratio used for the reduction of the image defined in the input image data is the same as when the reduced image obtained by reducing the image at the image reduction ratio is enlarged again. In addition, the value is set such that the image before reduction can be reproduced.

  On the other hand, in step S202, the mask 11 is set. The mask 11 is for the purpose of selecting pixels and is a so-called “element extraction mask”. The mask 11 defines pixels to be extracted in order to perform spatial filter processing on an image defined in the image data input to the image processing apparatus 1.

  Here, the arrangement of the pixels to be extracted to be subjected to the spatial filter processing defined in the mask 11 can be arbitrarily set. For example, the user inputs and sets the definition of the mask 11 to the computer constituting the image processing apparatus 1 using a keyboard, a mouse, or the like. The set mask 11 is stored in a memory in a computer constituting the image processing apparatus 1. FIG. 4 is a diagram for explaining a mask in an embodiment of the present invention. For example, when the size of the mask 11 is “21 × 21”, a pixel to be extracted for spatial filtering is represented by “1” and a pixel not to be extracted is represented by “0” in the figure. In the figure, a pixel “1” surrounded by a thick line represents a pixel of interest when performing spatial filter processing. In the example shown in FIG. 4A, the mask 11 is defined so that all the pixels in the mask 11 are extracted. In the example shown in FIG. 4B, a substantially rhombus is formed as a whole. A mask 11 is defined so that a plurality of pixels are extracted. The advantage that the mask 11 can be arbitrarily set will be described later.

  In step S102 of FIG. 2, the mask reduction unit 15 in the image processing apparatus 1 reduces the mask 11 at the mask reduction rate r '. As a reduction method of the mask 11, for example, a nearest neighbor method, a bilinear method, a bicubic method, an average pixel method, or the like may be used.

  Here, the mask reduction ratio r ′ is set by the reduction ratio setting means 17 in the image processing apparatus 1. The reduction ratio setting means 17 divides a value approximating the width of the temporary reduction mask obtained by reducing the mask 11 with the image reduction ratio by an odd multiple of one pixel width by the number of pixels of the width of the mask 11. The value thus obtained is set as the mask reduction ratio r ′. That is, the reduction ratio setting means 17 sets the mask reduction ratio r ′ used for reduction of the mask 11 so that the number of pixels of the reduction mask width when the mask 11 is reduced at the mask reduction ratio r ′ becomes an odd number. To do. In the present invention, the reason why the number of pixels of the width of the reduction mask is set to an odd number is to execute the spatial filter process after placing the pixel of interest at the center of the reduction mask.

  The mask reduction ratio r 'is generated based on the flowchart shown in FIG. FIG. 5 is a flowchart showing an operation flow of the reduction ratio setting means for setting the mask reduction ratio in the embodiment of the present invention. When the mask width (number of pixels) is w and the image reduction ratio is r, the reduction ratio setting means 17 in the image processing apparatus 1 multiplies the width w of the mask 11 by the image reduction ratio r in step S301. Then, a value corresponding to the “temporary reduction mask width” is calculated, and an integer part of the “temporary reduction mask width” is calculated. The value obtained as a result is set as w '.

  Next, in step S <b> 302, the reduction rate setting unit 17 determines whether or not the remainder when w ′ is divided by 2 is 1. If it is determined in step S302 that the remainder is 1, the process proceeds to step S304. If it is determined that the remainder is not 1 (that is, there is no remainder), the process proceeds to step S303.

  In step S303, the reduction ratio setting unit 17 sets a value obtained by adding 1 to w ′ as a new w ′.

  In step S <b> 304, the reduction rate setting unit 17 sets a value obtained by dividing w ′ by the width w of the mask 11 as the mask reduction rate r ′.

  FIG. 6 is a diagram showing an example of mask reduction in the embodiment of the present invention. Here, when the image reduction ratio r is 0.6, the size of the mask 11 is “21 × 21” as shown in FIG. 6 (that is, the number of pixels of the width of the mask 11 is 21). Will be described. In step S301 in FIG. 5, the reduction ratio setting unit 17 multiplies the number of pixels w = 21 of the width of the mask 11 by the image reduction ratio r = 0.6, and a value 12 corresponding to the “temporary reduction mask width”. .6, and w ′ = 12 is calculated as an integer part of the “temporary reduction mask width”. Next, in step S302, the reduction ratio setting unit 17 determines that the remainder when w '= 12 is divided by 2 is not 1 (that is, there is no remainder), and proceeds to step S303. In step S303, the reduction ratio setting unit 17 sets a value “13” obtained by adding 1 to w ′ = 12 as a new w ′. Next, in step S304, the reduction ratio setting unit 17 sets a value of about 0.62 obtained by dividing w '= 13 by the width 21 of the mask 11 as the mask reduction ratio r'. As a result, the size of the reduction mask 11 ′ is “13 × 13” (that is, the number of pixels of the width of the mask 11 is 13).

  In step S102 of FIG. 2, the mask reducing unit 15 in the image processing apparatus 1 reduces the mask 11 at the mask reduction rate r 'to generate a reduced mask 11'. As a reduction method of the mask 11, for example, there are a nearest neighbor method, a bilinear method, a bicubic method, or an average pixel method. Among these, the bilinear method, the bicubic method, or the average pixel method is used to reduce the size. There are places where the result is a numerical value other than the pixel “1” to be extracted for spatial filtering and the pixel “0” not to be extracted, that is, a numerical value falling between “0” and “1”. The numerical value that falls within the range from “0” to “1” means that the corresponding part is near the boundary line. In such a case, for example, “0.5” is set as the threshold value, and the reduction is performed. If the result is larger than the threshold value “0.5”, the pixel “1” to be extracted for spatial filtering is assigned, and if the result is larger than the threshold value “0.5”, the pixel “0” not to be extracted is assigned. You can do that.

  Next, in step S103, the extracting unit 12 in the image processing apparatus 1 uses the reduced mask 11 ′ generated by the mask reducing unit 15 to perform pixel filtering on the image reduced by the image reducing unit 14. Is extracted and stored in the memory 10. FIG. 7 is a diagram illustrating pixel extraction using the reduction mask in the embodiment of the present invention. Here, a case is considered in which the reduced image R is an image of the printed circuit board, and the reduced mask 11 ′ has a size of “13 × 13” (that is, the number of pixels of the width of the mask 11 is 13). A white spot in the reduced image R represents a wiring on the printed board, and a black spot other than that represents a printed board portion where no wiring is laid. As shown in FIG. 7A, the extracting unit 12 extracts a portion corresponding to “13 × 13” pixels, which is the size of the reduced mask 11 ′, on the reduced image R, and extracts the portion corresponding to the processing target image T. And Then, as shown in FIG. 7B, the extraction unit 12 multiplies the processing target image T by the reduction mask 11 ′, extracts the pixel “1” to be extracted for spatial filtering, and extracts An address is assigned to the selected pixel and stored in the memory 10. As described above, in the spatial filter processing, each pixel data on the image is held as a one-dimensional array on the memory 10. In the example illustrated in FIG. 7B, the extraction unit 12 assigns addresses “A1” to “A169” to the extracted 169 pixels and stores them in the memory 10.

  In step S <b> 104 of FIG. 2, the calculation unit 13 of the image processing apparatus 1 performs a spatial filter process calculation on the pixels stored in the memory 10. What is necessary is just to set suitably the calculation formula which the calculation means 13 should calculate according to the kind of spatial processing filter.

  For example, when the averaging filter process is performed on the extracted 169 pixels illustrated in FIG. 7B, the calculation unit 13 uses the luminance of the extracted 169 pixels to calculate the equation (2). Perform the calculation. In Equation 2, for the sake of simplicity, the pixel address “Ai” (where i is an integer from 1 to 169) shown in FIG. It is used to represent the luminance value.

  Further, for example, when the maximum value filtering process is executed on the extracted 169 pixels shown in FIG. 7B, the calculation unit 13 calculates Equation 3 using the luminance of the extracted 169 pixels. Execute. In Formula 3, for the sake of simplicity, the pixel address Ai (where i is an integer from 1 to 169) shown in FIG. It is used to represent a value.

  According to the embodiment of the present invention, the calculating means 13 performs the product-sum operation in the spatial filter processing on the pixels stored in the memory 10 as a one-dimensional array. There is no such thing as accessing a distant address over and over again. Therefore, according to the embodiment of the present invention, it is possible to execute the spatial filtering process on the input image data at high speed. Further, according to the embodiment of the present invention, after extracting pixels to be subjected to the spatial filter processing from the image defined in the input image data using the mask, the spatial filtering main body of these pixels is extracted. Since the calculation is performed, it can be applied to various types of spatial filter processing. For example, the present invention can be applied to linear filters such as averaging filter processing, and statistical filters such as intermediate value filters, maximum value filters, minimum value filters, and Laplacian filters.

  In step S105 in FIG. 2, the image processing apparatus 1 determines whether or not the processing in steps S103 and S104 has been completed over the entire reduced image. For example, it is determined whether or not all the pixels on the reduced image R with reference to FIG. Until all the pixels on the reduced image R are set as the target pixel, the processes in steps S103 and S104 are repeated.

  In step S106 of FIG. 2, the image enlarging unit 16 of the image processing apparatus 1 converts the result image obtained by the calculation unit 13 executing the spatial filter process over the entire area of the reduced image R into the input image data. Enlarge to be the same size as the specified image. For example, when the number of pixels of the width of the image Q defined in the input image data is 256, and the image reduction ratio is reduced to 0.6, the number of pixels of the width of the reduced image R is 153. The reduced image R is enlarged at an enlargement ratio of 256/153 (≈1.673) times so that the reduced image R returns to an image having a width of 256 again.

  In step S107 in FIG. 2, the image processing apparatus 1 outputs the image data enlarged in step S107 as processed data.

  FIG. 8 is a diagram showing an actual calculation processing result when the image processing apparatus according to the embodiment of the present invention is applied as an averaging filter. Here, it is assumed that the number of pixels of the width of the image Q defined in the input image data is 256, and the image is reduced at an image reduction rate of 0.6. The mask having the size of “21 × 21” is reduced by the mask reduction ratio of 0.62 to be the mask having the size of “13 × 13”, and the reduced image R is averaged using the mask. When a pixel is extracted and a product-sum operation is executed, an image S ′ is obtained. The image S ′ is enlarged at an enlargement ratio of 256/153 (≈1.673) to obtain a processed image S. In the conventional method, when the averaging filter process is executed for the same original image Q, approximately 183.71 milliseconds are required. However, according to the embodiment of the present invention, the process is completed in 35.79 milliseconds. .

  FIG. 9 is a diagram showing an actual calculation processing result when the image processing apparatus according to the embodiment of the present invention is applied as the maximum value filter. Here, it is assumed that the number of pixels of the width of the image R defined in the input image data is 256, and the image is reduced at an image reduction rate of 0.6. The mask having the size of “21 × 21” is reduced by the mask reduction ratio of 0.62 to become the mask having the size of “13 × 13”, and the maximum value filtering process is performed on the reduced image R using this mask. When a pixel is extracted and a product-sum operation is executed, an image S ′ is obtained. The image S ′ is enlarged at an enlargement ratio of 256/153 (≈1.673) to obtain a processed image S.

  As described above, according to the present invention, the arrangement of pixels to be extracted for spatial filtering, which is defined in the mask, can be arbitrarily set. For example, depending on the content of the image defined in the input image data, the setting for extracting all the pixels in the mask may not be suitable. FIG. 10 is a diagram exemplifying the calculation processing result of the effect of setting the pixels in the mask. For example, when the maximum value filtering process is executed on the original image shown in FIG. 10A using a mask for extracting all pixels in the mask (that is, the mask shown in FIG. 4A), FIG. As shown in b), the corners of the white graphic are crushed and the original characteristics of the graphic are lost. In such a case, the arrangement of the pixels to be extracted for the spatial filter processing may be set in a shape similar to the graphic of the image. For the original image shown in FIG. 10A, a mask as shown in FIG. 4B, from which a plurality of pixels that form a substantially rhombus as a whole may be used. FIG. 11 is a diagram showing the reduction of the mask shown in FIG. FIG. 12 is a diagram showing an actual calculation processing result when the image processing apparatus according to the embodiment of the present invention is applied as a maximum value filter using the mask shown in FIG. 4B. Here, it is assumed that the number of pixels of the width of the image Q defined in the input image data is 256, and the image is reduced at an image reduction rate of 0.6. The mask having the size of “21 × 21” is reduced by the mask reduction ratio of 0.62 to become the mask having the size of “13 × 13”, and the maximum value filtering process is performed on the reduced image R using this mask. When a pixel is extracted and a product-sum operation is executed, an image S ′ is obtained. The image S ′ is enlarged at an enlargement ratio of 256/153 (≈1.673) to obtain a processed image S. Thus, it can be seen that by setting the mask according to the contents of the original image Q, the processed image S can be obtained without losing the original features of the figure. That is, according to the embodiment of the present invention, since the spatial filter processing can be executed flexibly according to the content of the image defined by the input image data, the accuracy of the image obtained by the spatial filter processing Can be increased.

  Each means and mask in the above-described image processing apparatus according to the embodiment of the present invention are realized in the form of a computer program that can be executed by an arithmetic processing apparatus such as a computer. FIG. 13 is a block diagram showing a configuration of an image processing apparatus according to an embodiment of the present invention that operates according to a computer program stored in a recording medium.

  A computer program for causing a computer to execute image processing according to the present invention is stored in a storage medium (external storage medium such as a flexible disk or a CD-ROM) 110 as shown in FIG. It is installed in a computer having a simple configuration and operates as the image processing apparatus 1.

  The CPU 111 controls the entire image processing apparatus 1. The CPU 111 is connected to a ROM 113, a RAM 114, an HD (hard disk device) 115, an input device 116 such as a mouse and a keyboard, an external storage medium drive device 117, and a display device 118 such as an LCD, CRT, plasma display, and organic EL via a bus 112. Is connected. A control program for the CPU 111 is stored in the ROM 113.

  A computer program (image processing program) for executing image processing according to the present invention is installed (stored) in the HD 115 from the storage medium 110. The RAM 114 has a work area when the CPU 111 executes image processing and an area for storing a part of a program for executing image processing. The HD 115 stores input data, final data, OS (operating system), and the like in advance.

  First, when the computer is turned on, the CPU 111 reads a control program from the ROM 110, further reads an OS from the HD 115, and starts the OS. As a result, the computer is ready to install the image processing program from the storage medium 110.

  Next, the storage medium 110 is loaded into the external storage medium drive device 117, a control command is input from the input device 116 to the CPU 111, and an image processing program stored in the storage medium 110 is read and stored in the HD 115 or the like. That is, the image processing program is installed in the computer.

  Thereafter, when the image processing program is activated, the computer operates as the image processing apparatus 1. The operator can execute the above-described image processing by operating the input device 116 in accordance with the interactive work content and procedure displayed on the display device 118. The “data regarding the processed image” obtained as a result of the processing is stored in, for example, the HD 115 so that it can be used later, or the processing result is visually displayed on the display device 118. Also good.

  In the computer shown in FIG. 13, the program stored in the storage medium 110 is installed in the HD 115. However, the present invention is not limited to this, and the program may be installed in the computer via an information transmission medium such as a LAN. It may be installed in advance in the HD 115 built in the computer.

  The present invention can be applied to a spatial filter used when various kinds of images are processed. The present invention can also be applied to linear filters such as averaging filter processing and statistical filters such as intermediate value filters, maximum value filters, minimum value filters, and Laplacian filters. For example, the maximum value filter and the minimum value filter are used for image processing in a defect inspection apparatus that detects a defect in a wiring board, and the averaging filter removes light unevenness in an image of the taken wiring board. Also used for

DESCRIPTION OF SYMBOLS 1 Image processing apparatus 10 Memory 11 Mask 11 'Reduction mask 12 Extraction means 13 Calculation means 14 Image reduction means 15 Mask reduction means 16 Image enlargement means 17 Reduction rate setting means 110 Recording medium 111 CPU
112 bus 113 ROM
114 RAM
115 Hard Disk Device 116 Input Device 117 External Storage Medium Drive Device 118 Display Device

Claims (6)

An image processing apparatus that performs spatial filtering on input image data,
A mask defining pixels to be extracted for spatial filtering in the image defined in the input image data;
Extraction means for extracting the pixel to be subjected to the spatial filter processing from the image defined in the input image data using the mask, and storing the pixel in a memory;
Calculation means for performing calculation of spatial filtering on the pixels stored in the memory;
An image processing apparatus comprising: Image reduction means for reducing the image defined in the image data at an image reduction rate;
Mask reduction means for reducing the mask at a mask reduction rate;
Further comprising
2. The extraction means extracts a pixel to be subjected to the spatial filter processing from the image reduced by the image reduction means using the mask reduced by the mask reduction means, and stores it in the memory. An image processing apparatus according to 1.   An image for enlarging a result image obtained by the spatial filter processing performed by the calculation means over the entire area of the reduced image so as to have the same size as the image defined in the input image data The image processing apparatus according to claim 2, further comprising an enlarging unit.   A value obtained by dividing the width of the temporary reduction mask obtained by reducing the mask at the image reduction ratio to a value that is an odd multiple of the width of one pixel is divided by the number of pixels of the width of the mask. The image processing apparatus according to claim 2, further comprising a reduction ratio setting unit that sets a value as the mask reduction ratio.   The image processing apparatus according to claim 1, wherein an arrangement of pixels to be extracted for spatial filtering defined in the mask can be arbitrarily set.   3. The image reduction rate is set to a value that can reproduce the image before reduction when the reduced image obtained by reducing the image at the image reduction rate is enlarged again. Image processing apparatus.