JP2011118606A - Information processing apparatus and control method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To propose an information processing apparatus for improving user's convenience. <P>SOLUTION: The information processing apparatus includes a hypervisor for providing a virtual machine environment to a computer, and first to third virtual machines to be driven in the virtual machine environment. The first and the second virtual machines include a function for processing a data input/output request transmitted from a host computer. The third virtual machine includes a function which, after turning one of the first and the second virtual machines to a stop state and turning the other of the first and second virtual machines to a driven state, instructs to update the firmware of the one virtual machine, and when the firmware of the one virtual machine is updated and the processing of data input/output request in the other virtual machine is ended, turns the other virtual machine to a stop state and turns the one virtual machine to a driven state. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an information processing apparatus that updates firmware in a mission critical environment in which the business cannot be stopped 24 hours a day, 365 days, and a control method thereof.

  Conventionally, when the controller firmware of a disk controller that performs input / output control of data sent from a host computer to a disk is updated, it is necessary to reboot each controller of the disk controller to operate with the new firmware after the update Become.

  For this reason, when the access path between the host computer and the disk controller has a single path configuration, the I / O request cannot be processed during the reboot of each controller of the disk controller, and the business must be stopped. .

  As a method for updating the firmware, as shown in FIG. 21, a path switching driver is introduced on the host computer that issues an I / O request, and a redundant path configuration is established between the host computer and each controller of the disk controller. There is a way. In such a configuration, when one controller of the disk controller is rebooted, the operation is stopped by rebooting each controller while switching the access path so that the other controller processes the I / O request by the path switching driver. Firmware can be updated without any problems.

  In addition, as shown in FIG. 22, in the redundant controller configuration, a switching mechanism to another system controller is provided between the host interface and the controller, and when one controller of the disk controller is rebooted, the other controller issues an I / O request. There is a method of updating the firmware by rebooting each controller while switching to process.

  Furthermore, as a method for updating the firmware, there is a method disclosed in Patent Document 1. In the method of Patent Document 1, cluster software / cluster service is used as a basic technology, and in addition to this, a hypervisor and one or more guest operating systems are executed. After the hypervisor prohibits the use of the device by the guest operating system, the hypervisor upgrades the firmware in the device using the received firmware. The hypervisor allows the guest operating system to use the device after the firmware has been upgraded.

JP 2008-243183 A

  However, the firmware update method shown in FIG. 21 requires introduction of a path switching driver in each host computer and hardware for making a redundant path configuration between each host computer and the disk controller, resulting in an increase in installation cost. In addition, since the access path switching operation by the path switching driver is an operation on the host computer, a work by the system administrator is required, and there is a demerit that only the maintenance staff of the disk controller cannot perform the work. Furthermore, when there are a large number of host computers connected to the disk controller, an access path switching operation occurs in all the host computers, which is a difficult task requiring a great deal of time and effort.

  According to the firmware update method shown in FIG. 22, there is an advantage that a path switching operation on the host computer is unnecessary, and that only maintenance personnel can work. However, it is necessary to provide the disk control device with a switching mechanism, which increases the manufacturing cost of the disk control device. Further, since the switching mechanism is required in proportion to the number of host interfaces mounted on the disk control device, there is a demerit that a large disk control device with a large number of host interfaces mounted further increases the manufacturing cost. Further, the single controller configuration cannot solve the problem, and the redundant controller configuration is essential, so that the cost of introducing the disk controller increases.

  The method of Patent Document 1 uses cluster software / cluster service as a basic technology and is combined with virtualization technology. When a service is taken over from an active device to a standby device, the service is interrupted. Therefore, there is a problem that it is not possible to provide a service without stopping business.

  The present invention has been made in consideration of the above points, and proposes an information processing apparatus and a control method therefor that can improve the user-friendliness.

  In order to solve this problem, the present invention is an information processing apparatus, comprising: a hypervisor that provides a computer with a virtual machine environment; and first to third virtual machines that operate in the virtual machine environment, The first and second virtual machines have a function of processing an input / output request for data transmitted from a host computer, and the third virtual machine puts one of the first and second virtual machines in a stopped state. And instructing the firmware of the one virtual machine to be updated after the other of the first and second virtual machines is in an operating state, the firmware of the one virtual machine is updated, and When the data input / output request processing is completed, the other virtual machine is stopped and the one virtual machine is in an operating state. And wherein the door.

  The present invention is an information processing apparatus comprising a hypervisor that provides a computer with a virtual machine environment, and first and second virtual machines that operate in the virtual machine environment, the first and second The virtual machine has a function of processing an input / output request of data transmitted from the host computer and the other virtual machine after stopping the other one of the first and second virtual machines and operating itself. When the firmware of the other virtual machine is updated and the processing of its own data I / O request is completed, it stops itself and the other virtual machine is in an operating state. And a function of

  Furthermore, the present invention is a method of controlling an information processing apparatus having a hypervisor that provides a virtual machine environment to a computer and first to third virtual machines that operate in the virtual machine environment, wherein the first and first A first step in which the second virtual machine processes an input / output request for data transmitted from the host computer, and the third virtual machine stops one of the first and second virtual machines, A second step of bringing the other of the first and second virtual machines into an operating state, and the third virtual machine instructs to update the firmware of the one virtual machine, and the firmware of the one virtual machine Is updated, and when the processing of the data input / output request in the other virtual machine is completed, the other virtual machine is stopped and the other virtual machine is stopped. Characterized in that it comprises a third step of the thin and health.

  Therefore, the firmware can be updated without stopping the business.

  ADVANTAGE OF THE INVENTION According to this invention, the information processing apparatus which can improve a user's usability, and its control method are realizable.

It is an example of a block diagram showing configurations of a host computer and a disk control device of the present embodiment. It is an example of the block diagram which shows the structure of the controller of 1st Embodiment. It is an example of the flowchart which shows the operation | movement procedure which makes a control part a standby state. It is an example of the conceptual diagram with which it uses for description of the operation | movement which makes a control part a standby state. It is an example of the flowchart which shows the operation | movement procedure which updates the firmware of a control part. It is an example of the conceptual diagram with which it uses for description of the operation | movement which updates the firmware of a control part. It is an example of the flowchart which shows the operation | movement procedure for processing an I / O request | requirement in a control part. It is an example of the conceptual diagram with which it uses for description of the operation | movement for processing an I / O request | requirement in a control part. It is an example of the block diagram which shows the structure of the controller of 2nd Embodiment. It is an example of the flowchart which shows the operation | movement procedure which makes a control part and an instruction | indication part a standby state. It is an example of the conceptual diagram with which it uses for description of the operation | movement which makes a control part and an instruction | indication part a standby state. It is an example of the flowchart which shows the operation | movement procedure which updates the firmware of an instruction | indication part. It is an example of the conceptual diagram with which it uses for description of the operation | movement which updates the firmware of an instruction | indication part. It is an example of the block diagram which shows the structure of the controller of 3rd Embodiment. It is an example of the flowchart which shows the operation | movement procedure which makes a control part a standby state. It is an example of the conceptual diagram with which it uses for description of the operation | movement which makes a control part a standby state. It is an example of the flowchart which shows the operation | movement procedure which updates the firmware of a control part. It is an example of the conceptual diagram with which it uses for description of the operation | movement which updates the firmware of a control part. It is an example of the flowchart which shows the operation | movement procedure for processing an I / O request | requirement in a control part. It is an example of the conceptual diagram with which it uses for description of the operation | movement for processing an I / O request | requirement in a control part. It is an example of the block diagram which shows the structure of the conventional host computer and a disk control apparatus. It is an example of the block diagram which shows the structure of the conventional host computer and a disk control apparatus.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited thereby.

  FIG. 1 is a diagram showing a storage system 1 in this embodiment. The storage system 1 includes a host computer 10 and a disk control device 20 (information processing device).

  The host computer 10 includes hardware similar to that of a normal computer device such as a CPU (Central Processing Unit), a ROM (Read Only Memory), and a RAM (Random Access Memory). The host computer 10 includes an application 11, a file system 12, an upper driver 13, a lower driver 14, and an HBA (Host Bus Adapter) 15.

  The host computer 10 executes the application 11, the file system 12, the upper driver 13, and the lower driver 14, and transmits / receives an I / O request to the disk controller 20 and data corresponding to the I / O request via the HBA 15.

  The disk control device 20 includes a controller 21 and a disk device 22. Based on the I / O request transmitted from the host computer 10, the disk control device 20 writes data corresponding to the I / O request transmitted from the host computer 10 to the disk device 22 and responds to the I / O request. Data is read from the disk device 22 and transmitted to the host computer 10.

(First embodiment)
FIG. 2 is a diagram illustrating a configuration of the controller 21 according to the first embodiment. The controller 21 is configured as a computer including a processor 150, a memory 151, an external interface control circuit 152, a host interface control circuit 153, a disk interface control circuit 154, and an inter-controller communication control circuit 155.

  The processor 150 is hardware for operating a program on a computer. The memory 151 is used as a storage area for programs and various control data to be interpreted and executed by the processor 150, a work area, or a storage area for read data and write data related to disk access.

  The external interface control circuit 152 is connected to a management / monitoring terminal that provides a user interface via an external interface, and various control information (control information of various hardware) exchanged with the management / monitoring terminal. And continuous monitoring information, operation information, operation and management information of the disk control device 20).

  The host interface control circuit 153 is connected to the host computer 10 via the host interface, and controls I / O requests related to disk access received from the host computer 10 and data input / output corresponding to the I / O requests. . The disk interface control circuit 154 is connected to the disk device 22 via the disk interface, and performs input / output control related to the disk device 22.

  In the case of a redundant controller configuration, the inter-controller communication control circuit 155 is connected to the other inter-controller communication control circuit via the inter-controller data bus, and various control information and data shared between the controllers are stored. Performs input / output control.

  The controller 21 includes a control program, an instruction program, and a hypervisor program in the memory 151. The processor 150 of the controller 21 executes a hypervisor program and realizes a virtual machine environment in which another computer environment is prepared on the computer. The hypervisor 140 realized as a virtual machine by executing the hypervisor program is a functional unit that provides a virtual machine environment.

  Specifically, the controller 21 executes control programs on a virtual machine environment to execute control programs (hereinafter, control units 110 (first virtual machine) and 130 (second virtual machine). And an instruction unit realized as a virtual machine by executing an instruction program (hereinafter referred to as an instruction unit 120 (third virtual machine)).

  The control unit 110 is a functional unit that controls overall disk control (for example, reading and writing to the disk device 22), and includes a service processor 111, a function firmware 112, a guest OS (Operating System) 113, and a para-virtualized driver (PV driver (Para -Virtualized driver)) 114. The control unit 130 is a functional unit that governs overall disk control, like the control unit 110, and includes a service processor 131, functional firmware 132, a guest OS 133, and a para-virtualized driver 134.

  The instruction unit 120 is a functional unit that communicates with the control units 110 and 130 and issues various instructions to the control units 110 and 130 (for example, rebooting the control unit 130). The guest OS 123 and the para-virtualized driver 124 are provided.

  The service processors 111, 121, and 131 provide various hardware control and continuous monitoring functions, operation of the disk control device 20, operation, and management functions. The function firmwares 112 and 132 operate and control various types of hardware, and process I / O requests related to disk access received from the host computer. The guest OSs 113, 123, and 133 are OSs (for example, VxWorks, Linux, Solaris, etc.) that operate in a virtual machine environment in a virtual machine environment in which another computer environment is prepared on the computer. The para-virtualized drivers 114, 124, and 134 are based on virtualization as in the case where the operation performance of the guest OS 113, 123, or 133 operating on the hypervisor 140 is operated on physical hardware that is not virtualized. This is a hardware control driver for minimizing overhead.

  Next, operation | movement of the controller 21 of 1st Embodiment is demonstrated with reference to the flowchart and conceptual diagram of FIGS. 3-8. The following first to fourth conditions are defined as preconditions for explanation.

  First, immediately after the controller 21 is activated for the first time, the processor 150 processes an I / O request received from the host computer 10 by the control unit 110, and sets the control unit 130 in a standby state. In this case, the processor 150 returns to the state immediately before the controller 21 is started from the next time and immediately before the previous controller 21 is stopped. Second, the processor 150 instructs the controller 130 to update the firmware of the control unit 130. Third, after the firmware update is completed, the processor 150 causes the control unit 130 to process an I / O request received from the host computer 10 and sets the control unit 110 to a standby state. Fourthly, the processor 150 transfers the update firmware binary to the service processor 121 in advance from the management / monitoring terminal connected via the external interface via the external interface control circuit 152.

  First, the operation of setting the control unit 130 in the standby state will be described with reference to the flowcharts and conceptual diagrams of FIGS.

  In the process of starting the controller 21, the service processor 121 instructs the service processor 131 to enter the standby state in order to place the control unit 130 in the standby state (S100). Subsequently, when the service processor 131 receives an instruction to enter the standby state, the service processor 131 shifts the control unit 130 to the standby state, and then reports to the service processor 121 that the standby state has been established (S110). .

  Subsequently, the service processor 121 instructs the service processor 111 to be active (S120) in order to place the control unit 110 in an active state (S120). Subsequently, when the service processor 111 receives an instruction to activate, the service processor 111 shifts the control unit 110 to the active state, and then reports to the service processor 121 that the active state has been reached (S130). .

  The I / O request received from the host computer 10 is now processed by the control unit 110 (FIG. 4).

  Next, the operation of updating the firmware of the control unit 130 will be described with reference to the flowcharts and conceptual diagrams of FIGS.

  The service processor 121 transfers binary (firmware) to the service processor 131 in preparation for firmware update of the control unit 130 (S140). Subsequently, when all the binaries are received, the service processor 131 reports to the service processor 121 that the binaries have been received (S150).

  Subsequently, the service processor 121 instructs the service processor 131 to perform a reboot in order to update the firmware of the control unit 130 (S160). Subsequently, when the service processor 131 receives an instruction to reboot, the service processor 131 reports to the service processor 121 that the reboot is started, and then starts the reboot of the control unit 130 (S170). Subsequently, when the reboot of the control unit 130 is completed, the service processor 131 reports to the service processor 121 that it is in a ready state (S180).

  As described above, the firmware of the control unit 130 is updated. The service processor 111 executes the function firmware 112 from S140 to S180, and performs data input / output control via the host interface control circuit 153 (FIG. 6).

  Next, an operation for processing the I / O request in the control unit 130 will be described with reference to the flowcharts and conceptual diagrams of FIGS.

  The service processor 121 instructs the service processor 131 to be active in order to process the I / O request received from the host computer 10 in the future in the control unit 130 (S190). Subsequently, when the service processor 131 receives an instruction to activate, the service processor 131 shifts the control unit 130 to the active state, and then reports to the service processor 121 that the active state has been entered (S200). . Thereafter, I / O requests from the host computer 10 are received by the control unit 130 and processed.

  Subsequently, the service processor 121 instructs the service processor 111 to enter the standby state in order to place the control unit 110 in the standby state (S210). Subsequently, when the service processor 111 receives an instruction to enter standby, if there is an I / O request that the control unit 110 has already received from the host computer 10, the service processor 111 sends a received I / O request to the service processor 121. A report indicating that the / O request is being processed is performed (S220), and the processing of the I / O request is continued until the control unit 110 processes all the received I / O requests.

  Subsequently, if there is no unprocessed I / O request received by the control unit 110 from the host computer 10, the service processor 111 shifts the control unit 110 to the standby state, A report to the effect that the standby state has been entered is made (S230).

  The service processor 111 executes the function firmware 112 from S190 to S200, and performs data input / output control via the host interface control circuit 153 (FIG. 8). Then, after S210, the service processor 111 does not receive a new I / O request from the host computer 10, and continues the process until the already received I / O request becomes zero. Also, the service processor 131 immediately executes the function firmware 132 after S200, and performs data input / output control via the host interface control circuit 153 (FIG. 8).

  As described above, the disk control device 20 includes two or more control units 110 and 130 including the guest OSs 113 and 133 on the hypervisor 140, and the function firmware 112 and 132 and the service processor 111 are included in the control units 110 and 130. 131, and the functional firmware 112 and 132 of the control units 110 and 130 and the service processors 111 and 131 include para-virtualized drivers 114 and 134 on the guest OS in order to operate the hardware. Further, the disk control device 20 includes one or more instruction units 120 including a guest OS 124 on the hypervisor 140, and the paravirtualized driver on the guest OS 123 so that the service processor 121 of the instruction unit 120 operates the hardware. 124 is provided. Further, the disk control device 20 includes means for the control units 110 and 130 and the instruction unit 120 to communicate with each other.

  With this configuration, the firmware of the disk control device 20 can be updated in a mission critical environment where the business cannot be stopped for 24 hours 365 days.

  Further, since a series of operations relating to the firmware update is completed inside the controller 21, the operation by the system administrator of the host computer 10 is not required, and the firmware of the disk control device 20 is updated only by the maintenance personnel of the disk control device 20. can do. Furthermore, since a series of operations related to firmware update is completed inside the controller 21, it is not necessary to configure the disk controller 20 as a redundant controller, and even if the disk controller 20 is configured as a single controller, operations are suspended. Firmware can be updated without

  Furthermore, since a series of operations relating to firmware update is completed inside the controller 21, there is no access path switching operation in the host computer 10, and there are many host computers 10 connected to the disk control device. Even in this case, the firmware of the disk control device 20 can be easily updated.

  Furthermore, since it is not necessary to install a path switching driver on each host computer 10 and hardware for making a redundant path configuration between each host computer 10 and the disk controller 20, the installation cost can be reduced. Further, it is not necessary to provide the disk controller 20 with a switching mechanism, and the manufacturing cost of the disk controller 20 can be reduced even for a large disk controller having a large number of host interfaces.

  Furthermore, since the controller 110 in which the firmware before the update is installed is present in the controller 21, for example, even when some failure occurs after the firmware is updated, it is easy to return to the firmware before the update.

(Second Embodiment)
FIG. 9 is a diagram illustrating the controller 21 in the second embodiment. The controller 21 in the second embodiment is configured in the same manner except that it includes two instruction units 120A (third virtual machine) and 120B (fourth virtual machine) instead of the instruction unit 120. Yes.

  Next, operation | movement of the controller 21 of 2nd Embodiment is demonstrated with reference to the flowchart and conceptual diagram of FIGS. 10-13. The following first to fourth conditions are defined as preconditions for explanation.

  First, immediately after the controller 21 is activated for the first time, the processor 150 processes an I / O request received from the host computer 10 by the control unit 110, sets the control unit 130 in a standby state, and sends each instruction to the instruction unit 120A. The instruction unit 120B is put into a standby state. In this case, the processor 150 returns to the state immediately before the controller 21 is started from the next time and immediately before the previous controller 21 is stopped. Second, the processor 150 instructs the instruction unit 120A to update the firmware of the instruction unit 120B. Third, the processor 150 causes the instruction unit 120B to take charge of the instruction after the firmware update is completed, and sets the instruction unit 120A to the standby state. Fourth, the processor 150 transfers the update firmware binary in advance from the management / monitoring terminal connected via the external interface to the service processor 120A via the external interface control circuit 152.

  First, the operation of setting the control unit 130 and the instruction unit 120B to the standby state will be described with reference to the flowcharts and conceptual diagrams of FIGS.

  In the startup process of the controller 21, the service processor 121A instructs the service processor 131 to enter the standby state in order to place the control unit 130 in the standby state (S300). Subsequently, the service processor 121A instructs the service processor 121B to enter the standby state in order to place the instruction unit 120B in the standby state (S310).

  Subsequently, when the service processor 131 receives an instruction to enter the standby state, the service processor 131 shifts the control unit 130 to the standby state, and then reports to the service processor 121A that the standby state has been established (S320). . Subsequently, when the service processor 121B receives an instruction to set the standby, the service processor 121B shifts the instruction unit 120B to the standby state, and then reports to the service processor 121A that the standby state is set (S330). .

  Subsequently, the service processor 121A instructs the service processor 111 to activate in order to activate the control unit 110 (S340). Subsequently, when the service processor 111 receives an instruction to activate, the service processor 111 shifts the control unit 110 to the active state, and then reports to the service processor 121A that the active state has been reached (S350). .

  As described above, the I / O request received from the host computer 10 is processed by the control unit 110, and each instruction is handled by the instruction unit 120A (FIG. 11).

  Next, the operation of updating the firmware of the instruction unit 120B will be described with reference to the flowcharts and conceptual diagrams of FIGS.

  The service processor 121A performs binary transfer to the service processor 121B as preparation for firmware update of the instruction unit 120B (S360). Subsequently, when all the binaries are received, the service processor 121B reports to the service processor 121A that the binaries have been received (S370).

  Subsequently, in order to update the firmware of the instruction unit 120B, the service processor 121A instructs the service processor 121B to reboot (S380). Subsequently, when the service processor 121B receives an instruction to reboot, the service processor 121B reports to the service processor 121A that the reboot is started, and then starts the reboot of the instruction unit 120B (S390). Subsequently, when the reboot of the instruction unit 120B is completed, the service processor 121B reports to the service processor 121A that the ready state is set (S400). Thus, the firmware of the instruction unit 120B has been updated.

  Subsequently, the service processor 121A instructs the service processor 121B to be active (S410). Subsequently, when the service processor 121B receives an instruction to activate, after the instruction unit 120B is shifted to the active state, the service processor 121B reports to the service processor 121A that the active state has been reached (S420). . Thereafter, the instruction unit 120B takes charge of the instruction.

  Subsequently, the service processor 121B instructs the service processor 121A to enter the standby state in order to place the instruction unit 120A in the standby state (S430). Subsequently, when the service processor 121A receives the instruction to enter the standby state, the service processor 121A shifts the instruction unit 120A to the standby state, and then reports to the service processor 121B that the standby state has been established (S440). .

  The service processor 111 executes the function firmware 112 from S360 to S440, and performs data input / output control via the host interface control circuit 153 (FIG. 13).

  With this configuration, in addition to obtaining the same effect as that of the first embodiment, the firmware of the instruction units 120A and 120B can be updated without stopping the business.

(Third embodiment)
FIG. 14 is a diagram illustrating the controller 21 in the third embodiment. The controller 21 in the third embodiment is the same except that the function of the instruction unit 120 is incorporated in the service processors 111 and 131 of the control units 110 (first virtual machine) and 130 (second virtual machine). It is configured.

  Next, operation | movement of the controller 21 of 3rd Embodiment is demonstrated with reference to the flowchart and conceptual diagram of FIGS. 15-20. The following first to fourth conditions are defined as preconditions for explanation.

  First, immediately after the controller 21 is activated for the first time, the processor 150 processes an I / O request received from the host computer 10 by the control unit 110, and sets the control unit 130 in a standby state. In this case, the processor 150 returns to the state immediately before the controller 21 is started from the next time and immediately before the previous controller 21 is stopped. Second, the processor 150 instructs the service processor 111 to update the firmware of the control unit 130. Third, after the firmware update is completed, the processor 150 causes the control unit 130 to process an I / O request received from the host computer 10 and sets the control unit 110 to a standby state. Fourthly, the processor 150 transfers the update firmware binary to the service processor 111 in advance from the management / monitoring terminal connected via the external interface via the external interface control circuit 152.

  First, an operation for setting the control unit 130 in the standby state will be described with reference to flowcharts and conceptual diagrams of FIGS. 15 and 16.

  In the startup process of the controller 21, the service processor 111 instructs the service processor 131 to enter the standby state in order to place the control unit 130 in the standby state (S500). Subsequently, when the service processor 131 receives the instruction to enter the standby state, the service processor 131 shifts the control unit 130 to the standby state, and then reports to the service processor 111 that the standby state has been established (S510). .

  The I / O request received from the host computer 10 is now processed by the control unit 110 (FIG. 16).

  Next, the operation of updating the firmware of the control unit 130 will be described with reference to the flowcharts and conceptual diagrams of FIGS. 17 and 18.

  The service processor 111 performs binary transfer to the service processor 131 in preparation for firmware update of the control unit 130 (S520). Subsequently, when all the binaries are received, the service processor 131 reports to the service processor 111 that the binaries have been received (S530).

  Subsequently, the service processor 111 instructs the service processor 131 to reboot in order to update the firmware of the control unit 130 (S540). Subsequently, when the service processor 131 receives an instruction to reboot, the service processor 131 reports to the service processor 111 that the reboot is started, and then starts the reboot of the control unit 130 (S550). Subsequently, when the reboot of the control unit 130 is completed, the service processor 131 reports to the service processor 111 that the ready state has been established (S560).

  As described above, the firmware of the control unit 130 is updated. The service processor 111 executes the function firmware 112 from S520 to S560, and performs data input / output control via the host interface control circuit 153 (FIG. 18).

  Next, an operation for processing an I / O request in the control unit 130 will be described with reference to flowcharts and conceptual diagrams of FIGS. 19 and 20.

  The service processor 111 instructs the service processor 131 to make it active in order for the control unit 130 to process an I / O request received from the host computer 10 in the future (S570). Subsequently, when the service processor 131 receives an instruction to activate, the service processor 131 shifts the control unit 130 to the active state, and then reports to the service processor 111 that the active state has been reached (S580). . Thereafter, I / O requests from the host computer 10 are received by the control unit 130 and processed.

  Subsequently, the service processor 131 instructs the service processor 111 to enter the standby state in order to place the control unit 110 in the standby state (S590). Subsequently, when the service processor 111 receives an instruction to enter standby, if there is an I / O request that the control unit 110 has already received from the host computer 10, the service processor 111 sends a received I / O request to the service processor 131. Reports that the / O request is being processed (S600), and continues processing the I / O request until the control unit 110 processes all the received I / O requests.

  Subsequently, if there is no unprocessed I / O request received by the control unit 110 from the host computer 10, the service processor 111 shifts the control unit 110 to the standby state, A report to the effect that the standby state has been reached is made (S610).

  The service processor 111 executes the function firmware 112 from S570 to S580, and performs data input / output control via the host interface control circuit 153 (FIG. 20). Then, after S590, the service processor 111 does not receive a new I / O request from the host computer 10, and continues the process until the already received I / O request becomes zero. After S580, the service processor 131 immediately executes the function firmware 132 and performs data input / output control via the host interface control circuit 153 (FIG. 20).

  With this configuration, the same effect as that of the first embodiment can be obtained.

  In the present embodiment, the case where the present invention is applied to the single controller configuration of the controller 21 has been described. However, the present invention is not limited to this, and for example, a redundant configuration such as the disk control devices 20 and 40 in FIGS. The present invention may be applied to other controllers, and may be applied to various other forms of disk control devices.

  In the mission critical environment where the operation cannot be stopped 24 hours a day, 365 days a day, in addition to the disk control device for performing input / output control to the disk of data transmitted from the host computer, in various other mission critical environments, The present invention can be applied to firmware embedded products such as information processing apparatuses and server apparatuses that update firmware.

DESCRIPTION OF SYMBOLS 10 ... Host computer, 20 ... Disk control apparatus, 21 ... Controller, 22 ... Disk, 110, 130 ... Control part, 120, 120A, 120B ... Instruction part, 111, 121, 121A, 121B, 131 ... Service processor, 112,132 ... Function firmware, 113, 123, 123A, 123B, 133 ... Guest OS, 114, 124, 124A, 124B, 134 ... Paravirtualized driver, 140 ... Hypervisor, 150 ...... Processor 151 151 Memory 152 External interface control circuit 153 Host interface control circuit 154 Disk interface control circuit 155 Inter-controller communication control circuit

Claims (4)

A hypervisor that provides a virtual machine environment to the computer;
First to third virtual machines operating in the virtual machine environment,
The first and second virtual machines are
It has a function to process data input / output requests sent from the host computer.
The third virtual machine is
After one of the first and second virtual machines is stopped and the other of the first and second virtual machines is in an operating state, an instruction is given to update the firmware of the one virtual machine. When the firmware of the virtual machine is updated and the processing of the data input / output request in the other virtual machine ends, the other virtual machine is brought into a stopped state and the one virtual machine is put into an operating state. An information processing apparatus characterized by that. A fourth virtual machine operating in the virtual machine environment,
The fourth virtual machine is
Instructing one of the first and second virtual machines to be in a stopped state and the other of the first and second virtual machines to be in an operating state, and then updating the firmware of the one virtual machine, When the firmware of one virtual machine is updated and the processing of the data input / output request in the other virtual machine is completed, the other virtual machine is stopped, the one virtual machine is turned on,
One of the third and fourth virtual machines is
The other of the third and fourth virtual machines is put into a stopped state, and the firmware of the other virtual machine is instructed to be updated. The information processing apparatus according to claim 1, wherein the virtual machine is in an operating state. A hypervisor that provides a virtual machine environment to the computer;
First and second virtual machines operating in the virtual machine environment,
The first and second virtual machines are
A function to process data input / output requests sent from the host computer;
After the other one of the first and second virtual machines is stopped and put into operation, it is instructed to update the firmware of the other virtual machine, the firmware of the other virtual machine is updated, An information processing apparatus, comprising: a function of bringing the other virtual machine into an operating state when the processing of the data input / output request is completed. A hypervisor that provides a virtual machine environment to a computer, and a control method for an information processing apparatus having first to third virtual machines that operate in the virtual machine environment,
A first step in which the first and second virtual machines process an input / output request for data transmitted from a host computer;
A second step in which the third virtual machine places one of the first and second virtual machines in a stopped state and the other of the first and second virtual machines in an operating state;
The third virtual machine instructs to update the firmware of the one virtual machine, the firmware of the one virtual machine is updated, and the processing of the data input / output request in the other virtual machine is completed And a third step of placing the other virtual machine in a stopped state and placing the other virtual machine in an operating state.

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