JP2011114311A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a method of manufacturing the same that suppress characteristic variation and characteristic variance of a semiconductor element and a semiconductor IC caused by moisture absorption and drying of a mold material. <P>SOLUTION: The present invention relates to the semiconductor device 1 and the method of manufacturing the same that specify a material which cancels stress of the mold material 103 as a material of a protective film 101 covering at least a part of the semiconductor element 104 resin-sealed with the mold material 103. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device in which a semiconductor element is resin-sealed with a mold material, and in particular, a semiconductor device having a protective film that alleviates the mechanical stress that the semiconductor element receives from the mold material at the time of manufacture and in a use environment, and It relates to the manufacturing method.

2. Description of the Related Art Conventionally, many semiconductor devices on which a semiconductor chip in which a semiconductor element or a semiconductor IC (hereinafter referred to as a semiconductor element) is mounted on a semiconductor substrate are hermetically sealed using a ceramic package, Or it is common to provide with the form of resin sealing (henceforth a plastic package) using a molding material (for example, epoxy resin). Among these, in particular, since the plastic package can be reduced in size and can be formed at a low price, many general-purpose semiconductor devices are provided in the form of plastic packages.
When assembling the plastic package semiconductor device, the semiconductor chip is placed in a mold, and the mold material softened at a high temperature is poured into the mold and then cooled and solidified.

  However, when the mold material is exposed to a high humidity environment, the mold material itself absorbs moisture, and the volume expansion of the mold material (volume expansion due to moisture absorption) occurs. Conversely, when the mold material is exposed to a dry environment, the amount of water in the mold material evaporates and decreases, resulting in volume shrinkage of the mold material (volume shrinkage due to drying). It is generally known that the mechanical stress applied to the semiconductor element is greatly changed by the volume change of the molding material.

In Non-Patent Document 1 and Non-Patent Document 2, due to moisture absorption and drying of the mold material, the piezo effect induced by the mechanical stress applied to the semiconductor element fluctuates, and the piezo effect varies for each plastic package. In other words, it is disclosed that characteristics of semiconductor elements and semiconductor ICs constituting a semiconductor chip largely fluctuate or vary.
However, a new mold material in which the volume variation of the mold material itself due to moisture absorption and drying of the mold material is suppressed has not been reported yet.

Therefore, semiconductor devices that relieve the mechanical stress applied to the semiconductor element from the mold material by inserting a protective film (passivation film) on the surface of the semiconductor chip are widely used.
As a material for the protective film, polyimide, PBO (polybenzoxazole), or the like is widely used.

D. Manic et al., 38th Annual International Revivability Physics Symposium, San Jose, California. 2000 A. Udo et al., IEEE Sensor Conference 2004, Vienna

However, in a semiconductor device manufactured using polyimide or PBO as the material of the protective film, the effect of relieving the stress due to the volume fluctuation of the mold material is not sufficient, and the characteristic fluctuation of the semiconductor element and the semiconductor IC and The effect of suppressing the variation could not be sufficiently expected.
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems of the prior art, and an object of the present invention is to provide a semiconductor device that suppresses characteristic fluctuations and characteristic variations of semiconductor elements and semiconductor ICs resulting from moisture absorption and drying of mold materials. And a method of manufacturing the same.

As a result of intensive research to solve the above-mentioned problems, the present inventor uses a material for a protective film that covers at least a part of a semiconductor chip that is resin-sealed with a molding material as a material that cancels out the stress of the molding material. It was found that the above-mentioned purpose can be achieved by specifying.
The present invention is based on the above knowledge obtained by the present inventor, and a semiconductor device according to claim 1 of the present invention for solving the above-described problems includes a semiconductor element, a protective film for protecting the semiconductor element, and at least the above-described A semiconductor device having a semiconductor element and a mold material for sealing the protective film,
The mold material is made of a material that expands by moisture absorption and shrinks by drying, and the protective film is made of a polyamide resin that cancels stress on the semiconductor element due to moisture absorption and drying of the mold material.

The semiconductor device according to claim 2 of the present invention is the semiconductor device according to claim 1, wherein the protective film covers the upper surface and side surfaces of the semiconductor element together with the electrode PAD electrically connected to the semiconductor element. It was formed as follows.
According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the protective film has a thickness of 1 to 20 μm.
According to a fourth aspect of the present invention, there is provided a semiconductor device according to any one of the first to third aspects, wherein the protective film includes a structure represented by the following structural formula (1) as a structural unit. It is characterized by being a polyamide resin in which the repeating number n of the formula (1) is in the range of 80 to 100% of the total number of all structural units constituting the polyamide resin.

  However, in Structural Formula (1), X is a trivalent organic group having 6 to 15 carbon atoms, m is 0 or 2, and Y is 4 having 6 to 35 carbon atoms when m = 0. Is a tetravalent organic group having 6 to 35 carbon atoms when m = 2, W is a divalent organic group having 6 to 15 carbon atoms, and l is 0. Or an integer of 1 or more, and (n + 1) is an integer of 2 to 150, and R1 may contain an element other than carbon, and the carbon having at least one radical polymerizable unsaturated bond is 5 to 20 Be aliphatic.

According to claim 5 of the present invention, in the semiconductor device according to claim 4, the protective film is a group in which R1 in the structural formula (1) is represented by the following structural formula (2). It is characterized by that.
However, in Structural Formula (2), R2 is a C4-C19 aliphatic group which has at least one radically polymerizable unsaturated bond group.

The semiconductor device according to claim 6 of the present invention is the semiconductor device according to claim 4, wherein in the protective film, R1 in the structural formula (1) has at least one (meth) acryloyloxymethyl group. It is a group.
The semiconductor device according to a seventh aspect of the present invention is the semiconductor device according to the fourth aspect, wherein the protective film has W, X, and Y in the structural formula (1) independently of each other an aromatic group, It is a group selected from the group consisting of an alicyclic group, an aliphatic group, a siloxane group, and a group of a composite structure thereof.

According to an eighth aspect of the present invention, in the semiconductor device according to the first or second aspect, the semiconductor element includes at least one of silicon and a compound semiconductor.
A semiconductor device according to a ninth aspect of the present invention is the semiconductor device according to the eighth aspect, wherein the compound semiconductor includes GaAs, InSb, InAs, and Al _x Ga _1-x As _y Sb _1-y (wherein x = 0 to 1, and y = 0 to 1).

According to a tenth aspect of the present invention, in the semiconductor device according to the eighth or ninth aspect, the compound semiconductor is doped with at least one of Si, Sn, Zn, and Pb. And
A semiconductor device according to an eleventh aspect of the present invention is the semiconductor device according to the first or second aspect, wherein the semiconductor element has at least one of a Hall element, a magnetoresistive effect element, a light receiving element, and a light emitting element. It is characterized by that.
According to a twelfth aspect of the present invention, in the semiconductor device according to the first or second aspect, the semiconductor element includes a silicon IC.

According to a thirteenth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, wherein a protective film is provided so as to cover an upper surface and a side surface of a semiconductor element formed on a semiconductor substrate together with an electrode PAD electrically connected to the semiconductor element. A protective film forming step to be formed;
A wiring process for connecting the lead frame and the electrode on the semiconductor element;
A semiconductor device manufacturing method including a sealing step of resin-sealing all of the semiconductor substrate, the semiconductor element, and the protective film and a part of the lead frame with a molding material,
The protective film and the molding material are made of a material that cancels out stress on the semiconductor element due to moisture absorption and drying.

The semiconductor device manufacturing method according to a fourteenth aspect of the present invention is the semiconductor device manufacturing method according to the thirteenth aspect, wherein the mold material is made of a material that expands by moisture absorption and contracts by drying. Is made of polyamide resin.
A method for manufacturing a semiconductor device according to claim 15 of the present invention is the method for manufacturing a semiconductor device according to claim 14, wherein the temperature at which the protective film is formed by sintering in the protective film forming step is 160 ° C. The temperature is 250 ° C. or less, and the thickness of the protective film after sintering is 1 to 20 μm or less.

  As described above, according to the present invention, the material that offsets the stress generated as a result of moisture absorption or drying of the molding material is applied to the protective film that covers at least a part of the semiconductor element. It is possible to provide a semiconductor device and a method for manufacturing the same that suppress variation in IC characteristics and variations in characteristics.

It is a cross-sectional schematic diagram which shows the structure in one Embodiment of the semiconductor device which concerns on this invention. It is a plane schematic diagram which shows the structure in one Embodiment of the semiconductor device which concerns on this invention. It is a cross-sectional schematic diagram which shows the manufacturing method in one Embodiment of the semiconductor device which concerns on this invention. It is a cross-sectional schematic diagram which shows the manufacturing method in one Embodiment of the semiconductor device which concerns on this invention. In the Example of the semiconductor device which concerns on this invention, it is a cross-sectional schematic diagram which shows the direction of the mechanical stress in each layer of a molding material and a protective film when a semiconductor device is exposed to a moisture absorption state. In the Example of the semiconductor device which concerns on this invention, it is a cross-sectional schematic diagram which shows the direction of the mechanical stress in each layer of a molding material and a protective film when a semiconductor device is exposed to a dry state. In the Example of the semiconductor device which concerns on this invention, the kind and magnitude | size of the stress applied to the active layer part of a semiconductor element are the graphs which showed correlation with the thickness of a molding material, and the thickness of a protective film. In the Example of the semiconductor device which concerns on this invention, it is a graph which shows the relationship between the film thickness of a protective film, and the fluctuation variation (deviation) of the unbalance voltage of a semiconductor element (Hall element). It is a cross-sectional schematic diagram which shows the structure in other embodiment of the semiconductor device which concerns on this invention. It is a cross-sectional schematic diagram which shows the structure in other embodiment of the semiconductor device which concerns on this invention. It is a plane schematic diagram which shows the structure in other embodiment of the semiconductor device which concerns on this invention. It is a plane schematic diagram which shows the structure in other embodiment of the semiconductor device which concerns on this invention. It is a plane schematic diagram which shows the structure in other embodiment of the semiconductor device which concerns on this invention.

Hereinafter, an embodiment of a semiconductor device according to the present invention will be described with reference to the drawings.
<Configuration>
FIG. 1 is a schematic cross-sectional view showing the configuration of an embodiment of a semiconductor device according to the present invention. FIG. 2 is a schematic plan view showing the configuration of an embodiment of a semiconductor device according to the present invention.
As shown in FIG. 1, in the semiconductor device 1 of the present embodiment, the lead frame 106 and the semiconductor chip 108 placed on the lead frame 106 expose the leading end portion (not shown) of the lead frame 106. In such a manner, it is sealed with the molding material 103.

[Semiconductor chip]
The semiconductor chip 108 includes a protective film 101, a metal wire 102, a semiconductor element 104, a semiconductor substrate 105, and an electrode PAD 107. On the semiconductor substrate 105, the semiconductor element 104 is formed in a substantially rectangular parallelepiped shape. The electrode PAD 107 is placed along the upper surface and the side surface of the semiconductor element 104 by electrically connecting the one end 107 a of the electrode PAD 107 to the semiconductor element 104. The protective film 101 exposes the other end 107 b of the electrode PAD 107 and covers a part of the electrode PAD 107 and the upper surface and side surfaces of the semiconductor element 104.
Examples of the semiconductor substrate 105 include semiconductor substrates such as a GaAs substrate, a Si substrate, a Sapphire substrate, and a SiC substrate. Further, the surface orientation of the semiconductor substrate 105 may be (111), (100), or any surface having an inclination within 7 degrees from the surface orientation.

  The semiconductor chip 108 may be provided as a hybrid product in which a semiconductor element chip and a silicon IC chip are assembled together. As a form of such a hybrid product, two or more semiconductor element chips and / or silicon IC chips may be arranged side by side on the lead frame 106, or two or more semiconductor element chips and / or silicon IC chips may be arranged. You may form by laminating | stacking up and down (thickness direction). Further, this laminated structure may be a flip chip structure in which electrical conduction between the electrodes PAD107 between the semiconductor element chips and / or silicon IC chips laminated using bumps, or the laminated semiconductor element chips and / or A structure in which the electrodes PAD107 between the silicon IC chips are connected to each other by the metal wire 102 to achieve electrical conduction may be employed.

[Semiconductor element]
The semiconductor element 104 is an electronic component having at least one of a semiconductor element and a semiconductor IC.
In addition, the semiconductor element 104 in this embodiment is a Hall element having a cross shape as shown in FIG. The semiconductor element 104 is completely covered with a protective film 101 similar in shape to the semiconductor element 104.
Although the semiconductor element 104 may use a semiconductor made of a single element such as Si (silicon), it is preferable to use a compound semiconductor made of a plurality of elements.

  Here, in a semiconductor device in which a semiconductor element (including a semiconductor IC) is a compound semiconductor, two groups belonging to different groups in the periodic table, such as a group III element and a group V element, or a group II element and a group VI element, are different. The active region as an electronic device is constituted by the above elements. Polarization based on the electronegativity inherent to each element is originally generated between each group III element and group V element, or between each group II element and group VI element. Sensitive to. When an external stress is applied, as a result, the characteristic variation of the semiconductor element and the semiconductor IC is induced, and the degree of influence is such that an active layer as an electronic device is composed of a single element of group IV. The polarizability between them tends to be larger than that of semiconductor elements and semiconductor ICs using silicon. In the present invention, even in a semiconductor element using a compound semiconductor, fluctuations in element characteristics due to fluctuations in external stress can be suitably suppressed.

When a compound semiconductor is used for the semiconductor element, the compound semiconductor includes GaAs, InSb, InAs, and Al _x Ga _1-x As _y Sb _1-y (where x = 0 to 1, y = 0 to 1). It is more preferable that at least one of these is included.
Here, the film thickness d ₁ (see FIG. 1) of the semiconductor element 104 when these compound semiconductors are used is preferably 10 μm or less, more preferably 0.2 μm or more and 4 μm or less, and 0.4 μm or more and 1 It is particularly preferable that the thickness is 5 μm or less.
The compound semiconductor is preferably doped with at least one of Si, Sn, Zn, and Pb.

[Electrode PAD]
One end 107 a of the electrode PAD 107 is electrically connected to an electrode (not shown) of the semiconductor element 104, and the electrode PAD 107 is installed along the upper surface and the side surface of the semiconductor element 104. The other end 107b of the electrode PAD107 is exposed from the protective film 101, and the one end 102a of the metal wire 102 is electrically connected. The other end 102 b of the metal wire 102 is electrically connected to the lead frame 106.

[Protective film]
The protective film 101 is formed so as to cover the upper surface and side surfaces of the semiconductor element 104 together with the electrode PAD107. That is, the semiconductor element 104 has its upper surface and side surfaces exposed from the semiconductor substrate 105 covered with a part including the protective film 101 and one end of the electrode PAD107.
The material of the protective film 101 is specified as a material that cancels out the stress of the mold material 103 that expands or contracts when exposed to a moisture absorption state and a dry state. That is, the material of the protective film 101 is a material that expands or contracts when the mold material 103 is exposed to a moisture absorption state and a dry state, and the stress to the semiconductor element 104 at that time. Based on this, it is specified that the material cancels the stress of the mold material 103 in the same state.

As the material of the protective film 101, when the mold material 103 is made of a material (for example, epoxy resin) that expands by moisture absorption and contracts by drying, it is preferable to use a polyamide resin.
The polyamide resin used as the material of the protective film 101 has a structure represented by the following structural formula (1) as a structural unit, and the repeating number n of the following structural formula (1) is the total number of all structural units constituting the polyamide resin. A polyamide resin in the range of 80 to 100% is preferable, and a polyamide resin having only a structure represented by the following structural formula (1) as a structural unit is particularly preferable. By using only the structure represented by the following structural formula (1) of the polyamide resin as the structural unit, the behavior of canceling the stress of the molding material 103 becomes uniform, and the characteristic variation and characteristic variation of the semiconductor element can be further reduced.

  However, in Structural Formula (1), X is a trivalent organic group having 6 to 15 carbon atoms, m is 0 or 2, and Y is 4 having 6 to 35 carbon atoms when m = 0. Is a tetravalent organic group having 6 to 35 carbon atoms when m = 2, W is a divalent organic group having 6 to 15 carbon atoms, and l is 0. Or an integer of 1 or more, and (n + 1) is an integer of 2 to 150, and R1 may contain an element other than carbon, and the carbon having at least one radical polymerizable unsaturated bond is 5 to 20 Be aliphatic.

Note that R1 in the structural formula (1) may be a group having at least one (meth) acryloyloxymethyl group.
In the structural formula (1), W, X, and Y are each independently a group selected from the group consisting of an aromatic group, an alicyclic group, an aliphatic group, a siloxane group, and a group of a composite structure thereof. It may be.

  Here, the polyamide resin used as the material of the protective film 101 may be a group in which R1 in the structural formula (1) is represented by the following structural formula (2). However, in Structural Formula (2), R2 is a C4-C19 aliphatic group which has at least one radically polymerizable unsaturated bond group.

Further, the temperature at which the polyamide film is formed by sintering as the protective film 101 is preferably 160 ° C. or higher and 250 ° C. or lower, more preferably 170 ° C. or higher and 220 ° C. or lower.
The thickness _{d 2} of the protective film 101 after sintering (see Fig. 1) is preferably from 1 to 20 [mu] m, more preferably 2～14Myuemu, 7.5 [mu] m is particularly preferred.
[Mold material]
The mold material 103 is a member that seals the lead frame 106 and the semiconductor chip 108 that is placed on the lead frame 106 and electrically connects the semiconductor element 104 and the lead frame 106 with the metal wire 102. An example of the mold material is an epoxy resin.

  Here, the mold material 103 is generally annealed at a high temperature for a predetermined time in order to stabilize and solidify the mold material 103 after the plastic package is assembled. The temperature at this time is preferably higher than the glass transition point at which the molding material is sufficiently sintered and solidified, and lower than the sintering temperature of the protective film 101. Specifically, the solidification temperature of the mold material 103 is preferably 175 ° C. or lower. If there is no problem in the solidification of the mold material 103 after the plastic package is formed, the curing temperature is preferably further reduced to 170 ° C. It is particularly preferable that the temperature is 165 ° C. or higher and 175 ° C. or lower, for example.

<Manufacturing method>
Next, a method for manufacturing a semiconductor device in the present embodiment will be described below with reference to the drawings.
FIG. 3A to FIG. 3E and FIG. 4A to FIG. 4C are schematic cross-sectional views showing a manufacturing method in an embodiment of a semiconductor device according to the present invention.
The manufacturing method of the semiconductor device according to the present embodiment includes at least a protective film forming step, a connecting step, and a sealing step, and includes a semiconductor chip forming step as a step performed before the protective film forming step. Further, a cutting step is performed between the protective film forming step and the connecting step.

[Semiconductor chip formation process]
The semiconductor chip forming process includes a semiconductor element forming process and an electrode PAD forming process.
The semiconductor element formation step is a step of forming the semiconductor element 104 on the semiconductor substrate 105 (see FIG. 3A).
As a method of forming the semiconductor element 104 on the semiconductor substrate 105, a molecular beam epitaxy (MBE) method in which a large number of compound semiconductor thin films are grown by irradiating the surface of the semiconductor substrate 105 with an element beam constituting the compound semiconductor thin film. Is mentioned. After a large number of compound semiconductor thin films are formed on the semiconductor substrate 105, the semiconductor element 104 is formed on the semiconductor substrate 105 by repeating the cleaning process, the lithography process, the etching process, and the deposition process.

Here, the formation of the semiconductor element 104 is not limited to the formation by MBE, but may be a thin film formation by MOCVD, or a layer having a different electrical conductivity from that of the semiconductor substrate 105 may be formed by ion implantation. To a predetermined depth (for example, about 1 μm) may be used instead.
The electrode PAD formation step is a step of placing the electrode PAD 107, which is electrically connected by bringing the semiconductor element 104 into contact with the one end 107a, along the upper surface and the side surface of the semiconductor element 104 (see FIG. 3B). . Examples of a method for forming the electrode PAD107 on the semiconductor element 104 and the semiconductor substrate 105 include a sputtering method and a vapor deposition method in which the material of the electrode PAD107 is Au, Pt, Ti, Ge, Ni.

[Protective film formation process]
The protective film forming step is a step of forming a protective film so as to cover the upper surface and the side surface of the semiconductor element formed on the semiconductor substrate together with the electrode PAD electrically connected to the semiconductor element (FIG. 3C )reference). That is, this step is a step of covering the semiconductor element 104 and the electrode PAD107 formed on the semiconductor substrate 105 with the protective film 101 so that the other end 107b of the electrode PAD107 is exposed in the above-described semiconductor chip formation step. is there. Specifically, first, a coating solution of a material for forming the protective film 101 is applied onto the semiconductor element 104, the semiconductor substrate 105, and the electrode PAD 107 by a spin coating method (see FIG. 3C). Then, exposure processing and development processing are performed on the protective film 101 to form the protective film 101 so as to cover the upper and side surfaces of the active layer of the semiconductor element 104 together with the electrode PAD 107 (see FIG. 3D).

After that, the semiconductor substrate 105 on which the semiconductor element 104, the electrode PAD107, and the polyamide film (protective film) 101 are formed in this way is exposed to, for example, a nitrogen atmosphere at 180 ° C. for about 2 hours, for example, in the protective film 101. At the same time as the remaining solvent is evaporated, the protective film 101 is sintered and solidified.
Here, the thickness d ₂ (see FIG. 1) of the protective film 101 after solidification is preferably 1 μm to 20 μm, more preferably 2 μm to 14 μm, and particularly preferably 7.5 μm.

[Cutting process]
The cutting step is a step in which a large number of semiconductor elements 104 formed on the semiconductor substrate 105 are cut by a dicing apparatus (not shown) and divided into individual semiconductor chips 108 (see FIG. 3E).
[Connection process]
The connecting step is a step of connecting the lead frame 106 and the other end 107b of the electrode PAD 107, and the lead frame 106 and the other end 107b of the electrode PAD 107 are connected by a known bonding method. Examples of the main component of the metal wire 102 include Au and Al.
[Sealing process]
The sealing step is a step of resin-sealing the semiconductor chip 108 after the connecting step with the mold material 103. That is, it is a step of resin-sealing the protective film 101, the semiconductor element 104, the semiconductor substrate 105, the electrode PAD 107 and a part of the lead frame 106 with the molding material 103.

Hereinafter, the present invention will be described more specifically by way of examples. However, the embodiments of the present invention are not limited to these examples.
Example 1
In this example, the semiconductor device 1 was manufactured by the following procedure.
[Semiconductor chip formation process]
First, as a semiconductor element formation process, a GaAs substrate is introduced as a semiconductor substrate 105 into a molecular beam epitaxy apparatus (VG 100 + MBE) as a film forming apparatus, and thermal annealing is performed at a temperature of about 600 ° C. to 700 ° C. As a result, the oxide film on the surface of the GaAs substrate 105 was removed to expose the surface of the GaAs single crystal.
Next, after removing the oxide film layer from the surface of the GaAs substrate 105, the substrate temperature is lowered, and then a beam of an element constituting the compound semiconductor thin film is irradiated to form a compound semiconductor thin film laminated structure as a GaAs / Al _x Ga _{1− x} As _y and the _{Sb 1-y / InAs / Al} x Ga 1-x As y Sb 1-y is about 1μm grown in total thickness.

Next, the GaAs substrate 105 is taken out from the film forming apparatus, and the cleaning process, the lithography process, the etching process, and the deposition process are repeated, and the electrically active layer functioning as an electronic device as shown in FIG. A Hall element (semiconductor element) 104 having a cruciform structure parallel to the surface was formed (see FIG. 3A).
Next, as the electrode PAD formation step, a number of Hall elements 104 each having an Au / Ti structure electrode PAD 107 attached are formed on the GaAs substrate 105 in the vicinity of each cross-shaped apex of the Hall element 104 (FIG. 3B). reference).

[Protective film formation process]
Next, as a material for the protective film 101, a coating liquid for forming a protective film (polyamide resin coating liquid) was prepared according to the following formulation.
・ Polyamide shown in the following structural formula (3): 70 wt%
・ Solvent: N-methylpyrrolidone ... 30wt%

  Next, a coating solution for forming a protective film was applied on the GaAs substrate 105 by a spin coating method to form a polyamide resin layer 101a (see FIG. 3C). The polyamide resin layer 101a is exposed by an exposure device and developed, and then a polyamide film (protective film) 101 is formed so as to cover the upper and side surfaces of the cross-shaped active layer of the Hall element 104 (FIG. 2). And FIG. 3 (d)).

Thereafter, the GaAs substrate 105 on which the semiconductor element 104, the electrode PAD107, and the polyamide film (protective film) 101 are formed as described above is exposed to a nitrogen atmosphere at 180 ° C. for about 2 hours to leave a residual solvent in the polyamide film 101. At the same time, the polyamide film 101 was sintered and solidified. The film thickness d ₂ (see FIG. 1) of the polyamide film 101 after the sintering and solidification was 7.5 μm.

[Cutting process]
Next, a number of Hall elements 104 formed on the semiconductor substrate 105 were cut by a dicing apparatus (not shown) and divided into individual semiconductor chips 108 (see FIG. 3E).
[Connection process]
Next, the semiconductor chip 108 is fixedly laminated on the lead frame 106 (see FIG. 4A), and the electrode PAD 107 and the lead frame 105 on the semiconductor chip 108 are electrically connected by a known bonding method using the metal wire 102. (See FIG. 4 (b)). At this time, the main component of the metal wire 102 was Au or Al.

[Sealing process]
Next, the semiconductor chip 108 and the lead frame 106 that are integrally fixed are introduced into the mold, and a mold material 103 that is a raw material for the plastic package is poured into the mold, so that the Hall element 104, the semiconductor substrate 105, The lead frame 106, the electrode PAD 107, and the metal wire 102 were covered and sealed with a molding material 103 (see FIG. 4C). At this time, an epoxy resin (CV4180, manufactured by Panasonic Electric Works Co., Ltd.) was used as the mold material 103.
Next, mold curing for solidifying and stabilizing the mold material 103 was performed at a temperature of about 175 ° C. for 2 hours.
With the above procedure, the semiconductor device 1 having a Hall element as the semiconductor element 104 was obtained.

(Comparative Example 1)
A semiconductor device 1 was manufactured in the same manner as in Example 1 except that polyimide was used as the protective film-forming coating solution in Example 1. In addition, the coating liquid for protective film formation was prepared with the following prescription.
・ Polyimide shown in the following structural formula (4): 70 wt%
・ Solvent: N-methylpyrrolidone ... 30wt%

(Comparative Example 2)
A semiconductor device 1 was produced in the same manner as in Example 1 except that polybenzoxazole (PBO) was used as the protective film-forming coating solution in Example 1. In addition, the coating liquid for protective film formation was prepared with the following prescription.
・ Polybenzoxazole (PBO) shown in the following structural formula (5): 70 wt%
・ Solvent: γ-Butyllactone ... 30wt%

<Evaluation>
Among important electrical characteristics of the Hall element, there is a so-called unbalanced voltage in which a slight output voltage signal is generated under a condition where no magnetic field is applied. The mechanism of the occurrence of this unbalanced voltage has not yet been fully elucidated and is said to be caused by various factors. The main cause of this unbalanced voltage generation is mechanical stress from the mold material, hole Examples include interface states near the surface of the element active layer, crystal defects in the Hall element active layer, and the like.

In particular, in the Hall element assembled in a plastic package, the effect of the mechanical stress change due to the volume expansion and contraction of the mold material itself due to moisture absorption and drying of the mold material is particularly significant, due to the difference in use environment, Even with the same chip, the unbalanced voltage fluctuates greatly. For this reason, the S / N of the output of the Hall element and the hybrid product combining them with the semiconductor IC is remarkably deteriorated, and the reliability of the product is remarkably lowered.
Therefore, the semiconductor devices manufactured in Example 1, Comparative Example 1 and Comparative Example 2 were subjected to a test that was continuously exposed to dry conditions and moisture absorption conditions, and fluctuations in the unbalanced voltage before and after these tests. In particular, the variation in the amount of fluctuation of the unbalanced voltage was evaluated.

[Hygroscopic drying test]
In the moisture absorption drying test, the semiconductor devices manufactured in Example 1, Comparative Example 1 and Comparative Example 2 were first left in an oven at 125 ° C. for 24 hours, and then 146 hours in an 85 ° C. and 85% humidity environment. It was allowed to stand, and finally, it was thrown into the oven at 260 ° C. for 10 seconds only three times. Table 1 summarizes the variation between the elements in the fluctuation of the unbalanced voltage before and after the series of tests.

  As is clear from the standard deviation of the fluctuation value of the unbalanced voltage shown in Table 1, Comparative Example 1 to which a polyimide film used as a general protective film (passivation film) is applied, and Comparative Example to which PBO is applied In the semiconductor device of FIG. 2, the standard deviation of the fluctuation range of the unbalanced voltage before and after the moisture absorption drying test (N number is 242 chips each) was 0.56 mV and 0.60 mV, respectively. In the applied semiconductor device of Example 1, it can be seen that the standard deviation of the fluctuation range of the unbalanced voltage is greatly improved to 0.16 mV. That is, in the semiconductor devices of Comparative Example 1 and Comparative Example 2, it is clear that the variation in the semiconductor elements is about four times worse than the variation in the semiconductor device of Example 1, and therefore, in the semiconductor device of Example 1. It is suggested that the polyamide film can be more effectively suppressed than the polyimide film or the PBO film in the semiconductor device of Comparative Example 1 or Comparative Example 2.

[Residual stress on semiconductor substrate]
Here, in order to investigate the mitigation mechanism of external mechanical stress by the polyamide film used in the present invention, a wafer (Example 2) in which a polyamide film having a film thickness of 9.5 μm is applied and formed on the entire surface of the GaAs substrate, A wafer (Comparative Example 3) having a polyimide film coated and formed on the entire surface of a GaAs substrate is manufactured, and a moisture absorption drying test similar to that described above is performed, and the amount of warpage of each wafer is measured at each time of moisture absorption and drying. Then, the change tendency of the residual stress to each wafer was evaluated. At this time, the residual stress evaluation on each wafer was measured and calculated using a warpage measuring machine (FSM8800, manufactured by FSM) that measures the amount of warpage of each wafer from optical reflection. The results are shown in Table 2.

As shown in Table 2, the residual stress of the wafer of Comparative Example 3 using a polyimide film is almost constant even if both moisture absorption and drying are performed individually after the polyimide film is sintered.
Therefore, in a semiconductor device (corresponding to the semiconductor device of Comparative Example 1) in which a Hall element formed with a polyimide film is assembled with a plastic package using a mold material, the residual stress resulting from the formation of the polyimide film causes the moisture absorption of the mold material and It can be seen that since mechanical stress due to drying is simply added, the effect of alleviating mechanical stress due to moisture absorption and drying of the mold material is not fully exhibited.

  On the other hand, the wafer of Example 2 using a polyamide film differs from the behavior of a general polymer material in that the residual stress is increased due to the shrinkage of the polyamide film due to moisture absorption at 85 ° C. and 85% from Table 2. it is obvious. Further, when the polyamide film shrunk by moisture absorption was subjected to rapid drying at 260 ° C. for 10 seconds three times, the polyamide film expanded and the residual stress decreased. This is a completely opposite behavior to volume expansion due to moisture absorption of the mold material and volume shrinkage due to drying of the mold material.

Hereinafter, the behavior of moisture absorption and drying of the molding material and the protective film will be described with reference to the drawings.
FIG. 5 is a schematic cross-sectional view showing the direction of mechanical stress in the mold material, the protective film, and each layer when the semiconductor device is exposed to a moisture absorption state in this embodiment. FIG. 6 is a schematic cross-sectional view showing the direction of mechanical stress in the mold material, the protective film, and each layer when the semiconductor device is exposed to a dry state in this embodiment.

As shown in FIG. 5, in the semiconductor device (corresponding to the semiconductor device of the first embodiment) in which the Hall element 104 formed with the polyamide film 101 is sealed with the molding material 103, the molding material is exposed to a moisture absorbing environment. 103 expands in the direction of the arrow 110, but the polyamide film 101 formed between the Hall element 104 and the mold material 103 contracts in the direction of the arrow 111. As a result, the mold material 103 and the polyamide film 101 are mutually connected. The stress is offset and the stress applied to the Hall element 104 can be effectively offset / suppressed. This mechanism of stress cancellation is the same as described above even under dry conditions.
Specifically, as shown in FIG. 6, the volume shrinkage due to drying of the molding material 103 (arrow 110 in FIG. 6) and the expansion direction of the polyamide film 101 (arrow 111 in FIG. 6) are caused. It can be seen that the two stresses cancel each other, and as a result, the stress applied to the Hall element 104 can be effectively suppressed.

Next, the thickness of the molding material, and the thickness d ₂ of the protective layer will be described with reference to the drawings the relationship between stress applied to the active layer of the semiconductor device.
FIG. 7 shows, in this example, the type and magnitude of stress applied to the active layer portion of the semiconductor element, the thickness D of the mold material (see FIG. 1), and the thickness d _{2 of the} protective film (see FIG. 1). It is the graph which showed correlation with. In FIG. 7, an arrow 121 indicates an image line of the magnitude and direction of stress applied to the semiconductor element 104 by the protective film 101, and an arrow 122 indicates an image of the magnitude and direction of stress applied to the semiconductor element 104 by the molding material 103. An arrow 123 indicates an image line representing the magnitude and direction of the mechanical stress that will actually be applied to the semiconductor element 104 due to the cancellation of the mechanical stress between the arrows 121 and 122. Indicates.

As shown in FIG. 7, the mechanical stress canceling relationship includes a mechanical stress 122 that depends on the thickness D (see FIG. 1) of the mold material 103 and a mechanical stress 123 that depends on the film thickness d _{2 of the} polyamide 101. Have a close relationship with. As described above, the mechanical stress from the mold material 103 that changes according to the use environment and the mechanical stress due to the polyamide film 101 have opposite directions, and as a result, the dynamics applied to the semiconductor element 104. The mechanical stress is 123, which is the difference between 121 and 122. That is, the correlation between the film thicknesses of the polyamide film 101 and the mold material 103 is important.

To support this, the thickness _{d 2} of the polyamide membrane 101 used in the present invention 7.5 [mu] m, 9.5 .mu.m, 14 [mu] m and varied, under the conditions in which the thickness D of the molding material 103 is constant, drying the aforementioned -A moisture absorption test was conducted. 8, a thickness d ₂ of the polyamide film 101 in the test before and after is a graph showing the relationship between the semiconductor element unbalanced voltage Vu of fluctuation dispersion of (Hall element) (deviation). The results shown in FIG. 8 also support the explanation of the mechanical stress canceling relationship.

  From the above results, according to the semiconductor device of the present invention in which the material of the protective film is specified as the material that cancels the stress of the mold material and the manufacturing method thereof, after assembling each chip of the semiconductor element and the semiconductor IC as a plastic material In addition, it is possible to effectively suppress the stress caused by the molding material caused by changes in the usage environment such as moisture absorption and drying from affecting the active layer as each electronic device of the semiconductor element and the semiconductor IC. It was proved that the characteristic reliability of the IC can be improved.

(Other embodiments)
Hereinafter, other embodiments of the semiconductor device according to the present invention will be described with reference to the drawings.
9 to 13 are schematic views showing other embodiments of the semiconductor device according to the present invention, respectively.
The semiconductor device according to the present invention may be configured as shown in each of FIGS. In the following description, description of the same configuration as in the above embodiment is omitted. 11 to 13, the formation region of the protective film 101 is indicated by hatching. The protective film 101 having a shape as shown in FIGS. 9 to 13 is formed by appropriately adjusting the exposure process and the development process in the protective film forming process described above.

First, the semiconductor device 1 shown in FIG. 9 is different from the above-described embodiment in that the electrode PAD107 is formed on the upper surface of the semiconductor element 104 (see FIG. 1). That is, in this embodiment, it is shown that a part of the upper part and the side surface of the semiconductor element 104 other than the electrode PAD 107 are covered with the protective film 101.
Further, the semiconductor device 1 shown in FIG. 10 is different from the above embodiment in that the side surface of the semiconductor element 104 is not covered with a protective film (see FIG. 9). In other words, this embodiment shows that a part of the upper portion of the semiconductor element 104 is covered with the protective film 101.

Further, the semiconductor device 1 shown in FIG. 11 is different from the above embodiment in that the semiconductor element 104 is completely covered with the protective film 101 having an octagonal shape. Here, the shape of the protective film 101 is not limited to an octagon, and may be a polygon that completely covers the semiconductor element 104.
Further, the semiconductor device 1 shown in FIG. 12 is different from the above embodiment in that the semiconductor element 104 is completely covered with a protective film 101 having a circular shape. Here, the shape of the protective film 101 is not limited to a complete circle, and may be an ellipse as long as the semiconductor element 104 is completely covered.
In addition, the semiconductor device 1 illustrated in FIG. 13 includes the upper surface and side surfaces of almost all the semiconductor elements 104 except the part including the other end 107 of the electrode PAD 107 in the semiconductor substrate 105 including the semiconductor elements 104 and the upper surface of the semiconductor substrate 105. Is different from that of the above-described embodiment.

  In the present invention, a semiconductor element formed on a semiconductor substrate and a chip of a semiconductor IC or a combination of both chips are assembled as a plastic package, and a mold material which is a constituent material of the plastic package is changed due to a change in usage environment. The present invention relates to a structure and a manufacturing method capable of suppressing the mechanical stress generated by moisture absorption and drying from being applied to each chip of a semiconductor element and a semiconductor IC packed in a plastic package. In addition, it is possible to suppress fluctuations in characteristics of the semiconductor element and the semiconductor IC after use under high dry conditions. As a result, a significant improvement in the reliability of the electrical characteristics of the semiconductor element and the semiconductor IC can be expected.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 101 Protective film 102 Metal wire 103 Mold material 104 Semiconductor element 105 Semiconductor substrate 106 Lead frame 107 Electrode PAD
108 Semiconductor chip

Claims (15)

A semiconductor device having a semiconductor element, a protective film for protecting the semiconductor element, and a mold material for sealing at least the semiconductor element and the protective film,
The mold material is made of a material that expands by moisture absorption and shrinks by drying, and the protective film is made of a polyamide resin that offsets stress on the semiconductor element due to moisture absorption and drying of the mold material. apparatus.   The semiconductor device according to claim 1, wherein the protective film is formed so as to cover an upper surface and a side surface of the semiconductor element together with an electrode PAD electrically connected to the semiconductor element.   The semiconductor device according to claim 1, wherein the protective film has a thickness of 1 to 20 μm. The protective film has a structure represented by the following structural formula (1) as a structural unit, and the repeating number n of the following structural formula (1) is in the range of 80 to 100% of the total number of all structural units constituting the polyamide resin. The semiconductor device according to claim 1, wherein the semiconductor device is a polyamide resin.
However, in Structural Formula (1), X is a trivalent organic group having 6 to 15 carbon atoms, m is 0 or 2, and Y is 4 having 6 to 35 carbon atoms when m = 0. Is a tetravalent organic group having 6 to 35 carbon atoms when m = 2, W is a divalent organic group having 6 to 15 carbon atoms, and l is 0. Or an integer of 1 or more, and (n + 1) is an integer of 2 to 150, and R1 may contain an element other than carbon, and the carbon having at least one radical polymerizable unsaturated bond is 5 to 20 Be aliphatic.

The semiconductor device according to claim 4, wherein the protective film is a group in which R 1 in the structural formula (1) is represented by the following structural formula (2).
However, in Structural Formula (2), R2 is a C4-C19 aliphatic group which has at least one radically polymerizable unsaturated bond group.

  5. The semiconductor device according to claim 4, wherein R 1 in the structural formula (1) is a group having at least one (meth) acryloyloxymethyl group.   In the protective film, W, X, and Y in the structural formula (1) are each independently selected from the group consisting of an aromatic group, an alicyclic group, an aliphatic group, a siloxane group, and a composite structure group thereof. The semiconductor device according to claim 4, wherein the semiconductor device is a group to be formed.   The semiconductor device according to claim 1, wherein the semiconductor element includes at least one of silicon and a compound semiconductor. The compound semiconductor includes at least one of GaAs, InSb, InAs, and Al _x Ga _1-x As _y Sb _1-y (where x = 0 to 1, y = 0 to 1). The semiconductor device according to claim 8.   The semiconductor device according to claim 8 or 9, wherein the compound semiconductor is doped with at least one of Si, Sn, Zn, and Pb.   The semiconductor device according to claim 1, wherein the semiconductor element includes at least one of a Hall element, a magnetoresistive effect element, a light receiving element, and a light emitting element.   The semiconductor device according to claim 1, wherein the semiconductor element is a hybrid IC having a silicon IC. A protective film forming step of forming a protective film so as to cover the upper surface and the side surface of the semiconductor element formed on the semiconductor substrate together with the electrode PAD electrically connected to the semiconductor element;
A wiring process for connecting the lead frame and the electrode on the semiconductor element;
A semiconductor device manufacturing method including a sealing step of resin-sealing all of the semiconductor substrate, the semiconductor element, and a protective film and a part of the lead frame with a molding material,
The method for manufacturing a semiconductor device, wherein the protective film and the mold material are made of a material that cancels out stress on the semiconductor element due to moisture absorption and drying.   14. The method of manufacturing a semiconductor device according to claim 13, wherein the mold material is made of a material that expands by moisture absorption and shrinks by drying, and the protective film is made of a polyamide resin.   The temperature at which the protective film is formed by sintering in the protective film forming step is 160 ° C. or higher and 250 ° C. or lower, and the thickness of the protective film after sintering is 1 to 20 μm. The method for manufacturing a semiconductor device according to claim 14.

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