JP2011109887A - Indirect matrix converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an indirect matrix converter capable of avoiding an increase of cost of a control circuit by simplifying control processing of an inverter circuit. <P>SOLUTION: In the indirect matrix converter, by generating a converter-side carrier WAV2 in reference to an inverter-side carrier WAV1, processing for generating the inverter-side carrier WAV1 is minimized in the inverter circuit 170, and another control processing for controlling the inverter circuit 140 is effectively assigned via the inverter circuit 170. There is more room for hardware resources in a converter control circuit 120 than in the inverter control circuit 170, although generation processing of the converter-side carrier WAV2 becomes complex, so that control processing required by the converter circuit 120 can be assigned. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an indirect matrix converter including a DC link unit between a converter circuit (rectifier circuit) and an inverter circuit, and more particularly to an indirect matrix converter including an active snubber circuit in the DC link unit.

  In recent years, research on direct matrix converters that directly convert commercial AC power to other AC power has been underway. The direct matrix converter has an advantage that a large electrolytic capacitor is not required because an energy buffer is not required. On the other hand, since the direct matrix converter does not have a DC link unit, there is a demerit such as complicated wiring and an increase in the number of parts if another power conversion circuit is added between the power source and the load. .

  In view of this, an indirect matrix converter having a DC link portion between a converter circuit (rectifier circuit) and an inverter circuit has been studied today. A matrix converter including a direct current link unit, that is, an indirect matrix converter, does not require an energy buffer composed of a large electrolytic capacitor, like the direct matrix converter. Further, since the direct link converter is provided with a DC link unit, it becomes easy to link a power conversion circuit such as an active snubber circuit to the DC link unit, and the number of parts associated with the addition of the power conversion circuit increases. Increase is also minimized.

  JP 2004-266972 A (Patent Document 1) introduces an example of an AC-AC power converter (an indirect matrix converter in the claims). The AC-AC power converter includes a PWM rectifier (converter circuit in claims), a DC link unit, a PWM inverter (inverter circuit in claims), and a control circuit that controls the converter circuit and the PWM inverter. It has. The control circuit generates a carrier (hereinafter referred to as converter-side carrier wave) used for control on the converter side, compares the input current command with the converter-side carrier wave, and generates a PWM signal for controlling the converter circuit. Further, the control circuit generates a new carrier (inverter side carrier wave) based on a comparison value between the input current command and the converter side carrier wave, and compares the output voltage command and the inverter side carrier wave, thereby the inverter circuit. The PWM signal for controlling is controlled. That is, in the technique according to Patent Document 1, the inverter-side carrier wave is generated based on the converter-side carrier wave.

  In addition, by developing such an indirect matrix converter, a snubber circuit is connected to the DC link unit, and a regenerative current generated by the load is absorbed by a snubber capacitor, or an active snubber circuit is connected to the DC link unit to load A technique is known in which the regenerative current generated in step 1 is absorbed by a snubber capacitor and the electric charge of the snubber capacitor is periodically discharged.

  The description of "Control method of multi-power interconnection system using active snubber of indirect matrix converter" in the IEEJ Technical Committee document (Non-patent Document 1) specifies the discharge timing of active snubber circuit based on converter side carrier wave A control method is introduced. In this control method, the time when the discharge of the battery of the active snubber circuit is permitted to discharge and the time when the discharge of the capacitor is not permitted coexist in one cycle of the converter-side carrier wave. The waveform on the inverter side carrier wave is formed on the basis of the converter side carrier wave. However, since the waveform forming method is the same as that of Patent Document 1, description thereof will be omitted.

  As shown in FIG. 16, the control circuit that controls the active snubber circuit generates a DUTY command value W that defines the discharge timing of the battery, and compares it with the converter-side carrier wave WAV2. In this figure, Vb is the battery voltage, Vin is the voltage output from the converter circuit (rectifier circuit), Db is the total discharge DUTY of the battery voltage for the snubber circuit, Drec is the input time from the converter circuit, and Edc is the carrier wave. It shows the average voltage within one period. Such a control circuit defines a period in which the converter side carrier wave WAV2 is larger than the DUTY command value W as a DUTY period of the active snubber circuit. And the said control circuit will drive the power transistor of an active snubber circuit at a desired DUTY timing by shape-outputting the rectangular wave corresponding to the obtained DUTY timing, and will discharge the battery of the said circuit. Therefore, in the control circuit, the DUTY command value W is generated so that a desired average voltage Edc is obtained, and in accordance with this, the period of discharging the battery of the active snubber circuit within one cycle of the carrier wave, and the converter circuit ( The period during which power is supplied only from the rectifier circuit) is defined, and a desired DC voltage is generated at the DC link unit (immediately before the inverter circuit).

JP 2004-266972 A Yasushi Kato and Junichi Ito, “Control Method of Multi-Power Interconnection System Using Active Snubber of Indirect Matrix Converter”, IEEJ Technical Report, SPC-09-80, P1-P4, March 2009

  In general, the control processing of the inverter circuit takes a complicated processing configuration as compared with the control processing in the converter circuit, and when trying to execute complicated control such as vector control, the hardware resources allocated in advance are effectively used. If it is not assigned, it is difficult to realize the control process. Here, in the technique according to Patent Document 1, since the inverter-side carrier wave is generated with reference to the converter-side carrier wave, when trying to control the phase current flowing through the load (synchronous motor or the like) to a stable sine wave, The waveform of the inverter-side carrier wave becomes complicated, and accordingly, further control processing is required for the inverter circuit, and a desired control processing cannot be realized with a control circuit (such as a microcomputer) sold as a commercial product. Problems arise.

  Further, in order to avoid such a problem, if a programmable logic device capable of realizing a desired logical operation by a program is incorporated in the control circuit of the inverter circuit, it becomes possible to realize a complicated control process. However, since the programmable logic device itself is an expensive electronic device, there arises a problem that the cost of the entire apparatus increases. A typical example of a programmable logic device is an FPGA (Field Programmable Gate Array).

  In view of the above problems, an object of the present invention is to provide an indirect matrix converter that can simplify control processing of an inverter circuit and avoid cost increase of the control circuit.

In order to solve the above problems, the present invention has the following indirect matrix converter configuration. That is, a converter circuit that converts AC power and outputs DC power to a DC link unit at a subsequent stage, an input voltage detection unit that detects a voltage value of the AC power, a converter control circuit that controls the converter circuit, and the DC An inverter circuit that receives electric power and converts it into AC power used in a load; and an inverter control circuit that controls the inverter circuit,
The converter control circuit generates a converter carrier used in the converter control circuit based on the inverter carrier generated in the inverter control circuit.

In the present invention, the following indirect matrix converter may be used. That is, a converter circuit that converts AC power and outputs DC power to a DC link unit at a subsequent stage, an input voltage detection unit that detects a voltage value of the AC power, a converter control circuit that controls the converter circuit, and the DC An inverter circuit that receives electric power and converts it into AC power used by a load, an inverter control circuit that controls the inverter circuit, an active snubber circuit connected in parallel to the DC link unit, and the active snubber circuit A snubber control circuit for controlling the discharge of charges,
The converter control circuit generates a converter carrier wave used in the converter control circuit based on the inverter carrier wave generated by the inverter control circuit,
The snubber control circuit includes period selection means for selecting an operation of the active snubber circuit in correspondence with an element period of an inverter carrier wave used in the inverter circuit, and discharge for allowing discharge of the charge in a predetermined element period. And a permission unit.

  Preferably, the converter control circuit feed-forward-controls the output voltage to the DC link unit based on the voltage value received from the input voltage detection unit.

  Preferably, the load is a compressor motor used in an outdoor unit of an air conditioner.

  According to the indirect matrix converter of the present invention, by generating the converter-side carrier wave based on the inverter-side carrier wave, the inverter control circuit can minimize the process of generating the inverter-side carrier wave, and control the inverter circuit. Therefore, another control process is effectively assigned by the inverter control circuit. In the converter control circuit, the converter side carrier wave generation process is complicated. However, since there is a surplus of hardware resources compared to the inverter control circuit, the control process required by the converter circuit can be assigned.

  Further, since it is not necessary to use an expensive electronic device such as a programmable logic device, it is possible to suppress an increase in cost of the apparatus.

The figure which shows the structure of the indirect matrix converter which concerns on embodiment. The figure which shows the specific structure of the indirect matrix converter which concerns on embodiment. The figure which shows the structure of the voltage detection means which concerns on embodiment. The figure which shows the structure of the other voltage detection means which concerns on embodiment. The figure which shows the functional block of the control part which concerns on embodiment. The timing chart which shows each carrier and each signal. The flowchart which shows the processing operation of a snubber control circuit. A waveform showing an initial U-phase current when V / F control is started. The waveform which shows the voltage value of the snubber capacitor at the beginning of V / F control. The waveform which shows the U-phase electric current when V / F control is performed stably. The waveform which shows the voltage value of a snubber capacitor when V / F control is performed stably. The waveform which shows the U-phase current at the time of synchronous operation control. Waveform indicating the voltage value of the snubber capacitor during synchronous operation control. The figure which shows the specific structure of the indirect matrix converter which concerns on another Example. The figure which shows the structure of the active snubber circuit which concerns on another Example. The discharge timing of the capacitor | condenser of the active snubber circuit which concerns on a prior art example.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. As shown in FIG. 1, the indirect matrix converter 100 includes a filter circuit 110 connected to a commercial power source AC, an input voltage detection unit SEN1 that detects a voltage value of the commercial power source AC, a converter circuit 120, and an active snubber circuit 130. A voltage detection means 180 provided in the active snubber circuit, an inverter circuit 140, a current detector SEN2 that detects a current supplied from the inverter circuit 140 to the load M, a converter control circuit 150, and a snubber control The circuit 160 and the inverter control circuit 170 are comprised.

  FIG. 2 shows these configurations more specifically. However, the indirect matrix converter 100 shown in FIG. 2 is only one embodiment of the scope of claims, and the scope of claims should not be construed as being limited by the same figure.

  The commercial power supply AC is three-phase AC power supplied from a power plant or the like, and terminals are provided corresponding to the R phase, the S phase, and the T phase, respectively. The three-phase voltage and current are given a predetermined phase difference.

  The filter circuit 110 includes an LC circuit in each input power supply line. The voltage detection unit SEN1 is provided with a signal line, and the converter control circuit 150 is connected to the other end of the signal line to detect the interphase voltage of the power supply line of each phase.

  The converter circuit 120 includes three power transistors 122 to 124 connected in parallel and a diode appropriately connected to the power transistors 122 to 124. The power transistor and the diode constitute three arm portions and are connected in parallel between the high side line and the low side line. In each of the arm portions, a power transistor is arranged so that a passing current flows from the low-side line to the high-side line, and current is supplied to the high-side line through the power supply line by four surrounding diodes, and The current flowing in the low side line is returned to the other power supply line. Then, the power transistors 122 to 124 are appropriately switched to convert the AC power and output the DC power to the DC link section at the subsequent stage. In such a DC link unit, the voltage value is controlled to be substantially constant according to the operation of the inverter circuit. Note that a freewheeling diode 121 is connected in parallel to the DC link unit as necessary.

  As shown in the figure, the active snubber circuit 130 is connected in parallel to the DC link section at the rear stage of the converter circuit. More specifically, the active snubber circuit 130 is stored in the snubber capacitor 133, the snubber diode 132 connected in the forward direction from the high side line toward the snubber capacitor 133, and connected in parallel to the snubber diode. And a snubber transistor 131 that intermittently discharges the charged charges to the high side line.

  In the active snubber circuit 130, when regenerative power is generated in the load, a current generated thereby is guided to the snubber capacitor 133 via the snubber diode 131, and the snubber capacitor 133 accumulates electric charge along with the regenerative current. . However, in this embodiment, since the synchronous motor is used as a load, the regenerative current is temporarily generated. Thereafter, when the drive signal Snb is output from the snubber control circuit 160, the snubber transistor 131 is turned on according to the waveform of the signal, and the discharge of the snubber capacitor 133 is permitted. The timing of the drive signal output from the snubber control circuit 160 will be described in detail later.

  The inverter circuit 140 is connected to the subsequent stage of the DC link unit having the active snubber circuit 130, and includes a current detection unit SEN2 on the output side. As shown in the figure, the inverter circuit 140 is wired such that a plurality of power transistors 141 to 146 form a voltage-type three-phase inverter, and the contact portions of each arm are connected to the load M via the wires Lu to Lw. In addition, a diode is connected in parallel to each of the power transistors 141 to 146 in the direction opposite to the current that flows during energization. As is well known, in the inverter circuit 140, the power transistors 141 to 146 are appropriately driven and controlled by the PWM signal Si output from the inverter control circuit 170, and the DC power of the DC link unit is converted to three-phase AC power by PWM control. Convert it.

As the load M, a permanent magnet synchronous motor is used in the present embodiment. The permanent magnet synchronous motor refers to a PM (Permanent Magnet Synchronous Motor) in which a permanent magnet is used as a rotor, and includes a SPM (Surface Permanent Magnet Motor), an IPM (Interior).
Permanent Magnet Motor) and the like, and refers to a motor that is operated synchronously by a controlled rotating magnetic field. However, the load M is not limited to this, and an induction motor having a low power factor can also be used.

  In the present embodiment, a control circuit CNT made of a one-chip semiconductor in which the converter control circuit 150, the active snubber circuit 160, and the inverter circuit are integrated on the same semiconductor is used. However, in the indirect matrix converter according to the claims, the converter control circuit 150, the active snubber circuit 160, and the inverter circuit 170 are not limited to the form shown in the figure, and semiconductor circuits independent from each other may be used. . That is, the control circuit CNT does not ask whether it is a monolithic IC or a hybrid IC. The control circuit CNT constitutes a CPU, a memory circuit, a clock circuit, and the like, and predetermined arithmetic processing is performed according to a control program.

  Converter control circuit 150 generates and outputs drive signal Sr based on the voltage value received from input voltage detection unit SEN1, and drives and controls power transistors 122-124. The converter carrier wave used in the converter control circuit 150 is generated based on the inverter carrier wave generated by the inverter control circuit 170.

  The snubber control circuit 160 generates and outputs the drive signal Snb based on the voltage value of the snubber capacitor 133 and controls the drive of the snubber transistor 131. Thereby, the snubber control circuit 160 controls the discharge of the electric charge accumulated in the internal element (snubber capacitor) of the active snubber circuit 130. The generation of the drive signal for the snubber transistor 131 will be described in detail later.

  The inverter control circuit 170 generates and outputs the drive signal Si based on the current value received from the output current detection unit SEN2, and drives and controls the power transistors 141 to 146.

  The voltage detection unit 180 is inserted in a wiring connecting the snubber capacitor 133 and the snubber control circuit 160, detects a voltage generated in the snubber capacitor 133, and outputs information related to the voltage to the snubber control circuit 160. FIG. 3 specifically shows an example of the voltage detection means 180. The voltage detection means 180 shown in the figure is applied with a reference power supply Vth stabilized at a predetermined potential by a regulator or the like, and a voltage dividing resistor R1 for applying a potential Vc of the snubber capacitor 133 and outputting a voltage value signal corresponding to the potential Vc. , R2 and a comparator Comp. In the comparator Comp, the output terminal of the voltage dividing resistor is connected to the non-inverting terminal, the reference potential Vth is connected to the inverting terminal, and both comparison results are output to the snubber control circuit 160. That is, the comparator Comp determines the threshold value of the input voltage value of the snubber capacitor 133 and outputs a determination signal obtained thereby to the snubber control circuit 160. Here, the voltage value of the reference voltage Vth is set according to the withstand voltage of the snubber capacitor 133.

  Note that the voltage detection means 180 is not limited to the above-described configuration, and may be a mode built in the control circuit CNT as shown in FIG. That is, a specific example thereof will be described. In the snubber control circuit 160, a predetermined comparison processing function is constructed, and a reference value regarding the withstand voltage value of the snubber capacitor is given. Further, the snubber control circuit 160 is provided with an input port Pin (digital port or AD port) and is directly wired to the voltage detection terminal of the snubber capacitor 133. The built-in comparison processing function realizes an action equivalent to the action of FIG. That is, the voltage detection unit 180 may be built in the control circuit CNT or may be physically independent from the control circuit CNT.

  As described above, in the indirect matrix converter 100 according to the present embodiment, when the converter circuit 120 and the inverter circuit 140 are controlled by the control circuit CNT, the converter circuit 120 converts DC power converted from AC power to the DC link unit. The inverter circuit 140 reconverts the DC power into AC power and drives and controls the permanent magnet synchronous motor M. Since the indirect matrix converter 100 according to the present embodiment is designed on the assumption that the synchronous motor is controlled, an electrolytic capacitor as an energy buffer is not provided in the DC link unit. However, when the power factor of the synchronous motor decreases, regenerative power may be generated depending on the operation state from the permanent magnet motor M. Therefore, the active snubber circuit absorbs the regenerative power that has occurred accidentally, discharges the charge accumulated in the snubber capacitor according to a predetermined timing, and uses the power generated by this discharge as the power of the synchronous motor M. As appropriate. Since such a snubber capacitor is used as a buffer function of regenerative power that occurs temporarily, a low-capacitance element is sufficient as compared with a normal buffer capacitor.

  With reference to FIG. 5, functions incorporated in the control circuit CNT will be described. Each expressed as a functional block is realized by arithmetic processing such as a CPU.

  As illustrated, the converter control circuit 150 includes a phase voltage conversion unit 151, a command value calculation unit 152, and a PWM signal shaping unit 153. The snubber control circuit 160 includes a discharge cycle selection unit 161 and a drive signal shaping unit 162. Further, the inverter control circuit 170 includes an input value conversion unit 171, an angular velocity estimation unit 172, a phase information calculation unit 173, a command angle output unit 174, a command current generation unit 175, a d-axis command value calculation unit 176, and a q-axis command value calculation. 177, a command value conversion unit 178, and a PWM signal shaping unit 179.

  First, the inverter control circuit 170 will be described. Inverter control circuit 170 receives U-phase current, V-phase current, W-phase current (hereinafter referred to as phase current Ii $) detected by permanent magnet synchronous motor M, and phase information θ #, which will be described later. Then, the input value conversion unit 171 converts the three-phase phase current Ii $ into two-axis components of the d-axis detection current Id $ and the q-axis detection current Iq $. However, the d-axis indicates the direction of the magnetic force of the rotor, the q-axis indicates the direction perpendicular to the d-axis, the d-axis detection current Id $ indicates the current obtained by converting the phase current Ii $ into the d-axis component, The q-axis detection current Iq $ indicates a current obtained by converting the phase current Ii $ into a q-axis component.

  The angular velocity estimation unit 172 receives a d-axis detection current Id $, a q-axis detection current Iq $, a d-axis command voltage Vd * and a q-axis command voltage Vq *, which will be described later, and calculates them using a predetermined model equation. Thus, the estimated angular velocity ω # is calculated.

  The phase information calculation process 173 integrates the estimated angular velocity ω # with time, thereby calculating the phase information θ #.

  The command angular velocity output unit 174 outputs a command angular velocity ω * based on an external command.

  The command current generation unit 175 receives a difference value between the command angular velocity ω * and the estimated angular velocity ω #, and calculates a d-axis command current Id * and a q-axis command current Iq * based on the difference value. More specifically, the command current generator 175 includes a d-axis current calculator 175a and a q-axis current calculator 175b. In each calculator, the magnetic direction of the rotor forms a predetermined angle with respect to the control axis. V / F control that is controlled in this way, synchronous operation control that is controlled so that the magnetic direction of the rotor and the control axis substantially coincide, and current switching control that changes from V / F control to synchronous operation control, Calculation is performed according to a predetermined model formula. Then, by switching these controls, the operation is switched from the start to the V / F control, and finally the operation is switched to the synchronous operation control.

  The d-axis command value calculation unit 176 receives the difference value between the d-axis command current Id * and the d-axis detection current Id $, and generates a d-axis command voltage Vd * by performing PI control. Further, the q-axis command value calculation unit 177 receives the difference value between the q-axis command current Iq * and the q-axis detection current Iq $, and generates a q-axis command voltage Vq * by performing PI control. The command voltages Vd * and Vq * are voltage values converted by the d-axis and the q-axis.

  The command value conversion unit 178 receives the command voltages Vd * and Vq * calculated in the previous stage, and generates sine-wave command voltages (Vu *, Vv *, Vw *) based on this. Such command voltage is generated for three phases corresponding to the U phase, V phase, and W phase of the inverter circuit.

  The PWM signal shaping unit 179 generates a carrier wave (inverter carrier wave) used in the inverter circuit 140 and performs a comparison process between the inverter carrier wave and the command voltage (Vu *, Vv *, Vw *), thereby Side PWM signal is generated. The inverter-side carrier wave is a simple triangular wave, and its generation process can be minimized. Therefore, in the inverter control circuit 170, when the PWM signal shaping unit 179 generates a carrier wave, the burden of control processing can be minimized.

  In A part and B part of FIG. 6, various waveforms generated by the inverter control circuit 170 are shown. In the PWM signal shaping circuit 179 of the inverter circuit, as shown in part A, the inverter-side carrier wave WAV1 is formed in a triangular shape, and its element period is Tinv (sec). At this time, the command voltage (Vu *, Vv *, Vw *) is input to the PWM signal shaping unit 179, the command voltage and the inverter carrier wave WAV1 are compared, and the PWM signal on the inverter side is displayed as shown in part B. Signals Sau to Sbw are formed. In the figure, the High value side of the PWM signal indicates the ON state of the power transistor, and the Low value indicates the OFF state of the power transistor. In the same figure, the command voltages (Vu *, Vv *, Vw *) are drawn linearly, but when viewed macroscopically, they are sine waves.

  Returning to FIG. 5, the operation of the converter control circuit 150 will be described. First, the converter control circuit 150 converts the interphase voltages (Vrs, Vst, Vtr) based on a plurality of signals received from the input voltage detection unit SEN1. Here, the interphase voltage Vrs is a potential difference between the R phase and the S phase on the input side, the interphase voltage Vst is a potential difference between the S phase and the T phase on the input side, and the interphase voltage Vtr is the T difference on the input side. The potential difference between the phase and the R phase. Thereafter, the phase voltage conversion unit 151 converts the detected interphase voltages (Vrs, Vst, Vtr) into phase voltages (Vr, Vs, Vt) corresponding to the AC power supply. Thereafter, the command value calculation unit 152 performs feedforward control based on the phase voltages (Vr, Vs, Vt) to generate command voltages (Vr *, Vs *, Vt *) in the converter circuit. Such command voltages (Vr *, Vs *, Vt *) are also sine waves having different phases. Since the command value calculation unit 152 generates the command voltage (Vr *, Vs *, Vt *) by feedforward control, the control process is simplified as shown in the figure, whereby the converter control circuit has a configuration of the control process. Is minimized and hardware resources are effectively utilized.

  The PWM signal shaping unit 153 has a function of reconstructing the converter carrier wave WAV2 based on the inverter carrier wave WAV1 and a function of generating a converter PWM signal. As a result of this processing, the power transistor 122 of the converter circuit is provided. ˜124 are driven appropriately.

  The function of reconstructing the converter carrier WAV2 based on the inverter carrier WAV1 is that when the inverter carrier WAV1 is input to the PWM signal shaping unit 153, the frequency of the inverter carrier wave is 2 as shown in part C of FIG. Double and adjust the position of the valley apex so that the motor phase current does not distort. Further, the peak on the peak side of the carrier wave for the converter is deformed into a flat shape since no current flows from the DC link portion to the synchronous motor M while the inverter transistor is in the zero vector period. Note that the waveform of the carrier wave WAV2 on the converter side is always flat only when the drive signal Snb of the active transistor is on (see FIG. 6). Such processing is more complicated than processing for generating the carrier wave WAV1 in the inverter control circuit. However, in converter control circuit 150, the control process is simplified, so there is room in the area of the control process that can be assigned to the control circuit. For this reason, the converter control circuit 150 may make the shaping process of the converter-side carrier wave WAV1 somewhat complicated.

  In the function of generating the PWM signal of the converter circuit, as shown in FIG. 6D, the PWM signal Sr on the converter side is compared by comparing the waveform of the command voltage (Vr *, Vs *, Vt *) with the converter carrier wave WAV2. St is obtained. Here, in converter circuit 150 according to the present embodiment, AC power can be supplied to the DC link unit when the power transistor on the converter side is turned on by at least two arms. However, current flows from the converter circuit to the inverter circuit via the DC link section on condition that the power transistor of the inverter circuit 140 is not a zero vector and the power consumption of the synchronous motor M is not zero. That is, if electric power is consumed by the permanent magnet synchronous motor M, current flows from the converter circuit to the inverter circuit through the DC link portion only in the range of “K” as shown in FIG. 6D. . In the control circuit CNT according to the present embodiment, when the signal of the snubber control circuit 160 is turned on, all the PWM signals on the converter side are turned off and the supply current from the converter side is cut off. More specifically, in the converter control circuit 150, when the signal of the snubber control circuit 160 is in the on state, the converter side carrier wave WAV2 is set to the maximum value, thereby turning off the two-phase PWM signal on the converter side. .

  As described above, according to the indirect matrix converter according to the present embodiment, by generating converter-side carrier WAV2 with reference to inverter-side carrier WAV1, in inverter control circuit 170, the process of generating inverter-side carrier WAV1 is the lowest. The other control processing for controlling the inverter circuit 140 is effectively assigned by the inverter control circuit 170. Further, in the converter control circuit 120, the generation process of the converter side carrier wave WAV2 is complicated. However, since there are more hardware resources than the inverter control circuit 170, the control process required by the converter circuit 120 is allocated. be able to.

  Further, since it is not necessary to use an expensive electronic device such as a programmable logic device, it is possible to suppress an increase in cost of the apparatus.

  Returning to FIG. 5 again, the operation of the snubber control circuit 160 will be described. In discharge cycle selection section 161 (cycle selection means in the claims), d-axis detection current Id $, q-axis detection current Iq $, detection voltage value Vc $ of snubber capacitor 133, inverter operation mode Md, and Is input, and the discharge period of the snubber capacitor 133 is selected based on these pieces of information.

  As for the d-axis detection current Id $ and the q-axis detection current Iq $, information related to the current value is supplied from the input value conversion unit 171 of the inverter control circuit 170. The detected voltage value Vc $ of the snubber capacitor 133 can be detected by the detection line connected to the snubber capacitor 133. The inverter operation mode Md is information indicating whether the currently driven synchronous motor is driven by the V / F control, the switching mode, or the synchronous operation mode. .

  In the memory circuit, a specific numerical value of the d-axis detection current Id $, the q-axis detection current Iq $, and the detection voltage value Vc $ of the snubber capacitor 133 and which state the operation mode is in A plurality of on / off patterns of the snubber transistor are recorded corresponding to the conditions. Such a pattern may be determined experimentally or may be a result calculated from the value of the regenerative current or the like. The on / off pattern of the snubber transistor does not mean that it cannot be determined unless all the conditions of the d-axis detection current Id $, the q-axis detection current Iq $, the detection voltage value Vc $, and the operation mode are provided. The on / off pattern may be determined according to any of the conditions. Further, the d-axis command current Id * may be replaced instead of the d-axis detection current Id $, and the q-axis command current Iq * may be replaced instead of the q-axis detection current Iq $. Hereinafter, a condition constituted by any combination of the d-axis detection current Id $, the q-axis detection current Iq $, the detection voltage value Vc $, and the operation mode is referred to as a selection condition.

  In order to simplify the processing operation of the control circuit CNT, the discharge cycle selection unit 161 determines the on / off pattern of the snubber transistor based on a certain rule. That is, the discharge cycle selection unit 161 has a periodic pitch determination function and a periodic duty determination function. The periodic pitch determination function determines how many periods of the inverter carrier WAV2 constitute the on / off pattern of the snubber transistor. FIG. 6E shows an example of the on / off pattern. In the example of FIG. 6, the on / off pattern is composed of four periods of the inverter carrier wave WAV2. Hereinafter, one unit constituted by the carrier wave WAV2 is referred to as a synthesis period Tsum. The periodic duty determination function selects an element period Tinv for turning off (Low) the signal Snb and an element period Tinv for turning on (High) from the combined period Tsum. However, here, the waveform formation of the drive signal Snb of the snubber transistor is not yet performed, but only the on / off pattern is determined corresponding to the element period from the synthesis period Tsum.

  The drive signal shaping unit 162 (discharge permission means in the claims) receives the shape of the inverter carrier wave WAV2, obtains information on the combined cycle Tsum and on / off pattern obtained by the discharge cycle selection unit 161, and based on this information Thus, the drive signal Snb of the snubber transistor is formed into a rectangular wave shape. Then, in the drive signal shaping unit 162, the snubber transistor 131 is energized according to the rectangular wave. In FIG. 6E, as described above, the synthesis cycle is Tsum, and the on / off pattern is 3 on-stages on the front and 1 off on the back-stage. In the case of the figure, the drive signal shaping unit 162 issues a command “Low-Low-Low-High” from the previous stage in correspondence with the element cycle Tinv of the inverter carrier wave WAV2, and generates a pulse signal synchronized with the element cycle Tinv. It is formed. That is, DUTY determined by the snubber control circuit 160 is defined by an integral multiple of the element period Tinv. As shown in FIG. 6, even when the snubber transistor is turned on, the charge of the snubber capacitor 133 is not discharged during the entire on period. This is because, as described in FIG. 6E, the timing of current flowing through the permanent magnet synchronous motor M is limited to the period “K”, and power is consumed by the synchronous motor M during this period. Only in some cases, the snubber capacitor 133 is discharged. That is, at the on timing of the drive signal Snb, the snubber transistor is switched to the energized state in the snubber capacitor, and the discharge of the accumulated charge is permitted, and the discharge is performed when the condition for discharging is satisfied within this period. Current will flow to the synchronous motor side.

  As described above, the switching operation of the snubber transistor is performed in a period synthesized with a plurality of element cycles, so that the control operation of the control circuit CNT can be simplified by avoiding the control for switching every element cycle. For this reason, a general-purpose control circuit can be applied without using a special circuit element such as an FPGA.

  Next, the operation of the indirect matrix converter 100 associated with the snubber control circuit 160 will be described with reference to FIG. When the control circuit CNT becomes active (power ON), as shown in the figure, a program related to the snubber control circuit is activated, and it is determined whether or not all selection conditions necessary for forming the drive signal Snb have been acquired (S01). ). Here, the selection conditions refer to detection currents Id $, Iq $, detection voltage Vc $, and operation mode Md.

  When acquisition of necessary information is confirmed in S01, it is determined whether or not the voltage value Vc $ of the snubber capacitor 133 is larger than the reference voltage Vth. If the voltage value Vc $ is smaller than the reference voltage Vth, the process returns to the previous step S01, and this loop is repeated until the voltage value Vc $ becomes larger than the reference voltage Vth. When the voltage value Vc $ becomes larger than the reference voltage Vth, the process proceeds to the next step S03, and the next process is started. That is, in this step, control is realized in which a voltage value higher than the withstand voltage value is not applied to the snubber capacitor 133.

  Upon confirming that the voltage value Vc $ is greater than the reference voltage Vth, the control circuit CNT selects a synthesis cycle Tsum and on / off timing that match the current selection conditions (S03). The synthesis cycle Tsum and the on / off timing are mapped for each selection condition and are defined by the selection condition. That is, in this step, since the waveform shape can be defined based on the mapped information, the processing of the control circuit CNT can be simplified without incorporating feedback control such as PI control.

  Thereafter, the inverter carrier wave WAV1 is obtained from the inverter control circuit 170 (S04), and the synthesis period Tsum and the on / off timing are applied to the inverter carrier wave WAV1 to generate the drive signal Snb of the snubber transistor 131. Snb is driven (S05). Thereafter, the loop processing from S01 is performed, and the control of the active snubber circuit 130 is continued while the control circuit CNT is powered on.

  Hereinafter, the phase current controlled by the snubber control circuit will be described based on specific examples with reference to FIGS. 8 to 13. 8 to 13, for convenience, only the U-phase current is described among the phase currents detected by the current detection unit SEN2. However, even in other phase currents, although the phases are different, the waveform states are controlled in substantially the same manner. In V / F control or synchronous control, the frequency of the phase current is increased in order to increase the rotation speed of the rotor. However, in FIGS. 8, 10, and 12, the frequency of the phase current is shown for convenience in reference to any of the drawings, but in reality, the frequency is It fluctuates according to the rotational speed of the rotor.

  FIG. 8 schematically shows the U-phase current immediately after the operation of the synchronous motor M is started. That is, the initial state of V / F control is shown. In this case, because of V / F control, the magnetic flux direction of the rotor and the control axis direction do not coincide with each other, and the power factor is extremely low. At this stage, the snubber control circuit 160 predicts that the regenerative current of the synchronous motor M increases from the information of the operation mode Md, and selects a map that can set the duty ratio of the drive signal Snb in the snubber transistor 131 to be large. Here, a map in which the synthesis cycle Tsum is 5 × Tinv, the first cycle to the second cycle is OFF, and the third cycle to the fifth cycle is ON is selected.

  The snubber control circuit 160 in such a scene generates a snubber transistor drive signal Snb based on the inverter carrier wave WAV1, and drives the snubber transistor 131 corresponding to the element period, as shown in FIG. At this time, as shown in the figure, the snubber capacitor discharges the electric charge according to the energization period of the transistor, and appropriately reduces the voltage value Vc generated by the electric charge. In the figure, the decreasing curve of the snubber capacitor voltage Vc is shown as a continuous waveform, but in reality, the timing at which discharge is possible within the energization time of the snubber transistor is limited, so the waveform is intermittent. It is thought that it appears in

  As shown in the X enlarged view of FIG. 8, when the drive signal Snb of the snubber transistor is turned off (1-2), the phase current Iu is covered by the supply current from the converter circuit 120. On the other hand, when the drive signal Snb of the snubber transistor is turned on (3 to 5), the phase current Iu is covered by the discharge current from the active snubber circuit 130.

  When the active snubber circuit 130 is driven, the phase current Iu flowing during the synthetic cycle Tsum corresponds to the current value corresponding to the off-state element cycle Tinv and the on-state element cycle Tinv, as shown in the enlarged portion X. It is a value determined by the sum of the current value to be generated. That is, since the required phase current Iu is defined by the detection current Ii $, the snubber control circuit 160 selects the on / off pattern of the snubber transistor 131 so that the average current required in the synthesis cycle Tsum is obtained. Become. The map selection process in the drive signal shaping unit 162 is to obtain optimal map information from a plurality of maps patterned so as to match the average current required for the synthesis period Tsum. .

  Then, as shown in FIG. 8, the correct phase current Iu having a sinusoidal shape is controlled by aggregating correctly set average currents for each element, whereby the synchronous motor M is controlled in a desired state. Become.

  FIG. 10 schematically shows the U-phase current when the V / F control proceeds. That is, the state where the synchronous motor M is stably driven by the V / F control is shown. Even in this case, the magnetic flux direction of the rotor does not coincide with the control axis direction. However, the power factor is somewhat improved compared to the previous case. At this stage, the snubber control circuit 160 predicts that the regenerative current of the synchronous motor M decreases from the information of the operation mode Md, and selects a map that can set the duty ratio of the drive signal Snb in the snubber transistor 131 to be small. Here, a map is selected in which the synthesis cycle Tsum is 8 × Tinv, the first to seventh cycles are OFF, and the eighth cycle is ON.

  In the snubber control circuit 160 in such a scene, as shown in FIG. 11, the rate of increase of the capacitor voltage value Vc slows down as the power factor increases. Therefore, the off period of the drive signal is lengthened and the on period is shortened.

  As shown in the enlarged Y view of FIG. 10, when the drive signal Snb of the snubber transistor is turned off (1 to 7), the phase current Iu is covered by the supply current from the converter circuit 120. On the other hand, when the drive signal Snb of the snubber transistor is turned on (8), the phase current Iu is covered by the discharge current from the active snubber circuit 130. Then, the correct phase current Iu having a sinusoidal shape is controlled by aggregating the correctly set average current for each element, whereby the synchronous motor M is controlled in a desired state. The operation of the snubber control circuit in the switching mode is substantially the same as the control shown in FIG.

  FIG. 12 schematically shows the U-phase current when shifting to the synchronous mode. That is, since the power factor of the synchronous motor M is controlled at (√3) / 2 or more, no regenerative power is generated in the indirect matrix converter 100. Therefore, as shown in FIG. 13, the snubber control circuit 160 is not driven. As shown in FIG. 12, all the phase currents are covered by the supply current from the converter circuit 120.

  While the snubber control circuit is operated in the synchronous mode, the d-axis component current is set to substantially zero and no regenerative current is generated in principle, so that the processing routine of FIG. 7 can be omitted. In this case, the burden on the processing operation of the control circuit CNT is suppressed. In particular, a compressor motor for an air conditioner outdoor unit is suitable as a technique to which the present embodiment is applied because the load torque of the motor is stable. On the other hand, even in the synchronous control, when the current flowing through the current detection unit SEN2 becomes low, the d-axis component current may be increased to increase the output value of the detection signal. In such a case, there is no change in the q-axis current necessary for control, and only an unnecessary d-axis current is added, so that a regenerative current may flow as in the V / F control. In such a case, the above-described active snubber circuit 130 may be driven in accordance with such special control. In addition, since a problem related to a decrease in the output of the detection signal may also occur in the V / F control, in this case, the regenerative current can be absorbed by appropriately driving the active snubber circuit 130.

  According to the indirect matrix converter 100 according to the present embodiment, the control process of the inverter circuit is simplified and the following effects are produced. That is, since the snubber transistor switching operation is performed every period Tsum synthesized with a plurality of element periods Tinv by the same device, the control operation of the control circuit CNT is simplified by avoiding the control of switching every element period. It is done. For this reason, a general-purpose control circuit can be applied without using a special circuit element such as an FPGA.

  The indirect matrix converter according to the present embodiment is a representative example of the present invention, and various modifications can be made. For example, in the present embodiment, as described above, the active snubber circuit 130, the snubber control circuit 160, and the voltage detection means 180 are the configuration requirements. In the present invention, these configurations (the active snubber circuit 130, the snubber The control circuit 160 and the voltage detection means 180) may be omitted (claim 1). Even in such an embodiment, by generating the converter-side carrier wave based on the inverter-side carrier wave, the inverter control circuit can minimize the process of generating the inverter-side carrier wave, and can control the inverter circuit. These control processes are effectively assigned by the inverter control circuit. In the converter control circuit, the converter side carrier wave generation process is complicated. However, since there is a surplus of hardware resources compared to the inverter control circuit, the control process required by the converter circuit can be assigned.

  Further, the indirect matrix converter may be replaced with a converter circuit 190 having another configuration as shown in FIG. In the converter circuit 190, an IGBT having a back pressure protection function constitutes an arm of a switching element, and by providing such an arm with three phases, a power conversion function similar to that in FIG. 2 is realized.

  Furthermore, as shown in FIG. 15, the active snubber circuit 130 is preferably provided with a discharge resistor 134 in the snubber capacitor 133. In such a configuration, when the operation of the active snubber circuit is stopped for a long time, the electric charge accumulated in the snubber capacitor 133 is discharged to the low side line via the discharge resistor 134. As a result, the active snubber circuit 130 is protected from the reverse voltage of the snubber transistor 131 over a long period of time. Therefore, it is suitable when the use of the indirect matrix converter is stopped and the power supply is turned off, or when the synchronous operation of the motor continues for a long time (for example, a compressor motor for an outdoor unit).

  In addition, the indirect matrix converter according to the present invention can use an induction motor as a load. In this case, since the power factor is lower than that of the synchronous motor, the energization time of the snubber transistor 131 becomes longer as a whole. However, as described above, the energization time of the snubber transistor is only controlled to be in an ON state over many element cycles Tinv, and does not increase the burden on the control circuit CNT.

DESCRIPTION OF SYMBOLS 100 Indirect matrix converter 120 Converter circuit 130 Active snubber circuit 140 Inverter circuit 160 Active snubber control circuit 161 Period selection means 162 Discharge permission means M Permanent magnet synchronous motor

Claims (4)

A converter circuit that converts AC power and outputs DC power to a DC link unit at a subsequent stage, an input voltage detection unit that detects a voltage value of the AC power, a converter control circuit that controls the converter circuit, and the DC power An inverter circuit for receiving and converting to AC power used in a load, and an inverter control circuit for controlling the inverter circuit,
The converter control circuit generates a converter carrier wave used in the converter control circuit based on an inverter carrier wave generated by the inverter control circuit. A converter circuit that converts AC power and outputs DC power to a DC link unit at a subsequent stage, an input voltage detection unit that detects a voltage value of the AC power, a converter control circuit that controls the converter circuit, and the DC power An inverter circuit for receiving and converting the AC power to be used in the load, an inverter control circuit for controlling the inverter circuit, an active snubber circuit connected in parallel to the DC link unit, and an electric charge accumulated in the active snubber circuit A snubber control circuit for controlling discharge,
The converter control circuit generates a converter carrier wave used in the converter control circuit based on the inverter carrier wave generated by the inverter control circuit,
The snubber control circuit includes period selection means for selecting an operation of the active snubber circuit in correspondence with an element period of an inverter carrier wave used in the inverter circuit, and discharge for allowing discharge of the charge in a predetermined element period. An indirect matrix converter, characterized by comprising permission means.   3. The indirect according to claim 1, wherein the converter control circuit performs feedforward control of an output voltage to the DC link unit based on a voltage value received from the input voltage detection unit. Matrix converter.   4. The indirect matrix converter according to claim 1, wherein the load is a compressor motor used in an outdoor unit of an air conditioner.

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