JP2011108705A - Processing method of silicon substrate, and method of manufacturing liquid injection head - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a processing method of a silicon substrate wherein the silicon substrate can be processed by simple steps with good dimensional accuracy. <P>SOLUTION: The processing method of a silicon substrate includes a surface treatment step of sputtering the main surface of a silicon substrate 10, a mask layer formation step of forming a mask layer 20 on the main surface of a silicon substrate 10, a patterning step of forming a mask pattern 22 by patterning the mask layer 20, and an etching step of performing wet etching of the silicon substrate 10 according to the shape of the mask pattern 22, wherein the mask layer 20 contains chromium, and the surface treatment step and the mask layer formation step are carried out in the same chamber C. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for processing a silicon substrate and a method for manufacturing a liquid jet head using the same.

  Processing a silicon substrate to form holes and grooves in the substrate is generally performed in a wide range of electronic components including semiconductors. Such processing is performed by various methods suitable for a given manufacturing process, and a typical method is one in which the silicon corresponding to the holes and grooves is removed by etching. It is done.

  As an aspect of removing silicon by etching, a silicon substrate is immersed in an etchant, and the silicon is chemically changed to remove it by dissolving it in the etchant, or by causing gas molecules or ions to collide with the silicon substrate. Examples include dry etching in which silicon is physically ground and removed.

  Of these, wet etching is generally used when the amount of processing of a silicon substrate is large because the processing rate of a silicon substrate can be made larger than that of dry etching. Also, in the case of wet etching, when the silicon substrate is a single crystal, the processing speed may vary depending on the crystal orientation, and processing utilizing such properties (anisotropic properties) is also performed.

  In wet etching, in order to process a desired position on a silicon substrate, it is common to cover a position not to be processed with a mask and to contact only the desired position with an etching solution. As such a mask, an organic layer such as a resist or an inorganic layer such as an oxide or nitride is used. For example, Patent Document 1 discloses a method using a TEOS (ethyl silicate) film or a SiN film as such a mask.

JP 2006-088508 A

  However, if the mask is simply formed on the surface of the silicon substrate, the etching rate of silicon in the region where the silicon substrate and the mask are in contact may be different from the etching rate of silicon in other parts. In some cases, the processing shape is different from the shape of the above. In addition, even in the region where the silicon substrate and the mask are in contact with each other, the etching rate may be different, and the etching amount may not be constant at the edge portion of the non-uniform mask. Further, when the mask is formed after the surface of the silicon substrate is cleaned by a special cleaning method as in the method described in Patent Document 1, such unevenness in the etching rate of silicon is suppressed. However, the cleaning process of the surface of the silicon substrate has to be performed very carefully. That is, in this cleaning process, for example, precise temperature and time management and accurate cleaning liquid purity management are required. For this reason, the process of forming the mask on the surface of the silicon substrate is a time-consuming and laborious process, particularly in the cleaning process.

  One of the objects according to some aspects of the present invention is to provide a silicon substrate processing method capable of processing a silicon substrate with good dimensional accuracy by a simple process. Another object of some aspects of the present invention is to provide a method of manufacturing a liquid jet head capable of forming a liquid flow path with good dimensional accuracy by a simple process.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following aspects or application examples.

[Application Example 1]
One aspect of the method for processing a silicon substrate according to the present invention is as follows.
A surface treatment step of sputtering the main surface of the silicon substrate;
A mask layer forming step of forming a mask layer on the main surface of the silicon substrate;
A patterning step of patterning the mask layer to form a mask pattern;
An etching step of wet etching the silicon substrate according to the shape of the mask pattern,
The mask layer contains chromium;
The surface treatment step and the mask layer forming step are performed in the same chamber.

  In this way, the silicon substrate can be processed with good dimensional accuracy. That is, as a result of uniform and good adhesion between the silicon substrate and the mask pattern, the etching rate near the boundary between the silicon substrate and the mask pattern is uniform at the edge portion of the mask pattern, and closer to the shape of the mask pattern. The silicon substrate can be processed in a shape, and the silicon substrate can be etched with good dimensional accuracy and good reproducibility. Thereby, for example, in designing the dimensions to be processed, it is possible to reduce the need to consider uncertain elements, and it is possible to process with dimensions close to the designed dimensions.

  Furthermore, according to the silicon substrate processing method of this application example, the surface treatment step and the mask layer forming step can be performed only by changing the target to be sputtered in the same chamber. That is, the main surface of the silicon substrate is sputtered in the surface treatment step, the target containing the mask layer raw material formed in the mask layer forming step in the same chamber is subsequently sputtered, and the target material is deposited on the main surface of the silicon substrate. Thus, a mask layer can be formed. Therefore, sufficient adhesion between the silicon substrate and the mask pattern can be obtained with a simple apparatus configuration and simple operation, and the silicon substrate can be etched with good dimensional accuracy.

[Application Example 2]
In application example 1,
The mask layer forming step is a silicon substrate processing method performed by a sputtering method.

  If it does in this way, a surface treatment process and a mask layer formation process can be performed only by changing the object sputtered within the same chamber. That is, the main surface of the silicon substrate is sputtered in the surface treatment step, the target containing the mask layer raw material formed in the mask layer forming step in the same chamber is subsequently sputtered, and the target material is deposited on the main surface of the silicon substrate. Thus, a mask layer can be formed. Therefore, the silicon substrate can be etched with good dimensional accuracy by a simpler apparatus configuration and simple operation.

[Application Example 3]
In application example 1 or application example 2,
The method for processing a silicon substrate, wherein the mask layer includes a first mask layer mainly composed of chromium oxide and a second mask layer mainly composed of chromium.

  In this way, processing with higher dimensional accuracy can be performed. That is, the adhesion between the silicon substrate and the mask layer is further increased, the etching rate near the boundary between the silicon substrate and the mask pattern is uniform at the edge portion of the mask pattern, and the silicon substrate is shaped closer to the mask pattern shape. The silicon substrate can be etched with better dimensional accuracy. Further, according to this application example, the durability of the mask layer can be increased and the thickness of the mask layer can be sufficiently reduced.

[Application Example 4]
In application example 3,
The method of processing a silicon substrate, wherein the mask layer has the first mask layer on the silicon substrate side, and has the second mask layer on the opposite side of the first mask layer from the silicon substrate.

  In this way, the durability of the mask layer can be further increased and the thickness of the mask layer can be reduced.

[Application Example 5]
In any one of Application Examples 1 to 4,
The said etching process is a processing method of a silicon substrate performed by the etching liquid which has potassium hydroxide as a main component.

  In this way, the processing speed of the silicon substrate can be further increased. Thereby, the time required for the whole processing process of the silicon substrate can be shortened.

[Application Example 6]
In any one of Application Examples 1 to 5,
A method for processing a silicon substrate, further comprising a step of washing a main surface of the silicon substrate with a solution containing hydrogen fluoride before the surface treatment step.

  In this way, processing with higher dimensional accuracy can be performed. That is, the adhesion between the silicon substrate and the mask layer is further increased, the etching rate near the boundary between the silicon substrate and the mask pattern is uniform at the edge portion of the mask pattern, and the silicon substrate is shaped closer to the mask pattern shape. The silicon substrate can be etched with better dimensional accuracy.

[Application Example 7]
One aspect of a method of manufacturing a liquid jet head according to the present invention is as follows.
Forming an insulating film on one main surface of the silicon substrate;
Forming a piezoelectric element on the surface of the insulating film opposite to the silicon substrate;
A surface treatment step of sputtering the other main surface of the silicon substrate;
A mask layer forming step of forming a mask layer containing chromium on the other main surface of the silicon substrate;
A patterning step of patterning the mask layer in correspondence with the piezoelectric element to form a mask pattern;
An etching process in which the silicon substrate is anisotropically etched with an etchant mainly composed of potassium hydroxide in accordance with the shape of the mask pattern to form a liquid flow path;
Providing a nozzle plate on the other main surface of the silicon substrate;
Including
The surface treatment step and the mask layer forming step are performed in the same chamber.

  In this way, the silicon substrate can be processed with good dimensional accuracy by a simple process, and the flow path of the liquid jet head can be formed with high dimensional accuracy on the silicon substrate. Thereby, for example, the amount of liquid ejected from the liquid ejecting head can be precisely controlled. Further, the processing speed of the silicon substrate is high, and the liquid jet head can be manufactured with high throughput.

[Application Example 8]
In Application Example 7,
A method of manufacturing a liquid jet head, further comprising a step of cleaning a main surface of the silicon substrate with a solution containing hydrogen fluoride before the surface treatment step.

  In this way, the adhesion between the silicon substrate and the mask layer is further improved, and the silicon substrate can be processed with better dimensional accuracy in a simple process, and the flow path of the liquid jet head can be formed with higher accuracy. can do. Thereby, for example, the amount of liquid ejected from the liquid ejecting head can be controlled more precisely.

[Application Example 9]
A silicon substrate having a liquid flow path formed thereon;
An insulating layer formed on one main surface of the silicon substrate;
A piezoelectric element formed on a surface of the insulating layer opposite to the silicon substrate;
A chromium-containing layer formed on the other main surface of the silicon substrate;
A nozzle plate formed on the surface of the chromium-containing layer opposite to the silicon substrate;
A liquid ejecting head.

  Such a liquid ejecting head has a chromium-containing layer, so that the dimensional accuracy of the flow path formed in the silicon substrate is high, the liquid ejecting amount can be precisely controlled, and the silicon substrate and the nozzle plate Adhesiveness is high. Therefore, for example, the controllability and reliability of the liquid jet head according to this application example are increased. In addition, the liquid jet head according to this application example is manufactured using a chromium-containing layer as a hard mask and does not require a step of removing the hard mask. Therefore, the liquid jet head is manufactured with fewer steps than when using other mask patterns. be able to.

The schematic diagram of an example of the sputtering device used by embodiment. The schematic diagram of 1 process of the processing method of the silicon substrate of embodiment. The schematic diagram of 1 process of the processing method of the silicon substrate of embodiment. The schematic diagram of 1 process of the processing method of the silicon substrate of embodiment. The schematic diagram of 1 process of the processing method of the silicon substrate of embodiment. The schematic diagram of 1 process of the processing method of the silicon substrate of embodiment. The schematic diagram of 1 process of the processing method of the silicon substrate of a modification. The schematic diagram which shows an example of the processing shape of the silicon substrate of embodiment. The SEM observation result of the processing shape of the silicon substrate of an experiment example. The SEM observation result of the processing shape of the silicon substrate of an experiment example. The SEM observation result of the processing shape of the silicon substrate of an experiment example. The SEM observation result of the processing shape of the silicon substrate of a reference example. FIG. 6 is a schematic diagram of a step of the method for manufacturing the liquid jet head according to the embodiment. FIG. 6 is a schematic diagram of a step of the method for manufacturing the liquid jet head according to the embodiment. FIG. 6 is a schematic diagram of a step of the method for manufacturing the liquid jet head according to the embodiment. FIG. 6 is a schematic diagram of a step of the method for manufacturing the liquid jet head according to the embodiment. FIG. 6 is a schematic diagram of a step of the method for manufacturing the liquid jet head according to the embodiment. FIG. 6 is a schematic diagram of a step of the method for manufacturing the liquid jet head according to the embodiment. FIG. 2 is a schematic diagram illustrating a cross section of a liquid jet head according to an embodiment. FIG. 2 is a schematic diagram illustrating a cross section of a liquid jet head according to an embodiment. FIG. 6 is a perspective view of the liquid ejecting apparatus according to the embodiment.

  Preferred embodiments of the present invention will be described below with reference to the drawings. In addition, the following embodiment demonstrates an example of this invention. Moreover, this invention is not limited to the following embodiment, The various modifications implemented in the range which does not change a summary are also included.

1. Silicon Substrate Processing Method FIG. 1 is a diagram schematically showing an example of a sputtering apparatus used in the processing method of the present embodiment. 2 to 6 are schematic views of each step of the silicon substrate processing method of the present embodiment. FIG. 7 is a schematic view of a main part of a silicon substrate processed by the silicon substrate processing method of the embodiment.

  The silicon substrate processing method according to the present embodiment includes a surface treatment process, a mask layer forming process, a patterning process, and an etching process.

1.1. Silicon Substrate The silicon substrate 10 processed by the silicon substrate processing method of the present embodiment is a substrate formed of silicon single crystal. The silicon substrate 10 may be, for example, a commercially available silicon wafer or a silicon single crystal obtained by further growing a silicon single crystal by epitaxial growth. Moreover, as long as the surface to be processed is made of silicon, the other surface of the silicon substrate 10 may be made of another material, for example, one of the two main surfaces of the silicon wafer. A member made of a material different from silicon such as silicon oxide or nitride may be formed. Alternatively, a member made of a material different from silicon, such as silicon oxide or nitride, may be formed on both surfaces, and then one main surface may be ground or polished to form a silicon surface. And in this case, it processes from the other main surface side with the processing method of this embodiment. In addition, the silicon substrate 10 may be a substrate in which a thin single crystal silicon layer is formed on an insulating layer, such as an SOI (silicon on insulator) substrate. In this case, a single crystal silicon layer of the thin film is a processing target.

  The shape of the silicon substrate 10 to be processed is not particularly limited, and may be, for example, a wafer shape or a chip shape. Moreover, there is no restriction | limiting also in the thickness of the silicon substrate 10, For example, they are 0.1 micrometer or more and 1 mm or less. Further, the orientation of the silicon crystal constituting the silicon substrate 10 is not particularly limited. For example, the normal direction of the main surface of the silicon substrate 10 to be processed can be along a low-order direction such as <110>, <100>, <111>, etc. of the silicon crystal. Further, these low-order directions are inclined with respect to the normal direction of the main surface of the silicon substrate 10 to be processed, and the normal directions of the main surface of the silicon substrate 10 to be processed are along a higher-order direction. May be.

1.2. Surface Treatment Step The surface treatment step is a step of sputtering the main surface of the silicon substrate 10. The silicon substrate 10 has two main surfaces, but this step is performed on at least one main surface. In this specification, sputtering means that an inert gas (argon (Ar), nitrogen, oxygen, etc.) is introduced into the reduced pressure space while applying a high voltage between the silicon substrate 10 and the sputtering material to ionize the inert gas. By causing a gas to collide with a solid surface, the substance constituting the solid is ejected from the solid. These are accelerated by energy such as direct current (DC), high frequency (RF) and biased RF applied to a bipolar or multipolar plate, and collide with the solid surface.

  In general, an apparatus used for sputtering (hereinafter sometimes referred to as a sputtering apparatus) includes a chamber C capable of forming a decompression space, an electrode plate E disposed in the decompression space, and an external device connected to the electrode plate. The power supply device S is configured to supply electrical energy from. The configuration of the power supply device S is appropriately selected depending on a sputtering mode such as DC sputtering or RF sputtering. A material to be sputtered is disposed in the chamber C, and particles (Ar or the like) that collide with the chamber C are introduced to perform sputtering. Further, a plurality of materials to be sputtered can be arranged in the chamber C, and a material to be sputtered to be sputtered by the same apparatus is provided in the chamber C as needed by adjusting the power supply device S. Can be selected by opening and closing the shutter.

  FIG. 1 is a schematic view schematically showing an example of an apparatus used in the surface treatment process. In the chamber C, the silicon substrate 10 and the target T are arranged in contact with the electrode plate E, respectively. The chamber C is connected to an exhaust pipe (not shown) so that the inside can be decompressed. The chamber C is connected to a gas introduction pipe (not shown) so that various gases used for sputtering can be introduced into the chamber C. Then, as schematically shown in FIG. 1, energy is applied to the ions I formed by ionizing a sputtering bath described later by the electrode plate E connected to the power supply device S.

  Then, the ions I given kinetic energy collide with the target T or the silicon substrate 10, whereby the target T or the silicon substrate 10 is sputtered. Here, when the configuration of the power supply device S is a configuration that generates DC or biased RF, the ion I collides with the target T (arrow A in the figure), or the ion I collides with the silicon substrate 10. The mode (arrow B in the figure) to be achieved can be realized by adjusting the polarity of the power supply device S. Further, in a mode in which the power supply device S generates RF or the like having no directionality, for example, a shutter (not shown) is provided in the chamber C, and either the target T or the silicon substrate 10 is ionized by the shutter. The object to be sputtered can be selected by shielding from the collision.

  The surface treatment process is performed by introducing the silicon substrate 10 into the chamber C, but the target T used in the next mask layer forming process is also introduced into the same chamber C. By doing in this way, in the same chamber C, a surface treatment process and a mask layer formation process can be performed continuously. Further, a plurality of silicon substrates 10 and a plurality of targets T may be introduced into the chamber C. When a plurality of targets T are introduced, the targets T may be different from each other. Note that in this specification, the matter that sputtering is performed in the same chamber means that sputtering of different objects is performed in one chamber, and after a desired sputtering is performed in a certain chamber, It is assumed that the object to be sputtered is moved to perform other desired sputtering in another chamber.

In the surface treatment process, ions I collide with the main surface of the silicon substrate 10. The conditions for sputtering the silicon substrate 10 using the sputtering apparatus having the parallel plate type electrode E as shown in FIG. 1 include the following. Although the temperature at the time of sputtering is not specifically limited, it can be made into -100 degreeC or more and +300 degreeC or less. The temperature at the time of sputtering may be room temperature, and can be set by cooling or heating the silicon substrate 10 in the above temperature range as necessary. The pressure in the chamber C at the time of sputtering can be 0.1 Pa or more and 10 Pa or less, for example. As a gas used for sputtering, for example, Ar, N ₂ , a mixed gas, or the like can be used. The gas is introduced into the chamber C at a flow rate of 1 sccm (standard cc / min: at 1 atm 0 ° C.) or more and 50 sccm or less. Can do. The energy applied to the ions I during sputtering can be 10 W or more and 200 W or less when expressed by the power applied between the electrode plates E. Since the values exemplified above vary depending on the size of the electrode plate E and the volume of the chamber C, typical values are illustrated. The sputtering time can be 5 minutes or more and 15 minutes or less.

  In the present embodiment, the surface treatment process is performed by applying RF power with the sputtering apparatus as described above. The sputtering apparatus of this embodiment includes a shutter (not shown) that prevents ions I from colliding with at least the target T. During the surface treatment process of this embodiment, the surface of the target T is moved by the shutter. Shielded.

  FIG. 2 is a cross-sectional view of the silicon substrate 10 conceptually showing how the ions I collide with the silicon substrate 10 in the surface treatment process. It is considered that the state of the main surface of the silicon substrate 10 sputtered through this step is different from the state of the main surface before sputtering. More specifically, on the main surface of the silicon substrate 10 after sputtering, a part of the material constituting the main surface is ejected from the silicon substrate 10 by sputtering to form a new surface, and there is no change in shape. The silicon crystal of the silicon substrate 10 is modified, the moisture and organic components adhering to the main surface of the silicon substrate 10 are removed, and the main surface of the silicon substrate 10 is activated. It is thought that at least one kind of thing is occurring.

  The processing method of the silicon substrate 10 according to the present embodiment includes such a surface treatment process, whereby at least adhesion between the mask layer 20 formed in the mask layer forming process and the silicon substrate 10 can be improved. . Therefore, it becomes difficult for an etchant in a later etching process to enter the interface between the silicon substrate 10 and the mask layer 20, and the dimensional accuracy of etching can be improved. In addition, since the adhesion between the mask layer 20 and the silicon substrate 10 is uniform, variation in the etching amount is suppressed over the entire edge of the mask pattern 22, and processing with good reproducibility is possible. Further, as described above, the sputtering apparatus used in the surface treatment process can perform sputtering of the target T without opening the chamber C. Therefore, the surface treatment step and the mask layer formation step of the next item can be easily performed in the same chamber C. Therefore, the mask layer 20 can be formed without exposing the main surface of the silicon substrate 10 sputtered in the surface treatment process to an atmosphere other than the atmosphere in the chamber C.

1.3. Mask Layer Forming Step The mask layer forming step is a step of forming the mask layer 20 on the main surface of the sputtered silicon substrate 10 described above. The mask layer forming step is performed in the same chamber C of the sputtering apparatus used in the surface treatment step described above. In the mask layer forming step, ions I collide with the target T in the chamber C to eject the material constituting the target T (by sputtering the target T), and the material containing the material constituting the target T is removed from the silicon substrate 10. It is a process of depositing on the main surface of Therefore, the mask layer forming step can be performed by the sputtering apparatus described in the above “1.2. Surface treatment step”.

The conditions for sputtering the target T using a sputtering apparatus having a parallel plate type electrode E as shown in FIG. 1 include the following. Although the temperature at the time of sputtering is not specifically limited, it can be made into -100 degreeC or more and +300 degreeC or less. The temperature at the time of sputtering may be room temperature, and can be set by cooling or heating the target T within the above temperature range as necessary. The pressure in the chamber C at the time of sputtering can be 0.1 Pa or more and 10 Pa or less, for example. As a gas used for sputtering, for example, Ar, N ₂ , O ₂ , a mixed gas, or the like can be used, and can be introduced into the chamber C at a flow rate of 1 sccm or more and 100 sccm or less. The energy applied to the ions I during sputtering can be 10 W or more and 1000 W or less when expressed by the power applied between the electrode plates E. Since the values exemplified above vary depending on the size of the electrode plate E and the volume of the chamber C, typical values are illustrated. The sputtering time can be 5 minutes or more and 300 minutes or less.

  In the present embodiment, the mask layer forming step is performed by applying RF power with the above-described sputtering apparatus. The sputtering apparatus of this embodiment includes a shutter (not shown) that prevents ions I from colliding with at least the target T. During the mask layer forming process of this embodiment, the target T and the silicon substrate 10 Both surfaces are opened in the chamber C, and a substance including a substance jumping out of the target T is deposited on the main surface of the silicon substrate 10.

  FIG. 3 schematically shows a state in which the mask layer 20 is formed by this process. The mask layer 20 is formed on the main surface of the silicon substrate 10. The mask layer 20 is formed in a layer shape or a thin film shape. The thickness of the mask layer 20 is appropriately selected depending on the material of the mask layer 20, and can be, for example, 10 nm or more and 200 nm or less. The mask layer 20 may be composed of a plurality of layers formed of different materials. One of the functions of the mask layer 20 is to provide a mask when the silicon substrate 10 is etched by patterning.

  The material of the mask layer 20 is selected such that the etching rate of the mask layer 20 is smaller than the etching rate of the silicon substrate 10 when the silicon substrate 10 and the mask layer 20 are subjected to the same etching. That is, the mask layer 20 is formed of a material having selectivity with the silicon substrate 10 in a specific etching. Examples of the material of the mask layer 20 include at least one selected from chromium (Cr) and nickel (Ni), and oxides, nitrides, and oxynitrides thereof. Of these, the material of the mask layer 20 is more preferably a material containing Cr, and more preferably metal chromium, chromium oxide, or the like. When the material of the mask layer 20 contains Cr, the performance of the mask layer 20 as a mask and the chemical stability of the mask layer 20 can be improved, and the adhesion to the silicon substrate 10 can be improved. it can. Thereby, the dimensional accuracy at the time of etching the silicon substrate 10 can be further improved.

  As a material of the target T introduced into the chamber C in the mask layer forming step, a material capable of forming the mask layer 20 by a sputtering method is selected. Specific examples of the material of the target T include at least one selected from chromium (Cr) and nickel (Ni), and oxides, nitrides, and oxynitrides thereof. Then, different targets T can be introduced into the chamber C, and can be switched electrically or mechanically in the chamber C so that the target of sputtering becomes the desired target T.

Among these, in the case where the mask layer 20 is formed of chromium or chromium oxide mentioned as the preferred material of the mask layer 20, the metal chromium mask layer 20 is formed if the material of the target T is metal chromium. Can do. Further, if oxygen (O ₂ ) is introduced into the chamber C and the target T is sputtered, the mask layer 20 of chromium oxide can be formed.

  The processing method of the silicon substrate 10 according to the present embodiment includes the mask layer forming process performed in the same chamber C as the surface treatment process, and at least the mask layer 20 and the silicon substrate formed in the mask layer forming process. Adhesiveness between the two can be increased. Further, as described above, the sputtering apparatus used in the surface treatment process and the mask layer forming process can perform sputtering of the target T without opening the chamber C. Therefore, the surface treatment step and the mask layer formation step of the next item can be easily performed in the same chamber C. Therefore, the mask layer 20 can be formed without exposing the main surface of the silicon substrate 10 sputtered in the surface treatment process to an atmosphere other than the atmosphere in the chamber C.

  In the sputtering apparatus, sputtering the target T, causing the material constituting the target T to jump out of the target T, and depositing the protruding material on the film formation target (in the above example, the silicon substrate 10) It is a general method for depositing a substance using sputtering, and is sometimes referred to as a sputtering method or a sputter deposition method. On the contrary, sputtering the film formation target (the silicon substrate 10 in the above example) in the sputtering apparatus may be referred to as reverse sputtering. Reverse sputtering is similar to the operation performed in the above surface treatment process, but does not have the purpose of depositing a substance on the film formation target.

1.4. Patterning Step The patterning step is a step of patterning the mask layer 20 to form a mask pattern. The patterning step is performed by a method such as a photolithography method, for example. Specifically, first, a resist is formed on the surface of the mask layer 20 opposite to the silicon substrate 10 (the upper surface of the mask layer 20 in FIG. 3), and is exposed and developed into a desired pattern. Next, the mask layer 20 exposed in the opening of the resist is etched. Then, by removing the resist, a patterned mask layer 20, that is, a mask pattern 22 is formed (see FIG. 4). FIG. 4 illustrates a mask pattern 22 having an opening 24.

  Etching of the mask layer 20 may be performed by either dry etching or wet etching. When the mask layer 20 is formed of a material containing chromium, as an etchant used for etching the mask layer 20, for example, a solution containing cerium nitrate can be used. If the patterning step is performed using wet etching, the efficiency can be improved because a plurality of silicon substrates 10 can be processed at one time. Note that the etchant that etches the mask layer 20 in this step is more preferably one that hardly etches the silicon substrate 10.

1.5. Etching Process The etching process is a process in which the silicon substrate 10 is wet-etched according to the shape of the mask pattern 22. In the etching step, the silicon substrate 10 that is not covered with the mask pattern 22, that is, the silicon substrate 10 exposed through the opening 24 of the mask pattern 22 is wet-etched. The etchant used in this step is not particularly limited as long as the etching rate of the silicon substrate 10 is higher than that of the mask pattern 22. As such a thing, the solution containing potassium hydroxide (KOH) can be mentioned, for example. Moreover, these etchants may contain additives having various functions such as buffers and surfactants.

  When the material of the mask pattern 22 (mask layer 20) contains chromium, it is particularly preferable to use a solution containing KOH as a main component as an etchant in this step. When such an etchant is used, the etching rate of the silicon substrate 10 can be sufficiently increased, and the etching rate of the mask pattern 22 can be sufficiently decreased. In this way, the processing speed of the silicon substrate 10 can be further increased. Thereby, the time required for the entire processing process of the silicon substrate 10 can be shortened. In addition, since the thickness of the mask layer 20 can be reduced in this way, the time required for the mask layer forming process and the time required for the patterning process can also be shortened.

  As conditions for performing this step using a solution containing KOH as a main component as an etchant, for example, an aqueous solution having a KOH concentration of 20% by mass to 50% by mass is used as an etchant, and the temperature range is 50 ° C. or more and 90 ° C. or less. It can be carried out.

The amount of processing (etched volume) of the silicon substrate 10 in the etching step can be controlled by, for example, at least one of the type and concentration of the etchant and the time during which the silicon substrate 10 is in contact with the etchant. Further, as an etching stopper in this step, a SiO ₂ layer or a SiN layer may be provided at a desired position on the silicon substrate 10. In this way, it is possible to reduce the time and effort for controlling the etching with the etchant, and to stop the etching at a desired position.

  FIG. 5 and FIG. 6 are diagrams showing an example of a state in which the silicon substrate 10 is processed by an etching process. In the example of FIG. 5, the opening 12 having a shape corresponding to the opening 24 of the mask pattern 22 is formed in the silicon substrate 10 halfway in the thickness direction of the silicon substrate 10. In the example of FIG. 6, the hole 14 penetrating the silicon substrate 10 is formed in the silicon substrate 10 in a shape corresponding to the opening 24 of the mask pattern 22.

1.6. Modified Example FIG. 7 is a diagram schematically showing a modified example of the mask layer forming step in the silicon substrate processing method. In the silicon substrate manufacturing method of the present embodiment, the mask layer 20 can have a stacked structure of a first mask layer 26 containing chromium oxide as a main component and a second mask layer 28 containing chromium as a main component. The number of first mask layers 26 and second mask layers 28 and the order of stacking are not particularly limited. The first mask layer 26 and the second mask layer 28 each control whether oxygen is introduced into the sputtering chamber C by using a target T made of chromium in the mask layer forming step. Can be easily formed.

  In the example of FIG. 7, the mask layer 20 has a first mask layer 26 mainly composed of chromium oxide on the side of the silicon substrate 10, and a second mask mainly composed of chromium on the side opposite to the silicon substrate 10. Layer 28 is included. In the illustrated example, the first mask layer 26 and the second mask layer 28 are formed in contact with each other, and the mask layer 20 has a two-layer structure.

  By configuring the mask layer 20 including the first mask layer 26 and the second mask layer 28 as in this modification, for example, the entire thickness of the mask layer 20 can be reduced. That is, in the example of FIG. 7, the first mask layer 26 having relatively higher adhesion to the silicon substrate 10 than the second mask layer 28 is allowed to bear adhesion to the silicon substrate 10, and thus stability in etching. However, the first mask layer 28 is covered with the second mask layer 28 that is relatively better than the first mask layer. Therefore, the thickness of the entire mask layer 20 can be reduced as compared with the case where the mask layer 20 is configured only by the first mask layer 26.

  Although this modification shows an example in which the mask layer 20 has a two-layer structure, the mask layer 20 may have a structure of three or more layers. Even in that case, an arbitrary layer configuration can be easily formed in the same chamber C.

1.7. Other Steps The silicon substrate processing method of this embodiment may further include other steps. For example, it may further include a step of cleaning the main surface of the silicon substrate 10 with a solution containing hydrogen fluoride before the surface treatment step.

  Specific examples of the solution containing hydrogen fluoride include an aqueous hydrogen fluoride solution of 5% by mass to 30% by mass. Such an aqueous hydrogen fluoride solution may contain additives such as a surfactant and a pH adjuster.

  Examples of the cleaning method in this case include a method of immersing the main surface of the silicon substrate 10 in a solution containing hydrogen fluoride, and may include cleaning with pure water thereafter. In this case, the time for immersing the main surface of the silicon substrate 10 in the solution containing hydrogen fluoride can be 1 second or more and 1 minute or less, and typically 10 seconds. Moreover, these processes may be performed by a spin coat method.

  The silicon substrate processing method of this embodiment can perform processing with higher dimensional accuracy by including such steps. That is, before introducing the silicon substrate 10 into the chamber C, the main surface of the silicon substrate 10 can be made in a cleaner state, so that the effect of the surface treatment process (sputtering) on the main surface of the silicon substrate 10 is enhanced. be able to. Therefore, the adhesion between the silicon substrate 10 and the mask layer 20 is further increased, the etching rate near the interface between the silicon substrate 10 and the mask layer 20 is made uniform, and the silicon substrate 10 is etched with better dimensional accuracy. Can do.

1.8. FIG. 8 is an enlarged schematic view showing the main part of the cross section of the silicon substrate 10 processed by the silicon substrate processing method of the present embodiment. In the enlarged view of FIG. 8, the mask pattern 22 has a step 22 a that is a portion protruding from the silicon substrate 10. This step is a difference between the shape of the mask pattern 22 and the processed shape of the silicon substrate 10. As the level difference 22a is smaller, the silicon substrate 10 is processed more faithfully to the shape of the mask pattern 22. Here, as shown, the distance between the tip of the step 22a and the side surface of the silicon substrate 10 is defined as a distance e.

  If the adhesion between the silicon substrate 10 and the mask pattern 22 is small, the distance e tends to be large. In addition, if there is a distribution in the adhesion between the silicon substrate 10 and the mask pattern 22, the distance e is likely to be non-uniform around the hole 14 in plan view. It is considered that the former phenomenon occurs because an etchant in the etching process easily enters between the silicon substrate 10 and the mask pattern 22. The latter phenomenon is considered to occur because the degree of intrusion of the etchant is different between the strong adhesion portion and the weak adhesion portion. When these phenomena occur, the dimensional accuracy in processing the silicon substrate 10 may be insufficient.

  According to the silicon substrate processing method of this embodiment, the adhesion between the silicon substrate 10 and the mask pattern 22 is uniform and good. Therefore, the distance e can be reduced and the distance e around the hole 14 can be made closer to a constant value.

  Therefore, the silicon substrate processing method of this embodiment can process the silicon substrate 10 with good dimensional accuracy and good reproducibility. That is, as a result of uniform and good adhesion between the silicon substrate 10 and the mask pattern 22, the etching rate near the boundary between the silicon substrate 10 and the mask pattern 22 becomes uniform, and the shape closer to the shape of the mask pattern 22. The silicon substrate 10 can be processed, and the silicon substrate 10 can be etched with good dimensional accuracy.

  In the silicon substrate processing method of this embodiment, the surface treatment step and the mask layer forming step can be performed only by changing the target to be sputtered in the same chamber. That is, the main surface of the silicon substrate is sputtered in the surface treatment step, the target containing the mask layer raw material formed in the mask layer forming step in the same chamber is subsequently sputtered, and the target material is deposited on the main surface of the silicon substrate. Thus, a mask layer can be formed. Therefore, the silicon substrate can be etched with good dimensional accuracy by a simple apparatus configuration and simple operation.

  The silicon substrate processing method according to this embodiment can be applied to a wide range of fields. For example, the silicon substrate processing method according to the present embodiment can be applied when processing a silicon substrate in the manufacture of a piezoelectric actuator, a liquid ejecting head, a liquid ejecting apparatus, and the like. The present invention can be applied to a case where a device, an ultrasonic motor, a pressure sensor, or the like has a step of processing a silicon substrate.

2. Experimental Examples and Reference Examples Experimental examples and reference examples are shown below to describe the present invention more specifically. The present invention is not limited by the following experimental examples.

2.1. Experimental Example Experimental Example 1 is a surface treatment process in which a single-crystal silicon substrate 10 in which the <100> direction of the crystal is oriented in the normal direction of the main surface and a metal chromium target T are introduced into a parallel plate type sputtering apparatus. And it is the example processed by performing a mask layer formation process. The sample of Experimental Example 1 was prepared as follows.

  The surface treatment process was performed at room temperature, and the pressure in the sputtering chamber C was 0.4 Pa. The gas used for sputtering was Ar, which was introduced into the chamber C at a flow rate of 25 sccm. And the electric power applied between the electrode plates E was 100 W, and sputtering was performed for 15 minutes.

Subsequent to the surface treatment process, the target T was sputtered in the same chamber as the mask layer forming process to deposit chromium oxide on the surface of the silicon substrate 10. The temperature in this step was room temperature, and the pressure in the chamber C was 0.67 Pa. The gas used for sputtering of the target T was a mixed gas of Ar and O ₂ and introduced into the chamber C at a flow rate of 30 sccm and 20 sccm, respectively. The electric power applied between the electrode plates E was 500 W, and was performed for 30 minutes.

  Thereafter, the mask layer 20 was patterned by wet etching to form a mask pattern 22 and etched for 120 minutes using a 37 mass% aqueous solution of KOH to prepare the sample of Experimental Example 1.

  9 and 10 show the results obtained by observing the cross section of the sample of Experimental Example 1 with a scanning electron microscope (SEM). FIG. 10 shows a result obtained by magnifying and observing a portion surrounded by a broken line in FIG.

  As can be seen from FIG. 9, a cylindrical opening 12 corresponding to the mask pattern 22 is formed in the silicon substrate 10. Referring to FIG. 10, the thickness of the mask pattern 22 is about 50 nm, and a step 22 a with respect to the side surface of the silicon substrate 10 is formed at the end of the mask pattern 22, and the protruding distance e is about 50 nm. Turned out to be. From these results, it was found that the silicon substrate 10 in the sample of Experimental Example 1 was processed extremely faithfully according to the shape of the mask pattern 22.

  Experimental Example 2 is an example similar to Experimental Example 1 except that the mask layer 20 is formed of two layers. The sample of Experimental Example 2 was prepared as follows.

The surface treatment process was performed in the same manner as in Experimental Example 1. Subsequent to the surface treatment process, the target T was sputtered in the same chamber as the mask layer forming process, and chromium oxide was first deposited on the surface of the silicon substrate 10. The temperature in this step was room temperature, and the pressure in the chamber C was 0.67 Pa. The gas used for sputtering of the target T was a mixed gas of Ar and O ₂ and introduced into the chamber C at a flow rate of 30 sccm and 20 sccm, respectively. The electric power applied between the electrode plates E was 500 W, and was performed for 30 minutes. Subsequently, the introduction of O ₂ was cut off in the same chamber, the target T was sputtered, and metal chromium was deposited on the surface of the silicon substrate 10. The temperature in this step was room temperature, and the pressure in the chamber C was 0.67 Pa. The electric power applied between the electrode plates E was 500 W, and was performed for 30 minutes. Then, the patterning process and the etching process were performed similarly to Experimental Example 1, and the sample of Experimental Example 2 was created.

  FIG. 11 shows the result of SEM observation by enlarging the cross section of the sample of Experimental Example 2.

  Although not shown, also in the sample of Experimental Example 2, a cylindrical opening 12 corresponding to the mask pattern 22 is formed in the silicon substrate 10. Referring to FIG. 11, the thickness of the mask pattern 22 is about 150 nm, and a step 22 a with respect to the side surface of the silicon substrate 10 is formed at the end of the mask pattern 22, and the protruding distance e is about 500 nm. Turned out to be. From these results, it can be seen that the silicon substrate 10 in the sample of Experimental Example 1 is processed faithfully to the shape of the mask pattern 22.

2.2. Reference Example The sample of the reference example was prepared as follows. In the reference example, the mask layer 20 is formed without performing the surface treatment process. The sample of the reference example was prepared as follows.

  A single-crystal silicon substrate 10 in which the <110> direction of the crystal is oriented in the normal direction of the main surface and a metal chromium target T are introduced into a parallel plate type sputtering apparatus, and a mask layer is formed without performing a surface treatment process. The process was performed.

  The mask layer forming step was performed in the same manner as in Experimental Example 1. Thereafter, in the same manner as in Experimental Example 1, a patterning step and an etching step were performed to prepare a sample of a reference example.

  FIG. 12 shows the result of SEM observation by enlarging the cross section of the sample of the reference example.

  Although not shown, a cylindrical opening 12 approximately corresponding to the mask pattern 22 is also formed in the silicon substrate 10 for the sample of the reference example. Referring to FIG. 12, the thickness of the mask pattern 22 is approximately 50 nm, and a very large step 22a is recognized near the end of the mask pattern 22 with respect to the side surface of the silicon substrate 10, and its overhang is observed. The distance e was found to be about 1500 nm. From this result, it was found that the silicon substrate 10 in the sample of the reference example was processed into a shape significantly different from the shape of the mask pattern 22. Further, although not shown, the step formed on the sample of the reference example has a non-uniform size depending on the position around the opening in a plan view.

  From the results of the above experimental examples and reference examples, in the processing of the silicon substrate, when having a surface treatment step, the silicon substrate is processed in a shape close to the shape of the mask pattern, and when there is no surface treatment step, It was found that the shape of the mask pattern deviated greatly.

3. Manufacturing Method of Liquid Ejecting Head An example in which the silicon substrate processing method according to the present embodiment is applied in manufacturing a liquid ejecting head will be described below.

  13 to 18 are schematic views for explaining each step of the method of manufacturing the liquid jet head according to the present embodiment.

  The method of manufacturing a liquid jet head according to the present embodiment includes a step of forming an insulating film on one main surface of a silicon substrate, a step of forming a piezoelectric element on a surface of the insulating film opposite to the silicon substrate, and a surface treatment A process, a mask layer forming process, a patterning process, an etching process, and a process of providing a nozzle plate on the other main surface of the silicon substrate. And a surface treatment process and a mask layer formation process are performed within the same chamber.

3.1. Step of Forming Insulating Film First, the insulating film 30 is formed on one main surface of the silicon substrate 10. The insulating film 30 can be formed of, for example, zirconium oxide, silicon oxide, silicon nitride, silicon oxynitride, or the like. The insulating film 30 may have a laminated structure of films made of these materials. One of the functions of the insulating film 30 is to serve as an etching stopper when etching from the other surface side of the silicon substrate 10 (etching process). Further, as one of the functions of the insulating film 30, it can be mentioned that it becomes a diaphragm in the liquid ejecting head 200.

  The insulating film 30 can be formed by, for example, a CVD (Chemical Vapor Deposition) method, a sputtering method, or the like.

3.2. Step of Forming Piezoelectric Element The piezoelectric element 100 is formed on the surface of the insulating film 30 opposite to the silicon substrate 10. A plurality of piezoelectric elements 100 may be formed. One of the functions of the piezoelectric element 100 is to be a driving unit of a piezoelectric actuator having the insulating film 30 as a movable member. In addition, as one of the functions of the piezoelectric element 100, it can be mentioned that it becomes a driving unit of the liquid ejecting head 200. Therefore, the piezoelectric element 100 is formed, for example, at a position corresponding to a flow path of the liquid jet head 200 described later.

  The piezoelectric element 100 includes, for example, a first electrode 40, a second electrode 50, and a piezoelectric layer 60.

  As shown in FIG. 13, the first electrode 40 is disposed to face the second electrode 50, and the piezoelectric layer 60 is disposed between the first electrode 40 and the second electrode 50. The first electrode 40 is in contact with the piezoelectric layer 60. The shape of the first electrode 40 is not limited as long as it can face the second electrode 50, and has a layered or thin film shape. The thickness of the 1st electrode 40 can be 50 nm or more and 300 nm or less, for example. In addition, as for the shape when the first electrode 40 is viewed in a plan view, as long as the piezoelectric layer 60 can be disposed between the second electrode 50 and the second electrode 50 facing each other, It is not limited in particular, For example, it can be set as a rectangle, a circle, etc. Further, when the piezoelectric element 100 is viewed in a plan view, the first electrode 40 and the second electrode 50 have overlapping regions. One function of the first electrode 40 is to serve as one electrode for applying a voltage to the piezoelectric layer 60 (for example, a lower electrode formed below the piezoelectric layer 60).

The first electrode 40 includes, for example, various metals such as nickel, iridium and platinum, conductive oxides thereof (for example, iridium oxide), strontium and ruthenium composite oxide (SrRuO _x : SRO), lanthanum and nickel. A complex oxide (LaNiO _x : LNO) can be exemplified. The first electrode 40 may have a single layer structure of the exemplified materials, or may have a structure in which a plurality of materials are stacked. Further, another layer, such as a titanium layer, may be formed between the first electrode 40 and the insulating film 30.

  The second electrode 50 is disposed to face the first electrode 40 as shown in FIG. The entire second electrode 50 may face the first electrode 40, or a part thereof may face the first electrode 40. The shape of the second electrode 50 is not limited as long as it can be opposed to the first electrode 40. However, when the piezoelectric element 100 is formed into a thin film, a layered or thin film shape is preferable. In this case, the thickness of the second electrode 50 can be set to 20 nm or more and 300 nm or less, for example. Further, the planar shape of the second electrode 50 is not particularly limited as long as the piezoelectric layer 60 can be disposed between the two when the electrode is disposed to face the first electrode 40. For example, It can be rectangular, circular or the like. One function of the second electrode 50 is to serve as one electrode for applying a voltage to the piezoelectric layer 60 (for example, an upper electrode formed on the piezoelectric layer 60). The material of the second electrode 50 can be the same as that of the first electrode 40, for example.

  FIG. 13 shows an example in which the first electrode 40 is formed to be larger than the second electrode 50 in a plan view. However, the second electrode 50 may be formed to be larger than the first electrode 40 in a plan view. . In this case, the second electrode 50 may be formed on the side surface of the piezoelectric layer 60, and the second electrode 50 can also have a function of protecting the piezoelectric layer 60 from moisture, hydrogen, and the like. When one of the first electrode 40 and the second electrode 50 is formed larger than the other, the large electrode may be used as a common electrode for a plurality of piezoelectric elements.

  The piezoelectric layer 60 is disposed between the first electrode 40 and the second electrode 50 as shown in FIG. In the present embodiment, the piezoelectric layer 60 is provided in contact with the first electrode 40. Further, another layer may be formed between the piezoelectric layer 60 and the second electrode 50. Examples of other layers in this case include a titanium layer.

  The thickness of the piezoelectric layer 60 can be, for example, 100 nm or more and 2000 nm or less. If the thickness of the piezoelectric layer 60 is out of this range, sufficient deformation (electromechanical conversion) may not be obtained. The thickness of the piezoelectric layer 60 is more preferably 1000 nm or more and 1500 nm or less. When the thickness of the piezoelectric layer 60 is within such a range, the displacement amount of the piezoelectric element 100 can be made sufficiently large and it can contribute to thinning.

The material of the piezoelectric layer 60 is not particularly limited as long as it has piezoelectricity. For example, an oxide represented by the general formula M _A M _B O ₃ (for example, M _A is Pb, K, Ba, sr, and at least one selected from the group consisting of Bi, _{M B} is, Zr, Ti, Nb, Na , comprises at least one member selected from the group consisting of Ta and La.) and the like.

Of these, the material of the piezoelectric layer 60 is more preferably a composite oxide containing at least lead, zirconium, titanium, and oxygen. More specifically, the composite oxide suitable for the material of the piezoelectric layer 60 is more specifically lead zirconate titanate (Pb (Zr, Ti) O ₃ ) (hereinafter sometimes abbreviated as “PZT”). And lead zirconate titanate niobate (Pb (Zr, Ti, Nb) O ₃ ) (hereinafter sometimes abbreviated as “PZTN”).

Such composite oxide are both wherein it is possible to form a solid solution of oxides of oxide and M _B site M _A site. Such a complex oxide can have a perovskite crystal structure by crystallization. The composite oxide can exhibit piezoelectricity by being crystallized to have a perovskite crystal structure. Accordingly, the piezoelectric layer 60 can be deformed by applying an electric field by the first electrode 40 and the second electrode 50 (electromechanical conversion). Since the piezoelectric element 100 is deformed by the deformation of the piezoelectric layer 60, for example, when an actuator including the piezoelectric element 100 including the insulating layer 30 is configured, the movable portion (insulating layer 30) is deformed (bent). ), Can be vibrated.

  The piezoelectric layer 60 may have a laminated structure. For example, a plurality of piezoelectric layers having different compositions or piezoelectric layers having the same composition may be laminated. Further, the composition of the piezoelectric layer 60 may be inclined in the thickness direction. Further, the number of layers to be stacked is also arbitrary.

  The process of forming a piezoelectric element is performed as follows, for example.

  First, the silicon substrate 10 on which the insulating layer 30 is formed through “3.1. Step of forming an insulating film” is prepared, and the first electrode 40 is formed on the silicon substrate 10. The first electrode 40 can be formed by, for example, a sputtering method, a plating method, a vacuum evaporation method, or the like. The first electrode 40 can be patterned as necessary. Next, the piezoelectric layer 60 is formed on the first electrode 40. The piezoelectric layer 60 can be formed by, for example, a sol-gel method, a CVD method, a MOD method, a sputtering method, a laser ablation method, or the like. Here, when the material of the piezoelectric layer 60 is, for example, PZT, the piezoelectric layer 60 can be crystallized by baking at about 650 ° C. to 750 ° C. in an oxygen atmosphere. Crystallization may be performed after the piezoelectric layer 60 is patterned. The piezoelectric layer 60 may be formed by repeating the above operation at least twice. By doing in this way, the whole crystallinity and crystal quality of the piezoelectric layer 60 can be improved. The piezoelectric layer 60 is formed in contact with the first electrode 40. Next, the second electrode 50 is formed on the piezoelectric layer 60. The second electrode 50 can be formed by, for example, a sputtering method, a plating method, a vacuum evaporation method, or the like. Then, the second electrode 50 and the piezoelectric layer 60 are patterned into a desired shape to form the piezoelectric element 100 as shown in FIG.

3.3. Step of Forming Protective Film The manufacturing method of the liquid jet head according to the present embodiment may include a step of forming a protective film as necessary. In the present embodiment, an example in which the protective film 70 is formed so as to cover the piezoelectric element 100 is shown. In the present embodiment, an example in which the protective film 70 is formed is shown. However, as long as the piezoelectric element 100 can be mechanically and chemically protected, the piezoelectric element 100 is formed by a protective plate or the like without depending on the protective film 70. It may be covered.

  The protective film 70 is made of a removable material such as a resist, for example. For example, as shown in FIG. 13, the protective film 70 is formed so as to entirely cover one main surface side of the silicon substrate 10 including the piezoelectric element 1000. The protective film 70 can be formed by, for example, a CVD method or a spin coating method.

  When the protective film 70 is formed through this step, the protective film 70 can easily prevent, for example, the piezoelectric element 100 from being in mechanical contact with other members or being etched. Thereby, handling of the silicon substrate 10 etc. in each subsequent process can be facilitated. The protective film 70 can be removed when it becomes unnecessary.

3.4. Surface Treatment Step, Mask Layer Formation Step, Patterning Step, and Etching Step Next, as shown in FIGS. 14 to 17, the surface treatment step, the mask layer formation step, and the patterning step are performed on the other main surface of the silicon substrate 10. And an etching process. These steps are as already described in the section “1. Processing method of silicon substrate”, and the same members are denoted by the same reference numerals and detailed description thereof is omitted.

  FIG. 14 schematically shows how the surface treatment process is performed on the other main surface of the silicon substrate 10. FIG. 15 shows a state in which the mask layer 20 is formed through the mask layer forming step. FIG. 16 shows a state in which the mask pattern 22 is formed through the patterning process. FIG. 17 shows a state in which the holes 14 are formed in the silicon substrate 10 through the etching process. And a surface treatment process and a mask layer formation process are performed within the same chamber. In the present embodiment, chromium oxide is selected as the material of the mask layer 20, and the mask layer 20 is a layer containing chromium. In the etching process, the insulating film 30 functions as an etching stopper. Further, in the method of manufacturing the liquid jet head, the other main surface of the silicon substrate 10 may be cleaned with the above-described solution containing hydrogen fluoride before the surface treatment process.

  Through these steps, a structure as shown in FIG. 17 is formed. As shown in FIG. 17, the holes 14 in the silicon substrate 10 are formed corresponding to the structures in which the first electrode 40, the second electrode 50, and the piezoelectric layer 60 of the piezoelectric element 100 are combined. ing. The holes 14 serve as a liquid flow path in the liquid ejecting head 200.

3.5. Step of Providing Nozzle Plate The nozzle plate 80 has nozzle holes 82 as shown in FIG. The nozzle hole 82 communicates with a liquid flow path formed in the silicon substrate 10, and liquid can be discharged from the nozzle hole 82. In the nozzle plate 80, for example, a large number of nozzle holes 82 are provided in a row. Examples of the material of the nozzle plate 80 include silicon and stainless steel (SUS).

  By this step, the nozzle plate 80 is provided on the other main surface of the silicon substrate 10. The nozzle plate 80 and the silicon substrate 10 can be joined using, for example, an adhesive.

3.6. Liquid ejecting head In this embodiment, since the protective film 7 is formed, the protective film 70 is removed, and the liquid ejecting head 200 as shown in FIG. 19 is manufactured. In addition, you may have the process of removing the mask pattern 22 before the process of providing the nozzle plate 80. The removal of the mask pattern 22 can be performed, for example, by etching the mask pattern 22 with an etchant used in the patterning process. When the process of removing the mask pattern 22 is included, the liquid ejecting head 201 as shown in FIG. 20 is manufactured through the process of providing the nozzle plate 80.

  The liquid jet head 200 manufactured by the liquid jet head manufacturing method of the present embodiment described above includes the silicon substrate 10 on which the liquid flow path is formed and the insulation formed on one main surface of the silicon substrate 100. A layer 30, a piezoelectric element 100 formed on the surface of the insulating layer 30 opposite to the silicon substrate 10, a mask pattern 22 (chrome-containing layer) formed on the other main surface of the silicon substrate 10, and a mask pattern And a nozzle plate 80 formed on the surface opposite to the silicon substrate 10 of 22 (chrome-containing layer). Of the flow path formed in the silicon substrate 10, a portion corresponding to the piezoelectric element 100 is a portion whose volume can be changed by the operation of the piezoelectric element 100, and serves as a pressure generation chamber. Can be fulfilled.

  Such a liquid jet head has the mask pattern 22 (chromium-containing layer), so that the dimensional accuracy of the flow path formed in the silicon substrate 10 is high and the adhesiveness between the silicon substrate 10 and the nozzle plate 80 is high. . Therefore, for example, the reliability of the liquid jet head 200 according to the present embodiment is increased. In addition, the liquid jet head 200 according to the present embodiment can be manufactured with fewer steps because the step of removing the mask pattern 22 (chromium-containing layer) is unnecessary.

  As described above, the liquid ejecting head 200 and the liquid ejecting head 201 have a flow path with high dimensional accuracy, and can precisely control the amount of liquid ejected. Such liquid jet heads include, for example, color material jet heads used for manufacturing color filters such as liquid crystal displays, electrode material jet heads used for electrode formation for organic EL displays, FEDs (surface emitting displays), biochips, and the like. It can be used as a bioorganic matter ejecting head used for manufacturing.

3.7. According to the method of manufacturing the liquid jet head of this embodiment, the silicon substrate 10 can be processed with good dimensional accuracy in a simple process, and the flow path of the liquid jet head can be formed on the silicon substrate 10 with high dimensional accuracy. Can be formed. Further, the processing speed of the silicon substrate 10 is high, and the liquid jet head can be manufactured with high throughput.

4). Liquid Ejecting Device The liquid ejecting head manufactured by the method of manufacturing a liquid ejecting head according to the present embodiment can be used for a liquid ejecting apparatus, for example. This will be described with reference to the drawings. The liquid ejecting apparatus includes the above-described liquid ejecting head. Hereinafter, a case where the liquid ejecting apparatus is an ink jet printer having the above-described liquid ejecting head will be described. FIG. 21 is a perspective view schematically illustrating the liquid ejecting apparatus 700 according to the present embodiment.

  As illustrated in FIG. 21, the liquid ejecting apparatus 700 includes a head unit 730, a driving unit 710, and a control unit 760. Further, the liquid ejecting apparatus 700 includes an apparatus main body 720, a paper feed unit 750, a tray 721 for installing the recording paper P, a discharge port 722 for discharging the recording paper P, and an operation disposed on the upper surface of the apparatus main body 720. A panel 770.

  The head unit 730 includes an ink jet recording head (hereinafter, also simply referred to as “head”) configured from the liquid ejecting head 200 described above. The head unit 730 further includes an ink cartridge 731 that supplies ink to the head, and a transport unit (carriage) 732 on which the head and the ink cartridge 731 are mounted.

  The drive unit 710 can reciprocate the head unit 730. The drive unit 710 includes a carriage motor 741 serving as a drive source for the head unit 730, and a reciprocating mechanism 742 that receives the rotation of the carriage motor 741 and reciprocates the head unit 730.

  The reciprocating mechanism 742 includes a carriage guide shaft 744 supported at both ends by a frame (not shown), and a timing belt 743 extending in parallel with the carriage guide shaft 744. The carriage guide shaft 744 supports the carriage 732 while allowing the carriage 732 to freely reciprocate. Further, the carriage 732 is fixed to a part of the timing belt 743. When the timing belt 743 is caused to travel by the operation of the carriage motor 741, it is guided to the carriage guide shaft 744 and the head unit 730 reciprocates. During this reciprocation, ink is appropriately discharged from the head, and printing on the recording paper P is performed.

  In the present embodiment, an example is shown in which printing is performed while both the liquid ejecting head 200 and the recording paper P move. However, in the liquid ejecting apparatus of the present invention, the liquid ejecting head 200 and the recording paper P are mutually connected. A mechanism that relatively changes the position and prints on the recording paper P may be used. Further, in the present embodiment, an example is shown in which printing is performed on the recording paper P. However, the recording medium that can be printed by the liquid ejecting apparatus of the present invention is not limited to paper, and may be cloth, film, A wide range of media such as metal can be used, and the configuration can be changed as appropriate.

  The control unit 760 can control the head unit 730, the drive unit 710, and the paper feed unit 750.

  The paper feeding unit 750 can feed the recording paper P from the tray 721 to the head unit 730 side. The paper feed unit 750 includes a paper feed motor 751 serving as a drive source thereof, and a paper feed roller 752 that rotates by the operation of the paper feed motor 751. The paper feed roller 752 includes a driven roller 752a and a drive roller 752b that face each other up and down across the feeding path of the recording paper P. The drive roller 752b is connected to the paper feed motor 751. When the paper supply unit 750 is driven by the control unit 760, the recording paper P is sent so as to pass below the head unit 730.

  The head unit 730, the drive unit 710, the control unit 760, and the paper feed unit 750 are provided inside the apparatus main body 720.

  The liquid ejecting apparatus 700 includes the liquid ejecting head 200 with high dimensional accuracy. Therefore, the printing characteristics of the liquid ejecting apparatus 700 are good.

  The liquid ejecting apparatus exemplified above has one liquid ejecting head, and the liquid ejecting head can perform printing on a recording medium. However, the liquid ejecting apparatus may have a plurality of liquid ejecting heads. . When the liquid ejecting apparatus includes a plurality of liquid ejecting heads, the plurality of liquid ejecting heads may be independently operated as described above, or the plurality of liquid ejecting heads may be connected to each other to It may be a gathered head. An example of such a set of heads is a line-type head in which nozzle holes of a plurality of heads have a uniform interval as a whole.

  As described above, the ink jet recording apparatus 700 as an ink jet printer has been described as an example of the liquid ejecting apparatus according to the present invention. However, the liquid ejecting apparatus according to the present invention can be used industrially. As the liquid (liquid material) discharged in this case, various functional materials adjusted to an appropriate viscosity with a solvent or a dispersion medium can be used. In addition to the exemplified image recording apparatus such as a printer, the liquid ejecting apparatus of the present invention includes a color material ejecting apparatus, an organic EL display, an FED (surface emitting display), and an electrophoretic display used for manufacturing a color filter such as a liquid crystal display. The present invention can also be suitably used as a liquid material ejecting apparatus used for forming electrodes such as electrodes and color filters, and a bioorganic material ejecting apparatus used for biochip manufacturing.

  In addition, embodiment mentioned above and various deformation | transformation are examples, respectively, Comprising: This invention is not necessarily limited to these. For example, a plurality of embodiments and modifications can be combined as appropriate.

  The present invention is not limited to the above-described embodiments, and various modifications can be made. For example, the present invention includes substantially the same configuration (for example, a configuration having the same function, method, and result, or a configuration having the same purpose and effect) as the configuration described in the embodiment. In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that achieves the same effect as the configuration described in the embodiment or a configuration that can achieve the same object. In addition, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

DESCRIPTION OF SYMBOLS 10 ... Silicon substrate, 12 ... Opening, 14 ... Hole, 20 ... Mask layer, 22 ... Mask pattern, 22a ... Step, 24 ... Opening, 26 ... First mask layer, 28 ... Second mask layer, 30 ... Insulating film 40 ... first electrode, 50 ... second electrode, 60 ... piezoelectric layer, 70 ... protective film, 80 ... nozzle plate, 82 ... nozzle hole, 100 ... piezoelectric element, 200, 201 ... liquid ejecting head, 700 ... liquid Ejector, 710 ... Drive unit, 720 ... Device body, 721 ... Tray, 722 ... Discharge port, 730 ... Head unit, 731 ... Ink cartridge, 732 ... Carriage, 741 ... Carriage motor, 742 ... Reciprocating mechanism, 743 ... Timing Belt 744 Carriage guide shaft 750 Paper feed unit 751 Paper feed motor 752 Paper feed roller 752a Driven roller 752b Drive Ra, 760 ... controller, 770 ... operation panel, C ... chamber, S ... power supply, E ... electrode plate, I ... ion, T ... target, e ... distance

Claims (9)

A surface treatment step of sputtering the main surface of the silicon substrate;
A mask layer forming step of forming a mask layer on the main surface of the silicon substrate;
A patterning step of patterning the mask layer to form a mask pattern;
An etching step of wet etching the silicon substrate according to the shape of the mask pattern;
Including
The mask layer contains chromium;
The method for processing a silicon substrate, wherein the surface treatment step and the mask layer forming step are performed in the same chamber. In claim 1,
The mask layer forming step is a silicon substrate processing method performed by a sputtering method. In claim 1 or claim 2,
The method for processing a silicon substrate, wherein the mask layer includes a first mask layer mainly composed of chromium oxide and a second mask layer mainly composed of chromium. In claim 3,
The method of processing a silicon substrate, wherein the mask layer has the first mask layer on the silicon substrate side, and has the second mask layer on the opposite side of the first mask layer from the silicon substrate. In any one of Claims 1 thru | or 4,
The said etching process is a processing method of a silicon substrate performed by the etching liquid which has potassium hydroxide as a main component. In any one of Claims 1 thru | or 5,
A method for processing a silicon substrate, further comprising a step of washing a main surface of the silicon substrate with a solution containing hydrogen fluoride before the surface treatment step. Forming an insulating film on one main surface of the silicon substrate;
Forming a piezoelectric element on the surface of the insulating film opposite to the silicon substrate;
A surface treatment step of sputtering the other main surface of the silicon substrate;
A mask layer forming step of forming a mask layer containing chromium on the other main surface of the silicon substrate;
A patterning step of patterning the mask layer in correspondence with the piezoelectric element to form a mask pattern;
An etching process in which the silicon substrate is anisotropically etched with an etchant mainly composed of potassium hydroxide in accordance with the shape of the mask pattern to form a liquid flow path;
Providing a nozzle plate on the other main surface of the silicon substrate;
Including
The method for manufacturing a liquid jet head, wherein the surface treatment step and the mask layer forming step are performed in the same chamber. In claim 7,
A method of manufacturing a liquid jet head, further comprising a step of cleaning a main surface of the silicon substrate with a solution containing hydrogen fluoride before the surface treatment step. A silicon substrate having a liquid flow path formed thereon;
An insulating layer formed on one main surface of the silicon substrate;
A piezoelectric element formed on a surface of the insulating layer opposite to the silicon substrate;
A chromium-containing layer formed on the other main surface of the silicon substrate;
A nozzle plate formed on the surface of the chromium-containing layer opposite to the silicon substrate;
A liquid ejecting head.